Mercurial > repos > tabletprog
annotate modules/il.tp @ 377:93c28eee141e default tip
Merge
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Sat, 15 Aug 2015 22:45:33 -0700 |
| parents | d949fe826e04 |
| children |
| rev | line source |
|---|---|
| 185 | 1 { |
| 2 //commutative ops | |
| 3 _add <- 0 | |
| 4 _and <- 1 | |
| 5 _or <- 2 | |
| 6 _xor <- 3 | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
7 _muls <- 4 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
8 _mulu <- 5 |
| 185 | 9 //non-commutative ops |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
10 _divs <- 6 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
11 _divu <- 7 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
12 _sub <- 8 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
13 _cmp <- 9 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
14 _not <- 10 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
15 _sl <- 11 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
16 _asr <- 12 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
17 _lsr <- 13 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
18 _rol <- 14 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
19 _ror <- 15 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
20 _mov <- 16 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
21 _call <- 17 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
22 _ret <- 18 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
23 _skipif <- 19 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
24 _skipifelse <- 20 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
25 _save <- 21 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
26 _bool <- 22 |
|
361
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
27 _label <- 23 |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
28 _data <- 24 |
| 185 | 29 |
| 30 _names <- #[ | |
| 31 "add" | |
| 32 "and" | |
| 33 "or" | |
| 34 "xor" | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
35 "muls" |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
36 "mulu" |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
37 "divs" |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
38 "divu" |
| 185 | 39 "sub" |
| 40 "cmp" | |
| 41 "not" | |
| 42 "sl" | |
| 43 "asr" | |
| 44 "lsr" | |
| 45 "rol" | |
| 46 "ror" | |
| 47 "mov" | |
| 48 "call" | |
| 49 "ret" | |
| 50 "skipIf" | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
51 "skipIf:else" |
|
195
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
52 "save" |
|
310
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
53 "bool" |
|
361
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
54 "label" |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
55 "data" |
| 185 | 56 ] |
| 57 | |
| 58 op3:a:b:out:size <- :_opcode :_ina :_inb :_out :_size { | |
| 59 #{ | |
| 60 opcode <- { _opcode } | |
| 61 ina <- { _ina } | |
| 62 inb <- { _inb } | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
63 commutative? <- { _opcode < _divs } |
| 185 | 64 out <- { _out } |
| 65 size <- { _size } | |
| 66 numops <- { 3 } | |
| 67 name <- { _names get: _opcode } | |
| 68 string <- { name . " " . (string: _ina) . " " . (string: _inb) . " " . (string: _out) . " " . (string: _size) } | |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
69 recordUsage:at <- :tracker :address { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
70 if: (not: (_ina isInteger?)) { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
71 _ina recordUsage: tracker at: 0 | address withSize: _size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
72 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
73 _inb recordUsage: tracker at: 0 | address withSize: _size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
74 _out recordUsage: tracker at: 1 | address withSize: _size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
75 } |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
76 assignRegs:at:withSource:andUsage <- :assignments :at :regSrc :usage { |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
77 newa <- if: (not: (_ina isInteger?)) { |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
78 _ina assign: assignments withSource: regSrc |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
79 } else: { _ina } |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
80 newb <- _inb assign: assignments withSource: regSrc |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
81 newout <- _out assign: assignments withSource: regSrc |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
82 op3: _opcode a: newa b: newb out: newout size: _size |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
83 } |
| 185 | 84 } |
| 85 } | |
| 86 op2:in:out:size <- :_opcode :_in :_out :_size { | |
| 87 #{ | |
| 88 opcode <- { _opcode } | |
| 89 in <- { _in } | |
| 90 out <- { _out } | |
| 91 size <- { _size } | |
| 92 numops <- { 2 } | |
| 93 name <- { _names get: _opcode } | |
| 94 string <- { name . " " . (string: _in) . " " . (string: _out) . " " . (string: _size) } | |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
95 recordUsage:at <- :tracker :address { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
96 if: (not: (_in isInteger?)) { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
97 _in recordUsage: tracker at: 0 | address withSize: _size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
98 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
99 _out recordUsage: tracker at: 1 | address withSize: _size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
100 } |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
101 assignRegs:at:withSource:andUsage <- :assignments :at :regSrc :usage { |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
102 newin <- if: (not: (_in isInteger?)) { |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
103 _in assign: assignments withSource: regSrc |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
104 } else: { _in } |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
105 newout <- _out assign: assignments withSource: regSrc |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
106 op2: _opcode in: newin out: newout size: _size |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
107 } |
| 185 | 108 } |
| 109 } | |
| 110 op1:arg:size <- :_opcode :_arg :_size { | |
| 111 #{ | |
| 112 opcode <- { _opcode } | |
| 113 arg <- { _arg } | |
| 114 size <- { _size } | |
| 115 numops <- { 1 } | |
| 116 name <- { _names get: _opcode } | |
| 117 string <- { name . " " . (string: _arg) . " " . (string: _size) } | |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
118 recordUsage:at <- :tracker :address { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
119 if: (not: (_arg isInteger?)) { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
120 _arg recordUsage: tracker at: address withSize: _size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
121 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
122 } |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
123 assignRegs:at:withSource:andUsage <- :assignments :at :regSrc :usage { |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
124 newarg <- if: (not: (_arg isInteger?)) { |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
125 _arg assign: assignments withSource: regSrc |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
126 } else: { _arg } |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
127 op1: _opcode arg: newarg size: _size |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
128 } |
| 185 | 129 } |
| 130 } | |
| 131 | |
| 132 _sizenames <- #["b" "w" "l" "q"] | |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
133 _size <- :_bytes { |
| 185 | 134 #{ |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
135 bytes <- { _bytes } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
136 string <- { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
137 idx <- if: _bytes = 8 { 3 } else: { _bytes / 2} |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
138 _sizenames get: idx |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
139 } |
| 185 | 140 = <- :other { |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
141 _bytes = (other bytes) |
| 185 | 142 } |
| 143 <= <- :other { | |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
144 _bytes <= (other bytes) |
| 185 | 145 } |
| 146 >= <- :other { | |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
147 _bytes >= (other bytes) |
| 185 | 148 } |
| 149 > <- :other { | |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
150 _bytes > (other bytes) |
| 185 | 151 } |
| 152 < <- :other { | |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
153 _bytes < (other bytes) |
| 185 | 154 } |
| 155 } | |
| 156 } | |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
157 byte <- _size: 1 |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
158 word <- _size: 2 |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
159 long <- _size: 4 |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
160 quad <- _size: 8 |
| 185 | 161 |
| 162 _retr <- #{ | |
| 163 isInteger? <- { false } | |
| 164 register? <- { true } | |
| 165 argument? <- { false } | |
| 166 return? <- { true } | |
| 167 string <- { "retr" } | |
| 168 = <- :other { | |
| 169 (not: (other isInteger?)) && (other register?) && (other return?) | |
| 170 } | |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
171 != <- :other { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
172 not: self = other |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
173 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
174 recordUsage:at:withSize <- :tracker :address :size { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
175 //TODO: Figure out what tracking is necessary here |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
176 } |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
177 assign:withSource <- :assignments :regSrc { |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
178 regSrc allocRet |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
179 } |
| 185 | 180 } |
| 181 | |
| 182 _condnames <- #[ | |
| 183 "eq" | |
| 184 "neq" | |
| 185 "ge" | |
| 186 "le" | |
| 187 "gr" | |
| 188 "ls" | |
| 189 "uge" | |
| 190 "ule" | |
| 191 "ugr" | |
| 192 "uls" | |
| 193 ] | |
| 194 condition <- :num { | |
| 195 #{ | |
| 196 cc <- { num } | |
| 197 string <- { _condnames get: num } | |
| 198 = <- :other { num = (other cc) } | |
| 199 } | |
| 200 } | |
| 201 _eq <- condition: 0 | |
| 202 _neq <- condition: 1 | |
| 203 _ge <- condition: 2 | |
| 204 _le <- condition: 3 | |
| 205 _gr <- condition: 4 | |
| 206 _ls <- condition: 5 | |
| 207 _uge <- condition: 6 | |
| 208 _ule <- condition: 7 | |
| 209 _ugr <- condition: 8 | |
| 210 _uls <- condition: 9 | |
|
361
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
211 |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
212 _curLabel <- 0 |
| 185 | 213 |
| 214 #{ | |
| 215 b <- { byte } | |
| 216 w <- { word } | |
| 217 l <- { long } | |
| 218 q <- { quad } | |
|
352
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
219 |
|
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
220 sizeFromBytes <- :bytes { |
|
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
221 if: bytes < 4 { |
|
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
222 if: bytes = 1 { b } else: { w } |
|
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
223 } else: { |
|
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
224 if: bytes = 4 { l } else: { q } |
|
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
225 } |
|
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
226 } |
| 185 | 227 |
| 228 eq <- { _eq } | |
| 229 neq <- { _neq } | |
| 230 | |
| 231 //signed conditions | |
| 232 ge <- { _ge } | |
| 233 le <- { _le } | |
| 234 gr <- { _gr } | |
| 235 ls <- { _ls } | |
| 236 | |
| 237 //unsigned conditions | |
| 238 uge <- { _uge } | |
| 239 ule <- { _ule } | |
| 240 ugr <- { _ugr } | |
| 241 uls <- { _uls } | |
| 242 | |
| 243 | |
| 244 reg <- :num { | |
| 245 #{ | |
| 246 isInteger? <- { false } | |
| 247 register? <- { true } | |
| 248 argument? <- { false } | |
| 249 return? <- { false } | |
| 250 regnum <- { num } | |
| 251 string <- { "r" . (string: num) } | |
| 252 = <- :other { | |
| 253 (not: (other isInteger?)) && (other register?) && (not: (other argument?)) && (not: (other return?)) && num = (other regnum) | |
| 254 } | |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
255 != <- :other { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
256 not: self = other |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
257 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
258 recordUsage:at:withSize <- :tracker :address :size { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
259 tracker reg: self usedAt: address withSize: size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
260 } |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
261 assign:withSource <- :assignments :regSrc { |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
262 assignments get: self |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
263 } |
| 185 | 264 } |
| 265 } | |
| 266 arg <- :num { | |
| 267 #{ | |
| 268 isInteger? <- { false } | |
| 269 register? <- { true } | |
| 270 argument? <- { true } | |
| 271 return? <- { false } | |
| 272 argnum <- { num } | |
| 273 string <- { "a" . (string: num) } | |
| 274 = <- :other { | |
|
354
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
275 (not: (other isInteger?)) && (other register?) && (other argument?) && num = (other argnum) |
| 185 | 276 } |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
277 != <- :other { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
278 not: self = other |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
279 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
280 recordUsage:at:withSize <- :tracker :address :size { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
281 tracker arg: self usedAt: address withSize: size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
282 } |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
283 assign:withSource <- :assignments :regSrc { |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
284 regSrc allocArg: num |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
285 } |
| 185 | 286 } |
| 287 } | |
| 288 retr <- { _retr } | |
| 289 | |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
290 base:offset <- :_base :_offset { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
291 #{ |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
292 base <- { _base } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
293 offset <- { _offset } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
294 string <- { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
295 start <- if: _offset = 0 { "" } else: { (string: _offset) } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
296 start . "[" . (string: _base) . "]" |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
297 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
298 recordUsage:at:withSize <- :tracker :address :size { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
299 _base recordUsage: tracker at: address withSize: size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
300 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
301 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
302 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
303 |
| 185 | 304 add <- :ina inb out size { |
| 305 op3: _add a: ina b: inb out: out size: size | |
| 306 } | |
| 307 | |
| 308 sub <- :ina inb out size { | |
| 309 op3: _sub a: ina b: inb out: out size: size | |
| 310 } | |
| 311 | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
312 cmp <- :ina inb size { |
|
352
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
313 op2: _cmp in: ina out: inb size: size |
| 185 | 314 } |
| 315 | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
316 band <- :ina inb out size { |
| 185 | 317 op3: _and a: ina b: inb out: out size: size |
| 318 } | |
| 319 | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
320 bor <- :ina inb out size { |
| 185 | 321 op3: _or a: ina b: inb out: out size: size |
| 322 } | |
| 323 | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
324 bxor <- :ina inb out size { |
| 185 | 325 op3: _xor a: ina b: inb out: out size: size |
| 326 } | |
| 327 | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
328 muls <- :ina inb out size { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
329 op3: _muls a: ina b: inb out: out size: size |
|
310
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
330 } |
|
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
331 |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
332 mulu <- :ina inb out size { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
333 op3: _mulu a: ina b: inb out: out size: size |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
334 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
335 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
336 divs <- :ina inb out size { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
337 op3: _divs a: ina b: inb out: out size: size |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
338 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
339 |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
340 divu <- :ina inb out size { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
341 op3: _divu a: ina b: inb out: out size: size |
|
310
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
342 } |
|
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
343 |
| 185 | 344 bnot <- :in out size { |
| 345 op2: _not in: in out: out size: size | |
| 346 } | |
| 347 | |
| 348 sl <- :shift in out size { | |
| 349 op3: _sl a: shift b: in out: out size: size | |
| 350 } | |
| 351 | |
| 352 asr <- :shift in out size { | |
| 353 op3: _asr a: shift b: in out: out size: size | |
| 354 } | |
| 355 | |
| 356 lsr <- :shift in out size { | |
| 357 op3: _lsr a: shift b: in out: out size: size | |
| 358 } | |
| 359 | |
| 360 rol <- :rot in out size { | |
| 361 op3: _rol a: rot b: in out: out size: size | |
| 362 } | |
| 363 | |
| 364 ror <- :rot in out size { | |
| 365 op3: _ror a: rot b: in out: out size: size | |
| 366 } | |
| 367 | |
| 368 mov <- :in out size { | |
| 369 op2: _mov in: in out: out size: size | |
| 370 } | |
| 371 | |
| 372 call:withArgs <- :_target :_args { | |
| 373 #{ | |
| 374 opcode <- { _call } | |
| 375 target <- { _target } | |
| 376 args <- { _args } | |
| 377 numops <- { 0 } | |
| 378 name <- { _names get: _call } | |
| 379 string <- { | |
| 380 argstr <- _args map: :el { | |
| 381 string: el | |
| 382 } | |
| 383 name . " " . (string: _target) . " " . (argstr join: " ") | |
| 384 } | |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
385 recordUsage:at <- :tracker :address { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
386 if: (not: (_target isString?)) { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
387 //TODO: use size l for 32-bit targets or an abstract pointer size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
388 _target recordUsage: tracker at: address withSize: q |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
389 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
390 foreach: _args :_ arg { |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
391 if: (not: (arg isInteger?)) { |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
392 //TODO: have some mechanism for properly expressing sizes of arguments |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
393 arg recordUsage: tracker at: address withSize: q |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
394 } |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
395 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
396 } |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
397 assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage { |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
398 newtarget <- if: (_target isString?) { _target } else: { |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
399 _target assign: assignments withSource: regSrc |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
400 } |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
401 newargs <- _args map: :arg { |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
402 if: (arg isInteger?) { arg } else: { |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
403 arg assign: assignments withSource: regSrc |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
404 } |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
405 } |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
406 newcall <- call: newtarget withArgs: newargs |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
407 regSrc returnAll |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
408 raddress <- address reverse |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
409 foreach: (usage liveArgsAt: raddress) :_ arg { |
|
354
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
410 regSrc allocArg: (arg argnum) |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
411 } |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
412 foreach: (usage liveRegsAt: raddress) :_ reg { |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
413 regSrc allocSpecific: (assignments get: reg) |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
414 } |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
415 tosave <- regSrc needSaveForCall |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
416 if: (tosave length) > 0 { |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
417 save: tosave #[newcall] |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
418 } else: { |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
419 newcall |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
420 } |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
421 } |
| 185 | 422 } |
| 423 } | |
| 424 | |
| 425 return <- :val size { | |
| 426 op1: _ret arg: val size: size | |
| 427 } | |
| 428 skipIf <- :_cond _toskip { | |
| 429 #{ | |
| 430 opcode <- { _skipif } | |
| 431 toskip <- { _toskip } | |
| 432 cond <- { _cond } | |
| 433 numops <- { 0 } | |
| 434 name <- { _names get: _skipif } | |
| 435 string <- { | |
| 436 block <- (_toskip map: :el { string: el }) join: "\n\t" | |
| 437 if: (_toskip length) > 0 { | |
| 438 block <- "\n\t" . block . "\n" | |
| 439 } | |
| 440 name . " " . (string: _cond) . " {" . block . "}" | |
| 441 } | |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
442 recordUsage:at <- :tracker :address { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
443 foreach: _toskip :idx inst { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
444 inst recordUsage: tracker at: idx | address |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
445 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
446 } |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
447 assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage { |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
448 newskip <- #[] |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
449 foreach: _toskip :idx inst { |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
450 newskip append: (inst assignRegs: assignments at: idx | address withSource: regSrc andUsage: usage) |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
451 } |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
452 skipIf: _cond newskip |
|
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
453 } |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
454 to2OpInst <- { |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
455 skipIf: _cond (to2Op: _toskip) |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
456 } |
| 185 | 457 } |
| 458 } | |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
459 skipIf:else <- :_cond _toskip :_else { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
460 #{ |
|
356
3b023e5a0b42
llcompile almost working well enough for fib sample
Michael Pavone <pavone@retrodev.com>
parents:
354
diff
changeset
|
461 opcode <- { _skipifelse } |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
462 toskip <- { _toskip } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
463 else <- { _else } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
464 cond <- { _cond } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
465 numops <- { 0 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
466 name <- { _names get: _skipifelse } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
467 string <- { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
468 block <- (_toskip map: :el { string: el }) join: "\n\t" |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
469 if: (_toskip length) > 0 { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
470 block <- "\n\t" . block . "\n" |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
471 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
472 elseblock <- (_else map: :el { string: el }) join: "\n\t" |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
473 if: (_else length) > 0 { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
474 elseblock <- "\n\t" . elseblock . "\n" |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
475 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
476 name . " " . (string: _cond) . " {" . block . "} {" . elseblock . "}" |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
477 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
478 recordUsage:at <- :tracker :address { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
479 foreach: _toskip :idx inst { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
480 inst recordUsage: tracker at: idx | address |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
481 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
482 foreach: _else :idx inst { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
483 inst recordUsage: tracker at: idx | address |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
484 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
485 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
486 assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
487 newskip <- #[] |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
488 foreach: _toskip :idx inst { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
489 newskip append: (inst assignRegs: assignments at: idx | address withSource: regSrc andUsage: usage) |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
490 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
491 newelse <- #[] |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
492 foreach: _else :idx inst { |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
493 newelse append: (inst assignRegs: assignments at: idx | address withSource: regSrc andUsage: usage) |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
494 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
495 skipIf: _cond newskip else: newelse |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
496 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
497 to2OpInst <- { |
|
354
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
498 skipIf: _cond (to2Op: _toskip) else: (to2Op: _else) |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
499 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
500 } |
|
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
501 } |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
502 save <- :regs :_scope{ |
|
195
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
503 #{ |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
504 opcode <- { _save } |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
505 numops <- { 0 } |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
506 name <- { _names get: _save } |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
507 tosave <- { regs } |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
508 scope <- { _scope } |
|
195
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
509 string <- { |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
510 block <- _scope join: "\n\t" |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
511 if: (_scope length) > 0 { |
|
195
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
512 block <- "\n\t" . block . "\n" |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
513 } |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
514 name . " " . (regs join: " ") . " {" . block . "}" |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
515 } |
|
354
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
516 recordUsage:at <- :tracker :address { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
517 foreach: regs :_ reg { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
518 reg recordUsage: tracker at: address withSize: q |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
519 } |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
520 foreach: _scope :idx inst { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
521 inst recordUsage: tracker at: idx | address |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
522 } |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
523 } |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
524 assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
525 newregs <- regs map: :reg { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
526 reg assign: assignments withSource: regSrc |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
527 } |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
528 idx <- 0 |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
529 newscope <- _scope map: :inst { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
530 i <- inst assignRegs: assignments at: idx | address withSource: regSrc andUsage: usage |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
531 idx <- idx + 1 |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
532 i |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
533 } |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
534 save: newregs newscope |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
535 } |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
536 to2OpInst <- { |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
537 save: regs (to2Op: _scope) |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
538 } |
|
195
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
539 } |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
540 } |
| 185 | 541 |
|
310
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
542 //produces a non-zero value or zero based on condition code flags |
|
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
543 bool <- :_cond _out { |
|
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
544 #{ |
|
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
545 opcode <- { _bool } |
|
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
546 cond <- { _cond } |
|
315
f987bb2a1911
WIP native compiler work
Michael Pavone <pavone@retrodev.com>
parents:
310
diff
changeset
|
547 out <- { _out } |
|
352
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
548 name <- { _names get: _bool } |
|
310
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
549 numops <- { 0 } |
|
352
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
550 string <- { |
|
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
551 name . " " . cond . " " . out |
|
f74ce841fd1e
Produce something resembling correct il from low level dialect
Michael Pavone <pavone@retrodev.com>
parents:
350
diff
changeset
|
552 } |
|
354
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
553 recordUsage:at <- :tracker :address { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
554 _out recordUsage: tracker at: address withSize: b |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
555 } |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
556 assignRegs:at:withSource:andUsage <- :assignments :address :regSrc :usage { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
557 newout <- if: (_out register?) { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
558 _out assign: assignments withSource: regSrc |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
559 } else: { _out } |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
560 bool: _cond newout |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
561 } |
|
310
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
562 } |
|
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
563 } |
|
361
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
564 |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
565 label <- { |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
566 _labelNum <- _curLabel |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
567 _curLabel <- _curLabel + 1 |
|
363
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
568 _offset <- option none |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
569 _forwardRefs <- #[] |
|
361
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
570 #{ |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
571 opcode <- { _label } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
572 numops <- { 0 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
573 name <- { _names get: opcode } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
574 string <- { name . " " . _labelNum } |
|
363
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
575 length <- { 0 } |
|
361
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
576 reference <- { |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
577 #{ |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
578 isInteger? <- { false } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
579 register? <- { false } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
580 argument? <- { false } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
581 return? <- { false } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
582 label? <- { true } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
583 num <- { _labelNum } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
584 string <- { "label " . _labelNum} |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
585 |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
586 recordUsage:at:withSize <- :tracker :address :size { |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
587 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
588 assign:withSource <- :assignments :regSrc { |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
589 self |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
590 } |
|
363
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
591 withOffset:else <- :fun :elsefun { |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
592 _offset value: :off { |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
593 fun: off |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
594 } none: { |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
595 _forwardRefs append: fun |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
596 elsefun: |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
597 } |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
598 } |
|
361
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
599 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
600 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
601 recordUsage:at <- :tracker :address { |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
602 |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
603 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
604 assignRegs:at:withSource:andUsage <- :assignments :at :regSrc :usage { |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
605 self |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
606 } |
|
363
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
607 flattenTo:at <- :dest :idx { |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
608 if: (_offset none?) { |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
609 _offset <- option value: idx |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
610 foreach: _forwardRefs :_ fun { |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
611 fun: idx |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
612 } |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
613 _forwardRefs <- #[] |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
614 } |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
615 idx |
|
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
616 } |
|
361
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
617 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
618 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
619 data <- :_bytes { |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
620 #{ |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
621 opcode <- { _data } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
622 numops <- { 0 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
623 name <- { _names get: opcode } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
624 string <- { name . " " . _bytes } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
625 bytes <- { _bytes } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
626 recordUsage:at <- :tracker :address { |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
627 |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
628 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
629 assignRegs:at:withSource:andUsage <- :assignments :at :regSrc :usage { |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
630 self |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
631 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
632 } |
|
06dceff348ea
llcompile now has Hacky support for calling C functions using dl to lookup symbols and almost has support string constants
Michael Pavone <pavone@retrodev.com>
parents:
356
diff
changeset
|
633 } |
|
310
2308336790d4
WIP compiler module for low-level dialect
Michael Pavone <pavone@retrodev.com>
parents:
203
diff
changeset
|
634 |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
635 allocRegs:withSource <- :instarr :regSrc { |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
636 _regMap <- dict linear |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
637 _argMap <- dict linear |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
638 |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
639 _usageTracker <- :_firstUsage { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
640 #{ |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
641 firstUsage <- _firstUsage |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
642 lastUsage <- _firstUsage |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
643 useCount <- 0 |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
644 maxSize <- byte |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
645 usedAt:withSize <- :address :size { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
646 useCount <- useCount + 1 |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
647 lastUsage <- address |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
648 if: size > maxSize { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
649 maxSize <- size |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
650 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
651 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
652 string <- { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
653 "Uses: " . useCount . ", FirstUse: " . (firstUsage join: ":") . ", Last Use: " . (lastUsage join: ":") . ", Max Size: " . maxSize |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
654 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
655 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
656 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
657 |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
658 _maxUses <- 0 |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
659 liveFrom:to <- :regs :from :to { |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
660 live <- #[] |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
661 foreach: regs :reg usage { |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
662 if: (addrGreatEq: (usage lastUsage) from) && (addrLessEq: (usage firstUsage) to) { |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
663 live append: reg |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
664 } |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
665 } |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
666 live |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
667 } |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
668 regUsage <- #{ |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
669 reg:usedAt:withSize <- :reg :address :size { |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
670 raddress <- address reverse |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
671 usage <- _regMap get: reg elseSet: { |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
672 _usageTracker: raddress |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
673 } |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
674 usage usedAt: raddress withSize: size |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
675 if: (usage useCount) > _maxUses { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
676 _maxUses <- usage useCount |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
677 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
678 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
679 arg:usedAt:withSize <- :arg :address :size { |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
680 raddress <- address reverse |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
681 usage <- _argMap get: arg elseSet: { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
682 _usageTracker: [0 0] |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
683 } |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
684 usage usedAt: raddress withSize: size |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
685 } |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
686 |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
687 liveRegsAt <- :address { |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
688 liveFrom: _regMap address to: address |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
689 } |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
690 liveArgsAt <- :address { |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
691 liveFrom: _argMap address to: address |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
692 } |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
693 |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
694 print <- { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
695 foreach: _regMap :reg usage { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
696 print: (string: reg) . " | " . (string: usage) . "\n" |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
697 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
698 foreach: _argMap :arg usage { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
699 print: (string: arg) . " | " . (string: usage) . "\n" |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
700 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
701 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
702 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
703 foreach: instarr :idx inst { |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
704 inst recordUsage: regUsage at: [idx] |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
705 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
706 print: regUsage |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
707 |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
708 addrLessEq <- :left :right { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
709 lesseq <- true |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
710 while: { lesseq && (not: (left empty?)) && (not: (right empty?)) } do: { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
711 if: (left value) > (right value) { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
712 lesseq <- false |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
713 } else: { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
714 if: (left value) < (right value) { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
715 left <- [] |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
716 } else: { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
717 left <- left tail |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
718 right <- right tail |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
719 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
720 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
721 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
722 lesseq |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
723 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
724 |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
725 addrGreatEq <- :left :right { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
726 greateq <- true |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
727 while: { greateq && (not: (left empty?)) && (not: (right empty?)) } do: { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
728 if: (left value) < (right value) { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
729 greateq <- false |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
730 } else: { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
731 if: (left value) > (right value) { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
732 left <- [] |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
733 } else: { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
734 left <- left tail |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
735 right <- right tail |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
736 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
737 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
738 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
739 greateq |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
740 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
741 |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
742 _assignments <- dict linear |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
743 curuses <- _maxUses |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
744 while: { curuses > 0 && (_assignments length) < (_regMap length) } do: { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
745 foreach: _regMap :reg usage { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
746 if: (usage useCount) = curuses { |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
747 liveArgs <- liveFrom: _argMap (usage firstUsage) to: (usage lastUsage) |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
748 foreach: liveArgs :_ arg { |
|
354
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
749 regSrc allocArg: (arg argnum) |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
750 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
751 |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
752 liveRegs <- liveFrom: _regMap (usage firstUsage) to: (usage lastUsage) |
|
193
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
753 print: (string: reg) . " | Live: " . (liveRegs join: ", ") . ", Live Args: " . (liveArgs join: ", ") . "\n" |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
754 foreach: liveRegs :_ reg { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
755 if: (_assignments contains?: reg) { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
756 regSrc allocSpecific: (_assignments get: reg) |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
757 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
758 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
759 _assignments set: reg (regSrc alloc: (usage maxSize)) |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
760 |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
761 regSrc returnAll |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
762 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
763 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
764 curuses <- curuses - 1 |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
765 } |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
766 print: "\n\nAssignments:\n\n" |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
767 foreach: _assignments :reg assign { |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
768 print: (string: reg) . " = " . assign . "\n" |
|
4293c725394c
Mostly complete register allocation in il module with a register source in the x86 module
Mike Pavone <pavone@retrodev.com>
parents:
189
diff
changeset
|
769 } |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
770 |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
771 withassign <- #[] |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
772 foreach: instarr :idx inst { |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
773 withassign append: (inst assignRegs: _assignments at: [idx] withSource: regSrc andUsage: regUsage) |
|
194
30bed95cbb18
Apply register assignments in il module
Mike Pavone <pavone@retrodev.com>
parents:
193
diff
changeset
|
774 } |
|
195
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
775 psave <- regSrc needSaveProlog |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
776 if: (psave length) > 0 { |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
777 withassign <- #[save: psave withassign] |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
778 } |
|
7856f0916549
Add save il instruction to save callee saved registers in function prolog
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
779 withassign |
|
189
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
780 } |
|
a45e535f7742
Determine live ranges for logical registers as part of initial work on register allocator
Mike Pavone <pavone@retrodev.com>
parents:
185
diff
changeset
|
781 |
| 185 | 782 //used to convert IL to a format suitable for a 2-operand architecture |
| 783 //should be run after register allocation (I think....) | |
| 784 to2Op <- :instarr { | |
| 785 instarr fold: #[] with: :newarr inst { | |
|
354
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
786 if: (object does: inst understand?: "to2OpInst") { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
787 newarr append: (inst to2OpInst) |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
788 } else: { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
789 if: (inst numops) = 3 { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
790 if: (inst inb) = (inst out) { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
791 newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) |
| 185 | 792 } else: { |
|
354
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
793 if: (inst commutative?) && (inst ina) = (inst out) { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
794 newarr append: (op2: (inst opcode) in: (inst inb) out: (inst out) size: (inst size)) |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
795 } else: { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
796 newarr append: (mov: (inst inb) (inst out) (inst size)) |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
797 newarr append: (op2: (inst opcode) in: (inst ina) out: (inst out) size: (inst size)) |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
798 } |
| 185 | 799 } |
| 800 } else: { | |
|
354
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
801 if: (inst numops) = 2 && (inst opcode) != _mov && (inst opcode) != _cmp { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
802 if: (inst in) != (inst out) { |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
803 newarr append: (mov: (inst in) (inst out) (inst size)) |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
804 } |
|
a6cdcc1b1c02
Fix il and llcompile modules enough that it actually attempts to run the compiled program
Michael Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
805 newarr append: (op1: (inst opcode) arg: (inst out) size: (inst size)) |
|
200
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
806 } else: { |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
807 newarr append: inst |
|
49bca6487178
Add a save instruction around calls if there are caller-saved registers live at call-time. Fix to2Op for skipIf and save instructions.
Mike Pavone <pavone@retrodev.com>
parents:
195
diff
changeset
|
808 } |
| 185 | 809 } |
| 810 } | |
| 811 } | |
| 812 } | |
| 813 | |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
814 toBackend <- :program :backend { |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
815 prepped <- program map: :fun { |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
816 backend adjustIL: fun |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
817 } |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
818 labels <- prepped map: :_ { |
|
363
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
819 il label |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
820 } |
|
363
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
821 labelRefs <- labels map: :label { label reference } |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
822 outprog <- #[] |
|
356
3b023e5a0b42
llcompile almost working well enough for fib sample
Michael Pavone <pavone@retrodev.com>
parents:
354
diff
changeset
|
823 //translate main first so it's at the start of the output |
|
3b023e5a0b42
llcompile almost working well enough for fib sample
Michael Pavone <pavone@retrodev.com>
parents:
354
diff
changeset
|
824 prepped ifget: "main" :instarr { |
|
3b023e5a0b42
llcompile almost working well enough for fib sample
Michael Pavone <pavone@retrodev.com>
parents:
354
diff
changeset
|
825 outprog append: (labels get: "main" else: { false }) |
|
3b023e5a0b42
llcompile almost working well enough for fib sample
Michael Pavone <pavone@retrodev.com>
parents:
354
diff
changeset
|
826 foreach: instarr :_ inst { |
|
3b023e5a0b42
llcompile almost working well enough for fib sample
Michael Pavone <pavone@retrodev.com>
parents:
354
diff
changeset
|
827 print: "Translating: " . inst . "\n" |
|
363
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
828 backend convertIL: inst to: outprog withLabels: labelRefs |
|
356
3b023e5a0b42
llcompile almost working well enough for fib sample
Michael Pavone <pavone@retrodev.com>
parents:
354
diff
changeset
|
829 } |
|
3b023e5a0b42
llcompile almost working well enough for fib sample
Michael Pavone <pavone@retrodev.com>
parents:
354
diff
changeset
|
830 } else: {} |
|
3b023e5a0b42
llcompile almost working well enough for fib sample
Michael Pavone <pavone@retrodev.com>
parents:
354
diff
changeset
|
831 |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
832 foreach: prepped :name instarr { |
|
350
a3b06d53bcb9
Make il and x86 modules cope with dict hash instead of dict linear for the program definition
Michael Pavone <pavone@retrodev.com>
parents:
348
diff
changeset
|
833 outprog append: (labels get: name else: { false }) |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
834 foreach: instarr :_ inst { |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
835 print: "Translating: " . inst . "\n" |
|
363
d949fe826e04
Unify il and backend labels
Michael Pavone <pavone@retrodev.com>
parents:
361
diff
changeset
|
836 backend convertIL: inst to: outprog withLabels: labelRefs |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
837 } |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
838 } |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
839 outprog |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
840 } |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
841 |
| 185 | 842 main <- { |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
843 prog <- dict linear |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
844 |
| 185 | 845 fib <- #[ |
| 846 sub: 2 (arg: 0) (reg: 0) q | |
| 847 skipIf: ge #[ | |
| 848 return: 1 q | |
| 849 ] | |
| 850 call: "fib" withArgs: #[reg: 0] | |
| 851 mov: retr (reg: 1) q | |
| 852 add: 1 (reg: 0) (reg: 2) q | |
| 853 call: "fib" withArgs: #[reg: 2] | |
| 854 add: retr (reg: 1) (reg: 3) q | |
| 855 return: (reg: 3) q | |
| 856 ] | |
| 857 print: "Original:\n\n" | |
| 858 foreach: fib :idx inst { | |
| 859 print: (string: inst) . "\n" | |
| 860 } | |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
861 prog set: "fib" fib |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
862 |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
863 mprog <- toBackend: prog x86 |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
864 foreach: mprog :_ inst { |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
865 print: (string: inst) . "\n" |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
866 } |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
867 ba <- bytearray executableFromBytes: mprog |
|
348
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
868 res <- if: (ba length) = 0 { |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
869 print: "Failed to translate code\n" |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
870 -1 |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
871 } else: { |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
872 ba runWithArg: 30u64 |
|
a840e9a068a2
Get sample builtin to il module working again
Michael Pavone <pavone@retrodev.com>
parents:
315
diff
changeset
|
873 } |
|
203
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
874 print: (string: res) . "\n" |
|
56b2100d9fff
Add code for converting IL into x86 machine code
Mike Pavone <pavone@retrodev.com>
parents:
200
diff
changeset
|
875 0 |
| 185 | 876 } |
| 877 } | |
| 878 } |