Mercurial > repos > blastem
annotate ym2612.c @ 766:1b2f8280ba81
WIP changes to support reading cart memory map from ROM DB
author | Michael Pavone <pavone@retrodev.com> |
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date | Sun, 05 Jul 2015 14:21:34 -0700 |
parents | 25c9e9d39997 |
children | 3a18b5f63afc |
rev | line source |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include <string.h> |
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7 #include <math.h> |
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8 #include <stdio.h> |
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9 #include <stdlib.h> |
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10 #include "ym2612.h" |
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11 #include "render.h" |
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12 #include "wave.h" |
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13 #include "blastem.h" |
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14 |
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15 //#define DO_DEBUG_PRINT |
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16 #ifdef DO_DEBUG_PRINT |
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17 #define dfprintf fprintf |
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18 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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19 #else |
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20 #define dfprintf |
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21 #define dfopen(var, fname, mode) |
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22 #endif |
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23 |
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24 #define BUSY_CYCLES_ADDRESS 17 |
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25 #define BUSY_CYCLES_DATA_LOW 83 |
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26 #define BUSY_CYCLES_DATA_HIGH 47 |
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27 #define OP_UPDATE_PERIOD 144 |
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28 |
362 | 29 enum { |
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30 REG_LFO = 0x22, |
362 | 31 REG_TIMERA_HIGH = 0x24, |
32 REG_TIMERA_LOW, | |
33 REG_TIMERB, | |
34 REG_TIME_CTRL, | |
35 REG_KEY_ONOFF, | |
36 REG_DAC = 0x2A, | |
37 REG_DAC_ENABLE, | |
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38 |
362 | 39 REG_DETUNE_MULT = 0x30, |
40 REG_TOTAL_LEVEL = 0x40, | |
41 REG_ATTACK_KS = 0x50, | |
42 REG_DECAY_AM = 0x60, | |
43 REG_SUSTAIN_RATE = 0x70, | |
44 REG_S_LVL_R_RATE = 0x80, | |
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45 |
362 | 46 REG_FNUM_LOW = 0xA0, |
47 REG_BLOCK_FNUM_H = 0xA4, | |
48 REG_FNUM_LOW_CH3 = 0xA8, | |
49 REG_BLOCK_FN_CH3 = 0xAC, | |
50 REG_ALG_FEEDBACK = 0xB0, | |
51 REG_LR_AMS_PMS = 0xB4 | |
52 }; | |
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53 |
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54 #define BIT_TIMERA_ENABLE 0x1 |
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55 #define BIT_TIMERB_ENABLE 0x2 |
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56 #define BIT_TIMERA_OVEREN 0x4 |
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57 #define BIT_TIMERB_OVEREN 0x8 |
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58 #define BIT_TIMERA_RESET 0x10 |
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59 #define BIT_TIMERB_RESET 0x20 |
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60 |
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61 #define BIT_STATUS_TIMERA 0x1 |
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62 #define BIT_STATUS_TIMERB 0x2 |
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63 |
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64 enum { |
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65 PHASE_ATTACK, |
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66 PHASE_DECAY, |
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67 PHASE_SUSTAIN, |
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68 PHASE_RELEASE |
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69 }; |
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70 |
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71 uint8_t did_tbl_init = 0; |
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72 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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73 //memory is cheap so using a half sine table will probably save some cycles |
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74 //a full sine table would be nice, but negative numbers don't get along with log2 |
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75 #define SINE_TABLE_SIZE 512 |
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76 uint16_t sine_table[SINE_TABLE_SIZE]; |
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77 //Similar deal here with the power table for log -> linear conversion |
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78 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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79 //and uses the whole part as a shift amount. |
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80 #define POW_TABLE_SIZE (1 << 13) |
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81 uint16_t pow_table[POW_TABLE_SIZE]; |
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82 |
362 | 83 uint16_t rate_table_base[] = { |
84 //main portion | |
85 0,1,0,1,0,1,0,1, | |
86 0,1,0,1,1,1,0,1, | |
87 0,1,1,1,0,1,1,1, | |
88 0,1,1,1,1,1,1,1, | |
89 //top end | |
90 1,1,1,1,1,1,1,1, | |
91 1,1,1,2,1,1,1,2, | |
92 1,2,1,2,1,2,1,2, | |
93 1,2,2,2,1,2,2,2, | |
94 }; | |
95 | |
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96 uint16_t rate_table[64*8]; |
362 | 97 |
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98 uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5}; |
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99 uint8_t lfo_pm_base[][8] = { |
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100 {0, 0, 0, 0, 0, 0, 0, 0}, |
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101 {0, 0, 0, 0, 4, 4, 4, 4}, |
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102 {0, 0, 0, 4, 4, 4, 8, 8}, |
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103 {0, 0, 4, 4, 8, 8, 0xc, 0xc}, |
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104 {0, 0, 4, 8, 8, 8, 0xc,0x10}, |
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105 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, |
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106 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, |
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107 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60} |
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108 }; |
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109 int16_t lfo_pm_table[128 * 32 * 8]; |
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110 |
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111 uint16_t ams_shift[] = {8, 3, 1, 0}; |
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112 |
362 | 113 #define MAX_ENVELOPE 0xFFC |
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114 #define YM_DIVIDER 2 |
374 | 115 #define CYCLE_NEVER 0xFFFFFFFF |
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116 |
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117 uint16_t round_fixed_point(double value, int dec_bits) |
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118 { |
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119 return value * (1 << dec_bits) + 0.5; |
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120 } |
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121 |
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122 FILE * debug_file = NULL; |
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123 uint32_t first_key_on=0; |
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124 |
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125 ym2612_context * log_context = NULL; |
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126 |
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127 void ym_finalize_log() |
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128 { |
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129 for (int i = 0; i < NUM_CHANNELS; i++) { |
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130 if (log_context->channels[i].logfile) { |
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131 wave_finalize(log_context->channels[i].logfile); |
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132 } |
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133 } |
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134 } |
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135 #define BUFFER_INC_RES 1000000000UL |
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136 |
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137 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock) |
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138 { |
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139 uint64_t old_inc = context->buffer_inc; |
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140 context->buffer_inc = ((BUFFER_INC_RES * (uint64_t)context->sample_rate) / (uint64_t)master_clock) * (uint64_t)context->clock_inc; |
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141 } |
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142 |
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143 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options) |
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144 { |
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145 dfopen(debug_file, "ym_debug.txt", "w"); |
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146 memset(context, 0, sizeof(*context)); |
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147 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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148 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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149 context->sample_rate = sample_rate; |
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150 context->clock_inc = clock_div * 6; |
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151 ym_adjust_master_clock(context, master_clock); |
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152 |
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153 context->sample_limit = sample_limit*2; |
374 | 154 context->write_cycle = CYCLE_NEVER; |
362 | 155 for (int i = 0; i < NUM_OPERATORS; i++) { |
156 context->operators[i].envelope = MAX_ENVELOPE; | |
157 context->operators[i].env_phase = PHASE_RELEASE; | |
158 } | |
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159 //some games seem to expect that the LR flags start out as 1 |
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160 for (int i = 0; i < NUM_CHANNELS; i++) { |
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161 context->channels[i].lr = 0xC0; |
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162 if (options & YM_OPT_WAVE_LOG) { |
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163 char fname[64]; |
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164 sprintf(fname, "ym_channel_%d.wav", i); |
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165 FILE * f = context->channels[i].logfile = fopen(fname, "wb"); |
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166 if (!f) { |
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167 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname); |
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168 continue; |
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169 } |
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170 if (!wave_init(f, sample_rate, 16, 1)) { |
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171 fclose(f); |
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172 context->channels[i].logfile = NULL; |
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173 } |
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174 } |
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175 } |
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176 if (options & YM_OPT_WAVE_LOG) { |
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177 log_context = context; |
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178 atexit(ym_finalize_log); |
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179 } |
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180 if (!did_tbl_init) { |
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181 //populate sine table |
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182 for (int32_t i = 0; i < 512; i++) { |
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183 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
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184 |
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185 //table stores 4.8 fixed pointed representation of the base 2 log |
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186 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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187 } |
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188 //populate power table |
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189 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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190 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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191 int32_t tmp = round_fixed_point(linear, 11); |
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192 int32_t shift = (i >> 8) - 2; |
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193 if (shift < 0) { |
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194 tmp <<= 0-shift; |
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195 } else { |
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196 tmp >>= shift; |
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197 } |
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198 pow_table[i] = tmp; |
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199 } |
362 | 200 //populate envelope generator rate table, from small base table |
201 for (int rate = 0; rate < 64; rate++) { | |
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202 for (int cycle = 0; cycle < 8; cycle++) { |
362 | 203 uint16_t value; |
370
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204 if (rate < 2) { |
362 | 205 value = 0; |
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206 } else if (rate >= 60) { |
362 | 207 value = 8; |
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208 } else if (rate < 8) { |
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209 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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210 } else if (rate < 48) { |
362 | 211 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
212 } else { | |
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213 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
362 | 214 } |
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215 rate_table[rate * 8 + cycle] = value; |
362 | 216 } |
217 } | |
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218 //populate LFO PM table from small base table |
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219 //seems like there must be a better way to derive this |
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220 for (int freq = 0; freq < 128; freq++) { |
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221 for (int pms = 0; pms < 8; pms++) { |
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222 for (int step = 0; step < 32; step++) { |
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223 int16_t value = 0; |
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224 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) { |
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225 if (freq & bit) { |
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226 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift; |
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227 } |
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228 } |
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229 if (step & 0x10) { |
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230 value = -value; |
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231 } |
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232 lfo_pm_table[freq * 256 + pms * 32 + step] = value; |
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233 } |
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234 } |
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235 } |
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236 } |
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237 } |
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238 |
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239 #define YM_VOLUME_MULTIPLIER 2 |
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240 #define YM_VOLUME_DIVIDER 3 |
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241 #define YM_MOD_SHIFT 1 |
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242 |
403 | 243 #define TIMER_A_MAX 1023 |
244 #define TIMER_B_MAX (255*16) | |
245 | |
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246 void ym_run(ym2612_context * context, uint32_t to_cycle) |
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247 { |
362 | 248 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
249 //TODO: Fix channel update order OR remap channels in register write | |
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250 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) { |
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251 //Update timers at beginning of 144 cycle period |
403 | 252 if (!context->current_op) { |
253 if (context->timer_control & BIT_TIMERA_ENABLE) { | |
254 if (context->timer_a != TIMER_A_MAX) { | |
255 context->timer_a++; | |
256 } else { | |
257 if (context->timer_control & BIT_TIMERA_OVEREN) { | |
258 context->status |= BIT_STATUS_TIMERA; | |
259 } | |
260 context->timer_a = context->timer_a_load; | |
359
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261 } |
288
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262 } |
362 | 263 if (context->timer_control & BIT_TIMERB_ENABLE) { |
403 | 264 if (context->timer_b != TIMER_B_MAX) { |
265 context->timer_b++; | |
266 } else { | |
267 if (context->timer_control & BIT_TIMERB_OVEREN) { | |
268 context->status |= BIT_STATUS_TIMERB; | |
359
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269 } |
403 | 270 context->timer_b = context->timer_b_load; |
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271 } |
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272 } |
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273 //Update LFO |
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274 if (context->lfo_enable) { |
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275 if (context->lfo_counter) { |
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276 context->lfo_counter--; |
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277 } else { |
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278 context->lfo_counter = lfo_timer_values[context->lfo_freq]; |
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279 context->lfo_am_step += 2; |
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280 context->lfo_am_step &= 0xFE; |
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281 context->lfo_pm_step = context->lfo_am_step / 8; |
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282 } |
411
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283 } |
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284 } |
359
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285 //Update Envelope Generator |
364
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286 if (!(context->current_op % 3)) { |
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287 uint32_t env_cyc = context->env_counter; |
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288 uint32_t op = context->current_env_op; |
362 | 289 ym_operator * operator = context->operators + op; |
290 ym_channel * channel = context->channels + op/4; | |
359
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291 uint8_t rate; |
362 | 292 for(;;) { |
293 rate = operator->rates[operator->env_phase]; | |
294 if (rate) { | |
295 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
296 rate = rate*2 + ks; | |
297 if (rate > 63) { | |
298 rate = 63; | |
299 } | |
300 } | |
301 //Deal with "infinite" rates | |
370
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302 //According to Nemesis this should be handled in key-on instead |
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303 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
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304 operator->env_phase = PHASE_DECAY; |
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305 operator->envelope = 0; |
362 | 306 } else { |
307 break; | |
308 } | |
309 } | |
310 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
370
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311 if (first_key_on) { |
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312 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
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313 } |
362 | 314 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
315 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
316 //envelope value is 10-bits, but it will be used as a 4.8 value | |
317 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
318 if (operator->env_phase == PHASE_ATTACK) { | |
319 //this can probably be optimized to a single shift rather than a multiply + shift | |
370
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320 if (first_key_on) { |
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321 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
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322 } |
513
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323 uint16_t old_env = operator->envelope; |
362 | 324 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
513
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325 if (operator->envelope > old_env) { |
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326 //Handle overflow |
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327 operator->envelope = 0; |
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328 } |
370
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329 if (!operator->envelope) { |
362 | 330 operator->env_phase = PHASE_DECAY; |
331 } | |
332 } else { | |
370
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333 if (first_key_on) { |
448
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334 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
370
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335 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
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336 } |
362 | 337 operator->envelope += envelope_inc; |
338 //clamp to max attenuation value | |
339 if (operator->envelope > MAX_ENVELOPE) { | |
340 operator->envelope = MAX_ENVELOPE; | |
341 } | |
342 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
370
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343 //operator->envelope = operator->sustain_level; |
362 | 344 operator->env_phase = PHASE_SUSTAIN; |
345 } | |
346 } | |
364
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347 } |
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348 context->current_env_op++; |
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349 if (context->current_env_op == NUM_OPERATORS) { |
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350 context->current_env_op = 0; |
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351 context->env_counter++; |
362 | 352 } |
353 } | |
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354 |
362 | 355 //Update Phase Generator |
364
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356 uint32_t channel = context->current_op / 4; |
362 | 357 if (channel != 5 || !context->dac_enable) { |
364
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358 uint32_t op = context->current_op; |
362 | 359 //printf("updating operator %d of channel %d\n", op, channel); |
360 ym_operator * operator = context->operators + op; | |
361 ym_channel * chan = context->channels + channel; | |
362 //TODO: Modulate phase by LFO if necessary | |
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363 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; |
362 | 364 operator->phase_counter += operator->phase_inc; |
411
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365 if (chan->pms) { |
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366 //not entirely sure this will get the precision correct, but I'd like to avoid recalculating phase |
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367 //increment every update when LFO phase modulation is enabled |
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368 int16_t lfo_mod = lfo_pm_table[(chan->fnum & 0x7F0) * 16 + chan->pms + context->lfo_pm_step]; |
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369 if (operator->multiple) { |
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370 lfo_mod *= operator->multiple; |
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371 } else { |
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372 lfo_mod >>= 1; |
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373 } |
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374 operator->phase_counter += lfo_mod; |
411
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375 } |
371
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376 int16_t mod = 0; |
362 | 377 switch (op % 4) |
359
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378 { |
362 | 379 case 0://Operator 1 |
377 | 380 if (chan->feedback) { |
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381 mod = (chan->op1_old + operator->output) >> (10-chan->feedback); |
377 | 382 } |
359
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383 break; |
362 | 384 case 1://Operator 3 |
385 switch(chan->algorithm) | |
386 { | |
387 case 0: | |
388 case 2: | |
389 //modulate by operator 2 | |
379
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390 mod = context->operators[op+1].output >> YM_MOD_SHIFT; |
362 | 391 break; |
392 case 1: | |
393 //modulate by operator 1+2 | |
379
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394 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT; |
362 | 395 break; |
396 case 5: | |
397 //modulate by operator 1 | |
379
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398 mod = context->operators[op-1].output >> YM_MOD_SHIFT; |
362 | 399 } |
400 break; | |
401 case 2://Operator 2 | |
406
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402 if (chan->algorithm != 1 && chan->algorithm != 2 && chan->algorithm != 7) { |
362 | 403 //modulate by Operator 1 |
379
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404 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
362 | 405 } |
359
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406 break; |
362 | 407 case 3://Operator 4 |
408 switch(chan->algorithm) | |
409 { | |
410 case 0: | |
411 case 1: | |
412 case 4: | |
413 //modulate by operator 3 | |
379
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414 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
362 | 415 break; |
416 case 2: | |
417 //modulate by operator 1+3 | |
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418 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
362 | 419 break; |
420 case 3: | |
421 //modulate by operator 2+3 | |
379
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422 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
362 | 423 break; |
424 case 5: | |
425 //modulate by operator 1 | |
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426 mod = context->operators[op-3].output >> YM_MOD_SHIFT; |
362 | 427 break; |
428 } | |
359
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429 break; |
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430 } |
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431 uint16_t env = operator->envelope + operator->total_level; |
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432 if (operator->am) { |
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433 uint16_t base_am = (context->lfo_am_step & 0x80 ? context->lfo_am_step : ~context->lfo_am_step) & 0x7E; |
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434 env += base_am >> ams_shift[chan->ams]; |
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435 } |
370
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436 if (env > MAX_ENVELOPE) { |
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437 env = MAX_ENVELOPE; |
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438 } |
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439 if (first_key_on) { |
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440 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
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441 } |
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442 //if ((channel != 0 && channel != 4) || chan->algorithm != 5) { |
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443 phase += mod; |
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444 //} |
448
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445 |
371
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446 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
359
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447 if (phase & 0x200) { |
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448 output = -output; |
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449 } |
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450 if (op % 4 == 0) { |
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451 chan->op1_old = operator->output; |
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452 } |
362 | 453 operator->output = output; |
359
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|
454 //Update the channel output if we've updated all operators |
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455 if (op % 4 == 3) { |
362 | 456 if (chan->algorithm < 4) { |
457 chan->output = operator->output; | |
458 } else if(chan->algorithm == 4) { | |
396
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|
459 chan->output = operator->output + context->operators[channel * 4 + 2].output; |
359
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460 } else { |
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461 output = 0; |
362 | 462 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
463 output += context->operators[op].output; | |
359
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464 } |
362 | 465 chan->output = output; |
359
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466 } |
370
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467 if (first_key_on) { |
371
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468 int16_t value = context->channels[channel].output & 0x3FE0; |
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469 if (value & 0x2000) { |
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470 value |= 0xC000; |
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471 } |
522
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472 dfprintf(debug_file, "channel %d output: %d\n", channel, (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER); |
370
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473 } |
359
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474 } |
362 | 475 //puts("operator update done"); |
359
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476 } |
364
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477 context->current_op++; |
380
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Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
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478 context->buffer_fraction += context->buffer_inc; |
396
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479 if (context->current_op == NUM_OPERATORS) { |
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480 context->current_op = 0; |
483
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481 } |
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482 if (context->buffer_fraction > BUFFER_INC_RES) { |
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483 context->buffer_fraction -= BUFFER_INC_RES; |
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484 context->audio_buffer[context->buffer_pos] = 0; |
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485 context->audio_buffer[context->buffer_pos + 1] = 0; |
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486 for (int i = 0; i < NUM_CHANNELS; i++) { |
521
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487 int16_t value = context->channels[i].output; |
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488 if (value > 0x1FE0) { |
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489 value = 0x1FE0; |
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490 } else if (value < -0x1FF0) { |
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491 value = -0x1FF0; |
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492 } else { |
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493 value &= 0x3FE0; |
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494 if (value & 0x2000) { |
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495 value |= 0xC000; |
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496 } |
380
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497 } |
483
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498 if (context->channels[i].logfile) { |
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499 fwrite(&value, sizeof(value), 1, context->channels[i].logfile); |
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500 } |
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501 if (context->channels[i].lr & 0x80) { |
522
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502 context->audio_buffer[context->buffer_pos] += (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER; |
380
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503 } |
483
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504 if (context->channels[i].lr & 0x40) { |
522
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505 context->audio_buffer[context->buffer_pos+1] += (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER; |
483
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506 } |
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507 } |
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508 context->buffer_pos += 2; |
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509 if (context->buffer_pos == context->sample_limit) { |
505
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The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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510 if (!headless) { |
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511 render_wait_ym(context); |
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512 } |
380
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513 } |
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514 } |
288
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515 } |
535
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516 if (context->current_cycle >= context->write_cycle + (context->busy_cycles * context->clock_inc / 6)) { |
288
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517 context->status &= 0x7F; |
374 | 518 context->write_cycle = CYCLE_NEVER; |
288
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519 } |
362 | 520 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
288
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521 } |
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522 |
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523 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
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524 { |
364
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525 //printf("address_write_part1: %X\n", address); |
362 | 526 context->selected_reg = address; |
527 context->selected_part = 0; | |
535
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528 context->write_cycle = context->current_cycle; |
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529 context->busy_cycles = BUSY_CYCLES_ADDRESS; |
650
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diff
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530 context->status |= 0x80; |
288
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531 } |
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|
532 |
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533 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
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|
534 { |
364
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diff
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535 //printf("address_write_part2: %X\n", address); |
362 | 536 context->selected_reg = address; |
537 context->selected_part = 1; | |
535
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538 context->write_cycle = context->current_cycle; |
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539 context->busy_cycles = BUSY_CYCLES_ADDRESS; |
650
55b550fe8891
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diff
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540 context->status |= 0x80; |
362 | 541 } |
542 | |
543 uint8_t fnum_to_keycode[] = { | |
544 //F11 = 0 | |
545 0,0,0,0,0,0,0,1, | |
546 //F11 = 1 | |
547 2,3,3,3,3,3,3,3 | |
548 }; | |
549 | |
550 //table courtesy of Nemesis | |
551 uint32_t detune_table[][4] = { | |
552 {0, 0, 1, 2}, //0 (0x00) | |
553 {0, 0, 1, 2}, //1 (0x01) | |
554 {0, 0, 1, 2}, //2 (0x02) | |
555 {0, 0, 1, 2}, //3 (0x03) | |
556 {0, 1, 2, 2}, //4 (0x04) | |
557 {0, 1, 2, 3}, //5 (0x05) | |
558 {0, 1, 2, 3}, //6 (0x06) | |
559 {0, 1, 2, 3}, //7 (0x07) | |
560 {0, 1, 2, 4}, //8 (0x08) | |
561 {0, 1, 3, 4}, //9 (0x09) | |
562 {0, 1, 3, 4}, //10 (0x0A) | |
563 {0, 1, 3, 5}, //11 (0x0B) | |
564 {0, 2, 4, 5}, //12 (0x0C) | |
565 {0, 2, 4, 6}, //13 (0x0D) | |
566 {0, 2, 4, 6}, //14 (0x0E) | |
567 {0, 2, 5, 7}, //15 (0x0F) | |
568 {0, 2, 5, 8}, //16 (0x10) | |
569 {0, 3, 6, 8}, //17 (0x11) | |
570 {0, 3, 6, 9}, //18 (0x12) | |
571 {0, 3, 7,10}, //19 (0x13) | |
572 {0, 4, 8,11}, //20 (0x14) | |
573 {0, 4, 8,12}, //21 (0x15) | |
574 {0, 4, 9,13}, //22 (0x16) | |
575 {0, 5,10,14}, //23 (0x17) | |
576 {0, 5,11,16}, //24 (0x18) | |
577 {0, 6,12,17}, //25 (0x19) | |
578 {0, 6,13,19}, //26 (0x1A) | |
579 {0, 7,14,20}, //27 (0x1B) | |
580 {0, 8,16,22}, //28 (0x1C) | |
581 {0, 8,16,22}, //29 (0x1D) | |
582 {0, 8,16,22}, //30 (0x1E) | |
583 {0, 8,16,22} | |
584 }; //31 (0x1F) | |
585 | |
586 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
587 { | |
588 uint32_t chan_num = op / 4; | |
589 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
590 //base frequency | |
591 ym_channel * channel = context->channels + chan_num; | |
383
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592 uint32_t inc, detune; |
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diff
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|
593 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { |
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594 //supplemental fnum registers are in a different order than normal slot paramters |
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595 int index = (op-2*4) ^ 2; |
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596 inc = context->ch3_supp[index].fnum; |
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597 if (!context->ch3_supp[index].block) { |
383
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598 inc >>= 1; |
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599 } else { |
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600 inc <<= (context->ch3_supp[index].block-1); |
383
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601 } |
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602 //detune |
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603 detune = detune_table[context->ch3_supp[index].keycode][operator->detune & 0x3]; |
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604 } else { |
383
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Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
605 inc = channel->fnum; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
606 if (!channel->block) { |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
607 inc >>= 1; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
608 } else { |
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parents:
382
diff
changeset
|
609 inc <<= (channel->block-1); |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
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382
diff
changeset
|
610 } |
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Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
611 //detune |
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Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
612 detune = detune_table[channel->keycode][operator->detune & 0x3]; |
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
613 } |
739
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
614 if (operator->detune & 0x4) { |
362 | 615 inc -= detune; |
616 //this can underflow, mask to 17-bit result | |
617 inc &= 0x1FFFF; | |
618 } else { | |
619 inc += detune; | |
620 } | |
621 //multiple | |
622 if (operator->multiple) { | |
623 inc *= operator->multiple; | |
739
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
624 inc &= 0xFFFFF; |
362 | 625 } else { |
626 //0.5 | |
627 inc >>= 1; | |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
628 } |
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents:
364
diff
changeset
|
629 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
630 operator->phase_inc = inc; |
288
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Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
631 } |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
632 |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
633 void ym_data_write(ym2612_context * context, uint8_t value) |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
634 { |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
635 if (context->selected_reg >= YM_REG_END) { |
362 | 636 return; |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
637 } |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
638 if (context->selected_part) { |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
639 if (context->selected_reg < YM_PART2_START) { |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
640 return; |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
641 } |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
642 context->part2_regs[context->selected_reg - YM_PART2_START] = value; |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
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|
643 } else { |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
644 if (context->selected_reg < YM_PART1_START) { |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
645 return; |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
646 } |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
647 context->part1_regs[context->selected_reg - YM_PART1_START] = value; |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
648 } |
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
649 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
362 | 650 if (context->selected_reg < 0x30) { |
651 //Shared regs | |
652 switch (context->selected_reg) | |
653 { | |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
654 //TODO: Test reg |
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
655 case REG_LFO: |
532
666210adf87b
Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents:
527
diff
changeset
|
656 /*if ((value & 0x8) && !context->lfo_enable) { |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
657 printf("LFO Enabled, Freq: %d\n", value & 0x7); |
532
666210adf87b
Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents:
527
diff
changeset
|
658 }*/ |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
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407
diff
changeset
|
659 context->lfo_enable = value & 0x8; |
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Initial stab at LFO phase modulation
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diff
changeset
|
660 if (!context->lfo_enable) { |
baf4688901f2
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407
diff
changeset
|
661 context->lfo_am_step = context->lfo_pm_step = 0; |
baf4688901f2
Initial stab at LFO phase modulation
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407
diff
changeset
|
662 } |
baf4688901f2
Initial stab at LFO phase modulation
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407
diff
changeset
|
663 context->lfo_freq = value & 0x7; |
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
664 |
411
baf4688901f2
Initial stab at LFO phase modulation
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407
diff
changeset
|
665 break; |
362 | 666 case REG_TIMERA_HIGH: |
667 context->timer_a_load &= 0x3; | |
668 context->timer_a_load |= value << 2; | |
669 break; | |
670 case REG_TIMERA_LOW: | |
671 context->timer_a_load &= 0xFFFC; | |
672 context->timer_a_load |= value & 0x3; | |
673 break; | |
674 case REG_TIMERB: | |
403 | 675 context->timer_b_load = value * 16; |
362 | 676 break; |
383
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Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
677 case REG_TIME_CTRL: { |
403 | 678 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) { |
679 context->timer_a = context->timer_a_load; | |
680 } | |
681 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) { | |
682 context->timer_b = context->timer_b_load; | |
683 } | |
684 context->timer_control = value & 0xF; | |
685 if (value & BIT_TIMERA_RESET) { | |
686 context->status &= ~BIT_STATUS_TIMERA; | |
687 } | |
688 if (value & BIT_TIMERB_RESET) { | |
689 context->status &= ~BIT_STATUS_TIMERB; | |
690 } | |
383
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
691 uint8_t old_mode = context->ch3_mode; |
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
692 context->ch3_mode = value & 0xC0; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
693 if (context->ch3_mode != old_mode) { |
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
694 ym_update_phase_inc(context, context->operators + 2*4, 2*4); |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
695 ym_update_phase_inc(context, context->operators + 2*4+1, 2*4+1); |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
696 ym_update_phase_inc(context, context->operators + 2*4+2, 2*4+2); |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
697 } |
362 | 698 break; |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
699 } |
362 | 700 case REG_KEY_ONOFF: { |
701 uint8_t channel = value & 0x7; | |
386
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
702 if (channel != 3 && channel != 7) { |
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
703 if (channel > 2) { |
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
704 channel--; |
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
705 } |
362 | 706 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { |
707 if (value & bit) { | |
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
708 if (context->operators[op].env_phase == PHASE_RELEASE) |
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
709 { |
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
710 first_key_on = 1; |
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
711 //printf("Key On for operator %d in channel %d\n", op, channel); |
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
712 context->operators[op].phase_counter = 0; |
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
713 context->operators[op].env_phase = PHASE_ATTACK; |
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
714 } |
362 | 715 } else { |
716 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
717 context->operators[op].env_phase = PHASE_RELEASE; | |
718 } | |
719 } | |
720 } | |
721 break; | |
722 } | |
723 case REG_DAC: | |
724 if (context->dac_enable) { | |
725 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
726 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle); |
362 | 727 } |
728 break; | |
729 case REG_DAC_ENABLE: | |
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
730 //printf("DAC Enable: %X\n", value); |
362 | 731 context->dac_enable = value & 0x80; |
732 break; | |
733 } | |
734 } else if (context->selected_reg < 0xA0) { | |
735 //part | |
736 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
737 //channel in part | |
738 if ((context->selected_reg & 0x3) != 0x3) { | |
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
739 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
362 | 740 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
741 ym_operator * operator = context->operators + op; | |
742 switch (context->selected_reg & 0xF0) | |
743 { | |
744 case REG_DETUNE_MULT: | |
745 operator->detune = value >> 4 & 0x7; | |
746 operator->multiple = value & 0xF; | |
747 ym_update_phase_inc(context, operator, op); | |
748 break; | |
749 case REG_TOTAL_LEVEL: | |
750 operator->total_level = (value & 0x7F) << 5; | |
751 break; | |
752 case REG_ATTACK_KS: | |
376 | 753 operator->key_scaling = 3 - (value >> 6); |
362 | 754 operator->rates[PHASE_ATTACK] = value & 0x1F; |
755 break; | |
756 case REG_DECAY_AM: | |
757 //TODO: AM flag for LFO | |
739
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
758 operator->am = value & 0x80; |
362 | 759 operator->rates[PHASE_DECAY] = value & 0x1F; |
760 break; | |
761 case REG_SUSTAIN_RATE: | |
762 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
763 break; | |
764 case REG_S_LVL_R_RATE: | |
765 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
382
b904859964e5
Fix operator precedence bug with sustain level
Mike Pavone <pavone@retrodev.com>
parents:
381
diff
changeset
|
766 operator->sustain_level = (value & 0xF0) << 4; |
362 | 767 break; |
768 } | |
769 } | |
770 } else { | |
771 uint8_t channel = context->selected_reg & 0x3; | |
772 if (channel != 3) { | |
773 if (context->selected_part) { | |
774 channel += 3; | |
775 } | |
776 //printf("write targets channel %d\n", channel); | |
777 switch (context->selected_reg & 0xFC) | |
778 { | |
779 case REG_FNUM_LOW: | |
780 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
781 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
782 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
783 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
784 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
785 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
786 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
787 break; | |
788 case REG_BLOCK_FNUM_H:{ | |
789 context->channels[channel].block_fnum_latch = value; | |
790 break; | |
791 } | |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
792 case REG_FNUM_LOW_CH3: |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
793 if (channel < 3) { |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
794 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
795 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
796 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7]; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
797 if (context->ch3_mode) { |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
798 ym_update_phase_inc(context, context->operators + 2*4 + channel, 2*4); |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
799 } |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
800 } |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
801 break; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
802 case REG_BLOCK_FN_CH3: |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
803 if (channel < 3) { |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
804 context->ch3_supp[channel].block_fnum_latch = value; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
805 } |
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
806 break; |
362 | 807 case REG_ALG_FEEDBACK: |
808 context->channels[channel].algorithm = value & 0x7; | |
809 context->channels[channel].feedback = value >> 3 & 0x7; | |
527
7df7f493b3b6
Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents:
522
diff
changeset
|
810 //printf("Algorithm %d, feedback %d for channel %d\n", value & 0x7, value >> 3 & 0x7, channel); |
362 | 811 break; |
812 case REG_LR_AMS_PMS: | |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
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813 context->channels[channel].pms = (value & 0x7) * 32; |
362 | 814 context->channels[channel].ams = value >> 4 & 0x3; |
815 context->channels[channel].lr = value & 0xC0; | |
369
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816 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
362 | 817 break; |
818 } | |
819 } | |
820 } | |
448
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821 |
362 | 822 context->write_cycle = context->current_cycle; |
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823 context->busy_cycles = context->selected_reg < 0xA0 ? BUSY_CYCLES_DATA_LOW : BUSY_CYCLES_DATA_HIGH; |
374 | 824 context->status |= 0x80; |
288
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825 } |
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826 |
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827 uint8_t ym_read_status(ym2612_context * context) |
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828 { |
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829 return context->status; |
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830 } |
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831 |
739
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832 void ym_print_channel_info(ym2612_context *context, int channel) |
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833 { |
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834 ym_channel *chan = context->channels + channel; |
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835 printf("\n***Channel %d***\n" |
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836 "Algorithm: %d\n" |
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837 "Feedback: %d\n" |
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838 "Pan: %s\n" |
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839 "AMS: %d\n" |
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840 "PMS: %d\n", |
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841 channel+1, chan->algorithm, chan->feedback, |
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842 chan->lr == 0xC0 ? "LR" : chan->lr == 0x80 ? "L" : chan->lr == 0x40 ? "R" : "", |
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843 chan->ams, chan->pms); |
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844 for (int operator = channel * 4; operator < channel * 4+4; operator++) |
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845 { |
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846 int dispnum = operator - channel * 4 + 1; |
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847 if (dispnum == 2) { |
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848 dispnum = 3; |
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849 } else if (dispnum == 3) { |
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850 dispnum = 2; |
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851 } |
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852 ym_operator *op = context->operators + operator; |
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853 printf("\nOperator %d:\n" |
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854 " Multiple: %d\n" |
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855 " Detune: %d\n" |
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856 " Total Level: %d\n" |
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857 " Attack Rate: %d\n" |
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858 " Key Scaling: %d\n" |
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859 " Decay Rate: %d\n" |
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860 " Sustain Level: %d\n" |
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861 " Sustain Rate: %d\n" |
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862 " Release Rate: %d\n" |
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863 " Amplitude Modulation %s\n", |
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864 dispnum, op->multiple, op->detune, op->total_level, |
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865 op->rates[PHASE_ATTACK], op->key_scaling, op->rates[PHASE_DECAY], |
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866 op->sustain_level, op->rates[PHASE_SUSTAIN], op->rates[PHASE_RELEASE], |
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867 op->am ? "On" : "Off"); |
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868 } |
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869 } |
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870 |