Mercurial > repos > blastem
annotate ym2612.c @ 521:7565ec2ac652
Fix overflow handling on FM channel output
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Tue, 11 Feb 2014 12:45:43 -0800 |
| parents | 24ebabd89162 |
| children | 6a14c5a95648 |
| rev | line source |
|---|---|
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include <string.h> |
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7 #include <math.h> |
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8 #include <stdio.h> |
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9 #include <stdlib.h> |
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10 #include "ym2612.h" |
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11 #include "render.h" |
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12 #include "wave.h" |
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13 #include "blastem.h" |
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14 |
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15 //#define DO_DEBUG_PRINT |
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16 #ifdef DO_DEBUG_PRINT |
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17 #define dfprintf fprintf |
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18 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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19 #else |
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20 #define dfprintf |
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21 #define dfopen(var, fname, mode) |
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22 #endif |
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23 |
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24 #define BUSY_CYCLES 17 |
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25 #define OP_UPDATE_PERIOD 144 |
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26 |
| 362 | 27 enum { |
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28 REG_LFO = 0x22, |
| 362 | 29 REG_TIMERA_HIGH = 0x24, |
| 30 REG_TIMERA_LOW, | |
| 31 REG_TIMERB, | |
| 32 REG_TIME_CTRL, | |
| 33 REG_KEY_ONOFF, | |
| 34 REG_DAC = 0x2A, | |
| 35 REG_DAC_ENABLE, | |
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36 |
| 362 | 37 REG_DETUNE_MULT = 0x30, |
| 38 REG_TOTAL_LEVEL = 0x40, | |
| 39 REG_ATTACK_KS = 0x50, | |
| 40 REG_DECAY_AM = 0x60, | |
| 41 REG_SUSTAIN_RATE = 0x70, | |
| 42 REG_S_LVL_R_RATE = 0x80, | |
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43 |
| 362 | 44 REG_FNUM_LOW = 0xA0, |
| 45 REG_BLOCK_FNUM_H = 0xA4, | |
| 46 REG_FNUM_LOW_CH3 = 0xA8, | |
| 47 REG_BLOCK_FN_CH3 = 0xAC, | |
| 48 REG_ALG_FEEDBACK = 0xB0, | |
| 49 REG_LR_AMS_PMS = 0xB4 | |
| 50 }; | |
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51 |
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52 #define BIT_TIMERA_ENABLE 0x1 |
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53 #define BIT_TIMERB_ENABLE 0x2 |
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54 #define BIT_TIMERA_OVEREN 0x4 |
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55 #define BIT_TIMERB_OVEREN 0x8 |
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56 #define BIT_TIMERA_RESET 0x10 |
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57 #define BIT_TIMERB_RESET 0x20 |
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58 |
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59 #define BIT_STATUS_TIMERA 0x1 |
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60 #define BIT_STATUS_TIMERB 0x2 |
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61 |
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62 enum { |
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63 PHASE_ATTACK, |
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64 PHASE_DECAY, |
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65 PHASE_SUSTAIN, |
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66 PHASE_RELEASE |
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67 }; |
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68 |
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69 uint8_t did_tbl_init = 0; |
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70 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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71 //memory is cheap so using a half sine table will probably save some cycles |
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72 //a full sine table would be nice, but negative numbers don't get along with log2 |
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73 #define SINE_TABLE_SIZE 512 |
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74 uint16_t sine_table[SINE_TABLE_SIZE]; |
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75 //Similar deal here with the power table for log -> linear conversion |
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76 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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77 //and uses the whole part as a shift amount. |
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78 #define POW_TABLE_SIZE (1 << 13) |
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79 uint16_t pow_table[POW_TABLE_SIZE]; |
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80 |
| 362 | 81 uint16_t rate_table_base[] = { |
| 82 //main portion | |
| 83 0,1,0,1,0,1,0,1, | |
| 84 0,1,0,1,1,1,0,1, | |
| 85 0,1,1,1,0,1,1,1, | |
| 86 0,1,1,1,1,1,1,1, | |
| 87 //top end | |
| 88 1,1,1,1,1,1,1,1, | |
| 89 1,1,1,2,1,1,1,2, | |
| 90 1,2,1,2,1,2,1,2, | |
| 91 1,2,2,2,1,2,2,2, | |
| 92 }; | |
| 93 | |
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94 uint16_t rate_table[64*8]; |
| 362 | 95 |
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96 uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5}; |
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97 uint8_t lfo_pm_base[][8] = { |
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98 {0, 0, 0, 0, 0, 0, 0, 0}, |
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99 {0, 0, 0, 0, 4, 4, 4, 4}, |
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100 {0, 0, 0, 4, 4, 4, 8, 8}, |
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101 {0, 0, 4, 4, 8, 8, 0xc, 0xc}, |
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102 {0, 0, 4, 8, 8, 8, 0xc,0x10}, |
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103 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, |
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104 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, |
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105 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60} |
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106 }; |
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107 int16_t lfo_pm_table[128 * 32 * 8]; |
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108 |
| 362 | 109 #define MAX_ENVELOPE 0xFFC |
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110 #define YM_DIVIDER 2 |
| 374 | 111 #define CYCLE_NEVER 0xFFFFFFFF |
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112 |
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113 uint16_t round_fixed_point(double value, int dec_bits) |
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114 { |
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115 return value * (1 << dec_bits) + 0.5; |
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116 } |
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117 |
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118 FILE * debug_file = NULL; |
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119 uint32_t first_key_on=0; |
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120 |
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121 ym2612_context * log_context = NULL; |
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122 |
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123 void ym_finalize_log() |
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124 { |
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125 for (int i = 0; i < NUM_CHANNELS; i++) { |
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126 if (log_context->channels[i].logfile) { |
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127 wave_finalize(log_context->channels[i].logfile); |
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128 } |
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129 } |
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130 } |
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131 #define BUFFER_INC_RES 1000000000UL |
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132 |
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133 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock) |
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134 { |
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135 uint64_t old_inc = context->buffer_inc; |
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136 context->buffer_inc = ((BUFFER_INC_RES * (uint64_t)context->sample_rate) / (uint64_t)master_clock) * (uint64_t)context->clock_inc; |
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137 } |
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138 |
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139 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options) |
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140 { |
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141 dfopen(debug_file, "ym_debug.txt", "w"); |
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142 memset(context, 0, sizeof(*context)); |
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143 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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144 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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145 context->sample_rate = sample_rate; |
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146 context->clock_inc = clock_div * 6; |
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147 ym_adjust_master_clock(context, master_clock); |
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148 |
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149 context->sample_limit = sample_limit*2; |
| 374 | 150 context->write_cycle = CYCLE_NEVER; |
| 362 | 151 for (int i = 0; i < NUM_OPERATORS; i++) { |
| 152 context->operators[i].envelope = MAX_ENVELOPE; | |
| 153 context->operators[i].env_phase = PHASE_RELEASE; | |
| 154 } | |
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155 //some games seem to expect that the LR flags start out as 1 |
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156 for (int i = 0; i < NUM_CHANNELS; i++) { |
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157 context->channels[i].lr = 0xC0; |
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158 if (options & YM_OPT_WAVE_LOG) { |
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159 char fname[64]; |
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160 sprintf(fname, "ym_channel_%d.wav", i); |
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161 FILE * f = context->channels[i].logfile = fopen(fname, "wb"); |
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162 if (!f) { |
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163 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname); |
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164 continue; |
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165 } |
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166 if (!wave_init(f, sample_rate, 16, 1)) { |
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167 fclose(f); |
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168 context->channels[i].logfile = NULL; |
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169 } |
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170 } |
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171 } |
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172 if (options & YM_OPT_WAVE_LOG) { |
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173 log_context = context; |
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174 atexit(ym_finalize_log); |
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175 } |
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176 if (!did_tbl_init) { |
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177 //populate sine table |
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178 for (int32_t i = 0; i < 512; i++) { |
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179 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
|
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180 |
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181 //table stores 4.8 fixed pointed representation of the base 2 log |
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182 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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183 } |
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184 //populate power table |
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185 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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186 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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187 int32_t tmp = round_fixed_point(linear, 11); |
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188 int32_t shift = (i >> 8) - 2; |
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189 if (shift < 0) { |
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190 tmp <<= 0-shift; |
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191 } else { |
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192 tmp >>= shift; |
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193 } |
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194 pow_table[i] = tmp; |
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195 } |
| 362 | 196 //populate envelope generator rate table, from small base table |
| 197 for (int rate = 0; rate < 64; rate++) { | |
|
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198 for (int cycle = 0; cycle < 8; cycle++) { |
| 362 | 199 uint16_t value; |
|
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200 if (rate < 2) { |
| 362 | 201 value = 0; |
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202 } else if (rate >= 60) { |
| 362 | 203 value = 8; |
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204 } else if (rate < 8) { |
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205 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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206 } else if (rate < 48) { |
| 362 | 207 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
| 208 } else { | |
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209 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
| 362 | 210 } |
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211 rate_table[rate * 8 + cycle] = value; |
| 362 | 212 } |
| 213 } | |
|
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214 //populate LFO PM table from small base table |
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215 //seems like there must be a better way to derive this |
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216 for (int freq = 0; freq < 128; freq++) { |
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217 for (int pms = 0; pms < 8; pms++) { |
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218 for (int step = 0; step < 32; step++) { |
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219 int16_t value = 0; |
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220 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) { |
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221 if (freq & bit) { |
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222 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift; |
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223 } |
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224 } |
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225 if (step & 0x10) { |
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226 value = -value; |
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227 } |
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228 lfo_pm_table[freq * 256 + pms * 32 + step] = value; |
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229 } |
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230 } |
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231 } |
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232 } |
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233 } |
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234 |
| 377 | 235 #define YM_VOLUME_DIVIDER 2 |
|
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236 #define YM_MOD_SHIFT 1 |
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237 |
| 403 | 238 #define TIMER_A_MAX 1023 |
| 239 #define TIMER_B_MAX (255*16) | |
| 240 | |
|
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241 void ym_run(ym2612_context * context, uint32_t to_cycle) |
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242 { |
| 362 | 243 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
| 244 //TODO: Fix channel update order OR remap channels in register write | |
|
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245 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) { |
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246 //Update timers at beginning of 144 cycle period |
| 403 | 247 if (!context->current_op) { |
| 248 if (context->timer_control & BIT_TIMERA_ENABLE) { | |
| 249 if (context->timer_a != TIMER_A_MAX) { | |
| 250 context->timer_a++; | |
| 251 } else { | |
| 252 if (context->timer_control & BIT_TIMERA_OVEREN) { | |
| 253 context->status |= BIT_STATUS_TIMERA; | |
| 254 } | |
| 255 context->timer_a = context->timer_a_load; | |
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256 } |
|
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257 } |
| 362 | 258 if (context->timer_control & BIT_TIMERB_ENABLE) { |
| 403 | 259 if (context->timer_b != TIMER_B_MAX) { |
| 260 context->timer_b++; | |
| 261 } else { | |
| 262 if (context->timer_control & BIT_TIMERB_OVEREN) { | |
| 263 context->status |= BIT_STATUS_TIMERB; | |
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264 } |
| 403 | 265 context->timer_b = context->timer_b_load; |
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266 } |
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267 } |
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268 } |
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269 //Update LFO |
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270 if (context->lfo_enable) { |
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271 if (context->lfo_counter) { |
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272 context->lfo_counter--; |
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273 } else { |
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274 context->lfo_counter = lfo_timer_values[context->lfo_freq]; |
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275 context->lfo_am_step += 2; |
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276 context->lfo_am_step &= 0xFE; |
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277 context->lfo_pm_step = context->lfo_am_step / 8; |
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278 } |
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279 } |
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280 //Update Envelope Generator |
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281 if (!(context->current_op % 3)) { |
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282 uint32_t env_cyc = context->env_counter; |
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283 uint32_t op = context->current_env_op; |
| 362 | 284 ym_operator * operator = context->operators + op; |
| 285 ym_channel * channel = context->channels + op/4; | |
|
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286 uint8_t rate; |
| 362 | 287 for(;;) { |
| 288 rate = operator->rates[operator->env_phase]; | |
| 289 if (rate) { | |
| 290 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
| 291 rate = rate*2 + ks; | |
| 292 if (rate > 63) { | |
| 293 rate = 63; | |
| 294 } | |
| 295 } | |
| 296 //Deal with "infinite" rates | |
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297 //According to Nemesis this should be handled in key-on instead |
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298 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
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299 operator->env_phase = PHASE_DECAY; |
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300 operator->envelope = 0; |
| 362 | 301 } else { |
| 302 break; | |
| 303 } | |
| 304 } | |
| 305 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
|
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306 if (first_key_on) { |
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307 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
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308 } |
| 362 | 309 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
| 310 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
| 311 //envelope value is 10-bits, but it will be used as a 4.8 value | |
| 312 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
| 313 if (operator->env_phase == PHASE_ATTACK) { | |
| 314 //this can probably be optimized to a single shift rather than a multiply + shift | |
|
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315 if (first_key_on) { |
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316 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
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317 } |
|
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318 uint16_t old_env = operator->envelope; |
| 362 | 319 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
|
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320 if (operator->envelope > old_env) { |
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321 //Handle overflow |
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322 operator->envelope = 0; |
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323 } |
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324 if (!operator->envelope) { |
| 362 | 325 operator->env_phase = PHASE_DECAY; |
| 326 } | |
| 327 } else { | |
|
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328 if (first_key_on) { |
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329 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
|
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330 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
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331 } |
| 362 | 332 operator->envelope += envelope_inc; |
| 333 //clamp to max attenuation value | |
| 334 if (operator->envelope > MAX_ENVELOPE) { | |
| 335 operator->envelope = MAX_ENVELOPE; | |
| 336 } | |
| 337 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
|
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338 //operator->envelope = operator->sustain_level; |
| 362 | 339 operator->env_phase = PHASE_SUSTAIN; |
| 340 } | |
| 341 } | |
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342 } |
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343 context->current_env_op++; |
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344 if (context->current_env_op == NUM_OPERATORS) { |
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345 context->current_env_op = 0; |
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346 context->env_counter++; |
| 362 | 347 } |
| 348 } | |
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349 |
| 362 | 350 //Update Phase Generator |
|
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351 uint32_t channel = context->current_op / 4; |
| 362 | 352 if (channel != 5 || !context->dac_enable) { |
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353 uint32_t op = context->current_op; |
| 362 | 354 //printf("updating operator %d of channel %d\n", op, channel); |
| 355 ym_operator * operator = context->operators + op; | |
| 356 ym_channel * chan = context->channels + channel; | |
| 357 //TODO: Modulate phase by LFO if necessary | |
|
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358 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; |
| 362 | 359 operator->phase_counter += operator->phase_inc; |
|
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360 if (chan->pms) { |
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361 //not entirely sure this will get the precision correct, but I'd like to avoid recalculating phase |
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362 //increment every update when LFO phase modulation is enabled |
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363 int16_t lfo_mod = lfo_pm_table[(chan->fnum & 0x7F0) * 16 + chan->pms + context->lfo_pm_step]; |
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364 if (operator->multiple) { |
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365 lfo_mod *= operator->multiple; |
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366 } else { |
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367 lfo_mod >>= 1; |
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368 } |
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369 operator->phase_counter += lfo_mod; |
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370 } |
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371 int16_t mod = 0; |
| 362 | 372 switch (op % 4) |
|
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373 { |
| 362 | 374 case 0://Operator 1 |
| 377 | 375 if (chan->feedback) { |
|
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376 mod = operator->output >> (9-chan->feedback); |
| 377 | 377 } |
|
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378 break; |
| 362 | 379 case 1://Operator 3 |
| 380 switch(chan->algorithm) | |
| 381 { | |
| 382 case 0: | |
| 383 case 2: | |
| 384 //modulate by operator 2 | |
|
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385 mod = context->operators[op+1].output >> YM_MOD_SHIFT; |
| 362 | 386 break; |
| 387 case 1: | |
| 388 //modulate by operator 1+2 | |
|
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389 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT; |
| 362 | 390 break; |
| 391 case 5: | |
| 392 //modulate by operator 1 | |
|
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393 mod = context->operators[op-1].output >> YM_MOD_SHIFT; |
| 362 | 394 } |
| 395 break; | |
| 396 case 2://Operator 2 | |
|
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397 if (chan->algorithm != 1 && chan->algorithm != 2 && chan->algorithm != 7) { |
| 362 | 398 //modulate by Operator 1 |
|
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399 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 400 } |
|
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401 break; |
| 362 | 402 case 3://Operator 4 |
| 403 switch(chan->algorithm) | |
| 404 { | |
| 405 case 0: | |
| 406 case 1: | |
| 407 case 4: | |
| 408 //modulate by operator 3 | |
|
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409 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 410 break; |
| 411 case 2: | |
| 412 //modulate by operator 1+3 | |
|
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413 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 414 break; |
| 415 case 3: | |
| 416 //modulate by operator 2+3 | |
|
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417 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 418 break; |
| 419 case 5: | |
| 420 //modulate by operator 1 | |
|
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421 mod = context->operators[op-3].output >> YM_MOD_SHIFT; |
| 362 | 422 break; |
| 423 } | |
|
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424 break; |
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425 } |
|
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426 uint16_t env = operator->envelope + operator->total_level; |
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427 if (env > MAX_ENVELOPE) { |
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428 env = MAX_ENVELOPE; |
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429 } |
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430 if (first_key_on) { |
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431 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
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432 } |
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433 phase += mod; |
|
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434 |
|
371
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435 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
|
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436 if (phase & 0x200) { |
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437 output = -output; |
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438 } |
| 362 | 439 operator->output = output; |
|
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440 //Update the channel output if we've updated all operators |
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441 if (op % 4 == 3) { |
| 362 | 442 if (chan->algorithm < 4) { |
| 443 chan->output = operator->output; | |
| 444 } else if(chan->algorithm == 4) { | |
|
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445 chan->output = operator->output + context->operators[channel * 4 + 2].output; |
|
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446 } else { |
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447 output = 0; |
| 362 | 448 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
| 449 output += context->operators[op].output; | |
|
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450 } |
| 362 | 451 chan->output = output; |
|
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452 } |
|
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453 if (first_key_on) { |
|
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454 int16_t value = context->channels[channel].output & 0x3FE0; |
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455 if (value & 0x2000) { |
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456 value |= 0xC000; |
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457 } |
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458 dfprintf(debug_file, "channel %d output: %d\n", channel, value / YM_VOLUME_DIVIDER); |
|
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459 } |
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460 } |
| 362 | 461 //puts("operator update done"); |
|
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462 } |
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463 context->current_op++; |
|
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464 context->buffer_fraction += context->buffer_inc; |
|
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465 if (context->current_op == NUM_OPERATORS) { |
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466 context->current_op = 0; |
|
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467 } |
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468 if (context->buffer_fraction > BUFFER_INC_RES) { |
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469 context->buffer_fraction -= BUFFER_INC_RES; |
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470 context->audio_buffer[context->buffer_pos] = 0; |
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471 context->audio_buffer[context->buffer_pos + 1] = 0; |
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472 for (int i = 0; i < NUM_CHANNELS; i++) { |
|
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473 int16_t value = context->channels[i].output; |
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474 if (value > 0x1FE0) { |
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475 value = 0x1FE0; |
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476 } else if (value < -0x1FF0) { |
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477 value = -0x1FF0; |
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478 } else { |
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479 value &= 0x3FE0; |
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480 if (value & 0x2000) { |
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481 value |= 0xC000; |
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482 } |
|
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483 } |
|
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484 if (context->channels[i].logfile) { |
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485 fwrite(&value, sizeof(value), 1, context->channels[i].logfile); |
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486 } |
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487 if (context->channels[i].lr & 0x80) { |
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488 context->audio_buffer[context->buffer_pos] += value / YM_VOLUME_DIVIDER; |
|
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489 } |
|
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490 if (context->channels[i].lr & 0x40) { |
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491 context->audio_buffer[context->buffer_pos+1] += value / YM_VOLUME_DIVIDER; |
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492 } |
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493 } |
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494 context->buffer_pos += 2; |
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495 if (context->buffer_pos == context->sample_limit) { |
|
505
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The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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496 if (!headless) { |
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497 render_wait_ym(context); |
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498 } |
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499 } |
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500 } |
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501 } |
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502 if (context->current_cycle >= context->write_cycle + (BUSY_CYCLES * context->clock_inc / 6)) { |
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503 context->status &= 0x7F; |
| 374 | 504 context->write_cycle = CYCLE_NEVER; |
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505 } |
| 362 | 506 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
|
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507 } |
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508 |
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509 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
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510 { |
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511 //printf("address_write_part1: %X\n", address); |
| 362 | 512 context->selected_reg = address; |
| 513 context->selected_part = 0; | |
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514 } |
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515 |
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516 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
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517 { |
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518 //printf("address_write_part2: %X\n", address); |
| 362 | 519 context->selected_reg = address; |
| 520 context->selected_part = 1; | |
| 521 } | |
| 522 | |
| 523 uint8_t fnum_to_keycode[] = { | |
| 524 //F11 = 0 | |
| 525 0,0,0,0,0,0,0,1, | |
| 526 //F11 = 1 | |
| 527 2,3,3,3,3,3,3,3 | |
| 528 }; | |
| 529 | |
| 530 //table courtesy of Nemesis | |
| 531 uint32_t detune_table[][4] = { | |
| 532 {0, 0, 1, 2}, //0 (0x00) | |
| 533 {0, 0, 1, 2}, //1 (0x01) | |
| 534 {0, 0, 1, 2}, //2 (0x02) | |
| 535 {0, 0, 1, 2}, //3 (0x03) | |
| 536 {0, 1, 2, 2}, //4 (0x04) | |
| 537 {0, 1, 2, 3}, //5 (0x05) | |
| 538 {0, 1, 2, 3}, //6 (0x06) | |
| 539 {0, 1, 2, 3}, //7 (0x07) | |
| 540 {0, 1, 2, 4}, //8 (0x08) | |
| 541 {0, 1, 3, 4}, //9 (0x09) | |
| 542 {0, 1, 3, 4}, //10 (0x0A) | |
| 543 {0, 1, 3, 5}, //11 (0x0B) | |
| 544 {0, 2, 4, 5}, //12 (0x0C) | |
| 545 {0, 2, 4, 6}, //13 (0x0D) | |
| 546 {0, 2, 4, 6}, //14 (0x0E) | |
| 547 {0, 2, 5, 7}, //15 (0x0F) | |
| 548 {0, 2, 5, 8}, //16 (0x10) | |
| 549 {0, 3, 6, 8}, //17 (0x11) | |
| 550 {0, 3, 6, 9}, //18 (0x12) | |
| 551 {0, 3, 7,10}, //19 (0x13) | |
| 552 {0, 4, 8,11}, //20 (0x14) | |
| 553 {0, 4, 8,12}, //21 (0x15) | |
| 554 {0, 4, 9,13}, //22 (0x16) | |
| 555 {0, 5,10,14}, //23 (0x17) | |
| 556 {0, 5,11,16}, //24 (0x18) | |
| 557 {0, 6,12,17}, //25 (0x19) | |
| 558 {0, 6,13,19}, //26 (0x1A) | |
| 559 {0, 7,14,20}, //27 (0x1B) | |
| 560 {0, 8,16,22}, //28 (0x1C) | |
| 561 {0, 8,16,22}, //29 (0x1D) | |
| 562 {0, 8,16,22}, //30 (0x1E) | |
| 563 {0, 8,16,22} | |
| 564 }; //31 (0x1F) | |
| 565 | |
| 566 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
| 567 { | |
| 568 uint32_t chan_num = op / 4; | |
| 569 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
| 570 //base frequency | |
| 571 ym_channel * channel = context->channels + chan_num; | |
|
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572 uint32_t inc, detune; |
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573 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { |
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574 inc = context->ch3_supp[op-2*4].fnum; |
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575 if (!context->ch3_supp[op-2*4].block) { |
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576 inc >>= 1; |
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577 } else { |
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578 inc <<= (context->ch3_supp[op-2*4].block-1); |
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579 } |
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580 //detune |
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581 detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3]; |
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582 } else { |
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583 inc = channel->fnum; |
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584 if (!channel->block) { |
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585 inc >>= 1; |
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586 } else { |
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587 inc <<= (channel->block-1); |
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588 } |
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589 //detune |
|
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590 detune = detune_table[channel->keycode][operator->detune & 0x3]; |
|
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591 } |
| 362 | 592 if (operator->detune & 0x40) { |
| 593 inc -= detune; | |
| 594 //this can underflow, mask to 17-bit result | |
| 595 inc &= 0x1FFFF; | |
| 596 } else { | |
| 597 inc += detune; | |
| 598 } | |
| 599 //multiple | |
| 600 if (operator->multiple) { | |
| 601 inc *= operator->multiple; | |
| 602 } else { | |
| 603 //0.5 | |
| 604 inc >>= 1; | |
|
288
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|
605 } |
|
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
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|
606 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
|
364
62177cc39049
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362
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607 operator->phase_inc = inc; |
|
288
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|
608 } |
|
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parents:
diff
changeset
|
609 |
|
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|
610 void ym_data_write(ym2612_context * context, uint8_t value) |
|
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Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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611 { |
|
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
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|
612 if (context->selected_reg >= YM_REG_END) { |
| 362 | 613 return; |
|
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|
614 } |
|
451
b7c3b2d22858
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changeset
|
615 if (context->selected_part) { |
|
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616 if (context->selected_reg < YM_PART2_START) { |
|
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617 return; |
|
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618 } |
|
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|
619 context->part2_regs[context->selected_reg - YM_PART2_START] = value; |
|
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|
620 } else { |
|
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448
diff
changeset
|
621 if (context->selected_reg < YM_PART1_START) { |
|
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|
622 return; |
|
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623 } |
|
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|
624 context->part1_regs[context->selected_reg - YM_PART1_START] = value; |
|
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625 } |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
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changeset
|
626 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
| 362 | 627 if (context->selected_reg < 0x30) { |
| 628 //Shared regs | |
| 629 switch (context->selected_reg) | |
| 630 { | |
|
411
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|
631 //TODO: Test reg |
|
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|
632 case REG_LFO: |
|
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|
633 if ((value & 0x8) && !context->lfo_enable) { |
|
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|
634 printf("LFO Enabled, Freq: %d\n", value & 0x7); |
|
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|
635 } |
|
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|
636 context->lfo_enable = value & 0x8; |
|
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|
637 if (!context->lfo_enable) { |
|
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|
638 context->lfo_am_step = context->lfo_pm_step = 0; |
|
baf4688901f2
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|
639 } |
|
baf4688901f2
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|
640 context->lfo_freq = value & 0x7; |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
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424
diff
changeset
|
641 |
|
411
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changeset
|
642 break; |
| 362 | 643 case REG_TIMERA_HIGH: |
| 644 context->timer_a_load &= 0x3; | |
| 645 context->timer_a_load |= value << 2; | |
| 646 break; | |
| 647 case REG_TIMERA_LOW: | |
| 648 context->timer_a_load &= 0xFFFC; | |
| 649 context->timer_a_load |= value & 0x3; | |
| 650 break; | |
| 651 case REG_TIMERB: | |
| 403 | 652 context->timer_b_load = value * 16; |
| 362 | 653 break; |
|
383
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diff
changeset
|
654 case REG_TIME_CTRL: { |
| 403 | 655 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) { |
| 656 context->timer_a = context->timer_a_load; | |
| 657 } | |
| 658 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) { | |
| 659 context->timer_b = context->timer_b_load; | |
| 660 } | |
| 661 context->timer_control = value & 0xF; | |
| 662 if (value & BIT_TIMERA_RESET) { | |
| 663 context->status &= ~BIT_STATUS_TIMERA; | |
| 664 } | |
| 665 if (value & BIT_TIMERB_RESET) { | |
| 666 context->status &= ~BIT_STATUS_TIMERB; | |
| 667 } | |
|
383
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|
668 uint8_t old_mode = context->ch3_mode; |
|
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|
669 context->ch3_mode = value & 0xC0; |
|
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|
670 if (context->ch3_mode != old_mode) { |
|
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|
671 ym_update_phase_inc(context, context->operators + 2*4, 2*4); |
|
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changeset
|
672 ym_update_phase_inc(context, context->operators + 2*4+1, 2*4+1); |
|
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diff
changeset
|
673 ym_update_phase_inc(context, context->operators + 2*4+2, 2*4+2); |
|
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Initial implementation of channel 3 special mode
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|
674 } |
| 362 | 675 break; |
|
383
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Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
676 } |
| 362 | 677 case REG_KEY_ONOFF: { |
| 678 uint8_t channel = value & 0x7; | |
|
386
6e5c4f3ab0e2
Fix channel mapping in key on/off register
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parents:
383
diff
changeset
|
679 if (channel != 3 && channel != 7) { |
|
6e5c4f3ab0e2
Fix channel mapping in key on/off register
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parents:
383
diff
changeset
|
680 if (channel > 2) { |
|
6e5c4f3ab0e2
Fix channel mapping in key on/off register
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383
diff
changeset
|
681 channel--; |
|
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Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
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383
diff
changeset
|
682 } |
| 362 | 683 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { |
| 684 if (value & bit) { | |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
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parents:
424
diff
changeset
|
685 if (context->operators[op].env_phase == PHASE_RELEASE) |
|
e85a107e6ec0
Fix handling of key on in YM2612 core
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424
diff
changeset
|
686 { |
|
e85a107e6ec0
Fix handling of key on in YM2612 core
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parents:
424
diff
changeset
|
687 first_key_on = 1; |
|
e85a107e6ec0
Fix handling of key on in YM2612 core
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parents:
424
diff
changeset
|
688 //printf("Key On for operator %d in channel %d\n", op, channel); |
|
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Fix handling of key on in YM2612 core
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424
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changeset
|
689 context->operators[op].phase_counter = 0; |
|
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Fix handling of key on in YM2612 core
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424
diff
changeset
|
690 context->operators[op].env_phase = PHASE_ATTACK; |
|
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424
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changeset
|
691 } |
| 362 | 692 } else { |
| 693 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
| 694 context->operators[op].env_phase = PHASE_RELEASE; | |
| 695 } | |
| 696 } | |
| 697 } | |
| 698 break; | |
| 699 } | |
| 700 case REG_DAC: | |
| 701 if (context->dac_enable) { | |
| 702 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
703 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle); |
| 362 | 704 } |
| 705 break; | |
| 706 case REG_DAC_ENABLE: | |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
707 //printf("DAC Enable: %X\n", value); |
| 362 | 708 context->dac_enable = value & 0x80; |
| 709 break; | |
| 710 } | |
| 711 } else if (context->selected_reg < 0xA0) { | |
| 712 //part | |
| 713 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
| 714 //channel in part | |
| 715 if ((context->selected_reg & 0x3) != 0x3) { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
716 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
| 362 | 717 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
| 718 ym_operator * operator = context->operators + op; | |
| 719 switch (context->selected_reg & 0xF0) | |
| 720 { | |
| 721 case REG_DETUNE_MULT: | |
| 722 operator->detune = value >> 4 & 0x7; | |
| 723 operator->multiple = value & 0xF; | |
| 724 ym_update_phase_inc(context, operator, op); | |
| 725 break; | |
| 726 case REG_TOTAL_LEVEL: | |
| 727 operator->total_level = (value & 0x7F) << 5; | |
| 728 break; | |
| 729 case REG_ATTACK_KS: | |
| 376 | 730 operator->key_scaling = 3 - (value >> 6); |
| 362 | 731 operator->rates[PHASE_ATTACK] = value & 0x1F; |
| 732 break; | |
| 733 case REG_DECAY_AM: | |
| 734 //TODO: AM flag for LFO | |
| 735 operator->rates[PHASE_DECAY] = value & 0x1F; | |
| 736 break; | |
| 737 case REG_SUSTAIN_RATE: | |
| 738 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
| 739 break; | |
| 740 case REG_S_LVL_R_RATE: | |
| 741 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
|
382
b904859964e5
Fix operator precedence bug with sustain level
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parents:
381
diff
changeset
|
742 operator->sustain_level = (value & 0xF0) << 4; |
| 362 | 743 break; |
| 744 } | |
| 745 } | |
| 746 } else { | |
| 747 uint8_t channel = context->selected_reg & 0x3; | |
| 748 if (channel != 3) { | |
| 749 if (context->selected_part) { | |
| 750 channel += 3; | |
| 751 } | |
| 752 //printf("write targets channel %d\n", channel); | |
| 753 switch (context->selected_reg & 0xFC) | |
| 754 { | |
| 755 case REG_FNUM_LOW: | |
| 756 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
| 757 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
| 758 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
| 759 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
| 760 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
| 761 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
| 762 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
| 763 break; | |
| 764 case REG_BLOCK_FNUM_H:{ | |
| 765 context->channels[channel].block_fnum_latch = value; | |
| 766 break; | |
| 767 } | |
|
383
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diff
changeset
|
768 case REG_FNUM_LOW_CH3: |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
769 if (channel < 3) { |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
770 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7; |
|
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Initial implementation of channel 3 special mode
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382
diff
changeset
|
771 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value; |
|
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Initial implementation of channel 3 special mode
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382
diff
changeset
|
772 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7]; |
|
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Initial implementation of channel 3 special mode
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diff
changeset
|
773 if (context->ch3_mode) { |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
774 ym_update_phase_inc(context, context->operators + 2*4 + channel, 2*4); |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
775 } |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
776 } |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
777 break; |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
778 case REG_BLOCK_FN_CH3: |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
779 if (channel < 3) { |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
780 context->ch3_supp[channel].block_fnum_latch = value; |
|
72933100c55c
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382
diff
changeset
|
781 } |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
782 break; |
| 362 | 783 case REG_ALG_FEEDBACK: |
| 784 context->channels[channel].algorithm = value & 0x7; | |
| 785 context->channels[channel].feedback = value >> 3 & 0x7; | |
| 786 break; | |
| 787 case REG_LR_AMS_PMS: | |
|
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
788 context->channels[channel].pms = (value & 0x7) * 32; |
| 362 | 789 context->channels[channel].ams = value >> 4 & 0x3; |
| 790 context->channels[channel].lr = value & 0xC0; | |
|
369
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
|
791 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
| 362 | 792 break; |
| 793 } | |
| 794 } | |
| 795 } | |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
796 |
| 362 | 797 context->write_cycle = context->current_cycle; |
| 374 | 798 context->status |= 0x80; |
|
288
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Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
799 } |
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a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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800 |
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a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
801 uint8_t ym_read_status(ym2612_context * context) |
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a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
802 { |
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a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
803 return context->status; |
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a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
804 } |
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a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
805 |