Mercurial > repos > blastem
annotate vdp.c @ 328:bf7ed23efa40
Fewer magic numbers in the VDP core for the win
| author | Mike Pavone <pavone@retrodev.com> |
|---|---|
| date | Mon, 13 May 2013 21:36:33 -0700 |
| parents | 1b00258b1f29 |
| children | fd5f6577db9b |
| rev | line source |
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1 #include "vdp.h" |
| 75 | 2 #include "blastem.h" |
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3 #include <stdlib.h> |
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4 #include <string.h> |
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5 |
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6 #define NTSC_ACTIVE 225 |
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7 #define PAL_ACTIVE 241 |
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8 #define BUF_BIT_PRIORITY 0x40 |
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9 #define MAP_BIT_PRIORITY 0x8000 |
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10 #define MAP_BIT_H_FLIP 0x800 |
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11 #define MAP_BIT_V_FLIP 0x1000 |
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12 |
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13 //Mode reg 1 |
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14 #define BIT_HINT_EN 0x10 |
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15 #define BIT_PAL_SEL 0x04 |
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16 #define BIT_HVC_LATCH 0x02 |
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17 #define BIT_DISP_DIS 0x01 |
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18 |
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19 //Mode reg 2 |
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20 #define BIT_DISP_EN 0x40 |
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21 #define BIT_VINT_EN 0x20 |
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22 #define BIT_DMA_ENABLE 0x10 |
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23 #define BIT_PAL 0x08 |
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24 #define BIT_MODE_5 0x04 |
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25 |
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26 //Mode reg 3 |
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27 #define BIT_EINT_EN 0x10 |
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28 #define BIT_VSCROLL 0x04 |
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29 |
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30 //Mode reg 4 |
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31 #define BIT_H40 0x01 |
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32 #define BIT_HILIGHT 0x8 |
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33 |
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34 #define SCROLL_BUFFER_SIZE 32 |
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35 #define SCROLL_BUFFER_DRAW 16 |
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36 |
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37 #define FIFO_SIZE 4 |
| 40 | 38 |
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39 #define VINT_SLOTS_H40 (21+16+10) //21 slots before HSYNC, 16 during, 10 after TODO: deal with clock switching during HSYNC |
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40 #define VINT_SLOTS_H32 (33+20+7) //33 slots before HSYNC, 20 during, 7 after TODO: confirm final number |
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41 #define MCLKS_SLOT_H40 16 |
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42 #define MCLKS_SLOT_H32 20 |
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43 |
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44 void init_vdp_context(vdp_context * context) |
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45 { |
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46 memset(context, 0, sizeof(*context)); |
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47 context->vdpmem = malloc(VRAM_SIZE); |
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48 memset(context->vdpmem, 0, VRAM_SIZE); |
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49 context->framebuf = malloc(FRAMEBUF_SIZE); |
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50 memset(context->framebuf, 0, FRAMEBUF_SIZE); |
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51 context->linebuf = malloc(LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
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52 memset(context->linebuf, 0, LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
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53 context->tmp_buf_a = context->linebuf + LINEBUF_SIZE; |
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54 context->tmp_buf_b = context->tmp_buf_a + SCROLL_BUFFER_SIZE; |
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55 context->sprite_draws = MAX_DRAWS; |
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56 context->fifo_cur = malloc(sizeof(fifo_entry) * FIFO_SIZE); |
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57 context->fifo_end = context->fifo_cur + FIFO_SIZE; |
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58 } |
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59 |
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60 void render_sprite_cells(vdp_context * context) |
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61 { |
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62 if (context->cur_slot >= context->sprite_draws) { |
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63 sprite_draw * d = context->sprite_draw_list + context->cur_slot; |
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64 |
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65 uint16_t dir; |
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66 int16_t x; |
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67 if (d->h_flip) { |
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68 x = d->x_pos + 7; |
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69 dir = -1; |
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70 } else { |
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71 x = d->x_pos; |
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72 dir = 1; |
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73 } |
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74 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x); |
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75 context->cur_slot--; |
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76 for (uint16_t address = d->address; address != ((d->address+4) & 0xFFFF); address++) { |
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77 if (x >= 0 && x < 320 && !(context->linebuf[x] & 0xF)) { |
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78 context->linebuf[x] = (context->vdpmem[address] >> 4) | d->pal_priority; |
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79 } |
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80 x += dir; |
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81 if (x >= 0 && x < 320 && !(context->linebuf[x] & 0xF)) { |
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82 context->linebuf[x] = (context->vdpmem[address] & 0xF) | d->pal_priority; |
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83 } |
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84 x += dir; |
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85 } |
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86 } |
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87 } |
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88 |
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89 void vdp_print_sprite_table(vdp_context * context) |
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90 { |
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91 uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; |
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92 uint16_t current_index = 0; |
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93 uint8_t count = 0; |
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94 do { |
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95 uint16_t address = current_index * 8 + sat_address; |
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96 uint8_t height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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97 uint8_t width = (((context->vdpmem[address+2] >> 2) & 0x3) + 1) * 8; |
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98 int16_t y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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99 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 | context->vdpmem[address + 7]) & 0x1FF; |
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100 uint16_t link = context->vdpmem[address+3] & 0x7F; |
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101 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3; |
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102 uint8_t pri = context->vdpmem[address + 4] >> 7; |
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103 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; |
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104 //printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); |
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105 current_index = link; |
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106 count++; |
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107 } while (current_index != 0 && count < 80); |
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108 } |
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109 |
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110 void vdp_print_reg_explain(vdp_context * context) |
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111 { |
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112 char * hscroll[] = {"full", "7-line", "cell", "line"}; |
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113 printf("**Mode Group**\n" |
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114 "00: %.2X | H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n" |
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115 "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d\n" |
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116 "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n" |
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117 "0C: %.2X | Width: %d, Shadow/Highlight: %s\n", |
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118 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_PAL_SEL != 0, |
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119 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled", |
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120 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled", |
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121 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, |
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122 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full", |
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123 hscroll[context->regs[REG_MODE_3] & 0x3], |
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124 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled"); |
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125 printf("\n**Table Group**\n" |
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126 "02: %.2X | Scroll A Name Table: $%.4X\n" |
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127 "03: %.2X | Window Name Table: $%.4X\n" |
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128 "04: %.2X | Scroll B Name Table: $%.4X\n" |
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129 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
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130 "0D: %.2X | HScroll Data Table: $%.4X\n", |
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131 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10, |
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132 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10, |
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133 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13, |
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134 context->regs[REG_SAT], (context->regs[REG_SAT] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3E : 0x3F)) << 9, |
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135 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x1F) << 10); |
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136 char * sizes[] = {"32", "64", "invalid", "128"}; |
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137 printf("\n**Misc Group**\n" |
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138 "07: %.2X | Backdrop Color: $%X\n" |
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139 "0A: %.2X | H-Int Counter: %u\n" |
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140 "0F: %.2X | Auto-increment: $%X\n" |
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141 "10: %.2X | Scroll A/B Size: %sx%s\n", |
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142 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR] & 0x3F, |
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143 context->regs[REG_HINT], context->regs[REG_HINT], |
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144 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC], |
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145 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]); |
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146 |
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147 //TODO: Window Group, DMA Group |
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148 } |
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149 |
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150 void scan_sprite_table(uint32_t line, vdp_context * context) |
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151 { |
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152 if (context->sprite_index && context->slot_counter) { |
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153 line += 1; |
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154 line &= 0xFF; |
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155 context->sprite_index &= 0x7F; |
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156 if (context->latched_mode & BIT_H40) { |
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157 if (context->sprite_index >= MAX_SPRITES_FRAME) { |
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158 context->sprite_index = 0; |
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159 return; |
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160 } |
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161 } else if(context->sprite_index >= MAX_SPRITES_FRAME_H32) { |
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162 context->sprite_index = 0; |
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163 return; |
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164 } |
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165 //TODO: Read from SAT cache rather than from VRAM |
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166 uint16_t sat_address = (context->regs[REG_SAT] & 0x7F) << 9; |
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167 uint16_t address = context->sprite_index * 8 + sat_address; |
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168 line += 128; |
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169 uint16_t y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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170 uint8_t height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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171 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
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172 if (y <= line && line < (y + height)) { |
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173 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
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174 context->sprite_info_list[--(context->slot_counter)].size = context->vdpmem[address+2]; |
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175 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
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176 context->sprite_info_list[context->slot_counter].y = y-128; |
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177 } |
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178 context->sprite_index = context->vdpmem[address+3] & 0x7F; |
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179 if (context->sprite_index && context->slot_counter) |
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180 { |
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181 address = context->sprite_index * 8 + sat_address; |
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182 y = ((context->vdpmem[address] & 0x3) << 8 | context->vdpmem[address+1]) & 0x1FF; |
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183 height = ((context->vdpmem[address+2] & 0x3) + 1) * 8; |
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184 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
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185 if (y <= line && line < (y + height)) { |
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186 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
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187 context->sprite_info_list[--(context->slot_counter)].size = context->vdpmem[address+2]; |
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188 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
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189 context->sprite_info_list[context->slot_counter].y = y-128; |
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190 } |
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191 context->sprite_index = context->vdpmem[address+3] & 0x7F; |
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192 } |
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193 } |
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194 } |
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195 |
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196 void read_sprite_x(uint32_t line, vdp_context * context) |
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197 { |
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198 if (context->cur_slot >= context->slot_counter) { |
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199 if (context->sprite_draws) { |
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200 line += 1; |
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201 line &= 0xFF; |
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202 //in tiles |
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203 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1; |
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204 //in pixels |
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205 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8; |
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206 uint16_t att_addr = ((context->regs[REG_SAT] & 0x7F) << 9) + context->sprite_info_list[context->cur_slot].index * 8 + 4; |
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207 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1]; |
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208 uint8_t pal_priority = (tileinfo >> 9) & 0x70; |
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209 uint8_t row; |
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210 if (tileinfo & MAP_BIT_V_FLIP) { |
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211 row = (context->sprite_info_list[context->cur_slot].y + height - 1) - line; |
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212 } else { |
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213 row = line-context->sprite_info_list[context->cur_slot].y; |
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214 } |
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215 uint16_t address = ((tileinfo & 0x7FF) << 5) + row * 4; |
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323
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216 int16_t x = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 | context->vdpmem[att_addr + 3]) & 0x1FF; |
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217 if (x) { |
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218 context->flags |= FLAG_CAN_MASK; |
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219 } else if(context->flags & (FLAG_CAN_MASK | FLAG_DOT_OFLOW)) { |
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220 context->flags |= FLAG_MASKED; |
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221 } |
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222 |
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223 context->flags &= ~FLAG_DOT_OFLOW; |
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224 int16_t i; |
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225 if (context->flags & FLAG_MASKED) { |
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226 for (i=0; i < width && context->sprite_draws; i++) { |
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227 --context->sprite_draws; |
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228 context->sprite_draw_list[context->sprite_draws].x_pos = -128; |
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229 } |
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230 } else { |
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231 x -= 128; |
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232 int16_t base_x = x; |
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233 int16_t dir; |
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234 if (tileinfo & MAP_BIT_H_FLIP) { |
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235 x += (width-1) * 8; |
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236 dir = -8; |
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237 } else { |
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238 dir = 8; |
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239 } |
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240 //printf("Sprite %d | x: %d, y: %d, width: %d, height: %d, pal_priority: %X, row: %d, tile addr: %X\n", context->sprite_info_list[context->cur_slot].index, x, context->sprite_info_list[context->cur_slot].y, width, height, pal_priority, row, address); |
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241 for (i=0; i < width && context->sprite_draws; i++, x += dir) { |
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242 --context->sprite_draws; |
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243 context->sprite_draw_list[context->sprite_draws].address = address + i * height * 4; |
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244 context->sprite_draw_list[context->sprite_draws].x_pos = x; |
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245 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority; |
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246 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0; |
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247 } |
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248 } |
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249 if (i < width) { |
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250 context->flags |= FLAG_DOT_OFLOW; |
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251 } |
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252 context->cur_slot--; |
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253 } else { |
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254 context->flags |= FLAG_DOT_OFLOW; |
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255 } |
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256 } |
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257 } |
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258 |
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259 #define VRAM_READ 0 |
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260 #define VRAM_WRITE 1 |
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261 #define CRAM_READ 8 |
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262 #define CRAM_WRITE 3 |
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263 #define VSRAM_READ 4 |
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264 #define VSRAM_WRITE 5 |
| 75 | 265 #define DMA_START 0x20 |
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266 |
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267 void external_slot(vdp_context * context) |
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268 { |
| 75 | 269 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode |
| 270 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations | |
| 271 //TODO: Figure out what happens if DMA gets disabled part way through a DMA fill or DMA copy | |
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272 if(context->flags & FLAG_DMA_RUN) { |
| 75 | 273 uint16_t dma_len; |
| 274 switch(context->regs[REG_DMASRC_H] & 0xC0) | |
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275 { |
| 75 | 276 //68K -> VDP |
| 277 case 0: | |
| 278 case 0x40: | |
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279 switch(context->dma_cd & 0xF) |
| 75 | 280 { |
| 281 case VRAM_WRITE: | |
| 282 if (context->flags & FLAG_DMA_PROG) { | |
| 283 context->vdpmem[context->address ^ 1] = context->dma_val; | |
| 284 context->flags &= ~FLAG_DMA_PROG; | |
| 285 } else { | |
| 286 context->dma_val = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
| 287 context->vdpmem[context->address] = context->dma_val >> 8; | |
| 288 context->flags |= FLAG_DMA_PROG; | |
| 289 } | |
| 290 break; | |
| 291 case CRAM_WRITE: | |
| 292 context->cram[(context->address/2) & (CRAM_SIZE-1)] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
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293 //printf("CRAM DMA | %X set to %X from %X at %d\n", (context->address/2) & (CRAM_SIZE-1), context->cram[(context->address/2) & (CRAM_SIZE-1)], (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->cycles); |
| 75 | 294 break; |
| 295 case VSRAM_WRITE: | |
| 296 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 297 context->vsram[(context->address/2) & 63] = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); | |
| 298 } | |
| 299 break; | |
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300 } |
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301 break; |
| 75 | 302 //Fill |
| 303 case 0x80: | |
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304 switch(context->dma_cd & 0xF) |
| 75 | 305 { |
| 306 case VRAM_WRITE: | |
| 307 //Charles MacDonald's VDP doc says that the low byte gets written first | |
| 142 | 308 context->vdpmem[context->address] = context->dma_val; |
| 309 context->dma_val = (context->dma_val << 8) | ((context->dma_val >> 8) & 0xFF); | |
| 75 | 310 break; |
| 311 case CRAM_WRITE: | |
| 312 context->cram[(context->address/2) & (CRAM_SIZE-1)] = context->dma_val; | |
| 313 break; | |
| 314 case VSRAM_WRITE: | |
| 315 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 316 context->vsram[(context->address/2) & 63] = context->dma_val; | |
| 317 } | |
| 318 break; | |
| 319 } | |
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320 break; |
| 75 | 321 //Copy |
| 322 case 0xC0: | |
| 323 if (context->flags & FLAG_DMA_PROG) { | |
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324 switch(context->dma_cd & 0xF) |
| 75 | 325 { |
| 326 case VRAM_WRITE: | |
| 327 context->vdpmem[context->address] = context->dma_val; | |
| 328 break; | |
| 329 case CRAM_WRITE: | |
| 330 context->cram[(context->address/2) & (CRAM_SIZE-1)] = context->dma_val; | |
| 331 break; | |
| 332 case VSRAM_WRITE: | |
| 333 if (((context->address/2) & 63) < VSRAM_SIZE) { | |
| 334 context->vsram[(context->address/2) & 63] = context->dma_val; | |
| 335 } | |
| 336 break; | |
| 337 } | |
| 338 context->flags &= ~FLAG_DMA_PROG; | |
| 339 } else { | |
| 340 //I assume, that DMA copy copies from the same RAM as the destination | |
| 341 //but it's possible I'm mistaken | |
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342 switch(context->dma_cd & 0xF) |
| 75 | 343 { |
| 344 case VRAM_WRITE: | |
| 345 context->dma_val = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]]; | |
| 346 break; | |
| 347 case CRAM_WRITE: | |
| 348 context->dma_val = context->cram[context->regs[REG_DMASRC_L] & (CRAM_SIZE-1)]; | |
| 349 break; | |
| 350 case VSRAM_WRITE: | |
| 351 if ((context->regs[REG_DMASRC_L] & 63) < VSRAM_SIZE) { | |
| 352 context->dma_val = context->vsram[context->regs[REG_DMASRC_L] & 63]; | |
| 353 } else { | |
| 354 context->dma_val = 0; | |
| 355 } | |
| 356 break; | |
| 357 } | |
| 358 context->flags |= FLAG_DMA_PROG; | |
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359 } |
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360 break; |
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361 } |
| 75 | 362 if (!(context->flags & FLAG_DMA_PROG)) { |
| 363 context->address += context->regs[REG_AUTOINC]; | |
| 364 context->regs[REG_DMASRC_L] += 1; | |
| 135 | 365 if (!context->regs[REG_DMASRC_L]) { |
| 366 context->regs[REG_DMASRC_M] += 1; | |
| 367 } | |
| 75 | 368 dma_len = ((context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]) - 1; |
| 369 context->regs[REG_DMALEN_H] = dma_len >> 8; | |
| 370 context->regs[REG_DMALEN_L] = dma_len; | |
| 371 if (!dma_len) { | |
| 372 context->flags &= ~FLAG_DMA_RUN; | |
| 373 } | |
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374 } |
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375 } else { |
| 75 | 376 fifo_entry * start = (context->fifo_end - FIFO_SIZE); |
| 377 if (context->fifo_cur != start && start->cycle <= context->cycles) { | |
| 378 if ((context->regs[REG_MODE_2] & BIT_DMA_ENABLE) && (context->cd & DMA_START)) { | |
| 379 context->flags |= FLAG_DMA_RUN; | |
| 380 context->dma_val = start->value; | |
| 138 | 381 context->address = start->address; //undo auto-increment |
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382 context->dma_cd = context->cd; |
| 75 | 383 } else { |
| 138 | 384 switch (start->cd & 0xF) |
| 75 | 385 { |
| 386 case VRAM_WRITE: | |
| 387 if (start->partial) { | |
| 388 //printf("VRAM Write: %X to %X\n", start->value, context->address ^ 1); | |
| 138 | 389 context->vdpmem[start->address ^ 1] = start->value; |
| 75 | 390 } else { |
| 391 //printf("VRAM Write High: %X to %X\n", start->value >> 8, context->address); | |
| 138 | 392 context->vdpmem[start->address] = start->value >> 8; |
| 75 | 393 start->partial = 1; |
| 394 //skip auto-increment and removal of entry from fifo | |
| 395 return; | |
| 396 } | |
| 397 break; | |
| 398 case CRAM_WRITE: | |
|
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399 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); |
| 138 | 400 context->cram[(start->address/2) & (CRAM_SIZE-1)] = start->value; |
| 75 | 401 break; |
| 402 case VSRAM_WRITE: | |
| 138 | 403 if (((start->address/2) & 63) < VSRAM_SIZE) { |
| 75 | 404 //printf("VSRAM Write: %X to %X\n", start->value, context->address); |
| 138 | 405 context->vsram[(start->address/2) & 63] = start->value; |
| 75 | 406 } |
| 407 break; | |
| 408 } | |
| 138 | 409 //context->address += context->regs[REG_AUTOINC]; |
| 75 | 410 } |
| 411 fifo_entry * cur = start+1; | |
| 412 if (cur < context->fifo_cur) { | |
| 413 memmove(start, cur, sizeof(fifo_entry) * (context->fifo_cur - cur)); | |
| 414 } | |
| 415 context->fifo_cur -= 1; | |
| 416 } else { | |
| 417 context->flags |= FLAG_UNUSED_SLOT; | |
| 418 } | |
|
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419 } |
|
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420 } |
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421 |
| 40 | 422 #define WINDOW_RIGHT 0x80 |
| 423 #define WINDOW_DOWN 0x80 | |
| 424 | |
|
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425 void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context) |
|
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426 { |
| 40 | 427 if (!vsram_off) { |
| 428 uint16_t left_col, right_col; | |
| 429 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) { | |
|
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430 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; |
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431 right_col = 42; |
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432 } else { |
| 40 | 433 left_col = 0; |
| 434 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; | |
| 435 if (right_col) { | |
| 436 right_col += 2; | |
| 437 } | |
| 438 } | |
|
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439 uint16_t top_line, bottom_line; |
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440 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) { |
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441 top_line = (context->regs[REG_WINDOW_V] & 0x1F) * 8; |
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442 bottom_line = 241; |
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443 } else { |
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444 top_line = 0; |
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445 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) * 8; |
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446 } |
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447 if ((column >= left_col && column < right_col) || (line >= top_line && line < bottom_line)) { |
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448 uint16_t address = context->regs[REG_WINDOW] << 10; |
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449 uint16_t line_offset, offset, mask; |
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450 if (context->latched_mode & BIT_H40) { |
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451 address &= 0xF000; |
|
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452 line_offset = (((line) / 8) * 64 * 2) & 0xFFF; |
|
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453 mask = 0x7F; |
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454 |
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455 } else { |
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456 address &= 0xF800; |
|
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457 line_offset = (((line) / 8) * 32 * 2) & 0xFFF; |
|
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458 mask = 0x3F; |
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459 } |
|
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460 offset = address + line_offset + (((column - 2) * 2) & mask); |
|
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461 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
|
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462 //printf("Window | top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]); |
|
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463 offset = address + line_offset + (((column - 1) * 2) & mask); |
|
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464 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
|
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465 context->v_offset = (line) & 0x7; |
|
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466 context->flags |= FLAG_WINDOW; |
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467 return; |
| 40 | 468 } |
| 469 context->flags &= ~FLAG_WINDOW; | |
| 470 } | |
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471 uint16_t vscroll; |
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472 switch(context->regs[REG_SCROLL] & 0x30) |
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473 { |
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474 case 0: |
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475 vscroll = 0xFF; |
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476 break; |
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477 case 0x10: |
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478 vscroll = 0x1FF; |
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479 break; |
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480 case 0x20: |
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481 //TODO: Verify this behavior |
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482 vscroll = 0; |
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483 break; |
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484 case 0x30: |
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485 vscroll = 0x3FF; |
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486 break; |
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487 } |
|
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488 vscroll &= (context->vsram[(context->regs[REG_MODE_3] & BIT_VSCROLL ? column : 0) + vsram_off] + line); |
|
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489 context->v_offset = vscroll & 0x7; |
|
26
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diff
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|
490 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset); |
|
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491 vscroll /= 8; |
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492 uint16_t hscroll_mask; |
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493 uint16_t v_mul; |
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494 switch(context->regs[REG_SCROLL] & 0x3) |
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495 { |
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496 case 0: |
|
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diff
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|
497 hscroll_mask = 0x1F; |
|
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498 v_mul = 64; |
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499 break; |
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500 case 0x1: |
|
39
3c69319269ef
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38
diff
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|
501 hscroll_mask = 0x3F; |
|
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502 v_mul = 128; |
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503 break; |
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504 case 0x2: |
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505 //TODO: Verify this behavior |
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506 hscroll_mask = 0; |
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507 v_mul = 0; |
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508 break; |
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|
509 case 0x3: |
|
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87
diff
changeset
|
510 hscroll_mask = 0x7F; |
|
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511 v_mul = 256; |
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|
512 break; |
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513 } |
| 28 | 514 uint16_t hscroll, offset; |
| 515 for (int i = 0; i < 2; i++) { | |
|
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38
diff
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|
516 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask; |
|
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diff
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517 offset = address + ((vscroll * v_mul + hscroll*2) & 0x1FFF); |
|
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518 //printf("%s | line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset); |
| 28 | 519 uint16_t col_val = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
| 520 if (i) { | |
| 521 context->col_2 = col_val; | |
| 522 } else { | |
| 523 context->col_1 = col_val; | |
| 524 } | |
| 525 } | |
|
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526 } |
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527 |
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528 void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context) |
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529 { |
|
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24
diff
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|
530 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context); |
|
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531 } |
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532 |
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533 void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context) |
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|
534 { |
|
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|
535 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context); |
|
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536 } |
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|
537 |
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538 void render_map(uint16_t col, uint8_t * tmp_buf, vdp_context * context) |
|
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|
539 { |
|
42
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41
diff
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|
540 uint16_t address = ((col & 0x7FF) << 5); |
|
20
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|
541 if (col & MAP_BIT_V_FLIP) { |
|
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42
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542 address += 28 - 4 * context->v_offset; |
|
20
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|
543 } else { |
|
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|
544 address += 4 * context->v_offset; |
|
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|
545 } |
|
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|
546 uint16_t pal_priority = (col >> 9) & 0x70; |
|
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|
547 int32_t dir; |
|
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diff
changeset
|
548 if (col & MAP_BIT_H_FLIP) { |
|
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|
549 tmp_buf += 7; |
|
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diff
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|
550 dir = -1; |
|
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diff
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|
551 } else { |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
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|
552 dir = 1; |
|
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Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
553 } |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
554 for (uint32_t i=0; i < 4; i++, address++) |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
555 { |
|
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diff
changeset
|
556 *tmp_buf = pal_priority | (context->vdpmem[address] >> 4); |
|
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parents:
diff
changeset
|
557 tmp_buf += dir; |
|
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parents:
diff
changeset
|
558 *tmp_buf = pal_priority | (context->vdpmem[address] & 0xF); |
|
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|
559 tmp_buf += dir; |
|
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diff
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|
560 } |
|
f664eeb55cb4
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|
561 } |
|
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diff
changeset
|
562 |
|
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diff
changeset
|
563 void render_map_1(vdp_context * context) |
|
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diff
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|
564 { |
|
39
3c69319269ef
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Mike Pavone <pavone@retrodev.com>
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38
diff
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|
565 render_map(context->col_1, context->tmp_buf_a+SCROLL_BUFFER_DRAW, context); |
|
20
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parents:
diff
changeset
|
566 } |
|
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parents:
diff
changeset
|
567 |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
568 void render_map_2(vdp_context * context) |
|
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parents:
diff
changeset
|
569 { |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
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38
diff
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|
570 render_map(context->col_2, context->tmp_buf_a+SCROLL_BUFFER_DRAW+8, context); |
|
20
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parents:
diff
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|
571 } |
|
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Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
572 |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
573 void render_map_3(vdp_context * context) |
|
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|
574 { |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
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38
diff
changeset
|
575 render_map(context->col_1, context->tmp_buf_b+SCROLL_BUFFER_DRAW, context); |
|
20
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Mike Pavone <pavone@retrodev.com>
parents:
diff
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|
576 } |
|
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Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
577 |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
578 void render_map_output(uint32_t line, int32_t col, vdp_context * context) |
|
f664eeb55cb4
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parents:
diff
changeset
|
579 { |
|
f664eeb55cb4
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parents:
diff
changeset
|
580 if (line >= 240) { |
|
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parents:
diff
changeset
|
581 return; |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
582 } |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
583 render_map(context->col_2, context->tmp_buf_b+SCROLL_BUFFER_DRAW+8, context); |
|
20
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parents:
diff
changeset
|
584 uint16_t *dst, *end; |
|
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
585 uint8_t *sprite_buf, *plane_a, *plane_b; |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
586 if (col) |
|
f664eeb55cb4
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
587 { |
|
f664eeb55cb4
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parents:
diff
changeset
|
588 col-=2; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
589 dst = context->framebuf + line * 320 + col * 8; |
|
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parents:
diff
changeset
|
590 sprite_buf = context->linebuf + col * 8; |
|
43
3fc57e1a2c56
Add debug render mode and fix vertical flip bit for bg tiles
Mike Pavone <pavone@retrodev.com>
parents:
42
diff
changeset
|
591 uint16_t a_src; |
| 40 | 592 if (context->flags & FLAG_WINDOW) { |
| 593 plane_a = context->tmp_buf_a + SCROLL_BUFFER_DRAW; | |
|
43
3fc57e1a2c56
Add debug render mode and fix vertical flip bit for bg tiles
Mike Pavone <pavone@retrodev.com>
parents:
42
diff
changeset
|
594 a_src = FBUF_SRC_W; |
| 40 | 595 } else { |
| 596 plane_a = context->tmp_buf_a + SCROLL_BUFFER_DRAW - (context->hscroll_a & 0xF); | |
|
43
3fc57e1a2c56
Add debug render mode and fix vertical flip bit for bg tiles
Mike Pavone <pavone@retrodev.com>
parents:
42
diff
changeset
|
597 a_src = FBUF_SRC_A; |
| 40 | 598 } |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
599 plane_b = context->tmp_buf_b + SCROLL_BUFFER_DRAW - (context->hscroll_b & 0xF); |
| 30 | 600 end = dst + 16; |
|
43
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Add debug render mode and fix vertical flip bit for bg tiles
Mike Pavone <pavone@retrodev.com>
parents:
42
diff
changeset
|
601 uint16_t src; |
| 30 | 602 //printf("A | tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7)); |
|
230
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parents:
191
diff
changeset
|
603 |
|
d3266cee02c9
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191
diff
changeset
|
604 if (context->regs[REG_MODE_4] & BIT_HILIGHT) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
605 for (; dst < end; ++plane_a, ++plane_b, ++sprite_buf, ++dst) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
606 uint8_t pixel; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
607 |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
608 src = 0; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
609 uint8_t sprite_color = *sprite_buf & 0x3F; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
610 if (sprite_color == 0x3E || sprite_color == 0x3F) { |
|
232
54873acb982e
Shadow and higlight operators were switched
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230
diff
changeset
|
611 if (sprite_color == 0x3F) { |
|
54873acb982e
Shadow and higlight operators were switched
Mike Pavone <pavone@retrodev.com>
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230
diff
changeset
|
612 src = FBUF_SHADOW; |
|
230
d3266cee02c9
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parents:
191
diff
changeset
|
613 } else { |
|
232
54873acb982e
Shadow and higlight operators were switched
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parents:
230
diff
changeset
|
614 src = FBUF_HILIGHT; |
|
230
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Implemented shadow hilight mode.
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191
diff
changeset
|
615 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
616 if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
617 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
618 src |= a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
619 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
620 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
621 src |= FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
622 } else if (*plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
623 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
624 src |= a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
625 } else if (*plane_b & 0xF){ |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
626 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
627 src |= FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
628 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
629 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
630 src |= FBUF_SRC_BG; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
631 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
632 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
633 if (*sprite_buf & BUF_BIT_PRIORITY && *sprite_buf & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
634 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
635 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
636 } else if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
637 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
638 src = a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
639 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
640 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
641 src = FBUF_SRC_B; |
|
233
9d10669f2579
Less broken implementation of shadow/highlight
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232
diff
changeset
|
642 } else { |
|
9d10669f2579
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232
diff
changeset
|
643 if (!(*plane_a & BUF_BIT_PRIORITY || *plane_a & BUF_BIT_PRIORITY)) { |
|
9d10669f2579
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232
diff
changeset
|
644 src = FBUF_SHADOW; |
|
230
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
645 } |
|
233
9d10669f2579
Less broken implementation of shadow/highlight
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parents:
232
diff
changeset
|
646 if (*sprite_buf & 0xF) { |
|
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232
diff
changeset
|
647 pixel = *sprite_buf; |
|
9d10669f2579
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232
diff
changeset
|
648 if (*sprite_buf & 0xF == 0xE) { |
|
9d10669f2579
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232
diff
changeset
|
649 src = FBUF_SRC_S; |
|
9d10669f2579
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parents:
232
diff
changeset
|
650 } else { |
|
9d10669f2579
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232
diff
changeset
|
651 src |= FBUF_SRC_S; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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parents:
232
diff
changeset
|
652 } |
|
9d10669f2579
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232
diff
changeset
|
653 } else if (*plane_a & 0xF) { |
|
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232
diff
changeset
|
654 pixel = *plane_a; |
|
9d10669f2579
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parents:
232
diff
changeset
|
655 src |= a_src; |
|
9d10669f2579
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parents:
232
diff
changeset
|
656 } else if (*plane_b & 0xF){ |
|
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232
diff
changeset
|
657 pixel = *plane_b; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
diff
changeset
|
658 src |= FBUF_SRC_B; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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parents:
232
diff
changeset
|
659 } else { |
|
9d10669f2579
Less broken implementation of shadow/highlight
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parents:
232
diff
changeset
|
660 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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parents:
232
diff
changeset
|
661 src |= FBUF_SRC_BG; |
|
9d10669f2579
Less broken implementation of shadow/highlight
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232
diff
changeset
|
662 } |
|
230
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
663 } |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
664 } |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
665 *dst = (context->cram[pixel & 0x3F] & 0xEEE) | ((pixel & BUF_BIT_PRIORITY) ? FBUF_BIT_PRIORITY : 0) | src; |
|
20
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Mostly broken VDP core and savestate viewer
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diff
changeset
|
666 } |
|
230
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
667 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
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191
diff
changeset
|
668 for (; dst < end; ++plane_a, ++plane_b, ++sprite_buf, ++dst) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
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191
diff
changeset
|
669 uint8_t pixel; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
670 if (*sprite_buf & BUF_BIT_PRIORITY && *sprite_buf & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
671 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
672 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
673 } else if (*plane_a & BUF_BIT_PRIORITY && *plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
674 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
675 src = a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
676 } else if (*plane_b & BUF_BIT_PRIORITY && *plane_b & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
677 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
678 src = FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
679 } else if (*sprite_buf & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
680 pixel = *sprite_buf; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
681 src = FBUF_SRC_S; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
682 } else if (*plane_a & 0xF) { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
683 pixel = *plane_a; |
|
d3266cee02c9
Implemented shadow hilight mode.
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parents:
191
diff
changeset
|
684 src = a_src; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
685 } else if (*plane_b & 0xF){ |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
686 pixel = *plane_b; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
687 src = FBUF_SRC_B; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
688 } else { |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
689 pixel = context->regs[REG_BG_COLOR] & 0x3F; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
690 src = FBUF_SRC_BG; |
|
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
691 } |
|
291
eea3b118940d
Make sure all rendering operations mask CRAM with 0xEEE before using it
Mike Pavone <pavone@retrodev.com>
parents:
233
diff
changeset
|
692 *dst = (context->cram[pixel & 0x3F] & 0xEEE) | ((pixel & BUF_BIT_PRIORITY) ? FBUF_BIT_PRIORITY : 0) | src; |
|
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
693 } |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
694 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
695 } else { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
696 //dst = context->framebuf + line * 320; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
697 //sprite_buf = context->linebuf + col * 8; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
698 //plane_a = context->tmp_buf_a + 16 - (context->hscroll_a & 0x7); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
699 //plane_b = context->tmp_buf_b + 16 - (context->hscroll_b & 0x7); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
700 //end = dst + 8; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
701 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
702 |
| 40 | 703 uint16_t remaining; |
| 704 if (!(context->flags & FLAG_WINDOW)) { | |
| 705 remaining = context->hscroll_a & 0xF; | |
| 706 memcpy(context->tmp_buf_a + SCROLL_BUFFER_DRAW - remaining, context->tmp_buf_a + SCROLL_BUFFER_SIZE - remaining, remaining); | |
| 707 } | |
|
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
708 remaining = context->hscroll_b & 0xF; |
|
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
709 memcpy(context->tmp_buf_b + SCROLL_BUFFER_DRAW - remaining, context->tmp_buf_b + SCROLL_BUFFER_SIZE - remaining, remaining); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
710 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
711 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
712 #define COLUMN_RENDER_BLOCK(column, startcyc) \ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
713 case startcyc:\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
714 read_map_scroll_a(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
715 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
716 case (startcyc+1):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
717 external_slot(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
718 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
719 case (startcyc+2):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
720 render_map_1(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
721 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
722 case (startcyc+3):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
723 render_map_2(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
724 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
725 case (startcyc+4):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
726 read_map_scroll_b(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
727 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
728 case (startcyc+5):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
729 read_sprite_x(line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
730 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
731 case (startcyc+6):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
732 render_map_3(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
733 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
734 case (startcyc+7):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
735 render_map_output(line, column, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
736 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
737 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
738 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
739 case startcyc:\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
740 read_map_scroll_a(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
741 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
742 case (startcyc+1):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
743 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
744 case (startcyc+2):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
745 render_map_1(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
746 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
747 case (startcyc+3):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
748 render_map_2(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
749 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
750 case (startcyc+4):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
751 read_map_scroll_b(column, line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
752 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
753 case (startcyc+5):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
754 read_sprite_x(line, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
755 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
756 case (startcyc+6):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
757 render_map_3(context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
758 break;\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
759 case (startcyc+7):\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
760 render_map_output(line, column, context);\ |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
761 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
762 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
763 void vdp_h40(uint32_t line, uint32_t linecyc, vdp_context * context) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
764 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
765 uint16_t address; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
766 uint32_t mask; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
767 switch(linecyc) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
768 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
769 //sprite render to line buffer starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
770 case 0: |
|
26
a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents:
25
diff
changeset
|
771 context->cur_slot = MAX_DRAWS-1; |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
772 memset(context->linebuf, 0, LINEBUF_SIZE); |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
773 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
774 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
775 case 1: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
776 case 2: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
777 case 3: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
778 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
779 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
780 //sprite attribute table scan starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
781 case 4: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
782 render_sprite_cells( context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
783 context->sprite_index = 0x80; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
784 context->slot_counter = MAX_SPRITES_LINE; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
785 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
786 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
787 case 5: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
788 case 6: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
789 case 7: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
790 case 8: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
791 case 9: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
792 case 10: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
793 case 11: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
794 case 12: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
795 case 13: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
796 case 14: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
797 case 15: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
798 case 16: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
799 case 17: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
800 case 18: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
801 case 19: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
802 case 20: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
803 //!HSYNC asserted |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
804 case 21: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
805 case 22: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
806 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
807 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
808 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
809 case 23: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
810 external_slot(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
811 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
812 case 24: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
813 case 25: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
814 case 26: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
815 case 27: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
816 case 28: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
817 case 29: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
818 case 30: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
819 case 31: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
820 case 32: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
821 case 33: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
822 case 34: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
823 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
824 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
825 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
826 case 35: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
827 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
828 mask = 0; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
829 if (context->regs[REG_MODE_3] & 0x2) { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
830 mask |= 0xF8; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
831 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
832 if (context->regs[REG_MODE_3] & 0x1) { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
833 mask |= 0x7; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
834 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
835 line &= mask; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
836 address += line * 4; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
837 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
838 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
839 //printf("%d: HScroll A: %d, HScroll B: %d\n", line, context->hscroll_a, context->hscroll_b); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
840 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
841 case 36: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
842 //!HSYNC high |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
843 case 37: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
844 case 38: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
845 case 39: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
846 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
847 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
848 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
849 case 40: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
850 read_map_scroll_a(0, line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
851 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
852 case 41: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
853 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
854 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
855 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
856 case 42: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
857 render_map_1(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
858 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
859 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
860 case 43: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
861 render_map_2(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
862 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
863 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
864 case 44: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
865 read_map_scroll_b(0, line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
866 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
867 case 45: |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
868 render_sprite_cells(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
869 scan_sprite_table(line, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
870 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
871 case 46: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
872 render_map_3(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
873 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
874 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
875 case 47: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
876 render_map_output(line, 0, context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
877 scan_sprite_table(line, context);//Just a guess |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
878 //reverse context slot counter so it counts the number of sprite slots |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
879 //filled rather than the number of available slots |
|
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
880 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; |
|
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
881 context->cur_slot = MAX_SPRITES_LINE-1; |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
882 context->sprite_draws = MAX_DRAWS; |
|
36
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
883 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
884 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
885 COLUMN_RENDER_BLOCK(2, 48) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
886 COLUMN_RENDER_BLOCK(4, 56) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
887 COLUMN_RENDER_BLOCK(6, 64) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
888 COLUMN_RENDER_BLOCK_REFRESH(8, 72) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
889 COLUMN_RENDER_BLOCK(10, 80) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
890 COLUMN_RENDER_BLOCK(12, 88) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
891 COLUMN_RENDER_BLOCK(14, 96) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
892 COLUMN_RENDER_BLOCK_REFRESH(16, 104) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
893 COLUMN_RENDER_BLOCK(18, 112) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
894 COLUMN_RENDER_BLOCK(20, 120) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
895 COLUMN_RENDER_BLOCK(22, 128) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
896 COLUMN_RENDER_BLOCK_REFRESH(24, 136) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
897 COLUMN_RENDER_BLOCK(26, 144) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
898 COLUMN_RENDER_BLOCK(28, 152) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
899 COLUMN_RENDER_BLOCK(30, 160) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
900 COLUMN_RENDER_BLOCK_REFRESH(32, 168) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
901 COLUMN_RENDER_BLOCK(34, 176) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
902 COLUMN_RENDER_BLOCK(36, 184) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
903 COLUMN_RENDER_BLOCK(38, 192) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
904 COLUMN_RENDER_BLOCK_REFRESH(40, 200) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
905 case 208: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
906 case 209: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
907 external_slot(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
908 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
909 default: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
910 //leftovers from HSYNC clock change nonsense |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
911 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
912 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
913 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
914 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
915 void vdp_h32(uint32_t line, uint32_t linecyc, vdp_context * context) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
916 { |
| 37 | 917 uint16_t address; |
| 918 uint32_t mask; | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
919 switch(linecyc) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
920 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
921 //sprite render to line buffer starts |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
922 case 0: |
| 37 | 923 context->cur_slot = MAX_DRAWS_H32-1; |
| 924 memset(context->linebuf, 0, LINEBUF_SIZE); | |
| 925 render_sprite_cells(context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
926 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
927 case 1: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
928 case 2: |
| 37 | 929 case 3: |
| 930 render_sprite_cells(context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
931 break; |
| 37 | 932 //sprite attribute table scan starts |
|
20
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Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
933 case 4: |
| 37 | 934 render_sprite_cells( context); |
| 935 context->sprite_index = 0x80; | |
| 936 context->slot_counter = MAX_SPRITES_LINE_H32; | |
| 937 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
938 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
939 case 5: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
940 case 6: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
941 case 7: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
942 case 8: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
943 case 9: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
944 case 10: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
945 case 11: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
946 case 12: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
947 case 13: |
| 37 | 948 render_sprite_cells(context); |
| 949 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
950 case 14: |
| 37 | 951 external_slot(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
952 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
953 case 15: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
954 case 16: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
955 case 17: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
956 case 18: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
957 case 19: |
| 37 | 958 //HSYNC start |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
959 case 20: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
960 case 21: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
961 case 22: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
962 case 23: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
963 case 24: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
964 case 25: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
965 case 26: |
| 37 | 966 render_sprite_cells(context); |
| 967 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
968 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
969 case 27: |
| 37 | 970 external_slot(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
971 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
972 case 28: |
| 37 | 973 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
| 974 mask = 0; | |
| 975 if (context->regs[REG_MODE_3] & 0x2) { | |
| 976 mask |= 0xF8; | |
| 977 } | |
| 978 if (context->regs[REG_MODE_3] & 0x1) { | |
| 979 mask |= 0x7; | |
| 980 } | |
| 981 line &= mask; | |
| 982 address += line * 4; | |
| 983 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; | |
| 984 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; | |
| 985 //printf("%d: HScroll A: %d, HScroll B: %d\n", line, context->hscroll_a, context->hscroll_b); | |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
986 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
987 case 29: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
988 case 30: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
989 case 31: |
| 37 | 990 case 32: |
| 991 render_sprite_cells(context); | |
| 992 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
993 break; |
| 37 | 994 //!HSYNC high |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
995 case 33: |
| 37 | 996 read_map_scroll_a(0, line, context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
997 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
998 case 34: |
| 37 | 999 render_sprite_cells(context); |
| 1000 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1001 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1002 case 35: |
| 37 | 1003 render_map_1(context); |
| 1004 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1005 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1006 case 36: |
| 37 | 1007 render_map_2(context); |
| 1008 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1009 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1010 case 37: |
| 37 | 1011 read_map_scroll_b(0, line, context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1012 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1013 case 38: |
| 37 | 1014 render_sprite_cells(context); |
| 1015 scan_sprite_table(line, context); | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1016 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1017 case 39: |
| 37 | 1018 render_map_3(context); |
| 1019 scan_sprite_table(line, context);//Just a guess | |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1020 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1021 case 40: |
| 37 | 1022 render_map_output(line, 0, context); |
| 1023 scan_sprite_table(line, context);//Just a guess | |
| 1024 //reverse context slot counter so it counts the number of sprite slots | |
| 1025 //filled rather than the number of available slots | |
| 1026 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; | |
| 1027 context->cur_slot = MAX_SPRITES_LINE_H32-1; | |
| 1028 context->sprite_draws = MAX_DRAWS_H32; | |
| 1029 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); | |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1030 break; |
| 37 | 1031 COLUMN_RENDER_BLOCK(2, 41) |
| 1032 COLUMN_RENDER_BLOCK(4, 49) | |
| 1033 COLUMN_RENDER_BLOCK(6, 57) | |
| 1034 COLUMN_RENDER_BLOCK_REFRESH(8, 65) | |
| 1035 COLUMN_RENDER_BLOCK(10, 73) | |
| 1036 COLUMN_RENDER_BLOCK(12, 81) | |
| 1037 COLUMN_RENDER_BLOCK(14, 89) | |
| 1038 COLUMN_RENDER_BLOCK_REFRESH(16, 97) | |
| 1039 COLUMN_RENDER_BLOCK(18, 105) | |
| 1040 COLUMN_RENDER_BLOCK(20, 113) | |
| 1041 COLUMN_RENDER_BLOCK(22, 121) | |
| 1042 COLUMN_RENDER_BLOCK_REFRESH(24, 129) | |
| 1043 COLUMN_RENDER_BLOCK(26, 137) | |
| 1044 COLUMN_RENDER_BLOCK(28, 145) | |
| 1045 COLUMN_RENDER_BLOCK(30, 153) | |
| 1046 COLUMN_RENDER_BLOCK_REFRESH(32, 161) | |
|
20
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1047 case 169: |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1048 case 170: |
| 37 | 1049 external_slot(context); |
|
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1050 break; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1051 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1052 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1053 void latch_mode(vdp_context * context) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1054 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1055 context->latched_mode = (context->regs[REG_MODE_4] & 0x81) | (context->regs[REG_MODE_2] & BIT_PAL); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1056 } |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1057 |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1058 int is_refresh(vdp_context * context) |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1059 { |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1060 uint32_t linecyc = context->cycles % MCLKS_LINE; |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1061 if (context->latched_mode & BIT_H40) { |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1062 linecyc = linecyc/16; |
|
189
806c3b7a6f2a
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
Mike Pavone <pavone@retrodev.com>
parents:
180
diff
changeset
|
1063 //TODO: Figure out the exact behavior that reduces DMA slots for direct color DMA demos |
|
806c3b7a6f2a
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
Mike Pavone <pavone@retrodev.com>
parents:
180
diff
changeset
|
1064 return (linecyc == 37 || linecyc == 69 || linecyc == 102 || linecyc == 133 || linecyc == 165 || linecyc == 197 || linecyc >= 210 || (linecyc < 6 && (context->flags & FLAG_DMA_RUN) && ((context->dma_cd & 0xF) == CRAM_WRITE))); |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1065 } else { |
|
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1066 linecyc = linecyc/20; |
|
189
806c3b7a6f2a
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
Mike Pavone <pavone@retrodev.com>
parents:
180
diff
changeset
|
1067 //TODO: Figure out which slots are refresh when display is off in 32-cell mode |
|
191
1b4d856b067a
Fixes for direct color dma stuff
Mike Pavone <pavone@retrodev.com>
parents:
190
diff
changeset
|
1068 //These numbers are guesses based on H40 numbers |
|
1b4d856b067a
Fixes for direct color dma stuff
Mike Pavone <pavone@retrodev.com>
parents:
190
diff
changeset
|
1069 return (linecyc == 24 || linecyc == 56 || linecyc == 88 || linecyc == 120 || linecyc == 152 || (linecyc < 5 && (context->flags & FLAG_DMA_RUN) && ((context->dma_cd & 0xF) == CRAM_WRITE))); |
|
189
806c3b7a6f2a
Fix background rendering when display is off and improve refresh cycle emulation so that direct color DMA demos work
Mike Pavone <pavone@retrodev.com>
parents:
180
diff
changeset
|
1070 //The numbers below are the refresh slots during active display |
|
191
1b4d856b067a
Fixes for direct color dma stuff
Mike Pavone <pavone@retrodev.com>
parents:
190
diff
changeset
|
1071 //return (linecyc == 66 || linecyc == 98 || linecyc == 130 || linecyc == 162); |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1072 } |
|
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1073 } |
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1074 |
|
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1075 void check_render_bg(vdp_context * context, int32_t line) |
|
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1076 { |
|
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1077 if (line > 0) { |
|
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1078 line -= 1; |
|
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1079 uint16_t * start = NULL, *end = NULL; |
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1080 uint32_t linecyc = (context->cycles % MCLKS_LINE); |
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1081 if (context->latched_mode & BIT_H40) { |
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1082 linecyc /= 16; |
|
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1083 if (linecyc >= 50 && linecyc < 210) { |
|
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1084 uint32_t x = (linecyc-50)*2; |
|
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1085 start = context->framebuf + line * 320 + x; |
|
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1086 end = start + 2; |
|
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1087 } |
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1088 } else { |
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1089 linecyc /= 20; |
|
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1090 if (linecyc >= 43 && linecyc < 171) { |
|
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1091 uint32_t x = (linecyc-43)*2; |
|
191
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1092 start = context->framebuf + line * 320 + x; |
|
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1093 end = start + 2; |
|
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1094 } |
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1095 } |
|
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1096 uint16_t color = (context->cram[context->regs[REG_BG_COLOR] & 0x3F] & 0xEEE); |
|
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1097 while (start != end) { |
|
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1098 *start = color; |
|
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1099 ++start; |
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1100 } |
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1101 } |
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1102 } |
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1103 |
|
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1104 void vdp_run_context(vdp_context * context, uint32_t target_cycles) |
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1105 { |
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1106 while(context->cycles < target_cycles) |
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1107 { |
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1108 uint32_t line = context->cycles / MCLKS_LINE; |
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1109 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
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1110 if (!line) { |
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1111 latch_mode(context); |
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1112 } |
|
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1113 uint32_t linecyc = context->cycles % MCLKS_LINE; |
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1114 if (linecyc == 0) { |
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1115 if (line <= 1 || line >= active_lines) { |
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1116 context->hint_counter = context->regs[REG_HINT]; |
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1117 } else if (context->hint_counter) { |
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1118 context->hint_counter--; |
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1119 } else { |
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1120 context->flags2 |= FLAG2_HINT_PENDING; |
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1121 context->hint_counter = context->regs[REG_HINT]; |
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1122 } |
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1123 } else if(line == active_lines) { |
|
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1124 uint32_t intcyc = context->latched_mode & BIT_H40 ? VINT_SLOTS_H40 * MCLKS_SLOT_H40 : VINT_SLOTS_H32 * MCLKS_SLOT_H32; |
|
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1125 if (linecyc == intcyc) { |
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1126 context->flags2 |= FLAG2_VINT_PENDING; |
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1127 } |
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1128 } |
|
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1129 if (line < active_lines && context->regs[REG_MODE_2] & DISPLAY_ENABLE) { |
|
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1130 //first sort-of active line is treated as 255 internally |
|
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1131 //it's used for gathering sprite info for line |
|
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1132 line = (line - 1) & 0xFF; |
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1133 |
|
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1134 //Convert to slot number |
|
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|
1135 if (context->latched_mode & BIT_H40){ |
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1136 //TODO: Deal with nasty clock switching during HBLANK |
|
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1137 uint32_t clock_inc = MCLKS_LINE-linecyc < MCLKS_SLOT_H40 ? MCLKS_LINE-linecyc : MCLKS_SLOT_H40; |
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1138 linecyc = linecyc/MCLKS_SLOT_H40; |
|
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1139 vdp_h40(line, linecyc, context); |
|
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|
1140 context->cycles += clock_inc; |
|
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1141 } else { |
|
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1142 linecyc = linecyc/MCLKS_SLOT_H32; |
|
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|
1143 vdp_h32(line, linecyc, context); |
|
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1144 context->cycles += MCLKS_SLOT_H32; |
|
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|
1145 } |
|
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|
1146 } else { |
|
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|
1147 if (!is_refresh(context)) { |
|
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|
1148 external_slot(context); |
|
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1149 } |
|
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|
1150 if (line < active_lines) { |
|
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|
1151 check_render_bg(context, line); |
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|
1152 } |
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|
1153 if (context->latched_mode & BIT_H40){ |
|
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1154 uint32_t clock_inc = MCLKS_LINE-linecyc < MCLKS_SLOT_H40 ? MCLKS_LINE-linecyc : MCLKS_SLOT_H40; |
|
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|
1155 //TODO: Deal with nasty clock switching during HBLANK |
|
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|
1156 context->cycles += clock_inc; |
|
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|
1157 } else { |
|
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1158 context->cycles += MCLKS_SLOT_H32; |
|
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1159 } |
|
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|
1160 } |
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1161 } |
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1162 } |
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1163 |
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1164 uint32_t vdp_run_to_vblank(vdp_context * context) |
|
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|
1165 { |
|
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|
1166 uint32_t target_cycles = ((context->latched_mode & BIT_PAL) ? PAL_ACTIVE : NTSC_ACTIVE) * MCLKS_LINE; |
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|
1167 vdp_run_context(context, target_cycles); |
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|
1168 return context->cycles; |
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|
1169 } |
|
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|
1170 |
| 75 | 1171 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles) |
| 1172 { | |
| 1173 for(;;) { | |
| 1174 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]; | |
| 1175 if (!dmalen) { | |
| 1176 dmalen = 0x10000; | |
| 1177 } | |
| 1178 uint32_t min_dma_complete = dmalen * (context->latched_mode & BIT_H40 ? 16 : 20); | |
| 1179 if ((context->regs[REG_DMASRC_H] & 0xC0) == 0xC0 || (context->cd & 0xF) == VRAM_WRITE) { | |
| 1180 //DMA copies take twice as long to complete since they require a read and a write | |
| 1181 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word | |
| 1182 min_dma_complete *= 2; | |
| 1183 } | |
| 1184 min_dma_complete += context->cycles; | |
| 1185 if (target_cycles < min_dma_complete) { | |
| 1186 vdp_run_context(context, target_cycles); | |
| 1187 return; | |
| 1188 } else { | |
| 1189 vdp_run_context(context, min_dma_complete); | |
| 1190 if (!(context->flags & FLAG_DMA_RUN)) { | |
| 1191 return; | |
| 1192 } | |
| 1193 } | |
| 1194 } | |
| 1195 } | |
| 1196 | |
| 1197 int vdp_control_port_write(vdp_context * context, uint16_t value) | |
|
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1198 { |
|
58
a6a19c45d358
Properly zero-init all VDP buffers. Comment out some debug printfs.
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56
diff
changeset
|
1199 //printf("control port write: %X\n", value); |
|
149
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143
diff
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|
1200 if (context->flags & FLAG_DMA_RUN) { |
|
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143
diff
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|
1201 return -1; |
|
139e5dcd6aa3
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143
diff
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|
1202 } |
|
54
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diff
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|
1203 if (context->flags & FLAG_PENDING) { |
|
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diff
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|
1204 context->address = (context->address & 0x3FFF) | (value << 14); |
|
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diff
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|
1205 context->cd = (context->cd & 0x3) | ((value >> 2) & 0x3C); |
| 75 | 1206 context->flags &= ~FLAG_PENDING; |
|
87
60b5c9e2f4e0
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84
diff
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|
1207 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); |
|
327
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323
diff
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|
1208 if (context->cd & 0x20 && (context->regs[REG_MODE_2] & BIT_DMA_ENABLE)) { |
|
1b00258b1f29
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diff
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|
1209 // |
| 75 | 1210 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { |
| 1211 //DMA copy or 68K -> VDP, transfer starts immediately | |
| 1212 context->flags |= FLAG_DMA_RUN; | |
|
131
8fc8e46be691
Fix bug that was causing DMA fills to lock up under certain circumstances
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diff
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|
1213 context->dma_cd = context->cd; |
| 75 | 1214 if (!(context->regs[REG_DMASRC_H] & 0x80)) { |
|
327
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|
1215 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]); |
| 75 | 1216 return 1; |
|
327
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diff
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|
1217 } else { |
|
1b00258b1f29
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|
1218 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
| 75 | 1219 } |
|
327
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|
1220 } else { |
|
1b00258b1f29
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|
1221 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd); |
| 75 | 1222 } |
|
63
a6dd5b7a971b
Add FPS counter to console output
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diff
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|
1223 } |
|
54
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diff
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|
1224 } else { |
|
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diff
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|
1225 if ((value & 0xC000) == 0x8000) { |
|
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diff
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|
1226 //Register write |
|
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diff
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|
1227 uint8_t reg = (value >> 8) & 0x1F; |
|
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|
1228 if (reg < VDP_REGS) { |
|
87
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diff
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|
1229 //printf("register %d set to %X\n", reg, value & 0xFF); |
|
54
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|
1230 context->regs[reg] = value; |
|
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
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149
diff
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|
1231 if (reg == REG_MODE_2) { |
|
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
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149
diff
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|
1232 //printf("Display is now %s\n", (context->regs[REG_MODE_2] & DISPLAY_ENABLE) ? "enabled" : "disabled"); |
|
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
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149
diff
changeset
|
1233 } |
|
54
3b79cbcf6846
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43
diff
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|
1234 } |
|
3b79cbcf6846
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diff
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|
1235 } else { |
|
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diff
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|
1236 context->flags |= FLAG_PENDING; |
|
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diff
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|
1237 context->address = (context->address &0xC000) | (value & 0x3FFF); |
|
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diff
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|
1238 context->cd = (context->cd &0x3C) | (value >> 14); |
|
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diff
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|
1239 } |
|
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|
1240 } |
| 75 | 1241 return 0; |
|
54
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diff
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|
1242 } |
|
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|
1243 |
|
149
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|
1244 int vdp_data_port_write(vdp_context * context, uint16_t value) |
|
54
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43
diff
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|
1245 { |
|
58
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Properly zero-init all VDP buffers. Comment out some debug printfs.
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56
diff
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|
1246 //printf("data port write: %X\n", value); |
|
149
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|
1247 if (context->flags & FLAG_DMA_RUN) { |
|
139e5dcd6aa3
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diff
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|
1248 return -1; |
|
139e5dcd6aa3
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diff
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|
1249 } |
|
139e5dcd6aa3
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|
1250 if (!(context->cd & 1)) { |
|
139e5dcd6aa3
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143
diff
changeset
|
1251 //ignore writes when cd is configured for read |
|
139e5dcd6aa3
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Mike Pavone <pavone@retrodev.com>
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|
1252 return 0; |
|
139e5dcd6aa3
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diff
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|
1253 } |
|
54
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diff
changeset
|
1254 context->flags &= ~FLAG_PENDING; |
|
109
004dd46e0a97
COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents:
108
diff
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|
1255 /*if (context->fifo_cur == context->fifo_end) { |
|
54
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diff
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|
1256 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
|
109
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COmment out fifo full debug printf
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diff
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|
1257 }*/ |
|
54
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diff
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|
1258 while (context->fifo_cur == context->fifo_end) { |
|
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|
1259 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
|
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diff
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|
1260 } |
|
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|
1261 context->fifo_cur->cycle = context->cycles; |
| 138 | 1262 context->fifo_cur->address = context->address; |
|
54
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diff
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|
1263 context->fifo_cur->value = value; |
| 138 | 1264 context->fifo_cur->cd = context->cd; |
|
54
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diff
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|
1265 context->fifo_cur->partial = 0; |
|
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43
diff
changeset
|
1266 context->fifo_cur++; |
| 138 | 1267 context->address += context->regs[REG_AUTOINC]; |
|
149
139e5dcd6aa3
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Mike Pavone <pavone@retrodev.com>
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changeset
|
1268 return 0; |
|
54
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diff
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|
1269 } |
|
3b79cbcf6846
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|
1270 |
|
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changeset
|
1271 uint16_t vdp_control_port_read(vdp_context * context) |
|
3b79cbcf6846
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diff
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|
1272 { |
|
3b79cbcf6846
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changeset
|
1273 context->flags &= ~FLAG_PENDING; |
|
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|
1274 uint16_t value = 0x3400; |
|
3b79cbcf6846
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diff
changeset
|
1275 if (context->fifo_cur == (context->fifo_end - FIFO_SIZE)) { |
|
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|
1276 value |= 0x200; |
|
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|
1277 } |
|
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|
1278 if (context->fifo_cur == context->fifo_end) { |
|
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diff
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|
1279 value |= 0x100; |
|
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diff
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|
1280 } |
|
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
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291
diff
changeset
|
1281 if (context->flags2 & FLAG2_VINT_PENDING) { |
|
e5e8b48ad157
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291
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|
1282 value |- 0x80; |
|
e5e8b48ad157
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diff
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|
1283 } |
|
318
789f2f5f2277
Implement hblank flag in status register
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317
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changeset
|
1284 uint32_t line= context->cycles / MCLKS_LINE; |
|
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|
1285 uint32_t linecyc = context->cycles % MCLKS_LINE; |
|
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|
1286 if (line >= (context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE)) { |
|
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|
1287 value |= 0x8; |
|
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|
1288 } |
|
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changeset
|
1289 if (linecyc < (context->latched_mode & BIT_H40 ? (148 + 61) * 4 : ( + 46) * 5)) { |
|
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|
1290 value |= 0x4; |
|
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|
1291 } |
|
149
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|
1292 if (context->flags & FLAG_DMA_RUN) { |
|
141
576f55711d8d
Fix DMA in progress flag in VDP status register
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138
diff
changeset
|
1293 value |= 0x2; |
| 75 | 1294 } |
|
317
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changeset
|
1295 if (context->latched_mode & BIT_PAL) {//Not sure about this, need to verify |
|
e5e8b48ad157
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|
1296 value |= 0x1; |
|
e5e8b48ad157
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|
1297 } |
|
318
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changeset
|
1298 //TODO: Sprite overflow, sprite collision, odd frame flag |
|
54
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|
1299 return value; |
|
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|
1300 } |
|
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|
1301 |
|
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changeset
|
1302 uint16_t vdp_data_port_read(vdp_context * context) |
|
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|
1303 { |
|
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|
1304 context->flags &= ~FLAG_PENDING; |
| 138 | 1305 if (context->cd & 1) { |
|
54
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changeset
|
1306 return 0; |
|
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|
1307 } |
|
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|
1308 //Not sure if the FIFO should be drained before processing a read or not, but it would make sense |
|
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|
1309 context->flags &= ~FLAG_UNUSED_SLOT; |
|
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changeset
|
1310 while (!(context->flags & FLAG_UNUSED_SLOT)) { |
|
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|
1311 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
|
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|
1312 } |
|
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|
1313 uint16_t value = 0; |
| 138 | 1314 switch (context->cd & 0xF) |
|
54
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|
1315 { |
|
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|
1316 case VRAM_READ: |
|
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|
1317 value = context->vdpmem[context->address] << 8; |
|
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1318 context->flags &= ~FLAG_UNUSED_SLOT; |
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1319 while (!(context->flags & FLAG_UNUSED_SLOT)) { |
|
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diff
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|
1320 vdp_run_context(context, context->cycles + ((context->latched_mode & BIT_H40) ? 16 : 20)); |
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diff
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|
1321 } |
|
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1322 value |= context->vdpmem[context->address ^ 1]; |
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|
1323 break; |
|
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|
1324 case CRAM_READ: |
|
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1325 value = context->cram[(context->address/2) & (CRAM_SIZE-1)]; |
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|
1326 break; |
|
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1327 case VSRAM_READ: |
|
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1328 if (((context->address / 2) & 63) < VSRAM_SIZE) { |
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1329 value = context->vsram[context->address & 63]; |
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1330 } |
|
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|
1331 break; |
|
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diff
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|
1332 } |
|
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1333 context->address += context->regs[REG_AUTOINC]; |
|
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|
1334 return value; |
|
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|
1335 } |
|
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|
1336 |
| 137 | 1337 uint16_t vdp_hv_counter_read(vdp_context * context) |
| 1338 { | |
| 1339 uint32_t line= context->cycles / MCLKS_LINE; | |
| 1340 if (!line) { | |
| 1341 line = 0xFF; | |
| 1342 } else { | |
| 1343 line--; | |
| 1344 if (line > 0xEA) { | |
| 1345 line = (line + 0xFA) & 0xFF; | |
| 1346 } | |
| 1347 } | |
| 1348 uint32_t linecyc = context->cycles % MCLKS_LINE; | |
| 1349 if (context->latched_mode & BIT_H40) { | |
| 1350 linecyc /= 8; | |
| 1351 if (linecyc >= 86) { | |
| 1352 linecyc -= 86; | |
| 1353 } else { | |
| 1354 linecyc += 334; | |
| 1355 } | |
| 1356 if (linecyc > 0x16C) { | |
| 1357 linecyc += 92; | |
| 1358 } | |
| 1359 } else { | |
| 1360 linecyc /= 10; | |
| 1361 if (linecyc >= 74) { | |
| 1362 linecyc -= 74; | |
| 1363 } else { | |
| 1364 linecyc += 268; | |
| 1365 } | |
| 1366 if (linecyc > 0x127) { | |
| 1367 linecyc += 170; | |
| 1368 } | |
| 1369 } | |
| 1370 linecyc &= 0xFF; | |
| 1371 return (line << 8) | linecyc; | |
| 1372 } | |
| 1373 | |
|
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|
1374 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction) |
|
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|
1375 { |
|
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|
1376 context->cycles -= deduction; |
|
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|
1377 for(fifo_entry * start = (context->fifo_end - FIFO_SIZE); start < context->fifo_cur; start++) { |
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|
1378 if (start->cycle >= deduction) { |
|
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|
1379 start->cycle -= deduction; |
|
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|
1380 } else { |
|
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|
1381 start->cycle = 0; |
|
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diff
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|
1382 } |
|
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1383 } |
|
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1384 } |
|
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|
1385 |
|
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|
1386 uint32_t vdp_next_hint(vdp_context * context) |
|
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1387 { |
|
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1388 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) { |
|
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|
1389 return 0xFFFFFFFF; |
|
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1390 } |
|
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|
1391 if (context->flags2 & FLAG2_HINT_PENDING) { |
|
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|
1392 return context->cycles; |
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|
1393 } |
|
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|
1394 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
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|
1395 uint32_t line = context->cycles / MCLKS_LINE; |
|
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|
1396 if (line >= active_lines) { |
|
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|
1397 return 0xFFFFFFFF; |
|
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|
1398 } |
|
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|
1399 uint32_t linecyc = context->cycles % MCLKS_LINE; |
|
e5e8b48ad157
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|
1400 uint32_t hcycle = context->cycles + context->hint_counter * MCLKS_LINE + MCLKS_LINE - linecyc; |
|
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|
1401 if (!line) { |
|
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diff
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|
1402 hcycle += MCLKS_LINE; |
|
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|
1403 } |
|
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|
1404 return hcycle; |
|
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|
1405 } |
|
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|
1406 |
|
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diff
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|
1407 uint32_t vdp_next_vint(vdp_context * context) |
|
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diff
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|
1408 { |
|
327
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|
1409 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) { |
|
317
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|
1410 return 0xFFFFFFFF; |
|
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|
1411 } |
|
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|
1412 if (context->flags2 & FLAG2_VINT_PENDING) { |
|
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|
1413 return context->cycles; |
|
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diff
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|
1414 } |
|
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diff
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|
1415 uint32_t active_lines = context->latched_mode & BIT_PAL ? PAL_ACTIVE : NTSC_ACTIVE; |
|
e5e8b48ad157
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diff
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|
1416 uint32_t vcycle = MCLKS_LINE * active_lines; |
|
e5e8b48ad157
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|
1417 if (context->latched_mode & BIT_H40) { |
|
328
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327
diff
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|
1418 vcycle += VINT_SLOTS_H40 * MCLKS_SLOT_H40; |
|
317
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diff
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|
1419 } else { |
|
328
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|
1420 vcycle += VINT_SLOTS_H32 * MCLKS_SLOT_H32; |
|
317
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|
1421 } |
|
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|
1422 if (vcycle < context->cycles) { |
|
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|
1423 return 0xFFFFFFFF; |
|
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|
1424 } |
|
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|
1425 return vcycle; |
|
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|
1426 } |
|
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|
1427 |
|
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|
1428 void vdp_int_ack(vdp_context * context, uint16_t int_num) |
|
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|
1429 { |
|
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|
1430 if (int_num == 6) { |
|
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|
1431 context->flags2 &= ~FLAG2_VINT_PENDING; |
|
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|
1432 } else if(int_num ==4) { |
|
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|
1433 context->flags2 &= ~FLAG2_HINT_PENDING; |
|
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|
1434 } |
|
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|
1435 } |
|
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|
1436 |
|
20
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diff
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|
1437 #define GST_VDP_REGS 0xFA |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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diff
changeset
|
1438 #define GST_VDP_MEM 0x12478 |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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diff
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|
1439 |
|
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|
1440 void vdp_load_savestate(vdp_context * context, FILE * state_file) |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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changeset
|
1441 { |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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diff
changeset
|
1442 uint8_t tmp_buf[CRAM_SIZE*2]; |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1443 fseek(state_file, GST_VDP_REGS, SEEK_SET); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1444 fread(context->regs, 1, VDP_REGS, state_file); |
|
f664eeb55cb4
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parents:
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|
1445 latch_mode(context); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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diff
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|
1446 fread(tmp_buf, 1, sizeof(tmp_buf), state_file); |
|
f664eeb55cb4
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parents:
diff
changeset
|
1447 for (int i = 0; i < CRAM_SIZE; i++) { |
|
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Mostly broken VDP core and savestate viewer
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parents:
diff
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|
1448 context->cram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]; |
|
f664eeb55cb4
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parents:
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|
1449 } |
|
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Mostly broken VDP core and savestate viewer
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diff
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|
1450 fread(tmp_buf, 2, VSRAM_SIZE, state_file); |
|
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Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1451 for (int i = 0; i < VSRAM_SIZE; i++) { |
|
23
3e924bb56560
Fix endianness of VSRAM when read from Genecyst save state
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diff
changeset
|
1452 context->vsram[i] = (tmp_buf[i*2+1] << 8) | tmp_buf[i*2]; |
|
20
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parents:
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|
1453 } |
|
f664eeb55cb4
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parents:
diff
changeset
|
1454 fseek(state_file, GST_VDP_MEM, SEEK_SET); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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diff
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|
1455 fread(context->vdpmem, 1, VRAM_SIZE, state_file); |
|
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
|
1456 } |
|
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
changeset
|
1457 |
|
56
a28b1dfe1af2
Fix CRAM and possibly VSRAM writes
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54
diff
changeset
|
1458 void vdp_save_state(vdp_context * context, FILE * outfile) |
|
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Fix CRAM and possibly VSRAM writes
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54
diff
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|
1459 { |
|
a28b1dfe1af2
Fix CRAM and possibly VSRAM writes
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54
diff
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|
1460 uint8_t tmp_buf[CRAM_SIZE*2]; |
|
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Fix CRAM and possibly VSRAM writes
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54
diff
changeset
|
1461 fseek(outfile, GST_VDP_REGS, SEEK_SET); |
|
a28b1dfe1af2
Fix CRAM and possibly VSRAM writes
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54
diff
changeset
|
1462 fwrite(context->regs, 1, VDP_REGS, outfile); |
|
a28b1dfe1af2
Fix CRAM and possibly VSRAM writes
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54
diff
changeset
|
1463 for (int i = 0; i < CRAM_SIZE; i++) { |
|
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54
diff
changeset
|
1464 tmp_buf[i*2] = context->cram[i]; |
|
a28b1dfe1af2
Fix CRAM and possibly VSRAM writes
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diff
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|
1465 tmp_buf[i*2+1] = context->cram[i] >> 8; |
|
a28b1dfe1af2
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54
diff
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|
1466 } |
|
a28b1dfe1af2
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diff
changeset
|
1467 fwrite(tmp_buf, 1, sizeof(tmp_buf), outfile); |
|
a28b1dfe1af2
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Mike Pavone <pavone@retrodev.com>
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54
diff
changeset
|
1468 for (int i = 0; i < VSRAM_SIZE; i++) { |
|
a28b1dfe1af2
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54
diff
changeset
|
1469 tmp_buf[i*2] = context->vsram[i]; |
|
a28b1dfe1af2
Fix CRAM and possibly VSRAM writes
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54
diff
changeset
|
1470 tmp_buf[i*2+1] = context->vsram[i] >> 8; |
|
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54
diff
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|
1471 } |
|
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54
diff
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|
1472 fwrite(tmp_buf, 2, VSRAM_SIZE, outfile); |
|
a28b1dfe1af2
Fix CRAM and possibly VSRAM writes
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54
diff
changeset
|
1473 fseek(outfile, GST_VDP_MEM, SEEK_SET); |
|
a28b1dfe1af2
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54
diff
changeset
|
1474 fwrite(context->vdpmem, 1, VRAM_SIZE, outfile); |
|
a28b1dfe1af2
Fix CRAM and possibly VSRAM writes
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parents:
54
diff
changeset
|
1475 } |
|
a28b1dfe1af2
Fix CRAM and possibly VSRAM writes
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diff
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|
1476 |