Mercurial > repos > blastem
annotate ym2612.c @ 627:c5820734a5b6
Added some preliminary support for interpreting Z80 code from non-RAM addresses
| author | Michael Pavone <pavone@retrodev.com> |
|---|---|
| date | Fri, 20 Jun 2014 07:57:32 -0700 |
| parents | aaa77e351c24 |
| children | 55b550fe8891 |
| rev | line source |
|---|---|
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include <string.h> |
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7 #include <math.h> |
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8 #include <stdio.h> |
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9 #include <stdlib.h> |
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10 #include "ym2612.h" |
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11 #include "render.h" |
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12 #include "wave.h" |
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13 #include "blastem.h" |
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14 |
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15 //#define DO_DEBUG_PRINT |
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16 #ifdef DO_DEBUG_PRINT |
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17 #define dfprintf fprintf |
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18 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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19 #else |
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20 #define dfprintf |
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21 #define dfopen(var, fname, mode) |
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22 #endif |
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23 |
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24 #define BUSY_CYCLES_ADDRESS 17 |
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25 #define BUSY_CYCLES_DATA_LOW 83 |
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26 #define BUSY_CYCLES_DATA_HIGH 47 |
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27 #define OP_UPDATE_PERIOD 144 |
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28 |
| 362 | 29 enum { |
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30 REG_LFO = 0x22, |
| 362 | 31 REG_TIMERA_HIGH = 0x24, |
| 32 REG_TIMERA_LOW, | |
| 33 REG_TIMERB, | |
| 34 REG_TIME_CTRL, | |
| 35 REG_KEY_ONOFF, | |
| 36 REG_DAC = 0x2A, | |
| 37 REG_DAC_ENABLE, | |
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38 |
| 362 | 39 REG_DETUNE_MULT = 0x30, |
| 40 REG_TOTAL_LEVEL = 0x40, | |
| 41 REG_ATTACK_KS = 0x50, | |
| 42 REG_DECAY_AM = 0x60, | |
| 43 REG_SUSTAIN_RATE = 0x70, | |
| 44 REG_S_LVL_R_RATE = 0x80, | |
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45 |
| 362 | 46 REG_FNUM_LOW = 0xA0, |
| 47 REG_BLOCK_FNUM_H = 0xA4, | |
| 48 REG_FNUM_LOW_CH3 = 0xA8, | |
| 49 REG_BLOCK_FN_CH3 = 0xAC, | |
| 50 REG_ALG_FEEDBACK = 0xB0, | |
| 51 REG_LR_AMS_PMS = 0xB4 | |
| 52 }; | |
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53 |
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54 #define BIT_TIMERA_ENABLE 0x1 |
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55 #define BIT_TIMERB_ENABLE 0x2 |
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56 #define BIT_TIMERA_OVEREN 0x4 |
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57 #define BIT_TIMERB_OVEREN 0x8 |
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58 #define BIT_TIMERA_RESET 0x10 |
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59 #define BIT_TIMERB_RESET 0x20 |
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60 |
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61 #define BIT_STATUS_TIMERA 0x1 |
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62 #define BIT_STATUS_TIMERB 0x2 |
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63 |
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64 enum { |
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65 PHASE_ATTACK, |
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66 PHASE_DECAY, |
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67 PHASE_SUSTAIN, |
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68 PHASE_RELEASE |
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69 }; |
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70 |
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71 uint8_t did_tbl_init = 0; |
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72 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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73 //memory is cheap so using a half sine table will probably save some cycles |
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74 //a full sine table would be nice, but negative numbers don't get along with log2 |
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75 #define SINE_TABLE_SIZE 512 |
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76 uint16_t sine_table[SINE_TABLE_SIZE]; |
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77 //Similar deal here with the power table for log -> linear conversion |
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78 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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79 //and uses the whole part as a shift amount. |
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80 #define POW_TABLE_SIZE (1 << 13) |
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81 uint16_t pow_table[POW_TABLE_SIZE]; |
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82 |
| 362 | 83 uint16_t rate_table_base[] = { |
| 84 //main portion | |
| 85 0,1,0,1,0,1,0,1, | |
| 86 0,1,0,1,1,1,0,1, | |
| 87 0,1,1,1,0,1,1,1, | |
| 88 0,1,1,1,1,1,1,1, | |
| 89 //top end | |
| 90 1,1,1,1,1,1,1,1, | |
| 91 1,1,1,2,1,1,1,2, | |
| 92 1,2,1,2,1,2,1,2, | |
| 93 1,2,2,2,1,2,2,2, | |
| 94 }; | |
| 95 | |
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96 uint16_t rate_table[64*8]; |
| 362 | 97 |
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98 uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5}; |
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99 uint8_t lfo_pm_base[][8] = { |
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100 {0, 0, 0, 0, 0, 0, 0, 0}, |
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101 {0, 0, 0, 0, 4, 4, 4, 4}, |
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102 {0, 0, 0, 4, 4, 4, 8, 8}, |
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103 {0, 0, 4, 4, 8, 8, 0xc, 0xc}, |
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104 {0, 0, 4, 8, 8, 8, 0xc,0x10}, |
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105 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, |
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106 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, |
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107 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60} |
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108 }; |
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109 int16_t lfo_pm_table[128 * 32 * 8]; |
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110 |
| 362 | 111 #define MAX_ENVELOPE 0xFFC |
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112 #define YM_DIVIDER 2 |
| 374 | 113 #define CYCLE_NEVER 0xFFFFFFFF |
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114 |
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115 uint16_t round_fixed_point(double value, int dec_bits) |
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116 { |
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117 return value * (1 << dec_bits) + 0.5; |
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118 } |
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119 |
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120 FILE * debug_file = NULL; |
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121 uint32_t first_key_on=0; |
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122 |
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123 ym2612_context * log_context = NULL; |
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124 |
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125 void ym_finalize_log() |
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126 { |
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127 for (int i = 0; i < NUM_CHANNELS; i++) { |
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128 if (log_context->channels[i].logfile) { |
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129 wave_finalize(log_context->channels[i].logfile); |
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130 } |
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131 } |
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132 } |
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133 #define BUFFER_INC_RES 1000000000UL |
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134 |
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135 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock) |
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136 { |
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137 uint64_t old_inc = context->buffer_inc; |
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138 context->buffer_inc = ((BUFFER_INC_RES * (uint64_t)context->sample_rate) / (uint64_t)master_clock) * (uint64_t)context->clock_inc; |
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139 } |
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140 |
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141 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options) |
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142 { |
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143 dfopen(debug_file, "ym_debug.txt", "w"); |
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144 memset(context, 0, sizeof(*context)); |
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145 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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146 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2); |
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147 context->sample_rate = sample_rate; |
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148 context->clock_inc = clock_div * 6; |
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149 ym_adjust_master_clock(context, master_clock); |
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150 |
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151 context->sample_limit = sample_limit*2; |
| 374 | 152 context->write_cycle = CYCLE_NEVER; |
| 362 | 153 for (int i = 0; i < NUM_OPERATORS; i++) { |
| 154 context->operators[i].envelope = MAX_ENVELOPE; | |
| 155 context->operators[i].env_phase = PHASE_RELEASE; | |
| 156 } | |
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157 //some games seem to expect that the LR flags start out as 1 |
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158 for (int i = 0; i < NUM_CHANNELS; i++) { |
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159 context->channels[i].lr = 0xC0; |
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160 if (options & YM_OPT_WAVE_LOG) { |
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161 char fname[64]; |
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162 sprintf(fname, "ym_channel_%d.wav", i); |
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163 FILE * f = context->channels[i].logfile = fopen(fname, "wb"); |
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164 if (!f) { |
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165 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname); |
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166 continue; |
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167 } |
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168 if (!wave_init(f, sample_rate, 16, 1)) { |
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169 fclose(f); |
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170 context->channels[i].logfile = NULL; |
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171 } |
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172 } |
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173 } |
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174 if (options & YM_OPT_WAVE_LOG) { |
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175 log_context = context; |
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176 atexit(ym_finalize_log); |
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177 } |
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178 if (!did_tbl_init) { |
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179 //populate sine table |
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180 for (int32_t i = 0; i < 512; i++) { |
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181 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
|
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182 |
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183 //table stores 4.8 fixed pointed representation of the base 2 log |
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184 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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185 } |
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186 //populate power table |
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187 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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188 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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189 int32_t tmp = round_fixed_point(linear, 11); |
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190 int32_t shift = (i >> 8) - 2; |
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191 if (shift < 0) { |
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192 tmp <<= 0-shift; |
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193 } else { |
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194 tmp >>= shift; |
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195 } |
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196 pow_table[i] = tmp; |
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197 } |
| 362 | 198 //populate envelope generator rate table, from small base table |
| 199 for (int rate = 0; rate < 64; rate++) { | |
|
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200 for (int cycle = 0; cycle < 8; cycle++) { |
| 362 | 201 uint16_t value; |
|
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202 if (rate < 2) { |
| 362 | 203 value = 0; |
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204 } else if (rate >= 60) { |
| 362 | 205 value = 8; |
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206 } else if (rate < 8) { |
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207 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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208 } else if (rate < 48) { |
| 362 | 209 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
| 210 } else { | |
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211 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
| 362 | 212 } |
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213 rate_table[rate * 8 + cycle] = value; |
| 362 | 214 } |
| 215 } | |
|
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216 //populate LFO PM table from small base table |
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217 //seems like there must be a better way to derive this |
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218 for (int freq = 0; freq < 128; freq++) { |
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219 for (int pms = 0; pms < 8; pms++) { |
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220 for (int step = 0; step < 32; step++) { |
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221 int16_t value = 0; |
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222 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) { |
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223 if (freq & bit) { |
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224 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift; |
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225 } |
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226 } |
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227 if (step & 0x10) { |
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228 value = -value; |
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229 } |
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230 lfo_pm_table[freq * 256 + pms * 32 + step] = value; |
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231 } |
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232 } |
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233 } |
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234 } |
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235 } |
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236 |
|
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237 #define YM_VOLUME_MULTIPLIER 2 |
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238 #define YM_VOLUME_DIVIDER 3 |
|
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239 #define YM_MOD_SHIFT 1 |
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240 |
| 403 | 241 #define TIMER_A_MAX 1023 |
| 242 #define TIMER_B_MAX (255*16) | |
| 243 | |
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244 void ym_run(ym2612_context * context, uint32_t to_cycle) |
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245 { |
| 362 | 246 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
| 247 //TODO: Fix channel update order OR remap channels in register write | |
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248 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) { |
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249 //Update timers at beginning of 144 cycle period |
| 403 | 250 if (!context->current_op) { |
| 251 if (context->timer_control & BIT_TIMERA_ENABLE) { | |
| 252 if (context->timer_a != TIMER_A_MAX) { | |
| 253 context->timer_a++; | |
| 254 } else { | |
| 255 if (context->timer_control & BIT_TIMERA_OVEREN) { | |
| 256 context->status |= BIT_STATUS_TIMERA; | |
| 257 } | |
| 258 context->timer_a = context->timer_a_load; | |
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259 } |
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260 } |
| 362 | 261 if (context->timer_control & BIT_TIMERB_ENABLE) { |
| 403 | 262 if (context->timer_b != TIMER_B_MAX) { |
| 263 context->timer_b++; | |
| 264 } else { | |
| 265 if (context->timer_control & BIT_TIMERB_OVEREN) { | |
| 266 context->status |= BIT_STATUS_TIMERB; | |
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267 } |
| 403 | 268 context->timer_b = context->timer_b_load; |
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269 } |
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270 } |
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271 } |
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272 //Update LFO |
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273 if (context->lfo_enable) { |
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274 if (context->lfo_counter) { |
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275 context->lfo_counter--; |
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276 } else { |
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277 context->lfo_counter = lfo_timer_values[context->lfo_freq]; |
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278 context->lfo_am_step += 2; |
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279 context->lfo_am_step &= 0xFE; |
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280 context->lfo_pm_step = context->lfo_am_step / 8; |
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281 } |
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282 } |
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283 //Update Envelope Generator |
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284 if (!(context->current_op % 3)) { |
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285 uint32_t env_cyc = context->env_counter; |
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286 uint32_t op = context->current_env_op; |
| 362 | 287 ym_operator * operator = context->operators + op; |
| 288 ym_channel * channel = context->channels + op/4; | |
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289 uint8_t rate; |
| 362 | 290 for(;;) { |
| 291 rate = operator->rates[operator->env_phase]; | |
| 292 if (rate) { | |
| 293 uint8_t ks = channel->keycode >> operator->key_scaling;; | |
| 294 rate = rate*2 + ks; | |
| 295 if (rate > 63) { | |
| 296 rate = 63; | |
| 297 } | |
| 298 } | |
| 299 //Deal with "infinite" rates | |
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300 //According to Nemesis this should be handled in key-on instead |
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301 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) { |
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302 operator->env_phase = PHASE_DECAY; |
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303 operator->envelope = 0; |
| 362 | 304 } else { |
| 305 break; | |
| 306 } | |
| 307 } | |
| 308 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; | |
|
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309 if (first_key_on) { |
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310 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1)); |
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311 } |
| 362 | 312 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
| 313 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; | |
| 314 //envelope value is 10-bits, but it will be used as a 4.8 value | |
| 315 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle] << 2; | |
| 316 if (operator->env_phase == PHASE_ATTACK) { | |
| 317 //this can probably be optimized to a single shift rather than a multiply + shift | |
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318 if (first_key_on) { |
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319 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc); |
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320 } |
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321 uint16_t old_env = operator->envelope; |
| 362 | 322 operator->envelope += (~operator->envelope * envelope_inc) >> 4; |
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323 if (operator->envelope > old_env) { |
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324 //Handle overflow |
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325 operator->envelope = 0; |
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326 } |
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327 if (!operator->envelope) { |
| 362 | 328 operator->env_phase = PHASE_DECAY; |
| 329 } | |
| 330 } else { | |
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331 if (first_key_on) { |
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332 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc, |
|
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333 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release")); |
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334 } |
| 362 | 335 operator->envelope += envelope_inc; |
| 336 //clamp to max attenuation value | |
| 337 if (operator->envelope > MAX_ENVELOPE) { | |
| 338 operator->envelope = MAX_ENVELOPE; | |
| 339 } | |
| 340 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { | |
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341 //operator->envelope = operator->sustain_level; |
| 362 | 342 operator->env_phase = PHASE_SUSTAIN; |
| 343 } | |
| 344 } | |
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345 } |
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346 context->current_env_op++; |
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347 if (context->current_env_op == NUM_OPERATORS) { |
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348 context->current_env_op = 0; |
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349 context->env_counter++; |
| 362 | 350 } |
| 351 } | |
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352 |
| 362 | 353 //Update Phase Generator |
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354 uint32_t channel = context->current_op / 4; |
| 362 | 355 if (channel != 5 || !context->dac_enable) { |
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356 uint32_t op = context->current_op; |
| 362 | 357 //printf("updating operator %d of channel %d\n", op, channel); |
| 358 ym_operator * operator = context->operators + op; | |
| 359 ym_channel * chan = context->channels + channel; | |
| 360 //TODO: Modulate phase by LFO if necessary | |
|
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361 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; |
| 362 | 362 operator->phase_counter += operator->phase_inc; |
|
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363 if (chan->pms) { |
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364 //not entirely sure this will get the precision correct, but I'd like to avoid recalculating phase |
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365 //increment every update when LFO phase modulation is enabled |
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366 int16_t lfo_mod = lfo_pm_table[(chan->fnum & 0x7F0) * 16 + chan->pms + context->lfo_pm_step]; |
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367 if (operator->multiple) { |
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368 lfo_mod *= operator->multiple; |
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369 } else { |
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370 lfo_mod >>= 1; |
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371 } |
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372 operator->phase_counter += lfo_mod; |
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373 } |
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374 int16_t mod = 0; |
| 362 | 375 switch (op % 4) |
|
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376 { |
| 362 | 377 case 0://Operator 1 |
| 377 | 378 if (chan->feedback) { |
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379 mod = (chan->op1_old + operator->output) >> (10-chan->feedback); |
| 377 | 380 } |
|
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381 break; |
| 362 | 382 case 1://Operator 3 |
| 383 switch(chan->algorithm) | |
| 384 { | |
| 385 case 0: | |
| 386 case 2: | |
| 387 //modulate by operator 2 | |
|
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388 mod = context->operators[op+1].output >> YM_MOD_SHIFT; |
| 362 | 389 break; |
| 390 case 1: | |
| 391 //modulate by operator 1+2 | |
|
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392 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT; |
| 362 | 393 break; |
| 394 case 5: | |
| 395 //modulate by operator 1 | |
|
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396 mod = context->operators[op-1].output >> YM_MOD_SHIFT; |
| 362 | 397 } |
| 398 break; | |
| 399 case 2://Operator 2 | |
|
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400 if (chan->algorithm != 1 && chan->algorithm != 2 && chan->algorithm != 7) { |
| 362 | 401 //modulate by Operator 1 |
|
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402 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 403 } |
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404 break; |
| 362 | 405 case 3://Operator 4 |
| 406 switch(chan->algorithm) | |
| 407 { | |
| 408 case 0: | |
| 409 case 1: | |
| 410 case 4: | |
| 411 //modulate by operator 3 | |
|
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412 mod = context->operators[op-2].output >> YM_MOD_SHIFT; |
| 362 | 413 break; |
| 414 case 2: | |
| 415 //modulate by operator 1+3 | |
|
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416 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 417 break; |
| 418 case 3: | |
| 419 //modulate by operator 2+3 | |
|
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420 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT; |
| 362 | 421 break; |
| 422 case 5: | |
| 423 //modulate by operator 1 | |
|
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424 mod = context->operators[op-3].output >> YM_MOD_SHIFT; |
| 362 | 425 break; |
| 426 } | |
|
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427 break; |
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428 } |
|
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429 uint16_t env = operator->envelope + operator->total_level; |
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430 if (env > MAX_ENVELOPE) { |
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431 env = MAX_ENVELOPE; |
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432 } |
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433 if (first_key_on) { |
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434 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
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435 } |
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436 //if ((channel != 0 && channel != 4) || chan->algorithm != 5) { |
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437 phase += mod; |
|
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438 //} |
|
448
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439 |
|
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440 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
|
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441 if (phase & 0x200) { |
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442 output = -output; |
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443 } |
|
527
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|
444 if (op % 4 == 0) { |
|
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445 chan->op1_old = operator->output; |
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446 } |
| 362 | 447 operator->output = output; |
|
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448 //Update the channel output if we've updated all operators |
|
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449 if (op % 4 == 3) { |
| 362 | 450 if (chan->algorithm < 4) { |
| 451 chan->output = operator->output; | |
| 452 } else if(chan->algorithm == 4) { | |
|
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453 chan->output = operator->output + context->operators[channel * 4 + 2].output; |
|
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454 } else { |
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455 output = 0; |
| 362 | 456 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
| 457 output += context->operators[op].output; | |
|
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458 } |
| 362 | 459 chan->output = output; |
|
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460 } |
|
370
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461 if (first_key_on) { |
|
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462 int16_t value = context->channels[channel].output & 0x3FE0; |
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463 if (value & 0x2000) { |
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464 value |= 0xC000; |
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465 } |
|
522
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466 dfprintf(debug_file, "channel %d output: %d\n", channel, (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER); |
|
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467 } |
|
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468 } |
| 362 | 469 //puts("operator update done"); |
|
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470 } |
|
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471 context->current_op++; |
|
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472 context->buffer_fraction += context->buffer_inc; |
|
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473 if (context->current_op == NUM_OPERATORS) { |
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474 context->current_op = 0; |
|
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475 } |
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476 if (context->buffer_fraction > BUFFER_INC_RES) { |
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477 context->buffer_fraction -= BUFFER_INC_RES; |
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478 context->audio_buffer[context->buffer_pos] = 0; |
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479 context->audio_buffer[context->buffer_pos + 1] = 0; |
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480 for (int i = 0; i < NUM_CHANNELS; i++) { |
|
521
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481 int16_t value = context->channels[i].output; |
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482 if (value > 0x1FE0) { |
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483 value = 0x1FE0; |
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484 } else if (value < -0x1FF0) { |
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485 value = -0x1FF0; |
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486 } else { |
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487 value &= 0x3FE0; |
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488 if (value & 0x2000) { |
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489 value |= 0xC000; |
|
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490 } |
|
380
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491 } |
|
483
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492 if (context->channels[i].logfile) { |
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493 fwrite(&value, sizeof(value), 1, context->channels[i].logfile); |
|
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494 } |
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495 if (context->channels[i].lr & 0x80) { |
|
522
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496 context->audio_buffer[context->buffer_pos] += (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER; |
|
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497 } |
|
483
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498 if (context->channels[i].lr & 0x40) { |
|
522
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499 context->audio_buffer[context->buffer_pos+1] += (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER; |
|
483
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500 } |
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501 } |
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502 context->buffer_pos += 2; |
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503 if (context->buffer_pos == context->sample_limit) { |
|
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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504 if (!headless) { |
|
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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505 render_wait_ym(context); |
|
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The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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|
506 } |
|
380
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Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
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507 } |
|
364
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|
508 } |
|
288
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|
509 } |
|
535
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510 if (context->current_cycle >= context->write_cycle + (context->busy_cycles * context->clock_inc / 6)) { |
|
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511 context->status &= 0x7F; |
| 374 | 512 context->write_cycle = CYCLE_NEVER; |
|
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513 } |
| 362 | 514 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
|
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515 } |
|
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diff
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516 |
|
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|
517 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
|
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|
518 { |
|
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519 //printf("address_write_part1: %X\n", address); |
| 362 | 520 context->selected_reg = address; |
| 521 context->selected_part = 0; | |
|
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522 context->write_cycle = context->current_cycle; |
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523 context->busy_cycles = BUSY_CYCLES_ADDRESS; |
|
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|
524 } |
|
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diff
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|
525 |
|
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|
526 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
|
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|
527 { |
|
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|
528 //printf("address_write_part2: %X\n", address); |
| 362 | 529 context->selected_reg = address; |
| 530 context->selected_part = 1; | |
|
535
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|
531 context->write_cycle = context->current_cycle; |
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diff
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532 context->busy_cycles = BUSY_CYCLES_ADDRESS; |
| 362 | 533 } |
| 534 | |
| 535 uint8_t fnum_to_keycode[] = { | |
| 536 //F11 = 0 | |
| 537 0,0,0,0,0,0,0,1, | |
| 538 //F11 = 1 | |
| 539 2,3,3,3,3,3,3,3 | |
| 540 }; | |
| 541 | |
| 542 //table courtesy of Nemesis | |
| 543 uint32_t detune_table[][4] = { | |
| 544 {0, 0, 1, 2}, //0 (0x00) | |
| 545 {0, 0, 1, 2}, //1 (0x01) | |
| 546 {0, 0, 1, 2}, //2 (0x02) | |
| 547 {0, 0, 1, 2}, //3 (0x03) | |
| 548 {0, 1, 2, 2}, //4 (0x04) | |
| 549 {0, 1, 2, 3}, //5 (0x05) | |
| 550 {0, 1, 2, 3}, //6 (0x06) | |
| 551 {0, 1, 2, 3}, //7 (0x07) | |
| 552 {0, 1, 2, 4}, //8 (0x08) | |
| 553 {0, 1, 3, 4}, //9 (0x09) | |
| 554 {0, 1, 3, 4}, //10 (0x0A) | |
| 555 {0, 1, 3, 5}, //11 (0x0B) | |
| 556 {0, 2, 4, 5}, //12 (0x0C) | |
| 557 {0, 2, 4, 6}, //13 (0x0D) | |
| 558 {0, 2, 4, 6}, //14 (0x0E) | |
| 559 {0, 2, 5, 7}, //15 (0x0F) | |
| 560 {0, 2, 5, 8}, //16 (0x10) | |
| 561 {0, 3, 6, 8}, //17 (0x11) | |
| 562 {0, 3, 6, 9}, //18 (0x12) | |
| 563 {0, 3, 7,10}, //19 (0x13) | |
| 564 {0, 4, 8,11}, //20 (0x14) | |
| 565 {0, 4, 8,12}, //21 (0x15) | |
| 566 {0, 4, 9,13}, //22 (0x16) | |
| 567 {0, 5,10,14}, //23 (0x17) | |
| 568 {0, 5,11,16}, //24 (0x18) | |
| 569 {0, 6,12,17}, //25 (0x19) | |
| 570 {0, 6,13,19}, //26 (0x1A) | |
| 571 {0, 7,14,20}, //27 (0x1B) | |
| 572 {0, 8,16,22}, //28 (0x1C) | |
| 573 {0, 8,16,22}, //29 (0x1D) | |
| 574 {0, 8,16,22}, //30 (0x1E) | |
| 575 {0, 8,16,22} | |
| 576 }; //31 (0x1F) | |
| 577 | |
| 578 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) | |
| 579 { | |
| 580 uint32_t chan_num = op / 4; | |
| 581 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
| 582 //base frequency | |
| 583 ym_channel * channel = context->channels + chan_num; | |
|
383
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Initial implementation of channel 3 special mode
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diff
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|
584 uint32_t inc, detune; |
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diff
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585 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { |
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586 inc = context->ch3_supp[op-2*4].fnum; |
|
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Initial implementation of channel 3 special mode
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|
587 if (!context->ch3_supp[op-2*4].block) { |
|
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|
588 inc >>= 1; |
|
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diff
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|
589 } else { |
|
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diff
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|
590 inc <<= (context->ch3_supp[op-2*4].block-1); |
|
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|
591 } |
|
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diff
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|
592 //detune |
|
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|
593 detune = detune_table[context->ch3_supp[op-2*4].keycode][operator->detune & 0x3]; |
|
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Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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parents:
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|
594 } else { |
|
383
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diff
changeset
|
595 inc = channel->fnum; |
|
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382
diff
changeset
|
596 if (!channel->block) { |
|
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diff
changeset
|
597 inc >>= 1; |
|
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diff
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|
598 } else { |
|
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diff
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|
599 inc <<= (channel->block-1); |
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|
600 } |
|
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|
601 //detune |
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|
602 detune = detune_table[channel->keycode][operator->detune & 0x3]; |
|
448
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Fix handling of key on in YM2612 core
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|
603 } |
| 362 | 604 if (operator->detune & 0x40) { |
| 605 inc -= detune; | |
| 606 //this can underflow, mask to 17-bit result | |
| 607 inc &= 0x1FFFF; | |
| 608 } else { | |
| 609 inc += detune; | |
| 610 } | |
| 611 //multiple | |
| 612 if (operator->multiple) { | |
| 613 inc *= operator->multiple; | |
| 614 } else { | |
| 615 //0.5 | |
| 616 inc >>= 1; | |
|
288
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|
617 } |
|
365
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Actually save the shifted phase inc after applying the block shift
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618 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
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362
diff
changeset
|
619 operator->phase_inc = inc; |
|
288
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|
620 } |
|
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parents:
diff
changeset
|
621 |
|
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parents:
diff
changeset
|
622 void ym_data_write(ym2612_context * context, uint8_t value) |
|
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parents:
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623 { |
|
451
b7c3b2d22858
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diff
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624 if (context->selected_reg >= YM_REG_END) { |
| 362 | 625 return; |
|
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|
626 } |
|
451
b7c3b2d22858
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diff
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627 if (context->selected_part) { |
|
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628 if (context->selected_reg < YM_PART2_START) { |
|
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parents:
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changeset
|
629 return; |
|
b7c3b2d22858
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diff
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|
630 } |
|
b7c3b2d22858
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448
diff
changeset
|
631 context->part2_regs[context->selected_reg - YM_PART2_START] = value; |
|
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|
632 } else { |
|
b7c3b2d22858
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parents:
448
diff
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|
633 if (context->selected_reg < YM_PART1_START) { |
|
b7c3b2d22858
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|
634 return; |
|
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
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|
635 } |
|
b7c3b2d22858
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diff
changeset
|
636 context->part1_regs[context->selected_reg - YM_PART1_START] = value; |
|
b7c3b2d22858
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diff
changeset
|
637 } |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
638 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
| 362 | 639 if (context->selected_reg < 0x30) { |
| 640 //Shared regs | |
| 641 switch (context->selected_reg) | |
| 642 { | |
|
411
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407
diff
changeset
|
643 //TODO: Test reg |
|
baf4688901f2
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diff
changeset
|
644 case REG_LFO: |
|
532
666210adf87b
Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents:
527
diff
changeset
|
645 /*if ((value & 0x8) && !context->lfo_enable) { |
|
411
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diff
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|
646 printf("LFO Enabled, Freq: %d\n", value & 0x7); |
|
532
666210adf87b
Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents:
527
diff
changeset
|
647 }*/ |
|
411
baf4688901f2
Initial stab at LFO phase modulation
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407
diff
changeset
|
648 context->lfo_enable = value & 0x8; |
|
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diff
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|
649 if (!context->lfo_enable) { |
|
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diff
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|
650 context->lfo_am_step = context->lfo_pm_step = 0; |
|
baf4688901f2
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407
diff
changeset
|
651 } |
|
baf4688901f2
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407
diff
changeset
|
652 context->lfo_freq = value & 0x7; |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
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parents:
424
diff
changeset
|
653 |
|
411
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407
diff
changeset
|
654 break; |
| 362 | 655 case REG_TIMERA_HIGH: |
| 656 context->timer_a_load &= 0x3; | |
| 657 context->timer_a_load |= value << 2; | |
| 658 break; | |
| 659 case REG_TIMERA_LOW: | |
| 660 context->timer_a_load &= 0xFFFC; | |
| 661 context->timer_a_load |= value & 0x3; | |
| 662 break; | |
| 663 case REG_TIMERB: | |
| 403 | 664 context->timer_b_load = value * 16; |
| 362 | 665 break; |
|
383
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382
diff
changeset
|
666 case REG_TIME_CTRL: { |
| 403 | 667 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) { |
| 668 context->timer_a = context->timer_a_load; | |
| 669 } | |
| 670 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) { | |
| 671 context->timer_b = context->timer_b_load; | |
| 672 } | |
| 673 context->timer_control = value & 0xF; | |
| 674 if (value & BIT_TIMERA_RESET) { | |
| 675 context->status &= ~BIT_STATUS_TIMERA; | |
| 676 } | |
| 677 if (value & BIT_TIMERB_RESET) { | |
| 678 context->status &= ~BIT_STATUS_TIMERB; | |
| 679 } | |
|
383
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Initial implementation of channel 3 special mode
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382
diff
changeset
|
680 uint8_t old_mode = context->ch3_mode; |
|
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diff
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|
681 context->ch3_mode = value & 0xC0; |
|
72933100c55c
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diff
changeset
|
682 if (context->ch3_mode != old_mode) { |
|
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Initial implementation of channel 3 special mode
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382
diff
changeset
|
683 ym_update_phase_inc(context, context->operators + 2*4, 2*4); |
|
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Initial implementation of channel 3 special mode
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382
diff
changeset
|
684 ym_update_phase_inc(context, context->operators + 2*4+1, 2*4+1); |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
685 ym_update_phase_inc(context, context->operators + 2*4+2, 2*4+2); |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
686 } |
| 362 | 687 break; |
|
383
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
688 } |
| 362 | 689 case REG_KEY_ONOFF: { |
| 690 uint8_t channel = value & 0x7; | |
|
386
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
691 if (channel != 3 && channel != 7) { |
|
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
692 if (channel > 2) { |
|
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
693 channel--; |
|
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
694 } |
| 362 | 695 for (uint8_t op = channel * 4, bit = 0x10; op < (channel + 1) * 4; op++, bit <<= 1) { |
| 696 if (value & bit) { | |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
697 if (context->operators[op].env_phase == PHASE_RELEASE) |
|
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
698 { |
|
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
699 first_key_on = 1; |
|
e85a107e6ec0
Fix handling of key on in YM2612 core
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parents:
424
diff
changeset
|
700 //printf("Key On for operator %d in channel %d\n", op, channel); |
|
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Fix handling of key on in YM2612 core
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parents:
424
diff
changeset
|
701 context->operators[op].phase_counter = 0; |
|
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Fix handling of key on in YM2612 core
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parents:
424
diff
changeset
|
702 context->operators[op].env_phase = PHASE_ATTACK; |
|
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Fix handling of key on in YM2612 core
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424
diff
changeset
|
703 } |
| 362 | 704 } else { |
| 705 //printf("Key Off for operator %d in channel %d\n", op, channel); | |
| 706 context->operators[op].env_phase = PHASE_RELEASE; | |
| 707 } | |
| 708 } | |
| 709 } | |
| 710 break; | |
| 711 } | |
| 712 case REG_DAC: | |
| 713 if (context->dac_enable) { | |
| 714 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
|
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
715 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle); |
| 362 | 716 } |
| 717 break; | |
| 718 case REG_DAC_ENABLE: | |
|
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
719 //printf("DAC Enable: %X\n", value); |
| 362 | 720 context->dac_enable = value & 0x80; |
| 721 break; | |
| 722 } | |
| 723 } else if (context->selected_reg < 0xA0) { | |
| 724 //part | |
| 725 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
| 726 //channel in part | |
| 727 if ((context->selected_reg & 0x3) != 0x3) { | |
|
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
728 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
| 362 | 729 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
| 730 ym_operator * operator = context->operators + op; | |
| 731 switch (context->selected_reg & 0xF0) | |
| 732 { | |
| 733 case REG_DETUNE_MULT: | |
| 734 operator->detune = value >> 4 & 0x7; | |
| 735 operator->multiple = value & 0xF; | |
| 736 ym_update_phase_inc(context, operator, op); | |
| 737 break; | |
| 738 case REG_TOTAL_LEVEL: | |
| 739 operator->total_level = (value & 0x7F) << 5; | |
| 740 break; | |
| 741 case REG_ATTACK_KS: | |
| 376 | 742 operator->key_scaling = 3 - (value >> 6); |
| 362 | 743 operator->rates[PHASE_ATTACK] = value & 0x1F; |
| 744 break; | |
| 745 case REG_DECAY_AM: | |
| 746 //TODO: AM flag for LFO | |
| 747 operator->rates[PHASE_DECAY] = value & 0x1F; | |
| 748 break; | |
| 749 case REG_SUSTAIN_RATE: | |
| 750 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
| 751 break; | |
| 752 case REG_S_LVL_R_RATE: | |
| 753 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
|
382
b904859964e5
Fix operator precedence bug with sustain level
Mike Pavone <pavone@retrodev.com>
parents:
381
diff
changeset
|
754 operator->sustain_level = (value & 0xF0) << 4; |
| 362 | 755 break; |
| 756 } | |
| 757 } | |
| 758 } else { | |
| 759 uint8_t channel = context->selected_reg & 0x3; | |
| 760 if (channel != 3) { | |
| 761 if (context->selected_part) { | |
| 762 channel += 3; | |
| 763 } | |
| 764 //printf("write targets channel %d\n", channel); | |
| 765 switch (context->selected_reg & 0xFC) | |
| 766 { | |
| 767 case REG_FNUM_LOW: | |
| 768 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
| 769 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
| 770 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
| 771 ym_update_phase_inc(context, context->operators + channel*4, channel*4); | |
| 772 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1); | |
| 773 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2); | |
| 774 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3); | |
| 775 break; | |
| 776 case REG_BLOCK_FNUM_H:{ | |
| 777 context->channels[channel].block_fnum_latch = value; | |
| 778 break; | |
| 779 } | |
|
383
72933100c55c
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parents:
382
diff
changeset
|
780 case REG_FNUM_LOW_CH3: |
|
72933100c55c
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parents:
382
diff
changeset
|
781 if (channel < 3) { |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
782 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7; |
|
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Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
783 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value; |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
784 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7]; |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
785 if (context->ch3_mode) { |
|
72933100c55c
Initial implementation of channel 3 special mode
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parents:
382
diff
changeset
|
786 ym_update_phase_inc(context, context->operators + 2*4 + channel, 2*4); |
|
72933100c55c
Initial implementation of channel 3 special mode
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382
diff
changeset
|
787 } |
|
72933100c55c
Initial implementation of channel 3 special mode
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788 } |
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Initial implementation of channel 3 special mode
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789 break; |
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Initial implementation of channel 3 special mode
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382
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790 case REG_BLOCK_FN_CH3: |
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Initial implementation of channel 3 special mode
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791 if (channel < 3) { |
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Initial implementation of channel 3 special mode
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792 context->ch3_supp[channel].block_fnum_latch = value; |
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Initial implementation of channel 3 special mode
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793 } |
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Initial implementation of channel 3 special mode
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794 break; |
| 362 | 795 case REG_ALG_FEEDBACK: |
| 796 context->channels[channel].algorithm = value & 0x7; | |
| 797 context->channels[channel].feedback = value >> 3 & 0x7; | |
|
527
7df7f493b3b6
Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
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522
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798 //printf("Algorithm %d, feedback %d for channel %d\n", value & 0x7, value >> 3 & 0x7, channel); |
| 362 | 799 break; |
| 800 case REG_LR_AMS_PMS: | |
|
411
baf4688901f2
Initial stab at LFO phase modulation
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407
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801 context->channels[channel].pms = (value & 0x7) * 32; |
| 362 | 802 context->channels[channel].ams = value >> 4 & 0x3; |
| 803 context->channels[channel].lr = value & 0xC0; | |
|
369
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
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365
diff
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804 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
| 362 | 805 break; |
| 806 } | |
| 807 } | |
| 808 } | |
|
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
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424
diff
changeset
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809 |
| 362 | 810 context->write_cycle = context->current_cycle; |
|
535
aaa77e351c24
Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
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532
diff
changeset
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811 context->busy_cycles = context->selected_reg < 0xA0 ? BUSY_CYCLES_DATA_LOW : BUSY_CYCLES_DATA_HIGH; |
| 374 | 812 context->status |= 0x80; |
|
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
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813 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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814 |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
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diff
changeset
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815 uint8_t ym_read_status(ym2612_context * context) |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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816 { |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
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817 return context->status; |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
818 } |
|
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
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819 |