repos/blastem: m68k_core

annotate m68k_core_x86.c @ 613:09d5adf8d1ca

Fix opsize for sbcd in 68K instruction decoder. This fixes the timer bug in Strider 2

author	Michael Pavone <pavone@retrodev.com>
date	Sun, 28 Dec 2014 17:58:43 -0800
parents	5a6ff0d76032
children	9d6fed6501ba

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 457 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 457 diff changeset	2 Copyright 2013 Michael Pavone
485 b449af228c63 Follow amd64 ABI stack alignment requirements in places it matters so we can call sprintf with floating point arguments without crashing Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 457 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 457 diff changeset	5 */
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "gen_x86.h"
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	7 #include "m68k_core.h"
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	8 #include "m68k_internal.h"
208 3457dc6fd558 Tweaks to make blastem compatible with m68k-tester Mike Pavone <pavone@retrodev.com> parents: 207 diff changeset	9 #include "68kinst.h"
95 dd3c680c618c Initial work on allowing dynamic branches and code in RAM plus a small fix to effective address decoding Mike Pavone <pavone@retrodev.com> parents: 93 diff changeset	10 #include "mem.h"
557 acec5464fa1e Rename x86_backend.h and x86_backend.c to backend.h and backend.c respectively Mike Pavone <pavone@retrodev.com> parents: 555 diff changeset	11 #include "backend.h"
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	12 #include <stdio.h>
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	13 #include <stddef.h>
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	14 #include <stdlib.h>
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	15 #include <string.h>
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	16
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	17 #define CYCLES RAX
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	18 #define LIMIT RBP
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	19 #define CONTEXT RSI
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	20 #define SCRATCH1 RCX
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	21
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	22 #ifdef X86_64
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	23 #define SCRATCH2 RDI
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	24 #else
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	25 #define SCRATCH2 RBX
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	26 #endif
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	27
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	28 enum {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	29 FLAG_X,
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	30 FLAG_N,
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	31 FLAG_Z,
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	32 FLAG_V,
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	33 FLAG_C
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	34 };
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	35
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	36 void set_flag(m68k_options * opts, uint8_t val, uint8_t flag)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	37 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	38 if (opts->flag_regs[flag] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	39 mov_ir(&opts->gen.code, val, opts->flag_regs[flag], SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	40 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	41 int8_t offset = offsetof(m68k_context, flags) + flag;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	42 if (offset) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	43 mov_irdisp(&opts->gen.code, val, opts->gen.context_reg, offset, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	44 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	45 mov_irind(&opts->gen.code, val, opts->gen.context_reg, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	46 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	47 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	48 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	49
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	50 void set_flag_cond(m68k_options *opts, uint8_t cond, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	51 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	52 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	53 setcc_r(&opts->gen.code, cond, opts->flag_regs[flag]);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	54 } else {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	55 int8_t offset = offsetof(m68k_context, flags) + flag;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	56 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	57 setcc_rdisp(&opts->gen.code, cond, opts->gen.context_reg, offset);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	58 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	59 setcc_rind(&opts->gen.code, cond, opts->gen.context_reg);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	60 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	61 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	62 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	63
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	64 void check_flag(m68k_options *opts, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	65 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	66 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	67 cmp_ir(&opts->gen.code, 0, opts->flag_regs[flag], SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	68 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	69 cmp_irdisp(&opts->gen.code, 0, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	70 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	71 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	72
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	73 void flag_to_reg(m68k_options *opts, uint8_t flag, uint8_t reg)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	74 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	75 if (opts->flag_regs[flag] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	76 mov_rr(&opts->gen.code, opts->flag_regs[flag], reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	77 } else {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	78 int8_t offset = offsetof(m68k_context, flags) + flag;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	79 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	80 mov_rdispr(&opts->gen.code, opts->gen.context_reg, offset, reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	81 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	82 mov_rindr(&opts->gen.code, opts->gen.context_reg, reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	83 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	84 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	85 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	86
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	87 void reg_to_flag(m68k_options *opts, uint8_t reg, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	88 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	89 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	90 mov_rr(&opts->gen.code, reg, opts->flag_regs[flag], SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	91 } else {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	92 int8_t offset = offsetof(m68k_context, flags) + flag;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	93 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	94 mov_rrdisp(&opts->gen.code, reg, opts->gen.context_reg, offset, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	95 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	96 mov_rrind(&opts->gen.code, reg, opts->gen.context_reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	97 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	98 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	99 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	100
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	101 void flag_to_flag(m68k_options *opts, uint8_t flag1, uint8_t flag2)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	102 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	103 code_info *code = &opts->gen.code;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	104 if (opts->flag_regs[flag1] >= 0 && opts->flag_regs[flag2] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	105 mov_rr(code, opts->flag_regs[flag1], opts->flag_regs[flag2], SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	106 } else if(opts->flag_regs[flag1] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	107 mov_rrdisp(code, opts->flag_regs[flag1], opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	108 } else if (opts->flag_regs[flag2] >= 0) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	109 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag1, opts->flag_regs[flag2], SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	110 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	111 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	112 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag1, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	113 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	114 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	115 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	116 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	117
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	118 void update_flags(m68k_options *opts, uint32_t update_mask)
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	119 {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	120 uint8_t native_flags[] = {0, CC_S, CC_Z, CC_O, CC_C};
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	121 for (int8_t flag = FLAG_C; flag >= FLAG_X; --flag)
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	122 {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	123 if (update_mask & X0 << (flag*3)) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	124 set_flag(opts, 0, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	125 } else if(update_mask & X1 << (flag*3)) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	126 set_flag(opts, 1, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	127 } else if(update_mask & X << (flag*3)) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	128 if (flag == FLAG_X) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	129 if (opts->flag_regs[FLAG_C] >= 0 \|\| !(update_mask & (C0\|C1\|C))) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	130 flag_to_flag(opts, FLAG_C, FLAG_X);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	131 } else if(update_mask & C0) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	132 set_flag(opts, 0, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	133 } else if(update_mask & C1) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	134 set_flag(opts, 1, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	135 } else {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	136 set_flag_cond(opts, CC_C, flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	137 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	138 } else {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	139 set_flag_cond(opts, native_flags[flag], flag);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	140 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	141 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	142 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	143 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	144
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	145 void flag_to_carry(m68k_options * opts, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	146 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	147 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	148 bt_ir(&opts->gen.code, 0, opts->flag_regs[flag], SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	149 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	150 bt_irdisp(&opts->gen.code, 0, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	151 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	152 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	153
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	154 void or_flag_to_reg(m68k_options *opts, uint8_t flag, uint8_t reg)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	155 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	156 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	157 or_rr(&opts->gen.code, opts->flag_regs[flag], reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	158 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	159 or_rdispr(&opts->gen.code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	160 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	161 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	162
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	163 void xor_flag_to_reg(m68k_options *opts, uint8_t flag, uint8_t reg)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	164 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	165 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	166 xor_rr(&opts->gen.code, opts->flag_regs[flag], reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	167 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	168 xor_rdispr(&opts->gen.code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, reg, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	169 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	170 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	171
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	172 void xor_flag(m68k_options *opts, uint8_t val, uint8_t flag)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	173 {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	174 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	175 xor_ir(&opts->gen.code, val, opts->flag_regs[flag], SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	176 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	177 xor_irdisp(&opts->gen.code, val, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	178 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	179 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	180
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	181 void cmp_flags(m68k_options *opts, uint8_t flag1, uint8_t flag2)
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	182 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	183 code_info *code = &opts->gen.code;
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	184 if (opts->flag_regs[flag1] >= 0 && opts->flag_regs[flag2] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	185 cmp_rr(code, opts->flag_regs[flag1], opts->flag_regs[flag2], SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	186 } else if(opts->flag_regs[flag1] >= 0 \|\| opts->flag_regs[flag2] >= 0) {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	187 if (opts->flag_regs[flag2] >= 0) {
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	188 uint8_t tmp = flag1;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	189 flag1 = flag2;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	190 flag2 = tmp;
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	191 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	192 cmp_rrdisp(code, opts->flag_regs[flag1], opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	193 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	194 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag1, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	195 cmp_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	196 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	197 }
90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	198
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	199 void areg_to_native(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	200 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	201 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	202 mov_rr(&opts->gen.code, opts->aregs[reg], native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	203 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	204 mov_rdispr(&opts->gen.code, opts->gen.context_reg, areg_offset(reg), native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	205 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	206 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	207
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	208 void dreg_to_native(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	209 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	210 if (opts->dregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	211 mov_rr(&opts->gen.code, opts->dregs[reg], native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	212 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	213 mov_rdispr(&opts->gen.code, opts->gen.context_reg, dreg_offset(reg), native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	214 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	215 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	216
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	217 void areg_to_native_sx(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	218 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	219 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	220 movsx_rr(&opts->gen.code, opts->aregs[reg], native_reg, SZ_W, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	221 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	222 movsx_rdispr(&opts->gen.code, opts->gen.context_reg, areg_offset(reg), native_reg, SZ_W, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	223 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	224 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	225
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	226 void dreg_to_native_sx(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	227 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	228 if (opts->dregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	229 movsx_rr(&opts->gen.code, opts->dregs[reg], native_reg, SZ_W, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	230 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	231 movsx_rdispr(&opts->gen.code, opts->gen.context_reg, dreg_offset(reg), native_reg, SZ_W, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	232 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	233 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	234
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	235 void native_to_areg(m68k_options *opts, uint8_t native_reg, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	236 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	237 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	238 mov_rr(&opts->gen.code, native_reg, opts->aregs[reg], SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	239 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	240 mov_rrdisp(&opts->gen.code, native_reg, opts->gen.context_reg, areg_offset(reg), SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	241 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	242 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	243
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	244 void native_to_dreg(m68k_options *opts, uint8_t native_reg, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	245 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	246 if (opts->dregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	247 mov_rr(&opts->gen.code, native_reg, opts->dregs[reg], SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	248 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	249 mov_rrdisp(&opts->gen.code, native_reg, opts->gen.context_reg, dreg_offset(reg), SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	250 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	251 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	252
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	253 void ldi_areg(m68k_options *opts, int32_t value, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	254 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	255 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	256 mov_ir(&opts->gen.code, value, opts->aregs[reg], SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	257 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	258 mov_irdisp(&opts->gen.code, value, opts->gen.context_reg, areg_offset(reg), SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	259 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	260 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	261
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	262 void ldi_native(m68k_options *opts, int32_t value, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	263 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	264 mov_ir(&opts->gen.code, value, reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	265 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	266
588 963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	267 void addi_native(m68k_options *opts, int32_t value, uint8_t reg)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	268 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	269 add_ir(&opts->gen.code, value, reg, SZ_D);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	270 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	271
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	272 void subi_native(m68k_options *opts, int32_t value, uint8_t reg)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	273 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	274 sub_ir(&opts->gen.code, value, reg, SZ_D);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	275 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	276
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	277 void push_native(m68k_options *opts, uint8_t reg)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	278 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	279 push_r(&opts->gen.code, reg);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	280 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	281
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	282 void pop_native(m68k_options *opts, uint8_t reg)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	283 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	284 pop_r(&opts->gen.code, reg);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	285 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	286
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	287 void sign_extend16_native(m68k_options *opts, uint8_t reg)
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	288 {
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	289 movsx_rr(&opts->gen.code, reg, reg, SZ_W, SZ_D);
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	290 }
963d5901f583 Move translate_m68k_movem to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 587 diff changeset	291
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	292 void addi_areg(m68k_options *opts, int32_t val, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	293 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	294 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	295 add_ir(&opts->gen.code, val, opts->aregs[reg], SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	296 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	297 add_irdisp(&opts->gen.code, val, opts->gen.context_reg, areg_offset(reg), SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	298 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	299 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	300
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	301 void subi_areg(m68k_options *opts, int32_t val, uint8_t reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	302 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	303 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	304 sub_ir(&opts->gen.code, val, opts->aregs[reg], SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	305 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	306 sub_irdisp(&opts->gen.code, val, opts->gen.context_reg, areg_offset(reg), SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	307 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	308 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	309
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	310 void add_areg_native(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	311 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	312 if (opts->aregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	313 add_rr(&opts->gen.code, opts->aregs[reg], native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	314 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	315 add_rdispr(&opts->gen.code, opts->gen.context_reg, areg_offset(reg), native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	316 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	317 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	318
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	319 void add_dreg_native(m68k_options *opts, uint8_t reg, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	320 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	321 if (opts->dregs[reg] >= 0) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	322 add_rr(&opts->gen.code, opts->dregs[reg], native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	323 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	324 add_rdispr(&opts->gen.code, opts->gen.context_reg, dreg_offset(reg), native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	325 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	326 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	327
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	328 void calc_areg_displace(m68k_options opts, m68k_op_info op, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	329 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	330 areg_to_native(opts, op->params.regs.pri, native_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	331 add_ir(&opts->gen.code, op->params.regs.displacement, native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	332 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	333
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	334 void calc_index_disp8(m68k_options opts, m68k_op_info op, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	335 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	336 uint8_t sec_reg = (op->params.regs.sec >> 1) & 0x7;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	337 if (op->params.regs.sec & 1) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	338 if (op->params.regs.sec & 0x10) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	339 add_areg_native(opts, sec_reg, native_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	340 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	341 add_dreg_native(opts, sec_reg, native_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	342 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	343 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	344 uint8_t other_reg = native_reg == opts->gen.scratch1 ? opts->gen.scratch2 : opts->gen.scratch1;
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	345 if (op->params.regs.sec & 0x10) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	346 areg_to_native_sx(opts, sec_reg, other_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	347 } else {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	348 dreg_to_native_sx(opts, sec_reg, other_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	349 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	350 add_rr(&opts->gen.code, other_reg, native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	351 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	352 if (op->params.regs.displacement) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	353 add_ir(&opts->gen.code, op->params.regs.displacement, native_reg, SZ_D);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	354 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	355 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	356
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	357 void calc_areg_index_disp8(m68k_options opts, m68k_op_info op, uint8_t native_reg)
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	358 {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	359 areg_to_native(opts, op->params.regs.pri, native_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	360 calc_index_disp8(opts, op, native_reg);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	361 }
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	362
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	363 void translate_m68k_op(m68kinst * inst, host_ea * ea, m68k_options * opts, uint8_t dst)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	364 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	365 code_info *code = &opts->gen.code;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	366 m68k_op_info *op = dst ? &inst->dst : &inst->src;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	367 int8_t reg = native_reg(op, opts);
81 6d231dbe75ab Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode Mike Pavone <pavone@retrodev.com> parents: 78 diff changeset	368 uint8_t sec_reg;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	369 int32_t dec_amount,inc_amount;
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	370 if (reg >= 0) {
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	371 ea->mode = MODE_REG_DIRECT;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	372 if (!dst && inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	373 movsx_rr(code, reg, opts->gen.scratch1, SZ_W, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	374 ea->base = opts->gen.scratch1;
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	375 } else {
3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	376 ea->base = reg;
3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	377 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	378 return;
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	379 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	380 switch (op->addr_mode)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	381 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	382 case MODE_REG:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	383 case MODE_AREG:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	384 //We only get one memory parameter, so if the dst operand is a register in memory,
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	385 //we need to copy this to a temp register first if we're translating the src operand
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	386 if (dst \|\| native_reg(&(inst->dst), opts) >= 0 \|\| inst->dst.addr_mode == MODE_UNUSED \|\| !(inst->dst.addr_mode == MODE_REG \|\| inst->dst.addr_mode == MODE_AREG)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	387 \|\| inst->op == M68K_EXG) {
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	388
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	389 ea->mode = MODE_REG_DISPLACE8;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	390 ea->base = opts->gen.context_reg;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	391 ea->disp = reg_offset(op);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	392 } else {
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	393 if (inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD) {
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	394 movsx_rdispr(code, opts->gen.context_reg, reg_offset(op), opts->gen.scratch1, SZ_W, SZ_D);
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	395 } else {
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	396 mov_rdispr(code, opts->gen.context_reg, reg_offset(op), opts->gen.scratch1, inst->extra.size);
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	397 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	398 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	399 ea->base = opts->gen.scratch1;
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	400 //we're explicitly handling the areg dest here, so we exit immediately
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	401 return;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	402 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	403 break;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	404 case MODE_AREG_PREDEC:
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	405 if (dst && inst->src.addr_mode == MODE_AREG_PREDEC) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	406 push_r(code, opts->gen.scratch1);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	407 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	408 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (op->params.regs.pri == 7 ? 2 :1));
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	409 if (!dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	410 cycles(&opts->gen, PREDEC_PENALTY);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	411 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	412 subi_areg(opts, dec_amount, op->params.regs.pri);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	413 case MODE_AREG_INDIRECT:
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	414 case MODE_AREG_POSTINC:
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	415 areg_to_native(opts, op->params.regs.pri, opts->gen.scratch1);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	416 m68k_read_size(opts, inst->extra.size);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	417
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	418 if (dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	419 if (inst->src.addr_mode == MODE_AREG_PREDEC) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	420 //restore src operand to opts->gen.scratch2
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	421 pop_r(code, opts->gen.scratch2);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	422 } else {
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	423 //save reg value in opts->gen.scratch2 so we can use it to save the result in memory later
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	424 areg_to_native(opts, op->params.regs.pri, opts->gen.scratch2);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	425 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	426 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	427
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	428 if (op->addr_mode == MODE_AREG_POSTINC) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	429 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (op->params.regs.pri == 7 ? 2 : 1));
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	430 addi_areg(opts, inc_amount, op->params.regs.pri);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	431 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	432 ea->mode = MODE_REG_DIRECT;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	433 ea->base = (!dst && inst->dst.addr_mode == MODE_AREG_PREDEC && inst->op != M68K_MOVE) ? opts->gen.scratch2 : opts->gen.scratch1;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	434 break;
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	435 case MODE_AREG_DISPLACE:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	436 cycles(&opts->gen, BUS);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	437 calc_areg_displace(opts, op, opts->gen.scratch1);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	438 if (dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	439 push_r(code, opts->gen.scratch1);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	440 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	441 m68k_read_size(opts, inst->extra.size);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	442 if (dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	443 pop_r(code, opts->gen.scratch2);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	444 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	445
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	446 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	447 ea->base = opts->gen.scratch1;
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	448 break;
81 6d231dbe75ab Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode Mike Pavone <pavone@retrodev.com> parents: 78 diff changeset	449 case MODE_AREG_INDEX_DISP8:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	450 cycles(&opts->gen, 6);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	451 calc_areg_index_disp8(opts, op, opts->gen.scratch1);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	452 if (dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	453 push_r(code, opts->gen.scratch1);
81 6d231dbe75ab Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode Mike Pavone <pavone@retrodev.com> parents: 78 diff changeset	454 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	455 m68k_read_size(opts, inst->extra.size);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	456 if (dst) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	457 pop_r(code, opts->gen.scratch2);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	458 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	459
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	460 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	461 ea->base = opts->gen.scratch1;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	462 break;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	463 case MODE_PC_DISPLACE:
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	464 cycles(&opts->gen, BUS);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	465 mov_ir(code, op->params.regs.displacement + inst->address+2, opts->gen.scratch1, SZ_D);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	466 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	467 push_r(code, opts->gen.scratch1);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	468 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	469 m68k_read_size(opts, inst->extra.size);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	470 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	471 pop_r(code, opts->gen.scratch2);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	472 }
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	473
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	474 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	475 ea->base = opts->gen.scratch1;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	476 break;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	477 case MODE_PC_INDEX_DISP8:
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	478 cycles(&opts->gen, 6);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	479 mov_ir(code, inst->address+2, opts->gen.scratch1, SZ_D);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	480 calc_index_disp8(opts, op, opts->gen.scratch1);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	481 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	482 push_r(code, opts->gen.scratch1);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	483 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	484 m68k_read_size(opts, inst->extra.size);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	485 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	486 pop_r(code, opts->gen.scratch2);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	487 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	488
98 104e257fb93c Allow indexed modes to be used as a destination Mike Pavone <pavone@retrodev.com> parents: 97 diff changeset	489 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	490 ea->base = opts->gen.scratch1;
98 104e257fb93c Allow indexed modes to be used as a destination Mike Pavone <pavone@retrodev.com> parents: 97 diff changeset	491 break;
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	492 case MODE_ABSOLUTE:
918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	493 case MODE_ABSOLUTE_SHORT:
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	494 cycles(&opts->gen, op->addr_mode == MODE_ABSOLUTE ? BUS*2 : BUS);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	495 mov_ir(code, op->params.immed, opts->gen.scratch1, SZ_D);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	496 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	497 push_r(code, opts->gen.scratch1);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	498 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	499 m68k_read_size(opts, inst->extra.size);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	500 if (dst) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	501 pop_r(code, opts->gen.scratch2);
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	502 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	503
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	504 ea->mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	505 ea->base = opts->gen.scratch1;
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	506 break;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	507 case MODE_IMMEDIATE:
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	508 case MODE_IMMEDIATE_WORD:
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	509 if (inst->variant != VAR_QUICK) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	510 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG && op->addr_mode == MODE_IMMEDIATE) ? BUS*2 : BUS);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	511 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	512 ea->mode = MODE_IMMED;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	513 ea->disp = op->params.immed;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	514 //sign extend value when the destination is an address register
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	515 if (inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD && ea->disp & 0x8000) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	516 ea->disp \|= 0xFFFF0000;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	517 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	518 return;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	519 default:
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	520 m68k_disasm(inst, disasm_buf);
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	521 printf("%X: %s\naddress mode %d not implemented (%s)\n", inst->address, disasm_buf, op->addr_mode, dst ? "dst" : "src");
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	522 exit(1);
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	523 }
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	524 if (!dst && inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	525 if (ea->mode == MODE_REG_DIRECT) {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	526 movsx_rr(code, ea->base, opts->gen.scratch1, SZ_W, SZ_D);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	527 } else {
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	528 movsx_rdispr(code, ea->base, ea->disp, opts->gen.scratch1, SZ_W, SZ_D);
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	529 ea->mode = MODE_REG_DIRECT;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	530 }
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	531 ea->base = opts->gen.scratch1;
c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	532 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	533 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	534
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	535 void m68k_save_result(m68kinst * inst, m68k_options * opts)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	536 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	537 code_info *code = &opts->gen.code;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	538 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG && inst->dst.addr_mode != MODE_UNUSED) {
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	539 if (inst->dst.addr_mode == MODE_AREG_PREDEC && inst->src.addr_mode == MODE_AREG_PREDEC && inst->op != M68K_MOVE) {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	540 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	541 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	542 switch (inst->extra.size)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	543 {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	544 case OPSIZE_BYTE:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	545 call(code, opts->write_8);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	546 break;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	547 case OPSIZE_WORD:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	548 call(code, opts->write_16);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	549 break;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	550 case OPSIZE_LONG:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	551 call(code, opts->write_32_lowfirst);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	552 break;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	553 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	554 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	555 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	556
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	557 void translate_m68k_move(m68k_options * opts, m68kinst * inst)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	558 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	559 code_info *code = &opts->gen.code;
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	560 int8_t reg, flags_reg, sec_reg;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	561 uint8_t dir = 0;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	562 int32_t offset;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	563 int32_t inc_amount, dec_amount;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	564 host_ea src;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	565 translate_m68k_op(inst, &src, opts, 0);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	566 reg = native_reg(&(inst->dst), opts);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	567
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	568 if (inst->dst.addr_mode != MODE_AREG) {
0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	569 if (src.mode == MODE_REG_DIRECT) {
0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	570 flags_reg = src.base;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	571 } else {
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	572 if (reg >= 0) {
0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	573 flags_reg = reg;
128 fe598ffd85ce Cleanup bit instructions and fix bug in translate_m68k_move that caused incorrect results once translate_m68k_src was fixed Mike Pavone <pavone@retrodev.com> parents: 126 diff changeset	574 } else {
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	575 if(src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	576 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	577 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	578 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
216 0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	579 }
0b5ec22dcda2 Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source. Mike Pavone <pavone@retrodev.com> parents: 213 diff changeset	580 src.mode = MODE_REG_DIRECT;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	581 flags_reg = src.base = opts->gen.scratch1;
128 fe598ffd85ce Cleanup bit instructions and fix bug in translate_m68k_move that caused incorrect results once translate_m68k_src was fixed Mike Pavone <pavone@retrodev.com> parents: 126 diff changeset	582 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	583 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	584 }
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	585 uint8_t size = inst->extra.size;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	586 switch(inst->dst.addr_mode)
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	587 {
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	588 case MODE_AREG:
3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	589 size = OPSIZE_LONG;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	590 case MODE_REG:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	591 if (reg >= 0) {
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	592 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	593 mov_rr(code, src.base, reg, size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	594 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	595 mov_rdispr(code, src.base, src.disp, reg, size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	596 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	597 mov_ir(code, src.disp, reg, size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	598 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	599 } else if(src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	600 mov_rrdisp(code, src.base, opts->gen.context_reg, reg_offset(&(inst->dst)), size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	601 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	602 mov_irdisp(code, src.disp, opts->gen.context_reg, reg_offset(&(inst->dst)), size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	603 }
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	604 break;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	605 case MODE_AREG_PREDEC:
182 924af8b2f7a0 Fix -(a7) dest when size is byte Mike Pavone <pavone@retrodev.com> parents: 181 diff changeset	606 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1));
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	607 case MODE_AREG_INDIRECT:
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	608 case MODE_AREG_POSTINC:
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	609 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	610 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	611 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	612 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	613 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	614 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	615 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	616 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	617 }
610 314373222b1a Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg Michael Pavone <pavone@retrodev.com> parents: 605 diff changeset	618 if (inst->dst.addr_mode == MODE_AREG_PREDEC) {
314373222b1a Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg Michael Pavone <pavone@retrodev.com> parents: 605 diff changeset	619 subi_areg(opts, dec_amount, inst->dst.params.regs.pri);
314373222b1a Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg Michael Pavone <pavone@retrodev.com> parents: 605 diff changeset	620 }
314373222b1a Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg Michael Pavone <pavone@retrodev.com> parents: 605 diff changeset	621 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	622 break;
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	623 case MODE_AREG_DISPLACE:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	624 cycles(&opts->gen, BUS);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	625 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	626 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	627 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	628 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	629 }
f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	630 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	631 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	632 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	633 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	634 }
f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	635 break;
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	636 case MODE_AREG_INDEX_DISP8:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	637 cycles(&opts->gen, 6);//TODO: Check to make sure this is correct
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	638 //calc_areg_index_disp8 will clober scratch1 when a 16-bit index is used
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	639 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	640 push_r(code, opts->gen.scratch1);
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	641 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	642 calc_areg_index_disp8(opts, &inst->dst, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	643 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	644 pop_r(code, opts->gen.scratch1);
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	645 }
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	646 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	647 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	648 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	649 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	650 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	651 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	652 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	653 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	654 }
99 8491de5d6c06 Allow use of indexed modes as move dst Mike Pavone <pavone@retrodev.com> parents: 98 diff changeset	655 break;
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	656 case MODE_PC_DISPLACE:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	657 cycles(&opts->gen, BUS);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	658 mov_ir(code, inst->dst.params.regs.displacement + inst->address+2, opts->gen.scratch2, SZ_D);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	659 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	660 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	661 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	662 }
f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	663 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	664 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	665 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	666 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	667 }
f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	668 break;
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	669 case MODE_PC_INDEX_DISP8:
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	670 cycles(&opts->gen, 6);//TODO: Check to make sure this is correct
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	671 mov_ir(code, inst->address, opts->gen.scratch2, SZ_D);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	672 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	673 push_r(code, opts->gen.scratch1);
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	674 }
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	675 calc_index_disp8(opts, &inst->dst, opts->gen.scratch2);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	676 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) {
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	677 pop_r(code, opts->gen.scratch1);
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	678 }
f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	679 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	680 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	681 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	682 }
f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	683 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	684 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	685 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	686 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
196 f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	687 }
f8955d33486d Implement pc indexed mode as move dst Mike Pavone <pavone@retrodev.com> parents: 194 diff changeset	688 break;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	689 case MODE_ABSOLUTE:
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	690 case MODE_ABSOLUTE_SHORT:
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	691 if (src.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	692 if (src.base != opts->gen.scratch1) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	693 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	694 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	695 } else if (src.mode == MODE_REG_DISPLACE8) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	696 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	697 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	698 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	699 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	700 if (inst->dst.addr_mode == MODE_ABSOLUTE) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	701 cycles(&opts->gen, BUS*2);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	702 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	703 cycles(&opts->gen, BUS);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	704 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	705 mov_ir(code, inst->dst.params.immed, opts->gen.scratch2, SZ_D);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 53 diff changeset	706 break;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	707 default:
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	708 m68k_disasm(inst, disasm_buf);
154 4791c0204410 Small fix for bit instructions Mike Pavone <pavone@retrodev.com> parents: 152 diff changeset	709 printf("%X: %s\naddress mode %d not implemented (move dst)\n", inst->address, disasm_buf, inst->dst.addr_mode);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	710 exit(1);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	711 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	712
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	713 if (inst->dst.addr_mode != MODE_AREG) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	714 cmp_ir(code, 0, flags_reg, inst->extra.size);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	715 update_flags(opts, N\|Z\|V0\|C0);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	716 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	717 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	718 m68k_write_size(opts, inst->extra.size);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	719 if (inst->dst.addr_mode == MODE_AREG_POSTINC) {
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	720 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1));
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	721 addi_areg(opts, inc_amount, inst->dst.params.regs.pri);
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	722 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	723 }
a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	724
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	725 //add cycles for prefetch
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	726 cycles(&opts->gen, BUS);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	727 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	728
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	729 void translate_m68k_clr(m68k_options * opts, m68kinst * inst)
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	730 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	731 code_info *code = &opts->gen.code;
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	732 update_flags(opts, N0\|V0\|C0\|Z1);
92 c3d034e076ee Fix some bugs in emulation of CLR Mike Pavone <pavone@retrodev.com> parents: 87 diff changeset	733 int8_t reg = native_reg(&(inst->dst), opts);
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	734 if (reg >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	735 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG ? 6 : 4));
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	736 xor_rr(code, reg, reg, inst->extra.size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	737 return;
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	738 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	739 host_ea dst_op;
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	740 //TODO: fix timing
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	741 translate_m68k_op(inst, &dst_op, opts, 1);
92 c3d034e076ee Fix some bugs in emulation of CLR Mike Pavone <pavone@retrodev.com> parents: 87 diff changeset	742 if (dst_op.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	743 xor_rr(code, dst_op.base, dst_op.base, inst->extra.size);
92 c3d034e076ee Fix some bugs in emulation of CLR Mike Pavone <pavone@retrodev.com> parents: 87 diff changeset	744 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	745 mov_irdisp(code, 0, dst_op.base, dst_op.disp, inst->extra.size);
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	746 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	747 m68k_save_result(inst, opts);
52 f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	748 }
f02ba3808757 Implement CLR, minor refactor of register offset calculation in context struct Mike Pavone <pavone@retrodev.com> parents: 51 diff changeset	749
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	750 void translate_m68k_ext(m68k_options * opts, m68kinst * inst)
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	751 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	752 code_info *code = &opts->gen.code;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	753 host_ea dst_op;
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	754 uint8_t dst_size = inst->extra.size;
f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	755 inst->extra.size--;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	756 translate_m68k_op(inst, &dst_op, opts, 1);
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	757 if (dst_op.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	758 movsx_rr(code, dst_op.base, dst_op.base, inst->extra.size, dst_size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	759 cmp_ir(code, 0, dst_op.base, dst_size);
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	760 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	761 movsx_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, inst->extra.size, dst_size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	762 cmp_ir(code, 0, opts->gen.scratch1, dst_size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	763 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, dst_size);
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	764 }
f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	765 inst->extra.size = dst_size;
576 a6f2db4df70d Small refactor to flag handling in 68K core Michael Pavone <pavone@retrodev.com> parents: 574 diff changeset	766 update_flags(opts, N\|V0\|C0\|Z);
93 f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	767 //M68K EXT only operates on registers so no need for a call to save result here
f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	768 }
f63b0e58e2d5 Implement EXT, add some fixes to LINK/UNLK Mike Pavone <pavone@retrodev.com> parents: 92 diff changeset	769
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	770 uint8_t m68k_eval_cond(m68k_options * opts, uint8_t cc)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	771 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	772 uint8_t cond = CC_NZ;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	773 switch (cc)
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	774 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	775 case COND_HIGH:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	776 cond = CC_Z;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	777 case COND_LOW_SAME:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	778 flag_to_reg(opts, FLAG_Z, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	779 or_flag_to_reg(opts, FLAG_C, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	780 break;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	781 case COND_CARRY_CLR:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	782 cond = CC_Z;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	783 case COND_CARRY_SET:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	784 check_flag(opts, FLAG_C);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	785 break;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	786 case COND_NOT_EQ:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	787 cond = CC_Z;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	788 case COND_EQ:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	789 check_flag(opts, FLAG_Z);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	790 break;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	791 case COND_OVERF_CLR:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	792 cond = CC_Z;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	793 case COND_OVERF_SET:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	794 check_flag(opts, FLAG_V);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	795 break;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	796 case COND_PLUS:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	797 cond = CC_Z;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	798 case COND_MINUS:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	799 check_flag(opts, FLAG_N);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	800 break;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	801 case COND_GREATER_EQ:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	802 cond = CC_Z;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	803 case COND_LESS:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	804 cmp_flags(opts, FLAG_N, FLAG_V);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	805 break;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	806 case COND_GREATER:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	807 cond = CC_Z;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	808 case COND_LESS_EQ:
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	809 flag_to_reg(opts, FLAG_V, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	810 xor_flag_to_reg(opts, FLAG_N, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	811 or_flag_to_reg(opts, FLAG_Z, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	812 break;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	813 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	814 return cond;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	815 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	816
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	817 void translate_m68k_bcc(m68k_options * opts, m68kinst * inst)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	818 {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	819 code_info *code = &opts->gen.code;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	820 cycles(&opts->gen, 10);//TODO: Adjust this for branch not taken case
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	821 int32_t disp = inst->src.params.immed;
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	822 uint32_t after = inst->address + 2;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	823 if (inst->extra.cond == COND_TRUE) {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	824 jump_m68k_abs(opts, after + disp);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	825 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	826 code_ptr dest_addr = get_native_address(opts->gen.native_code_map, after + disp);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	827 uint8_t cond = m68k_eval_cond(opts, inst->extra.cond);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	828 if (!dest_addr) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	829 opts->gen.deferred = defer_address(opts->gen.deferred, after + disp, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	830 //dummy address to be replaced later, make sure it generates a 4-byte displacement
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	831 dest_addr = code->cur + 256;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	832 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	833 jcc(code, cond, dest_addr);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	834 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	835 }
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	836
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	837 void translate_m68k_scc(m68k_options * opts, m68kinst * inst)
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	838 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	839 code_info *code = &opts->gen.code;
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	840 uint8_t cond = inst->extra.cond;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	841 host_ea dst_op;
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	842 inst->extra.size = OPSIZE_BYTE;
571 c90fc522e7e3 Refactor translat_m68k_src and translate_m68k_dst into a single function Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	843 translate_m68k_op(inst, &dst_op, opts, 1);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	844 if (cond == COND_TRUE \|\| cond == COND_FALSE) {
e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	845 if ((inst->dst.addr_mode == MODE_REG \|\| inst->dst.addr_mode == MODE_AREG) && inst->extra.cond == COND_TRUE) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	846 cycles(&opts->gen, 6);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	847 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	848 cycles(&opts->gen, BUS);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	849 }
e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	850 if (dst_op.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	851 mov_ir(code, cond == COND_TRUE ? 0xFF : 0, dst_op.base, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	852 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	853 mov_irdisp(code, cond == COND_TRUE ? 0xFF : 0, dst_op.base, dst_op.disp, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	854 }
e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	855 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	856 uint8_t cc = m68k_eval_cond(opts, cond);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	857 check_alloc_code(code, 6*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	858 code_ptr true_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	859 jcc(code, cc, code->cur+2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	860 cycles(&opts->gen, BUS);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	861 if (dst_op.mode == MODE_REG_DIRECT) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	862 mov_ir(code, 0, dst_op.base, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	863 } else {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	864 mov_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	865 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	866 code_ptr end_off = code->cur+1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	867 jmp(code, code->cur+2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	868 *true_off = code->cur - (true_off+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	869 cycles(&opts->gen, 6);
179 68af8a56ab7a Fix scc to set reg to 0xFF rather than 1 when the condition is true Mike Pavone <pavone@retrodev.com> parents: 178 diff changeset	870 if (dst_op.mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	871 mov_ir(code, 0xFF, dst_op.base, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	872 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	873 mov_irdisp(code, 0xFF, dst_op.base, dst_op.disp, SZ_B);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	874 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	875 *end_off = code->cur - (end_off+1);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	876 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	877 m68k_save_result(inst, opts);
112 e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	878 }
e3594572fb98 Implement scc (untested) Mike Pavone <pavone@retrodev.com> parents: 110 diff changeset	879
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	880 void translate_m68k_dbcc(m68k_options * opts, m68kinst * inst)
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	881 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	882 code_info *code = &opts->gen.code;
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	883 //best case duration
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	884 cycles(&opts->gen, 10);
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	885 code_ptr skip_loc = NULL;
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	886 //TODO: Check if COND_TRUE technically valid here even though
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	887 //it's basically a slow NOP
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	888 if (inst->extra.cond != COND_FALSE) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	889 uint8_t cond = m68k_eval_cond(opts, inst->extra.cond);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	890 check_alloc_code(code, 6*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	891 skip_loc = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	892 jcc(code, cond, code->cur + 2);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	893 }
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	894 if (opts->dregs[inst->dst.params.regs.pri] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	895 sub_ir(code, 1, opts->dregs[inst->dst.params.regs.pri], SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	896 cmp_ir(code, -1, opts->dregs[inst->dst.params.regs.pri], SZ_W);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	897 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	898 sub_irdisp(code, 1, opts->gen.context_reg, offsetof(m68k_context, dregs) + 4 * inst->dst.params.regs.pri, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	899 cmp_irdisp(code, -1, opts->gen.context_reg, offsetof(m68k_context, dregs) + 4 * inst->dst.params.regs.pri, SZ_W);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	900 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	901 code_ptr loop_end_loc = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	902 jcc(code, CC_Z, code->cur + 2);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	903 uint32_t after = inst->address + 2;
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	904 jump_m68k_abs(opts, after + inst->src.params.immed);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	905 *loop_end_loc = code->cur - (loop_end_loc+1);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	906 if (skip_loc) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	907 cycles(&opts->gen, 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	908 *skip_loc = code->cur - (skip_loc+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	909 cycles(&opts->gen, 2);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	910 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	911 cycles(&opts->gen, 4);
46 f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	912 }
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	913 }
f2aaaf36c875 Add support for dbcc instruction Mike Pavone <pavone@retrodev.com> parents: 19 diff changeset	914
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	915 void translate_m68k_movep(m68k_options * opts, m68kinst * inst)
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	916 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	917 code_info *code = &opts->gen.code;
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	918 int8_t reg;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	919 cycles(&opts->gen, BUS*2);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	920 if (inst->src.addr_mode == MODE_REG) {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	921 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	922 reg = native_reg(&(inst->src), opts);
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	923 if (inst->extra.size == OPSIZE_LONG) {
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	924 if (reg >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	925 mov_rr(code, reg, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	926 shr_ir(code, 24, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	927 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	928 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	929 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	930 mov_rr(code, reg, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	931 shr_ir(code, 16, opts->gen.scratch1, SZ_D);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	932
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	933 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	934 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src))+3, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	935 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	936 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	937 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	938 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src))+2, opts->gen.scratch1, SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	939 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	940 add_ir(code, 2, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	941 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	942 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	943 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	944 add_ir(code, 2, opts->gen.scratch2, SZ_D);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	945 }
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	946 if (reg >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	947 mov_rr(code, reg, opts->gen.scratch1, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	948 shr_ir(code, 8, opts->gen.scratch1, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	949 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	950 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	951 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	952 mov_rr(code, reg, opts->gen.scratch1, SZ_W);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	953 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	954 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src))+1, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	955 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	956 call(code, opts->write_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	957 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	958 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src)), opts->gen.scratch1, SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	959 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	960 add_ir(code, 2, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	961 call(code, opts->write_8);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	962 } else {
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	963 calc_areg_displace(opts, &inst->src, opts->gen.scratch1);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	964 reg = native_reg(&(inst->dst), opts);
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	965 if (inst->extra.size == OPSIZE_LONG) {
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	966 if (reg >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	967 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	968 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	969 shl_ir(code, 24, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	970 mov_rr(code, opts->gen.scratch1, reg, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	971 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	972 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	973 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	974 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	975 shl_ir(code, 16, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	976 or_rr(code, opts->gen.scratch1, reg, SZ_D);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	977 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	978 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	979 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	980 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst))+3, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	981 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	982 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	983 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	984 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	985 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst))+2, SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	986 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	987 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	988 add_ir(code, 2, opts->gen.scratch1, SZ_D);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	989 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	990 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	991 call(code, opts->read_8);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	992 if (reg >= 0) {
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	993
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	994 shl_ir(code, 8, opts->gen.scratch1, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	995 mov_rr(code, opts->gen.scratch1, reg, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	996 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	997 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	998 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	999 mov_rr(code, opts->gen.scratch1, reg, SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	1000 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1001 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst))+1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1002 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1003 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1004 call(code, opts->read_8);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1005 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst)), SZ_B);
172 c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	1006 }
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	1007 }
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	1008 }
c61507f897e4 Implement movep Mike Pavone <pavone@retrodev.com> parents: 171 diff changeset	1009
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1010 typedef void (shift_ir_t)(code_info code, uint8_t val, uint8_t dst, uint8_t size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1011 typedef void (shift_irdisp_t)(code_info code, uint8_t val, uint8_t dst_base, int32_t disp, uint8_t size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1012 typedef void (shift_clr_t)(code_info code, uint8_t dst, uint8_t size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1013 typedef void (shift_clrdisp_t)(code_info code, uint8_t dst_base, int32_t disp, uint8_t size);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1014
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1015 void translate_shift(m68k_options * opts, m68kinst * inst, host_ea src_op, host_ea dst_op, shift_ir_t shift_ir, shift_irdisp_t shift_irdisp, shift_clr_t shift_clr, shift_clrdisp_t shift_clrdisp, shift_ir_t special, shift_irdisp_t special_disp)
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1016 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1017 code_info *code = &opts->gen.code;
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	1018 code_ptr end_off = NULL;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	1019 code_ptr nz_off = NULL;
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	1020 code_ptr z_off = NULL;
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1021 if (inst->src.addr_mode == MODE_UNUSED) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1022 cycles(&opts->gen, BUS);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1023 //Memory shift
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1024 shift_ir(code, 1, dst_op->base, SZ_W);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1025 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1026 cycles(&opts->gen, inst->extra.size == OPSIZE_LONG ? 8 : 6);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1027 if (src_op->mode == MODE_IMMED) {
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1028 if (src_op->disp != 1 && inst->op == M68K_ASL) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1029 set_flag(opts, 0, FLAG_V);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1030 for (int i = 0; i < src_op->disp; i++) {
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1031 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1032 shift_ir(code, 1, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1033 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1034 shift_irdisp(code, 1, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1035 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1036 check_alloc_code(code, 2*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1037 code_ptr after_flag_set = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1038 jcc(code, CC_NO, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1039 set_flag(opts, 1, FLAG_V);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1040 *after_flag_set = code->cur - (after_flag_set+1);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1041 }
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1042 } else {
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1043 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1044 shift_ir(code, src_op->disp, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1045 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1046 shift_irdisp(code, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1047 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1048 set_flag_cond(opts, CC_O, FLAG_V);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1049 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1050 } else {
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1051 if (src_op->base != RCX) {
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1052 if (src_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1053 mov_rr(code, src_op->base, RCX, SZ_B);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1054 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1055 mov_rdispr(code, src_op->base, src_op->disp, RCX, SZ_B);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1056 }
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	1057
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1058 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1059 and_ir(code, 63, RCX, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1060 check_alloc_code(code, 7*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1061 nz_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1062 jcc(code, CC_NZ, code->cur + 2);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1063 //Flag behavior for shift count of 0 is different for x86 than 68K
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1064 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1065 cmp_ir(code, 0, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1066 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1067 cmp_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1068 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1069 set_flag_cond(opts, CC_Z, FLAG_Z);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1070 set_flag_cond(opts, CC_S, FLAG_N);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1071 set_flag(opts, 0, FLAG_C);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1072 //For other instructions, this flag will be set below
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1073 if (inst->op == M68K_ASL) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1074 set_flag(opts, 0, FLAG_V);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1075 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1076 z_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1077 jmp(code, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1078 *nz_off = code->cur - (nz_off + 1);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1079 //add 2 cycles for every bit shifted
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1080 add_rr(code, RCX, CYCLES, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1081 add_rr(code, RCX, CYCLES, SZ_D);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1082 if (inst->op == M68K_ASL) {
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1083 //ASL has Overflow flag behavior that depends on all of the bits shifted through the MSB
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1084 //Easiest way to deal with this is to shift one bit at a time
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1085 set_flag(opts, 0, FLAG_V);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1086 check_alloc_code(code, 5*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1087 code_ptr loop_start = code->cur;
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1088 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1089 shift_ir(code, 1, dst_op->base, inst->extra.size);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1090 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1091 shift_irdisp(code, 1, dst_op->base, dst_op->disp, inst->extra.size);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1092 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1093 code_ptr after_flag_set = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1094 jcc(code, CC_NO, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1095 set_flag(opts, 1, FLAG_V);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1096 *after_flag_set = code->cur - (after_flag_set+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1097 loop(code, loop_start);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1098 } else {
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1099 //x86 shifts modulo 32 for operand sizes less than 64-bits
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1100 //but M68K shifts modulo 64, so we need to check for large shifts here
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1101 cmp_ir(code, 32, RCX, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1102 check_alloc_code(code, 14*MAX_INST_LEN);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1103 code_ptr norm_shift_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1104 jcc(code, CC_L, code->cur + 2);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1105 if (special) {
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	1106 code_ptr after_flag_set = NULL;
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1107 if (inst->extra.size == OPSIZE_LONG) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1108 code_ptr neq_32_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1109 jcc(code, CC_NZ, code->cur + 2);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	1110
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1111 //set the carry bit to the lsb
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1112 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1113 special(code, 1, dst_op->base, SZ_D);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1114 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1115 special_disp(code, 1, dst_op->base, dst_op->disp, SZ_D);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1116 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1117 set_flag_cond(opts, CC_C, FLAG_C);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1118 after_flag_set = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1119 jmp(code, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1120 *neq_32_off = code->cur - (neq_32_off+1);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1121 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1122 set_flag(opts, 0, FLAG_C);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1123 if (after_flag_set) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1124 *after_flag_set = code->cur - (after_flag_set+1);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1125 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1126 set_flag(opts, 1, FLAG_Z);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1127 set_flag(opts, 0, FLAG_N);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1128 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1129 xor_rr(code, dst_op->base, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1130 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1131 mov_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1132 }
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1133 } else {
c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1134 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1135 shift_ir(code, 31, dst_op->base, inst->extra.size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1136 shift_ir(code, 1, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1137 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1138 shift_irdisp(code, 31, dst_op->base, dst_op->disp, inst->extra.size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1139 shift_irdisp(code, 1, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1140 }
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	1141
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1142 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1143 end_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1144 jmp(code, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1145 *norm_shift_off = code->cur - (norm_shift_off+1);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1146 if (dst_op->mode == MODE_REG_DIRECT) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1147 shift_clr(code, dst_op->base, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1148 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1149 shift_clrdisp(code, dst_op->base, dst_op->disp, inst->extra.size);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1150 }
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1151 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1152 }
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	1153
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1154 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1155 if (!special && end_off) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1156 *end_off = code->cur - (end_off + 1);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1157 }
583 819921b76b4b Use update_flags instead of individual set_flag calls in a few places Michael Pavone <pavone@retrodev.com> parents: 582 diff changeset	1158 update_flags(opts, C\|Z\|N);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1159 if (special && end_off) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1160 *end_off = code->cur - (end_off + 1);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1161 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1162 //set X flag to same as C flag
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1163 if (opts->flag_regs[FLAG_C] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1164 flag_to_flag(opts, FLAG_C, FLAG_X);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1165 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1166 set_flag_cond(opts, CC_C, FLAG_X);
546 90aca661542b Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done. Michael Pavone <pavone@retrodev.com> parents: 545 diff changeset	1167 }
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1168 if (z_off) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1169 *z_off = code->cur - (z_off + 1);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1170 }
219 8d3c16071559 Fix overflow flag behavior for lsl/lsr/asr Mike Pavone <pavone@retrodev.com> parents: 218 diff changeset	1171 if (inst->op != M68K_ASL) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1172 set_flag(opts, 0, FLAG_V);
207 c82f65a87a53 Fix overflow flag on ASL Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	1173 }
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1174 if (inst->src.addr_mode == MODE_UNUSED) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1175 m68k_save_result(inst, opts);
51 937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1176 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1177 }
937b47c9b79b Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding. Mike Pavone <pavone@retrodev.com> parents: 49 diff changeset	1178
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1179 void op_ir(code_info code, m68kinst inst, int32_t val, uint8_t dst, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1180 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1181 switch (inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1182 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1183 case M68K_ADD: add_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1184 case M68K_ADDX: adc_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1185 case M68K_AND: and_ir(code, val, dst, size); break;
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1186 case M68K_BTST: bt_ir(code, val, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1187 case M68K_BSET: bts_ir(code, val, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1188 case M68K_BCLR: btr_ir(code, val, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1189 case M68K_BCHG: btc_ir(code, val, dst, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1190 case M68K_CMP: cmp_ir(code, val, dst, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1191 case M68K_EOR: xor_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1192 case M68K_OR: or_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1193 case M68K_ROL: rol_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1194 case M68K_ROR: ror_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1195 case M68K_ROXL: rcl_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1196 case M68K_ROXR: rcr_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1197 case M68K_SUB: sub_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1198 case M68K_SUBX: sbb_ir(code, val, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1199 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1200 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1201
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1202 void op_irdisp(code_info code, m68kinst inst, int32_t val, uint8_t dst, int32_t disp, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1203 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1204 switch (inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1205 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1206 case M68K_ADD: add_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1207 case M68K_ADDX: adc_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1208 case M68K_AND: and_irdisp(code, val, dst, disp, size); break;
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1209 case M68K_BTST: bt_irdisp(code, val, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1210 case M68K_BSET: bts_irdisp(code, val, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1211 case M68K_BCLR: btr_irdisp(code, val, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1212 case M68K_BCHG: btc_irdisp(code, val, dst, disp, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1213 case M68K_CMP: cmp_irdisp(code, val, dst, disp, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1214 case M68K_EOR: xor_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1215 case M68K_OR: or_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1216 case M68K_ROL: rol_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1217 case M68K_ROR: ror_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1218 case M68K_ROXL: rcl_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1219 case M68K_ROXR: rcr_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1220 case M68K_SUB: sub_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1221 case M68K_SUBX: sbb_irdisp(code, val, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1222 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1223 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1224
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1225 void op_rr(code_info code, m68kinst inst, uint8_t src, uint8_t dst, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1226 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1227 switch (inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1228 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1229 case M68K_ADD: add_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1230 case M68K_ADDX: adc_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1231 case M68K_AND: and_rr(code, src, dst, size); break;
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1232 case M68K_BTST: bt_rr(code, src, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1233 case M68K_BSET: bts_rr(code, src, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1234 case M68K_BCLR: btr_rr(code, src, dst, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1235 case M68K_BCHG: btc_rr(code, src, dst, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1236 case M68K_CMP: cmp_rr(code, src, dst, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1237 case M68K_EOR: xor_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1238 case M68K_OR: or_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1239 case M68K_SUB: sub_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1240 case M68K_SUBX: sbb_rr(code, src, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1241 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1242 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1243
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1244 void op_rrdisp(code_info code, m68kinst inst, uint8_t src, uint8_t dst, int32_t disp, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1245 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1246 switch (inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1247 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1248 case M68K_ADD: add_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1249 case M68K_ADDX: adc_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1250 case M68K_AND: and_rrdisp(code, src, dst, disp, size); break;
581 9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1251 case M68K_BTST: bt_rrdisp(code, src, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1252 case M68K_BSET: bts_rrdisp(code, src, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1253 case M68K_BCLR: btr_rrdisp(code, src, dst, disp, size); break;
9f40aa5243c2 Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit. Michael Pavone <pavone@retrodev.com> parents: 580 diff changeset	1254 case M68K_BCHG: btc_rrdisp(code, src, dst, disp, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1255 case M68K_CMP: cmp_rrdisp(code, src, dst, disp, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1256 case M68K_EOR: xor_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1257 case M68K_OR: or_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1258 case M68K_SUB: sub_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1259 case M68K_SUBX: sbb_rrdisp(code, src, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1260 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1261 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1262
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1263 void op_rdispr(code_info code, m68kinst inst, uint8_t src, int32_t disp, uint8_t dst, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1264 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1265 switch (inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1266 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1267 case M68K_ADD: add_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1268 case M68K_ADDX: adc_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1269 case M68K_AND: and_rdispr(code, src, disp, dst, size); break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1270 case M68K_CMP: cmp_rdispr(code, src, disp, dst, size); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1271 case M68K_EOR: xor_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1272 case M68K_OR: or_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1273 case M68K_SUB: sub_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1274 case M68K_SUBX: sbb_rdispr(code, src, disp, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1275 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1276 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1277
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1278 void translate_m68k_arith(m68k_options opts, m68kinst inst, uint32_t flag_mask, host_ea src_op, host_ea dst_op)
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1279 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1280 code_info *code = &opts->gen.code;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1281 cycles(&opts->gen, BUS);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1282 if (inst->op == M68K_ADDX \|\| inst->op == M68K_SUBX) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1283 flag_to_carry(opts, FLAG_X);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1284 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1285 uint8_t size = inst->dst.addr_mode == MODE_AREG ? OPSIZE_LONG : inst->extra.size;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1286 if (src_op->mode == MODE_REG_DIRECT) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1287 if (dst_op->mode == MODE_REG_DIRECT) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1288 op_rr(code, inst, src_op->base, dst_op->base, size);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1289 } else {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1290 op_rrdisp(code, inst, src_op->base, dst_op->base, dst_op->disp, size);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1291 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1292 } else if (src_op->mode == MODE_REG_DISPLACE8) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1293 op_rdispr(code, inst, src_op->base, src_op->disp, dst_op->base, size);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1294 } else {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1295 if (dst_op->mode == MODE_REG_DIRECT) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1296 op_ir(code, inst, src_op->disp, dst_op->base, size);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1297 } else {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1298 op_irdisp(code, inst, src_op->disp, dst_op->base, dst_op->disp, size);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1299 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1300 }
580 5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1301 if (inst->dst.addr_mode != MODE_AREG \|\| inst->op == M68K_CMP) {
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1302 update_flags(opts, flag_mask);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1303 if (inst->op == M68K_ADDX \|\| inst->op == M68K_SUBX) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1304 check_alloc_code(code, 2*MAX_INST_LEN);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1305 code_ptr after_flag_set = code->cur + 1;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1306 jcc(code, CC_Z, code->cur + 2);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1307 set_flag(opts, 0, FLAG_Z);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1308 *after_flag_set = code->cur - (after_flag_set+1);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1309 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1310 }
580 5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1311 if (inst->op != M68K_CMP) {
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1312 m68k_save_result(inst, opts);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1313 }
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1314 }
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1315
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1316 void translate_m68k_cmp(m68k_options * opts, m68kinst * inst)
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1317 {
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1318 code_info *code = &opts->gen.code;
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1319 uint8_t size = inst->extra.size;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1320 host_ea src_op, dst_op;
580 5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1321 translate_m68k_op(inst, &src_op, opts, 0);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1322 if (inst->dst.addr_mode == MODE_AREG_POSTINC) {
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1323 push_r(code, opts->gen.scratch1);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1324 translate_m68k_op(inst, &dst_op, opts, 1);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1325 pop_r(code, opts->gen.scratch2);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1326 src_op.base = opts->gen.scratch2;
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1327 } else {
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1328 translate_m68k_op(inst, &dst_op, opts, 1);
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1329 if (inst->dst.addr_mode == MODE_AREG && size == OPSIZE_WORD) {
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1330 size = OPSIZE_LONG;
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1331 }
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1332 }
5157bc966c1a Refactor translate_m68k_cmp to use translate_m68k_arith Michael Pavone <pavone@retrodev.com> parents: 579 diff changeset	1333 translate_m68k_arith(opts, inst, N\|Z\|V\|C, &src_op, &dst_op);
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1334 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1335
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1336 void op_r(code_info code, m68kinst inst, uint8_t dst, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1337 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1338 switch(inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1339 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1340 case M68K_NEG: neg_r(code, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1341 case M68K_NOT: not_r(code, dst, size); cmp_ir(code, 0, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1342 case M68K_ROL: rol_clr(code, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1343 case M68K_ROR: ror_clr(code, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1344 case M68K_ROXL: rcl_clr(code, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1345 case M68K_ROXR: rcr_clr(code, dst, size); break;
578 ec1365fb2954 Use translate_m68k_unary for SWAP in 68K core Michael Pavone <pavone@retrodev.com> parents: 577 diff changeset	1346 case M68K_SWAP: rol_ir(code, 16, dst, SZ_D); cmp_ir(code, 0, dst, SZ_D); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1347 case M68K_TST: cmp_ir(code, 0, dst, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1348 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1349 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1350
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1351 void op_rdisp(code_info code, m68kinst inst, uint8_t dst, int32_t disp, uint8_t size)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1352 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1353 switch(inst->op)
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1354 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1355 case M68K_NEG: neg_rdisp(code, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1356 case M68K_NOT: not_rdisp(code, dst, disp, size); cmp_irdisp(code, 0, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1357 case M68K_ROL: rol_clrdisp(code, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1358 case M68K_ROR: ror_clrdisp(code, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1359 case M68K_ROXL: rcl_clrdisp(code, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1360 case M68K_ROXR: rcr_clrdisp(code, dst, disp, size); break;
578 ec1365fb2954 Use translate_m68k_unary for SWAP in 68K core Michael Pavone <pavone@retrodev.com> parents: 577 diff changeset	1361 case M68K_SWAP: rol_irdisp(code, 16, dst, disp, SZ_D); cmp_irdisp(code, 0, dst, disp, SZ_D); break;
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1362 case M68K_TST: cmp_irdisp(code, 0, dst, disp, size); break;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1363 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1364 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1365
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1366 void translate_m68k_unary(m68k_options opts, m68kinst inst, uint32_t flag_mask, host_ea *dst_op)
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1367 {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1368 code_info *code = &opts->gen.code;
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1369 cycles(&opts->gen, BUS);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1370 if (dst_op->mode == MODE_REG_DIRECT) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1371 op_r(code, inst, dst_op->base, inst->extra.size);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1372 } else {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1373 op_rdisp(code, inst, dst_op->base, dst_op->disp, inst->extra.size);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1374 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1375 update_flags(opts, flag_mask);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1376 m68k_save_result(inst, opts);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1377 }
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1378
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1379 void translate_m68k_invalid(m68k_options opts, m68kinst inst)
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	1380 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1381 code_info *code = &opts->gen.code;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1382 if (inst->src.params.immed == 0x7100) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1383 retn(code);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1384 return;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1385 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1386 mov_ir(code, inst->address, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1387 call(code, (code_ptr)m68k_invalid);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1388 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1389
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1390 void translate_m68k_abcd_sbcd(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1391 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1392 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1393 if (src_op->base != opts->gen.scratch2) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1394 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1395 mov_rr(code, src_op->base, opts->gen.scratch2, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1396 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1397 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_B);
208 3457dc6fd558 Tweaks to make blastem compatible with m68k-tester Mike Pavone <pavone@retrodev.com> parents: 207 diff changeset	1398 }
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	1399 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1400 if (dst_op->base != opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1401 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1402 mov_rr(code, dst_op->base, opts->gen.scratch1, SZ_B);
579 0031cd308a31 Combine the implementation of ABCD and SBCD in the 68K core Michael Pavone <pavone@retrodev.com> parents: 578 diff changeset	1403 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1404 mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch1, SZ_B);
579 0031cd308a31 Combine the implementation of ABCD and SBCD in the 68K core Michael Pavone <pavone@retrodev.com> parents: 578 diff changeset	1405 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1406 }
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1407 uint8_t other_reg;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1408 //WARNING: This may need adjustment if register assignments change
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1409 if (opts->gen.scratch2 > RBX) {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1410 other_reg = RAX;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1411 xchg_rr(code, opts->gen.scratch2, RAX, SZ_D);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1412 } else {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1413 other_reg = opts->gen.scratch2;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1414 }
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1415 mov_rr(code, opts->gen.scratch1, opts->gen.scratch1 + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1416 mov_rr(code, other_reg, other_reg + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1417 and_ir(code, 0xF0, opts->gen.scratch1, SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1418 and_ir(code, 0xF0, other_reg, SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1419 and_ir(code, 0xF, opts->gen.scratch1 + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1420 and_ir(code, 0xF, other_reg + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1421 //do op on low nibble
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1422 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1423 if (inst->op == M68K_ABCD) {
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1424 adc_rr(code, other_reg + (AH-RAX), opts->gen.scratch1 + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1425 } else {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1426 sbb_rr(code, other_reg + (AH-RAX), opts->gen.scratch1 + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1427 }
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1428 cmp_ir(code, 0xA, opts->gen.scratch1 + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1429 code_ptr no_adjust = code->cur+1;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1430 //add correction factor if necessary
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1431 jcc(code, CC_B, no_adjust);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1432 if (inst->op == M68K_ABCD) {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1433 add_ir(code, 6, opts->gen.scratch1 + (AH-RAX), SZ_B);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1434 } else {
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1435 sub_ir(code, 6, opts->gen.scratch1 + (AH-RAX), SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1436 }
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1437 *no_adjust = code->cur - (no_adjust+1);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1438 //add low nibble result to one of the high nibble operands
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1439 add_rr(code, opts->gen.scratch1 + (AH-RAX), opts->gen.scratch1, SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1440 if (inst->op == M68K_ABCD) {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1441 add_rr(code, other_reg, opts->gen.scratch1, SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1442 } else {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1443 sub_rr(code, other_reg, opts->gen.scratch1, SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1444 }
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1445 if (opts->gen.scratch2 > RBX) {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1446 mov_rr(code, opts->gen.scratch2, RAX, SZ_D);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1447 }
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1448 set_flag(opts, 0, FLAG_C);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1449 set_flag(opts, 0, FLAG_V);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1450 code_ptr def_adjust = code->cur+1;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1451 jcc(code, CC_C, def_adjust);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1452 cmp_ir(code, 0xA0, opts->gen.scratch1, SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1453 no_adjust = code->cur+1;
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1454 jcc(code, CC_B, no_adjust);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1455 *def_adjust = code->cur - (def_adjust + 1);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1456 set_flag(opts, 1, FLAG_C);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1457 if (inst->op == M68K_ABCD) {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1458 add_ir(code, 0x60, opts->gen.scratch1, SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1459 } else {
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1460 sub_ir(code, 0x60, opts->gen.scratch1, SZ_B);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1461 }
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1462 //V flag is set based on the result of the addition of the
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1463 //result and the correction factor
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1464 set_flag_cond(opts, CC_O, FLAG_V);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1465 *no_adjust = code->cur - (no_adjust+1);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1466 flag_to_flag(opts, FLAG_C, FLAG_X);
5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1467
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1468 cmp_ir(code, 0, opts->gen.scratch1, SZ_B);
612 5a6ff0d76032 Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process Michael Pavone <pavone@retrodev.com> parents: 611 diff changeset	1469 set_flag_cond(opts, CC_S, FLAG_N);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1470 jcc(code, CC_Z, code->cur + 4);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1471 set_flag(opts, 0, FLAG_Z);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1472 if (dst_op->base != opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1473 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1474 mov_rr(code, opts->gen.scratch1, dst_op->base, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1475 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1476 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, SZ_B);
73 8da611e69b32 Implement a couple of supervisor instructions Mike Pavone <pavone@retrodev.com> parents: 71 diff changeset	1477 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1478 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1479 m68k_save_result(inst, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1480 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1481
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1482 void translate_m68k_sl(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1483 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1484 translate_shift(opts, inst, src_op, dst_op, shl_ir, shl_irdisp, shl_clr, shl_clrdisp, shr_ir, shr_irdisp);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1485 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1486
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1487 void translate_m68k_asr(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1488 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1489 translate_shift(opts, inst, src_op, dst_op, sar_ir, sar_irdisp, sar_clr, sar_clrdisp, NULL, NULL);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1490 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1491
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1492 void translate_m68k_lsr(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1493 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1494 translate_shift(opts, inst, src_op, dst_op, shr_ir, shr_irdisp, shr_clr, shr_clrdisp, shl_ir, shl_irdisp);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1495 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1496
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1497 void translate_m68k_bit(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1498 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1499 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1500 cycles(&opts->gen, inst->extra.size == OPSIZE_BYTE ? 4 : (
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1501 inst->op == M68K_BTST ? 6 : (inst->op == M68K_BCLR ? 10 : 8))
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1502 );
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1503 if (src_op->mode == MODE_IMMED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1504 if (inst->extra.size == OPSIZE_BYTE) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1505 src_op->disp &= 0x7;
73 8da611e69b32 Implement a couple of supervisor instructions Mike Pavone <pavone@retrodev.com> parents: 71 diff changeset	1506 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1507 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1508 op_ir(code, inst, src_op->disp, dst_op->base, inst->extra.size);
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	1509 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1510 op_irdisp(code, inst, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1511 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1512 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1513 if (src_op->mode == MODE_REG_DISPLACE8 \|\| (inst->dst.addr_mode != MODE_REG && src_op->base != opts->gen.scratch1 && src_op->base != opts->gen.scratch2)) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1514 if (dst_op->base == opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1515 push_r(code, opts->gen.scratch2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1516 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1517 mov_rr(code, src_op->base, opts->gen.scratch2, SZ_B);
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	1518 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1519 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_B);
154 4791c0204410 Small fix for bit instructions Mike Pavone <pavone@retrodev.com> parents: 152 diff changeset	1520 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1521 src_op->base = opts->gen.scratch2;
61 918468c623e9 Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM. Mike Pavone <pavone@retrodev.com> parents: 59 diff changeset	1522 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1523 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1524 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1525 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1526 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1527 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1528 src_op->base = opts->gen.scratch1;
226 28a6697e847b Implement CHK instruction (not fully tested). Mike Pavone <pavone@retrodev.com> parents: 225 diff changeset	1529 }
28a6697e847b Implement CHK instruction (not fully tested). Mike Pavone <pavone@retrodev.com> parents: 225 diff changeset	1530 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1531 uint8_t size = inst->extra.size;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1532 if (dst_op->mode == MODE_REG_DISPLACE8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1533 if (src_op->base != opts->gen.scratch1 && src_op->base != opts->gen.scratch2) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1534 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1535 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1536 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1537 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1538 src_op->mode = MODE_REG_DIRECT;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1539 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1540 src_op->base = opts->gen.scratch1;
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1541 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1542 //b### with register destination is modulo 32
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1543 //x86 with a memory destination isn't modulo anything
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1544 //so use an and here to force the value to be modulo 32
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1545 and_ir(code, 31, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1546 } else if(inst->dst.addr_mode != MODE_REG) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1547 //b### with memory destination is modulo 8
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1548 //x86-64 doesn't support 8-bit bit operations
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1549 //so we fake it by forcing the bit number to be modulo 8
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1550 and_ir(code, 7, src_op->base, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1551 size = SZ_D;
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1552 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1553 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1554 op_rr(code, inst, src_op->base, dst_op->base, size);
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	1555 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1556 op_rrdisp(code, inst, src_op->base, dst_op->base, dst_op->disp, size);
181 3b4ef459aa8d Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions Mike Pavone <pavone@retrodev.com> parents: 179 diff changeset	1557 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1558 if (src_op->base == opts->gen.scratch2) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1559 pop_r(code, opts->gen.scratch2);
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1560 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1561 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1562 //x86 sets the carry flag to the value of the bit tested
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1563 //68K sets the zero flag to the complement of the bit tested
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1564 set_flag_cond(opts, CC_NC, FLAG_Z);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1565 if (inst->op != M68K_BTST) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1566 m68k_save_result(inst, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1567 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1568 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1569
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1570 void translate_m68k_chk(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1571 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1572 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1573 cycles(&opts->gen, 6);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1574 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1575 cmp_ir(code, 0, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1576 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1577 cmp_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1578 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1579 uint32_t isize;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1580 switch(inst->src.addr_mode)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1581 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1582 case MODE_AREG_DISPLACE:
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1583 case MODE_AREG_INDEX_DISP8:
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1584 case MODE_ABSOLUTE_SHORT:
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1585 case MODE_PC_INDEX_DISP8:
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1586 case MODE_PC_DISPLACE:
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1587 case MODE_IMMEDIATE:
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1588 isize = 4;
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1589 break;
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1590 case MODE_ABSOLUTE:
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1591 isize = 6;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1592 break;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1593 default:
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1594 isize = 2;
228 1ed81ef2a3a2 Fix overflow detection in divs. Fix negative immediate source for divs Mike Pavone <pavone@retrodev.com> parents: 226 diff changeset	1595 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1596 //make sure we won't start a new chunk in the middle of these branches
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1597 check_alloc_code(code, MAX_INST_LEN * 11);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1598 code_ptr passed = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1599 jcc(code, CC_GE, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1600 set_flag(opts, 1, FLAG_N);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1601 mov_ir(code, VECTOR_CHK, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1602 mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1603 jmp(code, opts->trap);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1604 *passed = code->cur - (passed+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1605 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1606 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1607 cmp_rr(code, src_op->base, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1608 } else if(src_op->mode == MODE_REG_DISPLACE8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1609 cmp_rdispr(code, src_op->base, src_op->disp, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1610 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1611 cmp_ir(code, src_op->disp, dst_op->base, inst->extra.size);
171 f03db3db48fb Implement EORI CCR/SR Mike Pavone <pavone@retrodev.com> parents: 170 diff changeset	1612 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1613 } else if(dst_op->mode == MODE_REG_DISPLACE8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1614 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1615 cmp_rrdisp(code, src_op->base, dst_op->base, dst_op->disp, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1616 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1617 cmp_irdisp(code, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size);
171 f03db3db48fb Implement EORI CCR/SR Mike Pavone <pavone@retrodev.com> parents: 170 diff changeset	1618 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1619 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1620 passed = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1621 jcc(code, CC_LE, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1622 set_flag(opts, 0, FLAG_N);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1623 mov_ir(code, VECTOR_CHK, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1624 mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1625 jmp(code, opts->trap);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1626 *passed = code->cur - (passed+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1627 cycles(&opts->gen, 4);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1628 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1629
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1630 void translate_m68k_div(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1631 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1632 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1633 check_alloc_code(code, MAX_NATIVE_SIZE);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1634 //TODO: cycle exact division
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1635 cycles(&opts->gen, inst->op == M68K_DIVS ? 158 : 140);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1636 set_flag(opts, 0, FLAG_C);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1637 push_r(code, RDX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1638 push_r(code, RAX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1639 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1640 mov_rr(code, dst_op->base, RAX, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1641 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1642 mov_rdispr(code, dst_op->base, dst_op->disp, RAX, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1643 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1644 if (src_op->mode == MODE_IMMED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1645 mov_ir(code, (src_op->disp & 0x8000) && inst->op == M68K_DIVS ? src_op->disp \| 0xFFFF0000 : src_op->disp, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1646 } else if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1647 if (inst->op == M68K_DIVS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1648 movsx_rr(code, src_op->base, opts->gen.scratch2, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1649 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1650 movzx_rr(code, src_op->base, opts->gen.scratch2, SZ_W, SZ_D);
171 f03db3db48fb Implement EORI CCR/SR Mike Pavone <pavone@retrodev.com> parents: 170 diff changeset	1651 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1652 } else if (src_op->mode == MODE_REG_DISPLACE8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1653 if (inst->op == M68K_DIVS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1654 movsx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_W, SZ_D);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	1655 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1656 movzx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_W, SZ_D);
71 f80fa1776507 Implement more instructions and address modes Mike Pavone <pavone@retrodev.com> parents: 70 diff changeset	1657 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1658 }
611 744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1659 uint32_t isize = 2;
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1660 switch(inst->src.addr_mode)
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1661 {
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1662 case MODE_AREG_DISPLACE:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1663 case MODE_AREG_INDEX_DISP8:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1664 case MODE_ABSOLUTE_SHORT:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1665 case MODE_PC_INDEX_DISP8:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1666 case MODE_IMMEDIATE:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1667 isize = 4;
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1668 break;
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1669 case MODE_ABSOLUTE:
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1670 isize = 6;
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1671 break;
744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1672 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1673 cmp_ir(code, 0, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1674 check_alloc_code(code, 6*MAX_INST_LEN);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1675 code_ptr not_zero = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1676 jcc(code, CC_NZ, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1677 pop_r(code, RAX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1678 pop_r(code, RDX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1679 mov_ir(code, VECTOR_INT_DIV_ZERO, opts->gen.scratch2, SZ_D);
611 744b305965f7 Fix divide by zero exception return address when div instruction is bigger than 1 word Michael Pavone <pavone@retrodev.com> parents: 610 diff changeset	1680 mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1681 jmp(code, opts->trap);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1682 *not_zero = code->cur - (not_zero+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1683 if (inst->op == M68K_DIVS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1684 cdq(code);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1685 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1686 xor_rr(code, RDX, RDX, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1687 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1688 if (inst->op == M68K_DIVS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1689 idiv_r(code, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1690 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1691 div_r(code, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1692 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1693 code_ptr skip_sec_check, norm_off;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1694 if (inst->op == M68K_DIVS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1695 cmp_ir(code, 0x8000, RAX, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1696 skip_sec_check = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1697 jcc(code, CC_GE, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1698 cmp_ir(code, -0x8000, RAX, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1699 norm_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1700 jcc(code, CC_L, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1701 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1702 cmp_ir(code, 0x10000, RAX, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1703 norm_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1704 jcc(code, CC_NC, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1705 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1706 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1707 mov_rr(code, RDX, dst_op->base, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1708 shl_ir(code, 16, dst_op->base, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1709 mov_rr(code, RAX, dst_op->base, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1710 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1711 mov_rrdisp(code, RDX, dst_op->base, dst_op->disp, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1712 shl_irdisp(code, 16, dst_op->base, dst_op->disp, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1713 mov_rrdisp(code, RAX, dst_op->base, dst_op->disp, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1714 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1715 cmp_ir(code, 0, RAX, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1716 pop_r(code, RAX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1717 pop_r(code, RDX);
583 819921b76b4b Use update_flags instead of individual set_flag calls in a few places Michael Pavone <pavone@retrodev.com> parents: 582 diff changeset	1718 update_flags(opts, V0\|Z\|N);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1719 code_ptr end_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1720 jmp(code, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1721 *norm_off = code->cur - (norm_off + 1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1722 if (inst->op == M68K_DIVS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1723 *skip_sec_check = code->cur - (skip_sec_check+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1724 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1725 pop_r(code, RAX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1726 pop_r(code, RDX);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1727 set_flag(opts, 1, FLAG_V);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1728 *end_off = code->cur - (end_off + 1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1729 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1730
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1731 void translate_m68k_exg(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1732 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1733 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1734 cycles(&opts->gen, 6);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1735 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1736 mov_rr(code, dst_op->base, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1737 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1738 mov_rr(code, src_op->base, dst_op->base, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1739 mov_rr(code, opts->gen.scratch2, src_op->base, SZ_D);
73 8da611e69b32 Implement a couple of supervisor instructions Mike Pavone <pavone@retrodev.com> parents: 71 diff changeset	1740 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1741 mov_rdispr(code, src_op->base, src_op->disp, dst_op->base, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1742 mov_rrdisp(code, opts->gen.scratch2, src_op->base, src_op->disp, SZ_D);
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1743 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1744 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1745 mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1746 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1747 mov_rrdisp(code, src_op->base, dst_op->base, dst_op->disp, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1748 mov_rr(code, opts->gen.scratch2, src_op->base, SZ_D);
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1749 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1750 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1751 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1752 mov_rrdisp(code, opts->gen.scratch2, src_op->base, src_op->disp, SZ_D);
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1753 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1754 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1755 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1756
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1757 void translate_m68k_mul(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1758 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1759 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1760 cycles(&opts->gen, 70); //TODO: Calculate the actual value based on the value of the <ea> parameter
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1761 if (src_op->mode == MODE_IMMED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1762 mov_ir(code, inst->op == M68K_MULU ? (src_op->disp & 0xFFFF) : ((src_op->disp & 0x8000) ? src_op->disp \| 0xFFFF0000 : src_op->disp), opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1763 } else if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1764 if (inst->op == M68K_MULS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1765 movsx_rr(code, src_op->base, opts->gen.scratch1, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1766 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1767 movzx_rr(code, src_op->base, opts->gen.scratch1, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1768 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1769 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1770 if (inst->op == M68K_MULS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1771 movsx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1772 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1773 movzx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_W, SZ_D);
151 6b593ea0ed90 Implement MULU/MULS and DIVU/DIVS Mike Pavone <pavone@retrodev.com> parents: 150 diff changeset	1774 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1775 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1776 uint8_t dst_reg;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1777 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1778 dst_reg = dst_op->base;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1779 if (inst->op == M68K_MULS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1780 movsx_rr(code, dst_reg, dst_reg, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1781 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1782 movzx_rr(code, dst_reg, dst_reg, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1783 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1784 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1785 dst_reg = opts->gen.scratch2;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1786 if (inst->op == M68K_MULS) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1787 movsx_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1788 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1789 movzx_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_W, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1790 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1791 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1792 imul_rr(code, opts->gen.scratch1, dst_reg, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1793 if (dst_op->mode == MODE_REG_DISPLACE8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1794 mov_rrdisp(code, dst_reg, dst_op->base, dst_op->disp, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1795 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1796 cmp_ir(code, 0, dst_reg, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1797 update_flags(opts, N\|Z\|V0\|C0);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1798 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1799
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1800 void translate_m68k_negx(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1801 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1802 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1803 cycles(&opts->gen, BUS);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1804 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1805 if (dst_op->base == opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1806 push_r(code, opts->gen.scratch2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1807 xor_rr(code, opts->gen.scratch2, opts->gen.scratch2, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1808 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1809 sbb_rr(code, dst_op->base, opts->gen.scratch2, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1810 mov_rr(code, opts->gen.scratch2, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1811 pop_r(code, opts->gen.scratch2);
173 47b2796fb277 Implement negx Mike Pavone <pavone@retrodev.com> parents: 172 diff changeset	1812 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1813 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, inst->extra.size);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1814 flag_to_carry(opts, FLAG_X);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1815 sbb_rr(code, dst_op->base, opts->gen.scratch1, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1816 mov_rr(code, opts->gen.scratch1, dst_op->base, inst->extra.size);
106 1eba2b9455f8 Implement ORI to CCR/SR Mike Pavone <pavone@retrodev.com> parents: 105 diff changeset	1817 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1818 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1819 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1820 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1821 sbb_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch1, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1822 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1823 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1824 set_flag_cond(opts, CC_C, FLAG_C);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1825 code_ptr after_flag_set = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1826 jcc(code, CC_Z, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1827 set_flag(opts, 0, FLAG_Z);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1828 *after_flag_set = code->cur - (after_flag_set+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1829 set_flag_cond(opts, CC_S, FLAG_N);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1830 set_flag_cond(opts, CC_O, FLAG_V);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1831 if (opts->flag_regs[FLAG_C] >= 0) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1832 flag_to_flag(opts, FLAG_C, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1833 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1834 set_flag_cond(opts, CC_C, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1835 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1836 m68k_save_result(inst, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1837 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1838
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1839 void translate_m68k_rot(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1840 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1841 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1842 int32_t init_flags = C\|V0;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1843 if (inst->src.addr_mode == MODE_UNUSED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1844 cycles(&opts->gen, BUS);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1845 //Memory rotate
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1846 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1847 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1848 init_flags \|= X;
106 1eba2b9455f8 Implement ORI to CCR/SR Mike Pavone <pavone@retrodev.com> parents: 105 diff changeset	1849 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1850 op_ir(code, inst, 1, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1851 update_flags(opts, init_flags);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1852 cmp_ir(code, 0, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1853 update_flags(opts, Z\|N);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1854 m68k_save_result(inst, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1855 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1856 if (src_op->mode == MODE_IMMED) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1857 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG ? 8 : 6) + src_op->disp*2);
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1858 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1859 flag_to_carry(opts, FLAG_X);
0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1860 init_flags \|= X;
122 0a6da6c7c463 Implemented ROL and ROR Mike Pavone <pavone@retrodev.com> parents: 121 diff changeset	1861 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1862 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1863 op_ir(code, inst, src_op->disp, dst_op->base, inst->extra.size);
122 0a6da6c7c463 Implemented ROL and ROR Mike Pavone <pavone@retrodev.com> parents: 121 diff changeset	1864 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1865 op_irdisp(code, inst, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1866 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1867 update_flags(opts, init_flags);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1868 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1869 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1870 if (src_op->base != opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1871 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_B);
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1872 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1873 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1874 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1875 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1876 and_ir(code, 63, opts->gen.scratch1, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1877 code_ptr zero_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1878 jcc(code, CC_Z, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1879 add_rr(code, opts->gen.scratch1, CYCLES, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1880 add_rr(code, opts->gen.scratch1, CYCLES, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1881 cmp_ir(code, 32, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1882 code_ptr norm_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1883 jcc(code, CC_L, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1884 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1885 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1886 init_flags \|= X;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1887 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1888 sub_ir(code, 32, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1889 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1890 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1891 op_ir(code, inst, 31, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1892 op_ir(code, inst, 1, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1893 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1894 op_irdisp(code, inst, 31, dst_op->base, dst_op->disp, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1895 op_irdisp(code, inst, 1, dst_op->base, dst_op->disp, inst->extra.size);
122 0a6da6c7c463 Implemented ROL and ROR Mike Pavone <pavone@retrodev.com> parents: 121 diff changeset	1896 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1897
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1898 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1899 set_flag_cond(opts, CC_C, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1900 sub_ir(code, 32, opts->gen.scratch1, SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1901 *norm_off = code->cur - (norm_off+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1902 flag_to_carry(opts, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1903 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1904 *norm_off = code->cur - (norm_off+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1905 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1906 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1907 op_r(code, inst, dst_op->base, inst->extra.size);
122 0a6da6c7c463 Implemented ROL and ROR Mike Pavone <pavone@retrodev.com> parents: 121 diff changeset	1908 } else {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1909 op_rdisp(code, inst, dst_op->base, dst_op->disp, inst->extra.size);
122 0a6da6c7c463 Implemented ROL and ROR Mike Pavone <pavone@retrodev.com> parents: 121 diff changeset	1910 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1911 update_flags(opts, init_flags);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1912 code_ptr end_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1913 jmp(code, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1914 *zero_off = code->cur - (zero_off+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1915 if (inst->op == M68K_ROXR \|\| inst->op == M68K_ROXL) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1916 //Carry flag is set to X flag when count is 0, this is different from ROR/ROL
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1917 flag_to_flag(opts, FLAG_X, FLAG_C);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1918 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1919 set_flag(opts, 0, FLAG_C);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1920 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1921 *end_off = code->cur - (end_off+1);
122 0a6da6c7c463 Implemented ROL and ROR Mike Pavone <pavone@retrodev.com> parents: 121 diff changeset	1922 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1923 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1924 cmp_ir(code, 0, dst_op->base, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1925 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1926 cmp_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1927 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1928 update_flags(opts, Z\|N);
577 0f367276a80c Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code Michael Pavone <pavone@retrodev.com> parents: 576 diff changeset	1929 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1930 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1931
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1932 void translate_m68k_illegal(m68k_options opts, m68kinst inst)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1933 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1934 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1935 call(code, opts->gen.save_context);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1936 #ifdef X86_64
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1937 mov_rr(code, opts->gen.context_reg, RDI, SZ_PTR);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1938 #else
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1939 push_r(code, opts->gen.context_reg);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1940 #endif
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1941 call(code, (code_ptr)print_regs_exit);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1942 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1943
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1944 #define BIT_SUPERVISOR 5
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1945
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1946 void translate_m68k_andi_ori_ccr_sr(m68k_options opts, m68kinst inst)
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1947 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1948 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1949 cycles(&opts->gen, 20);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1950 //TODO: If ANDI to SR, trap if not in supervisor mode
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1951 uint32_t flag_mask = 0;
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1952 uint32_t base_flag = inst->op == M68K_ANDI_SR \|\| inst->op == M68K_ANDI_CCR ? X0 : X1;
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1953 for (int i = 0; i < 5; i++)
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1954 {
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1955 if ((base_flag == X0) ^ (inst->src.params.immed & 1 << i) > 0)
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1956 {
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1957 flag_mask \|= base_flag << ((4 - i) * 3);
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1958 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1959 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1960 update_flags(opts, flag_mask);
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1961 if (inst->op == M68K_ANDI_SR \|\| inst->op == M68K_ORI_SR) {
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1962 if (inst->op == M68K_ANDI_SR) {
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1963 and_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1964 } else {
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1965 or_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1966 }
605 49d9928353be Fix a bug in ori to SR that was swapping USP and SSP inappropriately Michael Pavone <pavone@retrodev.com> parents: 601 diff changeset	1967 if (inst->op == M68K_ANDI_SR && !(inst->src.params.immed & (1 << (BIT_SUPERVISOR + 8)))) {
446 1e828ed04a7c Implement 68K stop instruction Mike Pavone <pavone@retrodev.com> parents: 443 diff changeset	1968 //leave supervisor mode
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	1969 swap_ssp_usp(opts);
446 1e828ed04a7c Implement 68K stop instruction Mike Pavone <pavone@retrodev.com> parents: 443 diff changeset	1970 }
584 b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1971 if ((inst->op == M68K_ANDI_SR && (inst->src.params.immed & 0x700) != 0x700)
b6713c1b6f55 Combine andi ccr/sr and ori ccr/sr. Michael Pavone <pavone@retrodev.com> parents: 583 diff changeset	1972 \|\| (inst->op == M68K_ORI_SR && inst->src.params.immed & 0x700)) {
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1973 call(code, opts->do_sync);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1974 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1975 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1976 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1977
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1978 void translate_m68k_eori_ccr_sr(m68k_options opts, m68kinst inst)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1979 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1980 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1981 cycles(&opts->gen, 20);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1982 //TODO: If ANDI to SR, trap if not in supervisor mode
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1983 if (inst->src.params.immed & 0x1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1984 xor_flag(opts, 1, FLAG_C);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1985 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1986 if (inst->src.params.immed & 0x2) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1987 xor_flag(opts, 1, FLAG_V);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1988 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1989 if (inst->src.params.immed & 0x4) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1990 xor_flag(opts, 1, FLAG_Z);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1991 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1992 if (inst->src.params.immed & 0x8) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1993 xor_flag(opts, 1, FLAG_N);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1994 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1995 if (inst->src.params.immed & 0x10) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1996 xor_flag(opts, 1, FLAG_X);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1997 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1998 if (inst->op == M68K_ORI_SR) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	1999 xor_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2000 if (inst->src.params.immed & 0x700) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2001 call(code, opts->do_sync);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2002 }
446 1e828ed04a7c Implement 68K stop instruction Mike Pavone <pavone@retrodev.com> parents: 443 diff changeset	2003 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2004 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2005
586 aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2006 void set_all_flags(m68k_options *opts, uint8_t flags)
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2007 {
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2008 uint32_t flag_mask = flags & 0x10 ? X1 : X0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2009 flag_mask \|= flags & 0x8 ? N1 : N0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2010 flag_mask \|= flags & 0x4 ? Z1 : Z0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2011 flag_mask \|= flags & 0x2 ? V1 : V0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2012 flag_mask \|= flags & 0x1 ? C1 : C0;
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2013 update_flags(opts, flag_mask);
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2014 }
aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2015
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2016 void translate_m68k_move_ccr_sr(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2017 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2018 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2019 //TODO: Privilege check for MOVE to SR
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2020 if (src_op->mode == MODE_IMMED) {
586 aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2021 set_all_flags(opts, src_op->disp);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2022 if (inst->op == M68K_MOVE_SR) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2023 mov_irdisp(code, (src_op->disp >> 8), opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2024 if (!((inst->src.params.immed >> 8) & (1 << BIT_SUPERVISOR))) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2025 //leave supervisor mode
585 82aadd5d103a Use swap_ssp_usp in translate_m68k_move_ccr_sr Michael Pavone <pavone@retrodev.com> parents: 584 diff changeset	2026 swap_ssp_usp(opts);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2027 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2028 call(code, opts->do_sync);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2029 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2030 cycles(&opts->gen, 12);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2031 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2032 if (src_op->base != opts->gen.scratch1) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2033 if (src_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2034 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2035 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2036 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2037 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2038 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2039 call(code, inst->op == M68K_MOVE_SR ? opts->set_sr : opts->set_ccr);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2040 cycles(&opts->gen, 12);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2041 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2042 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2043
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2044 void translate_m68k_stop(m68k_options opts, m68kinst inst)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2045 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2046 //TODO: Trap if not in system mode
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2047 //manual says 4 cycles, but it has to be at least 8 since it's a 2-word instruction
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2048 //possibly even 12 since that's how long MOVE to SR takes
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2049 //On further thought prefetch + the fact that this stops the CPU may make
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2050 //Motorola's accounting make sense here
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2051 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2052 cycles(&opts->gen, BUS*2);
586 aa35ccb90aa9 Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication Michael Pavone <pavone@retrodev.com> parents: 585 diff changeset	2053 set_all_flags(opts, inst->src.params.immed);
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2054 mov_irdisp(code, (inst->src.params.immed >> 8), opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2055 if (!((inst->src.params.immed >> 8) & (1 << BIT_SUPERVISOR))) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2056 //leave supervisor mode
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2057 swap_ssp_usp(opts);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	2058 }
582 c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2059 code_ptr loop_top = code->cur;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2060 call(code, opts->do_sync);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2061 cmp_rr(code, opts->gen.limit, opts->gen.cycles, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2062 code_ptr normal_cycle_up = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2063 jcc(code, CC_A, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2064 cycles(&opts->gen, BUS);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2065 code_ptr after_cycle_up = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2066 jmp(code, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2067 *normal_cycle_up = code->cur - (normal_cycle_up + 1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2068 mov_rr(code, opts->gen.limit, opts->gen.cycles, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2069 *after_cycle_up = code->cur - (after_cycle_up+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2070 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_cycle), opts->gen.cycles, SZ_D);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2071 jcc(code, CC_C, loop_top);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2072 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2073
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2074 void translate_m68k_move_from_sr(m68k_options opts, m68kinst inst, host_ea src_op, host_ea dst_op)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2075 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2076 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2077 //TODO: Trap if not in system mode
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2078 call(code, opts->get_sr);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2079 if (dst_op->mode == MODE_REG_DIRECT) {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2080 mov_rr(code, opts->gen.scratch1, dst_op->base, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2081 } else {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2082 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, SZ_W);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2083 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2084 m68k_save_result(inst, opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2085 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2086
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2087 void translate_m68k_reset(m68k_options opts, m68kinst inst)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2088 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2089 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2090 call(code, opts->gen.save_context);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2091 #ifdef X86_64
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2092 mov_rr(code, opts->gen.context_reg, RDI, SZ_PTR);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2093 #else
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2094 push_r(code, opts->gen.context_reg);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2095 #endif
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2096 call(code, (code_ptr)print_regs_exit);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2097 }
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2098
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2099 void translate_m68k_rte(m68k_options opts, m68kinst inst)
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2100 {
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2101 code_info *code = &opts->gen.code;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2102 //TODO: Trap if not in system mode
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2103 //Read saved SR
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2104 areg_to_native(opts, 7, opts->gen.scratch1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2105 call(code, opts->read_16);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2106 addi_areg(opts, 2, 7);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2107 call(code, opts->set_sr);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2108 //Read saved PC
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2109 areg_to_native(opts, 7, opts->gen.scratch1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2110 call(code, opts->read_32);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2111 addi_areg(opts, 4, 7);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2112 //Check if we've switched to user mode and swap stack pointers if needed
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2113 bt_irdisp(code, 5, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2114 code_ptr end_off = code->cur + 1;
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2115 jcc(code, CC_C, code->cur + 2);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2116 swap_ssp_usp(opts);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2117 *end_off = code->cur - (end_off+1);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2118 //Get native address, sync components, recalculate integer points and jump to returned address
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2119 call(code, opts->native_addr_and_sync);
c05fcbfe1b1a Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 581 diff changeset	2120 jmp_r(code, opts->gen.scratch1);
14 2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	2121 }
2bdad0f52f42 x86 code gen, initial work on translator Mike Pavone <pavone@retrodev.com> parents: diff changeset	2122
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	2123 void translate_out_of_bounds(code_info *code)
319 0bcab0475a7f Port instruction retranslation improvements from Z80 core to M68K core Mike Pavone <pavone@retrodev.com> parents: 235 diff changeset	2124 {
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	2125 xor_rr(code, RDI, RDI, SZ_D);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	2126 #ifdef X86_32
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	2127 push_r(code, RDI);
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	2128 #endif
76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	2129 call(code, (code_ptr)exit);
319 0bcab0475a7f Port instruction retranslation improvements from Z80 core to M68K core Mike Pavone <pavone@retrodev.com> parents: 235 diff changeset	2130 }
0bcab0475a7f Port instruction retranslation improvements from Z80 core to M68K core Mike Pavone <pavone@retrodev.com> parents: 235 diff changeset	2131
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2132 void nop_fill_or_jmp_next(code_info *code, code_ptr old_end, code_ptr next_inst)
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2133 {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2134 if (next_inst == old_end && next_inst - code->cur < 2) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2135 while (code->cur < old_end) {
55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2136 *(code->cur++) = 0x90; //NOP
193 c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2137 }
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2138 } else {
587 55c5b0f913ce Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c Michael Pavone <pavone@retrodev.com> parents: 586 diff changeset	2139 jmp(code, next_inst);
193 c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2140 }
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2141 }
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2142
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2143 m68k_context * m68k_handle_code_write(uint32_t address, m68k_context * context)
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2144 {
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2145 uint32_t inst_start = get_instruction_start(context->native_code_map, address \| 0xFF0000);
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2146 if (inst_start) {
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	2147 m68k_options * options = context->options;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2148 code_info *code = &options->gen.code;
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2149 code_ptr dst = get_native_address(context->native_code_map, inst_start);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2150 code_info orig;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2151 orig.cur = dst;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2152 orig.last = dst + 128;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2153 mov_ir(&orig, inst_start, options->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2154
543 915a1cb98bac Generate retrans_stub at runtime so it can use the generated save/load_context functions Michael Pavone <pavone@retrodev.com> parents: 542 diff changeset	2155 if (!options->retrans_stub) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2156 options->retrans_stub = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2157 call(code, options->gen.save_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2158 push_r(code, options->gen.context_reg);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2159 #ifdef X86_32
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2160 push_r(code, options->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2161 push_r(code, options->gen.scratch2);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2162 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2163 call(code, (code_ptr)m68k_retranslate_inst);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2164 #ifdef X86_32
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2165 add_ir(code, 8, RSP, SZ_D);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2166 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2167 pop_r(code, options->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2168 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2169 call(code, options->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2170 jmp_r(code, options->gen.scratch1);
543 915a1cb98bac Generate retrans_stub at runtime so it can use the generated save/load_context functions Michael Pavone <pavone@retrodev.com> parents: 542 diff changeset	2171 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2172 jmp(&orig, options->retrans_stub);
193 c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2173 }
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2174 return context;
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2175 }
c66e4636f991 Implement support for self-modifying code Mike Pavone <pavone@retrodev.com> parents: 192 diff changeset	2176
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2177 void insert_breakpoint(m68k_context * context, uint32_t address, code_ptr bp_handler)
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2178 {
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2179 static code_ptr bp_stub = NULL;
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 567 diff changeset	2180 m68k_options * opts = context->options;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2181 code_info native;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2182 native.cur = get_native_address_trans(context, address);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2183 native.last = native.cur + 128;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2184 code_ptr start_native = native.cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2185 mov_ir(&native, address, opts->gen.scratch1, SZ_D);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2186 if (!bp_stub) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2187 code_info *code = &opts->gen.code;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2188 check_alloc_code(code, 5);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2189 bp_stub = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2190 call(&native, bp_stub);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2191
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2192 //Calculate length of prologue
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2193 check_cycles_int(&opts->gen, address);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2194 int check_int_size = code->cur-bp_stub;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2195 code->cur = bp_stub;
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2196
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2197 //Save context and call breakpoint handler
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2198 call(code, opts->gen.save_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2199 push_r(code, opts->gen.scratch1);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2200 #ifdef X86_64
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2201 mov_rr(code, opts->gen.context_reg, RDI, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2202 mov_rr(code, opts->gen.scratch1, RSI, SZ_D);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2203 #else
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2204 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2205 push_r(code, opts->gen.context_reg);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2206 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2207 call(code, bp_handler);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2208 #ifdef X86_32
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2209 add_ir(code, 8, RSP, SZ_D);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2210 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2211 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2212 //Restore context
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2213 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2214 pop_r(code, opts->gen.scratch1);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2215 //do prologue stuff
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2216 cmp_rr(code, opts->gen.cycles, opts->gen.limit, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2217 code_ptr jmp_off = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2218 jcc(code, CC_NC, code->cur + 7);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2219 call(code, opts->gen.handle_cycle_limit_int);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2220 *jmp_off = code->cur - (jmp_off+1);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2221 //jump back to body of translated instruction
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2222 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2223 add_ir(code, check_int_size - (native.cur-start_native), opts->gen.scratch1, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2224 jmp_r(code, opts->gen.scratch1);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2225 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2226 call(&native, bp_stub);
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2227 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2228 }
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 183 diff changeset	2229
570 76bba9ffe351 Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts. Michael Pavone <pavone@retrodev.com> parents: 569 diff changeset	2230 void init_m68k_opts(m68k_options * opts, memmap_chunk * memmap, uint32_t num_chunks)
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2231 {
440 306986209cba Fix 68K test harness Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	2232 memset(opts, 0, sizeof(*opts));
589 2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2233 opts->gen.address_size = SZ_D;
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2234 opts->gen.address_mask = 0xFFFFFF;
596 9853bcce4729 Set the byte_swap flag in the M68K core so gen_mem_fun correctly inserts xor instructions for byte access functions Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	2235 opts->gen.byte_swap = 1;
589 2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2236 opts->gen.max_address = 0x1000000;
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2237 opts->gen.bus_cycles = BUS;
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2238 opts->gen.mem_ptr_off = offsetof(m68k_context, mem_pointers);
2dde38c1744f Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core Michael Pavone <pavone@retrodev.com> parents: 588 diff changeset	2239 opts->gen.ram_flags_off = offsetof(m68k_context, ram_code_flags);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2240 for (int i = 0; i < 8; i++)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2241 {
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2242 opts->dregs[i] = opts->aregs[i] = -1;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2243 }
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2244 #ifdef X86_64
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2245 opts->dregs[0] = R10;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2246 opts->dregs[1] = R11;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2247 opts->dregs[2] = R12;
423 8e136187c0e0 Use the registers that were freed up by the memory map function changes Mike Pavone <pavone@retrodev.com> parents: 352 diff changeset	2248 opts->dregs[3] = R8;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2249 opts->aregs[0] = R13;
3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2250 opts->aregs[1] = R14;
423 8e136187c0e0 Use the registers that were freed up by the memory map function changes Mike Pavone <pavone@retrodev.com> parents: 352 diff changeset	2251 opts->aregs[2] = R9;
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2252 opts->aregs[7] = R15;
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2253
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2254 opts->flag_regs[0] = -1;
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2255 opts->flag_regs[1] = RBX;
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2256 opts->flag_regs[2] = RDX;
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2257 opts->flag_regs[3] = BH;
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2258 opts->flag_regs[4] = DH;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2259
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2260 opts->gen.scratch2 = RDI;
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2261 #else
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2262 opts->dregs[0] = RDX;
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2263 opts->aregs[7] = RDI;
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2264
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2265 for (int i = 0; i < 5; i++)
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2266 {
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2267 opts->flag_regs[i] = -1;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2268 }
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2269 opts->gen.scratch2 = RBX;
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2270 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2271 opts->gen.context_reg = RSI;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2272 opts->gen.cycles = RAX;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2273 opts->gen.limit = RBP;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2274 opts->gen.scratch1 = RCX;
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2275
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2276
558 dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2277 opts->gen.native_code_map = malloc(sizeof(native_map_slot) * NATIVE_MAP_CHUNKS);
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2278 memset(opts->gen.native_code_map, 0, sizeof(native_map_slot) * NATIVE_MAP_CHUNKS);
dc9f178085a0 Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core. Mike Pavone <pavone@retrodev.com> parents: 557 diff changeset	2279 opts->gen.deferred = NULL;
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2280 opts->gen.ram_inst_sizes = malloc(sizeof(uint8_t ) 64);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2281 memset(opts->gen.ram_inst_sizes, 0, sizeof(uint8_t ) 64);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2282
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2283 code_info *code = &opts->gen.code;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2284 init_code_info(code);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2285
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2286 opts->gen.save_context = code->cur;
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2287 for (int i = 0; i < 5; i++)
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2288 if (opts->flag_regs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2289 mov_rrdisp(code, opts->flag_regs[i], opts->gen.context_reg, offsetof(m68k_context, flags) + i, SZ_B);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2290 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2291 for (int i = 0; i < 8; i++)
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2292 {
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2293 if (opts->dregs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2294 mov_rrdisp(code, opts->dregs[i], opts->gen.context_reg, offsetof(m68k_context, dregs) + sizeof(uint32_t) * i, SZ_D);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2295 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2296 if (opts->aregs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2297 mov_rrdisp(code, opts->aregs[i], opts->gen.context_reg, offsetof(m68k_context, aregs) + sizeof(uint32_t) * i, SZ_D);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2298 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2299 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2300 mov_rrdisp(code, opts->gen.cycles, opts->gen.context_reg, offsetof(m68k_context, current_cycle), SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2301 retn(code);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2302
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2303 opts->gen.load_context = code->cur;
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2304 for (int i = 0; i < 5; i++)
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2305 if (opts->flag_regs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2306 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + i, opts->flag_regs[i], SZ_B);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2307 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2308 for (int i = 0; i < 8; i++)
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2309 {
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2310 if (opts->dregs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2311 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, dregs) + sizeof(uint32_t) * i, opts->dregs[i], SZ_D);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2312 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2313 if (opts->aregs[i] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2314 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, aregs) + sizeof(uint32_t) * i, opts->aregs[i], SZ_D);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2315 }
c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2316 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2317 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, current_cycle), CYCLES, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2318 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, target_cycle), LIMIT, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2319 retn(code);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2320
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2321 opts->start_context = (start_fun)code->cur;
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2322 #ifdef X86_64
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2323 if (opts->gen.scratch2 != RDI) {
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2324 mov_rr(code, RDI, opts->gen.scratch2, SZ_PTR);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 547 diff changeset	2325 }
544 8a26567852b7 Generate native_addr and native_addr_and_sync at runtime so they can use the generated save/load_context functions Michael Pavone <pavone@retrodev.com> parents: 543 diff changeset	2326 //save callee save registers
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2327 push_r(code, RBP);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2328 push_r(code, R12);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2329 push_r(code, R13);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2330 push_r(code, R14);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2331 push_r(code, R15);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2332 #else
96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2333 //save callee save registers
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2334 push_r(code, RBP);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2335 push_r(code, RBX);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2336 push_r(code, RSI);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2337 push_r(code, RDI);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2338
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2339 mov_rdispr(code, RSP, 20, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2340 mov_rdispr(code, RSP, 24, opts->gen.context_reg, SZ_D);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2341 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2342 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2343 call_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2344 call(code, opts->gen.save_context);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2345 #ifdef X86_64
544 8a26567852b7 Generate native_addr and native_addr_and_sync at runtime so they can use the generated save/load_context functions Michael Pavone <pavone@retrodev.com> parents: 543 diff changeset	2346 //restore callee save registers
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2347 pop_r(code, R15);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2348 pop_r(code, R14);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2349 pop_r(code, R13);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2350 pop_r(code, R12);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2351 pop_r(code, RBP);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2352 #else
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2353 pop_r(code, RDI);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2354 pop_r(code, RSI);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2355 pop_r(code, RBX);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2356 pop_r(code, RBP);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2357 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2358 retn(code);
540 4ca826862174 Generate m68k_start_context at runtime so it can use the generated load_context and save_context Michael Pavone <pavone@retrodev.com> parents: 539 diff changeset	2359
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2360 opts->native_addr = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2361 call(code, opts->gen.save_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2362 push_r(code, opts->gen.context_reg);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2363 #ifdef X86_64
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2364 mov_rr(code, opts->gen.context_reg, RDI, SZ_PTR); //move context to 1st arg reg
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2365 mov_rr(code, opts->gen.scratch1, RSI, SZ_D); //move address to 2nd arg reg
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2366 #else
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2367 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2368 push_r(code, opts->gen.context_reg);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2369 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2370 call(code, (code_ptr)get_native_address_trans);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2371 #ifdef X86_32
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2372 add_ir(code, 8, RSP, SZ_D);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2373 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2374 mov_rr(code, RAX, opts->gen.scratch1, SZ_PTR); //move result to scratch reg
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2375 pop_r(code, opts->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2376 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2377 retn(code);
544 8a26567852b7 Generate native_addr and native_addr_and_sync at runtime so they can use the generated save/load_context functions Michael Pavone <pavone@retrodev.com> parents: 543 diff changeset	2378
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2379 opts->native_addr_and_sync = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2380 call(code, opts->gen.save_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2381 push_r(code, opts->gen.scratch1);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2382 #ifdef X86_64
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2383 mov_rr(code, opts->gen.context_reg, RDI, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2384 xor_rr(code, RSI, RSI, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2385 test_ir(code, 8, RSP, SZ_PTR); //check stack alignment
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2386 code_ptr do_adjust_rsp = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2387 jcc(code, CC_NZ, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2388 call(code, (code_ptr)sync_components);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2389 code_ptr no_adjust_rsp = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2390 jmp(code, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2391 *do_adjust_rsp = code->cur - (do_adjust_rsp+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2392 sub_ir(code, 8, RSP, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2393 call(code, (code_ptr)sync_components);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2394 add_ir(code, 8, RSP, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2395 *no_adjust_rsp = code->cur - (no_adjust_rsp+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2396 pop_r(code, RSI);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2397 push_r(code, RAX);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2398 mov_rr(code, RAX, RDI, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2399 call(code, (code_ptr)get_native_address_trans);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2400 #else
96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2401 //TODO: Add support for pushing a constant in gen_x86
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2402 xor_rr(code, RAX, RAX, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2403 push_r(code, RAX);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2404 push_r(code, opts->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2405 call(code, (code_ptr)sync_components);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2406 add_ir(code, 8, RSP, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2407 pop_r(code, RSI); //restore saved address from opts->gen.scratch1
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2408 push_r(code, RAX); //save context pointer for later
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2409 push_r(code, RSI); //2nd arg -- address
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2410 push_r(code, RAX); //1st arg -- context pointer
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2411 call(code, (code_ptr)get_native_address_trans);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2412 add_ir(code, 8, RSP, SZ_D);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2413 #endif
96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2414
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2415 mov_rr(code, RAX, opts->gen.scratch1, SZ_PTR); //move result to scratch reg
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2416 pop_r(code, opts->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2417 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2418 retn(code);
544 8a26567852b7 Generate native_addr and native_addr_and_sync at runtime so they can use the generated save/load_context functions Michael Pavone <pavone@retrodev.com> parents: 543 diff changeset	2419
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2420 opts->gen.handle_cycle_limit = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2421 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), CYCLES, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2422 code_ptr skip_sync = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2423 jcc(code, CC_C, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2424 opts->do_sync = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2425 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2426 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2427 call(code, opts->gen.save_context);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2428 #ifdef X86_64
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2429 mov_rr(code, opts->gen.context_reg, RDI, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2430 xor_rr(code, RSI, RSI, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2431 test_ir(code, 8, RSP, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2432 code_ptr adjust_rsp = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2433 jcc(code, CC_NZ, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2434 call(code, (code_ptr)sync_components);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2435 code_ptr no_adjust = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2436 jmp(code, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2437 *adjust_rsp = code->cur - (adjust_rsp + 1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2438 sub_ir(code, 8, RSP, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2439 call(code, (code_ptr)sync_components);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2440 add_ir(code, 8, RSP, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2441 *no_adjust = code->cur - (no_adjust+1);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2442 #else
96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2443 //TODO: Add support for pushing a constant in gen_x86
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2444 xor_rr(code, RAX, RAX, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2445 push_r(code, RAX);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2446 push_r(code, opts->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2447 call(code, (code_ptr)sync_components);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2448 add_ir(code, 8, RSP, SZ_D);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2449 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2450 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2451 call(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2452 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2453 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2454 *skip_sync = code->cur - (skip_sync+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2455 retn(code);
539 c2716b502a81 Generate save_context and load_context functions at runtime Michael Pavone <pavone@retrodev.com> parents: 516 diff changeset	2456
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2457 opts->gen.handle_code_write = (code_ptr)m68k_handle_code_write;
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2458
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2459 opts->read_16 = gen_mem_fun(&opts->gen, memmap, num_chunks, READ_16, NULL);
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2460 opts->read_8 = gen_mem_fun(&opts->gen, memmap, num_chunks, READ_8, NULL);
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2461 opts->write_16 = gen_mem_fun(&opts->gen, memmap, num_chunks, WRITE_16, NULL);
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 589 diff changeset	2462 opts->write_8 = gen_mem_fun(&opts->gen, memmap, num_chunks, WRITE_8, NULL);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2463
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2464 opts->read_32 = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2465 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2466 call(code, opts->read_16);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2467 mov_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2468 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2469 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2470 add_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2471 call(code, opts->read_16);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2472 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2473 movzx_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_W, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2474 shl_ir(code, 16, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2475 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2476 retn(code);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2477
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2478 opts->write_32_lowfirst = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2479 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2480 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2481 add_ir(code, 2, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2482 call(code, opts->write_16);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2483 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2484 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2485 shr_ir(code, 16, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2486 jmp(code, opts->write_16);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2487
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2488 opts->write_32_highfirst = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2489 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2490 push_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2491 shr_ir(code, 16, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2492 call(code, opts->write_16);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2493 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2494 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2495 add_ir(code, 2, opts->gen.scratch2, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2496 jmp(code, opts->write_16);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2497
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2498 opts->get_sr = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2499 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, status), opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2500 shl_ir(code, 8, opts->gen.scratch1, SZ_W);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2501 if (opts->flag_regs[FLAG_X] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2502 mov_rr(code, opts->flag_regs[FLAG_X], opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2503 } else {
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2504 int8_t offset = offsetof(m68k_context, flags);
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2505 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2506 mov_rdispr(code, opts->gen.context_reg, offset, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2507 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2508 mov_rindr(code, opts->gen.context_reg, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2509 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2510 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2511 for (int flag = FLAG_N; flag <= FLAG_C; flag++)
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2512 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2513 shl_ir(code, 1, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2514 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2515 or_rr(code, opts->flag_regs[flag], opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2516 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2517 or_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2518 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2519 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2520 retn(code);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2521
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2522 opts->set_sr = code->cur;
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2523 for (int flag = FLAG_C; flag >= FLAG_X; flag--)
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2524 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2525 rcr_ir(code, 1, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2526 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2527 setcc_r(code, CC_C, opts->flag_regs[flag]);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2528 } else {
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2529 int8_t offset = offsetof(m68k_context, flags) + flag;
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2530 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2531 setcc_rdisp(code, CC_C, opts->gen.context_reg, offset);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2532 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2533 setcc_rind(code, CC_C, opts->gen.context_reg);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2534 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2535 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2536 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2537 shr_ir(code, 8, opts->gen.scratch1, SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2538 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2539 retn(code);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2540
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2541 opts->set_ccr = code->cur;
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2542 for (int flag = FLAG_C; flag >= FLAG_X; flag--)
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2543 {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2544 rcr_ir(code, 1, opts->gen.scratch1, SZ_B);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2545 if (opts->flag_regs[flag] >= 0) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2546 setcc_r(code, CC_C, opts->flag_regs[flag]);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2547 } else {
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2548 int8_t offset = offsetof(m68k_context, flags) + flag;
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2549 if (offset) {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2550 setcc_rdisp(code, CC_C, opts->gen.context_reg, offset);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2551 } else {
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2552 setcc_rind(code, CC_C, opts->gen.context_reg);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2553 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2554 }
3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2555 }
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2556 retn(code);
547 3090d016c9e9 Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting Michael Pavone <pavone@retrodev.com> parents: 546 diff changeset	2557
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2558 opts->gen.handle_cycle_limit_int = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2559 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_cycle), CYCLES, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2560 code_ptr do_int = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2561 jcc(code, CC_NC, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2562 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), CYCLES, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2563 skip_sync = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2564 jcc(code, CC_C, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2565 call(code, opts->gen.save_context);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2566 #ifdef X86_64
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2567 mov_rr(code, opts->gen.context_reg, RDI, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2568 mov_rr(code, opts->gen.scratch1, RSI, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2569 test_ir(code, 8, RSP, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2570 adjust_rsp = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2571 jcc(code, CC_NZ, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2572 call(code, (code_ptr)sync_components);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2573 no_adjust = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2574 jmp(code, code->cur + 2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2575 *adjust_rsp = code->cur - (adjust_rsp + 1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2576 sub_ir(code, 8, RSP, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2577 call(code, (code_ptr)sync_components);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2578 add_ir(code, 8, RSP, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2579 *no_adjust = code->cur - (no_adjust+1);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2580 #else
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2581 push_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2582 push_r(code, opts->gen.context_reg);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2583 call(code, (code_ptr)sync_components);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2584 add_ir(code, 8, RSP, SZ_D);
550 96489fb27dbf Apart from the Z80 core, BlastEm now supports 32-bit x86 Michael Pavone <pavone@retrodev.com> parents: 548 diff changeset	2585 #endif
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2586 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2587 jmp(code, opts->gen.load_context);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2588 *skip_sync = code->cur - (skip_sync+1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2589 retn(code);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2590 *do_int = code->cur - (do_int+1);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2591 //set target cycle to sync cycle
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2592 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), LIMIT, SZ_D);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2593 //swap USP and SSP if not already in supervisor mode
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2594 bt_irdisp(code, 5, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2595 code_ptr already_supervisor = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2596 jcc(code, CC_C, code->cur + 2);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2597 swap_ssp_usp(opts);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2598 *already_supervisor = code->cur - (already_supervisor+1);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2599 //save PC
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2600 subi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2601 areg_to_native(opts, 7, opts->gen.scratch2);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2602 call(code, opts->write_32_lowfirst);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2603 //save status register
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2604 subi_areg(opts, 2, 7);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2605 call(code, opts->get_sr);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2606 areg_to_native(opts, 7, opts->gen.scratch2);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2607 call(code, opts->write_16);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2608 //update status register
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2609 and_irdisp(code, 0xF8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2610 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2611 or_ir(code, 0x20, opts->gen.scratch1, SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2612 or_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2613 //calculate interrupt vector address
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2614 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2615 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, int_ack), SZ_W);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2616 shl_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2617 add_ir(code, 0x60, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2618 call(code, opts->read_32);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2619 call(code, opts->native_addr_and_sync);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2620 cycles(&opts->gen, 24);
347 b24556b45d1e Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions Mike Pavone <pavone@retrodev.com> parents: 343 diff changeset	2621 //discard function return address
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2622 pop_r(code, opts->gen.scratch2);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2623 jmp_r(code, opts->gen.scratch1);
447 e730fc040169 Fix performance regression from stop instruction work Mike Pavone <pavone@retrodev.com> parents: 446 diff changeset	2624
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2625 opts->trap = code->cur;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2626 push_r(code, opts->gen.scratch2);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2627 //swap USP and SSP if not already in supervisor mode
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2628 bt_irdisp(code, 5, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2629 already_supervisor = code->cur + 1;
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2630 jcc(code, CC_C, code->cur + 2);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2631 swap_ssp_usp(opts);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2632 *already_supervisor = code->cur - (already_supervisor+1);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2633 //save PC
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2634 subi_areg(opts, 4, 7);
1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2635 areg_to_native(opts, 7, opts->gen.scratch2);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2636 call(code, opts->write_32_lowfirst);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2637 //save status register
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2638 subi_areg(opts, 2, 7);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2639 call(code, opts->get_sr);
574 1594525e2157 More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts Michael Pavone <pavone@retrodev.com> parents: 571 diff changeset	2640 areg_to_native(opts, 7, opts->gen.scratch2);
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2641 call(code, opts->write_16);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2642 //set supervisor bit
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2643 or_irdisp(code, 0x20, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B);
348 3923dbc2dcc4 m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S Mike Pavone <pavone@retrodev.com> parents: 347 diff changeset	2644 //calculate vector address
567 8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2645 pop_r(code, opts->gen.scratch1);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2646 shl_ir(code, 2, opts->gen.scratch1, SZ_D);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2647 call(code, opts->read_32);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2648 call(code, opts->native_addr_and_sync);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2649 cycles(&opts->gen, 18);
8e395210f50f Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	2650 jmp_r(code, opts->gen.scratch1);
18 3e7bfde7606e M68K to x86 translation works for a limited subset of instructions and addressing modes Mike Pavone <pavone@retrodev.com> parents: 14 diff changeset	2651 }

Mercurial > repos > blastem

annotate m68k_core_x86.c @ 613:09d5adf8d1ca