Mercurial > repos > blastem
annotate ym2612.c @ 2276:709036ee222a
Don't set write pending flag for non-existent RF5C164 registers
author | Michael Pavone <pavone@retrodev.com> |
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date | Mon, 02 Jan 2023 11:37:31 -0800 |
parents | 74112041b2c7 |
children | 5a53a8453241 |
rev | line source |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include <string.h> |
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7 #include <math.h> |
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8 #include <stdio.h> |
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9 #include <stdlib.h> |
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10 #include "ym2612.h" |
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11 #include "render.h" |
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12 #include "wave.h" |
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13 #include "blastem.h" |
1946 | 14 #include "event_log.h" |
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15 |
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16 //#define DO_DEBUG_PRINT |
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17 #ifdef DO_DEBUG_PRINT |
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18 #define dfprintf fprintf |
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19 #define dfopen(var, fname, mode) var=fopen(fname, mode) |
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20 #else |
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21 #define dfprintf |
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22 #define dfopen(var, fname, mode) |
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23 #endif |
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24 |
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25 #define BUSY_CYCLES 32 |
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26 #define OP_UPDATE_PERIOD 144 |
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27 |
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28 #define BIT_TIMERA_ENABLE 0x1 |
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29 #define BIT_TIMERB_ENABLE 0x2 |
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30 #define BIT_TIMERA_OVEREN 0x4 |
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31 #define BIT_TIMERB_OVEREN 0x8 |
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32 #define BIT_TIMERA_RESET 0x10 |
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33 #define BIT_TIMERB_RESET 0x20 |
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34 |
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35 #define BIT_TIMERA_LOAD 0x40 |
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36 #define BIT_TIMERB_LOAD 0x80 |
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37 |
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38 #define BIT_STATUS_TIMERA 0x1 |
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39 #define BIT_STATUS_TIMERB 0x2 |
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40 |
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41 static uint32_t ym_calc_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op); |
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42 |
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43 enum { |
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44 PHASE_ATTACK, |
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45 PHASE_DECAY, |
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46 PHASE_SUSTAIN, |
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47 PHASE_RELEASE |
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48 }; |
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49 |
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50 uint8_t did_tbl_init = 0; |
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51 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however, |
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52 //memory is cheap so using a half sine table will probably save some cycles |
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53 //a full sine table would be nice, but negative numbers don't get along with log2 |
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54 #define SINE_TABLE_SIZE 512 |
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55 static uint16_t sine_table[SINE_TABLE_SIZE]; |
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56 //Similar deal here with the power table for log -> linear conversion |
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57 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part |
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58 //and uses the whole part as a shift amount. |
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59 #define POW_TABLE_SIZE (1 << 13) |
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60 static uint16_t pow_table[POW_TABLE_SIZE]; |
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61 |
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62 static uint16_t rate_table_base[] = { |
362 | 63 //main portion |
64 0,1,0,1,0,1,0,1, | |
65 0,1,0,1,1,1,0,1, | |
66 0,1,1,1,0,1,1,1, | |
67 0,1,1,1,1,1,1,1, | |
68 //top end | |
69 1,1,1,1,1,1,1,1, | |
70 1,1,1,2,1,1,1,2, | |
71 1,2,1,2,1,2,1,2, | |
72 1,2,2,2,1,2,2,2, | |
73 }; | |
74 | |
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75 static uint16_t rate_table[64*8]; |
362 | 76 |
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77 static uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5}; |
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78 static uint8_t lfo_pm_base[][8] = { |
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79 {0, 0, 0, 0, 0, 0, 0, 0}, |
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80 {0, 0, 0, 0, 4, 4, 4, 4}, |
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81 {0, 0, 0, 4, 4, 4, 8, 8}, |
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82 {0, 0, 4, 4, 8, 8, 0xc, 0xc}, |
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83 {0, 0, 4, 8, 8, 8, 0xc,0x10}, |
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84 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18}, |
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85 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30}, |
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86 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60} |
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87 }; |
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88 static int16_t lfo_pm_table[128 * 32 * 8]; |
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89 |
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90 int16_t ams_shift[] = {8, 1, -1, -2}; |
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91 |
362 | 92 #define MAX_ENVELOPE 0xFFC |
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93 #define YM_DIVIDER 2 |
374 | 94 #define CYCLE_NEVER 0xFFFFFFFF |
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95 |
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96 static uint16_t round_fixed_point(double value, int dec_bits) |
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97 { |
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98 return value * (1 << dec_bits) + 0.5; |
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99 } |
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100 |
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101 static FILE * debug_file = NULL; |
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102 static uint32_t first_key_on=0; |
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103 |
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104 static ym2612_context * log_context = NULL; |
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105 |
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106 static void ym_finalize_log() |
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107 { |
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108 if (!log_context) { |
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109 return; |
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110 } |
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111 for (int i = 0; i < NUM_CHANNELS; i++) { |
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112 if (log_context->channels[i].logfile) { |
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113 wave_finalize(log_context->channels[i].logfile); |
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114 } |
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115 } |
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116 log_context = NULL; |
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117 } |
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118 |
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119 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock) |
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120 { |
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121 render_audio_adjust_clock(context->audio, master_clock, context->clock_inc * NUM_OPERATORS); |
483
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122 } |
407
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123 |
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124 void ym_adjust_cycles(ym2612_context *context, uint32_t deduction) |
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125 { |
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126 context->current_cycle -= deduction; |
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127 if (context->write_cycle != CYCLE_NEVER && context->write_cycle >= deduction) { |
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128 context->write_cycle -= deduction; |
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129 } else { |
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130 context->write_cycle = CYCLE_NEVER; |
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131 } |
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132 if (context->busy_start != CYCLE_NEVER && context->busy_start >= deduction) { |
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133 context->busy_start -= deduction; |
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134 } else { |
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135 context->busy_start = CYCLE_NEVER; |
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136 } |
1904
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137 if (context->last_status_cycle != CYCLE_NEVER && context->last_status_cycle >= deduction) { |
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138 context->last_status_cycle -= deduction; |
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139 } else { |
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140 context->last_status = 0; |
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141 context->last_status_cycle = CYCLE_NEVER; |
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142 } |
1902
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143 } |
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144 |
859
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145 #ifdef __ANDROID__ |
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146 #define log2(x) (log(x)/log(2)) |
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147 #endif |
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148 |
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149 |
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150 #define TIMER_A_MAX 1023 |
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151 #define TIMER_B_MAX 255 |
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152 |
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153 void ym_reset(ym2612_context *context) |
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154 { |
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155 memset(context->part1_regs, 0, sizeof(context->part1_regs)); |
1b3fe6e03e7b
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156 memset(context->part2_regs, 0, sizeof(context->part2_regs)); |
1b3fe6e03e7b
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157 memset(context->operators, 0, sizeof(context->operators)); |
1654
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158 FILE* savedlogs[NUM_CHANNELS]; |
2243
0d1d5dccdd28
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2081
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159 uint8_t saved_scope_channel[NUM_CHANNELS]; |
1654
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160 for (int i = 0; i < NUM_CHANNELS; i++) |
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161 { |
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162 savedlogs[i] = context->channels[i].logfile; |
2243
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163 saved_scope_channel[i] = context->channels[i].scope_channel; |
1654
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164 } |
1308
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165 memset(context->channels, 0, sizeof(context->channels)); |
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166 memset(context->ch3_supp, 0, sizeof(context->ch3_supp)); |
1b3fe6e03e7b
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diff
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|
167 context->selected_reg = 0; |
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diff
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|
168 context->csm_keyon = 0; |
1b3fe6e03e7b
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|
169 context->ch3_mode = 0; |
1b3fe6e03e7b
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parents:
1301
diff
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|
170 context->dac_enable = 0; |
1b3fe6e03e7b
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diff
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|
171 context->status = 0; |
1b3fe6e03e7b
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diff
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|
172 context->timer_a_load = 0; |
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diff
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173 context->timer_b_load = 0; |
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174 //TODO: Confirm these on hardware |
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|
175 context->timer_a = TIMER_A_MAX; |
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|
176 context->timer_b = TIMER_B_MAX; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
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2029
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177 |
1308
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178 //TODO: Reset LFO state |
2081
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Initial stab at RF5C164 emulation
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179 |
1308
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Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
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180 //some games seem to expect that the LR flags start out as 1 |
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181 for (int i = 0; i < NUM_CHANNELS; i++) { |
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182 context->channels[i].lr = 0xC0; |
1654
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183 context->channels[i].logfile = savedlogs[i]; |
2243
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|
184 context->channels[i].scope_channel = saved_scope_channel[i]; |
2005
3ce38692a3f2
Set initial pan bits in YM2612 register array and not just the separate lr field of the channel. This fixes an issue in which some channels would be silent in VGM log output
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185 if (i < 3) { |
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186 context->part1_regs[REG_LR_AMS_PMS - YM_PART1_START + i] = 0xC0; |
3ce38692a3f2
Set initial pan bits in YM2612 register array and not just the separate lr field of the channel. This fixes an issue in which some channels would be silent in VGM log output
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1946
diff
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|
187 } else { |
3ce38692a3f2
Set initial pan bits in YM2612 register array and not just the separate lr field of the channel. This fixes an issue in which some channels would be silent in VGM log output
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1946
diff
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|
188 context->part2_regs[REG_LR_AMS_PMS - YM_PART2_START + i - 3] = 0xC0; |
3ce38692a3f2
Set initial pan bits in YM2612 register array and not just the separate lr field of the channel. This fixes an issue in which some channels would be silent in VGM log output
Michael Pavone <pavone@retrodev.com>
parents:
1946
diff
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|
189 } |
1308
1b3fe6e03e7b
Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
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190 } |
1b3fe6e03e7b
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191 context->write_cycle = CYCLE_NEVER; |
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192 for (int i = 0; i < NUM_OPERATORS; i++) { |
1b3fe6e03e7b
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193 context->operators[i].envelope = MAX_ENVELOPE; |
1b3fe6e03e7b
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|
194 context->operators[i].env_phase = PHASE_RELEASE; |
1b3fe6e03e7b
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195 } |
1b3fe6e03e7b
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diff
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|
196 } |
1b3fe6e03e7b
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diff
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|
197 |
1555
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More audio refactoring in preparation for allowing proper sync to video with dynamic audio rate control
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|
198 void ym_init(ym2612_context * context, uint32_t master_clock, uint32_t clock_div, uint32_t options) |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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199 { |
884
252dfd29831d
Selecting a second game from the menu now works
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859
diff
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|
200 static uint8_t registered_finalize; |
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
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369
diff
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201 dfopen(debug_file, "ym_debug.txt", "w"); |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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parents:
diff
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|
202 memset(context, 0, sizeof(*context)); |
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
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379
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|
203 context->clock_inc = clock_div * 6; |
1902
32a3aa7b4a45
Fix YM2612 busy flag timing
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1880
diff
changeset
|
204 context->busy_cycles = BUSY_CYCLES * context->clock_inc; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
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parents:
2029
diff
changeset
|
205 context->audio = render_audio_source("YM2612", master_clock, context->clock_inc * NUM_OPERATORS, 2); |
1904
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
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|
206 //TODO: pick a randomish high initial value and lower it over time |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
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1902
diff
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|
207 context->invalid_status_decay = 225000 * context->clock_inc; |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
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1902
diff
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|
208 context->status_address_mask = (options & YM_OPT_3834) ? 0 : 3; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
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parents:
2029
diff
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|
209 |
369
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
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|
210 //some games seem to expect that the LR flags start out as 1 |
fc820ab1394b
Fix left/right enable default value
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365
diff
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|
211 for (int i = 0; i < NUM_CHANNELS; i++) { |
407
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
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parents:
406
diff
changeset
|
212 if (options & YM_OPT_WAVE_LOG) { |
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
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parents:
406
diff
changeset
|
213 char fname[64]; |
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
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parents:
406
diff
changeset
|
214 sprintf(fname, "ym_channel_%d.wav", i); |
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents:
406
diff
changeset
|
215 FILE * f = context->channels[i].logfile = fopen(fname, "wb"); |
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
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parents:
406
diff
changeset
|
216 if (!f) { |
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
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parents:
406
diff
changeset
|
217 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname); |
c3abc4ada43d
Add support for logging YM2612 channels to WAVE files
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parents:
406
diff
changeset
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218 continue; |
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219 } |
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220 if (!wave_init(f, master_clock / (context->clock_inc * NUM_OPERATORS), 16, 1)) { |
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221 fclose(f); |
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222 context->channels[i].logfile = NULL; |
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223 } |
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224 } |
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225 } |
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226 if (options & YM_OPT_WAVE_LOG) { |
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227 log_context = context; |
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228 if (!registered_finalize) { |
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229 atexit(ym_finalize_log); |
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230 registered_finalize = 1; |
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231 } |
369
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232 } |
359
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233 if (!did_tbl_init) { |
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234 //populate sine table |
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235 for (int32_t i = 0; i < 512; i++) { |
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236 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 ); |
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237 |
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238 //table stores 4.8 fixed pointed representation of the base 2 log |
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239 sine_table[i] = round_fixed_point(-log2(sine), 8); |
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240 } |
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241 //populate power table |
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242 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) { |
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243 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0)); |
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244 int32_t tmp = round_fixed_point(linear, 11); |
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245 int32_t shift = (i >> 8) - 2; |
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246 if (shift < 0) { |
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247 tmp <<= 0-shift; |
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248 } else { |
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249 tmp >>= shift; |
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250 } |
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251 pow_table[i] = tmp; |
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252 } |
362 | 253 //populate envelope generator rate table, from small base table |
254 for (int rate = 0; rate < 64; rate++) { | |
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255 for (int cycle = 0; cycle < 8; cycle++) { |
362 | 256 uint16_t value; |
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257 if (rate < 2) { |
362 | 258 value = 0; |
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259 } else if (rate >= 60) { |
362 | 260 value = 8; |
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261 } else if (rate < 8) { |
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262 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle]; |
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263 } else if (rate < 48) { |
362 | 264 value = rate_table_base[(rate & 0x3) * 8 + cycle]; |
265 } else { | |
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266 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2); |
362 | 267 } |
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268 rate_table[rate * 8 + cycle] = value; |
362 | 269 } |
270 } | |
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271 //populate LFO PM table from small base table |
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272 //seems like there must be a better way to derive this |
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273 for (int freq = 0; freq < 128; freq++) { |
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274 for (int pms = 0; pms < 8; pms++) { |
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275 for (int step = 0; step < 32; step++) { |
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276 int16_t value = 0; |
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277 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) { |
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278 if (freq & bit) { |
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279 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift; |
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280 } |
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281 } |
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282 if (step & 0x10) { |
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283 value = -value; |
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284 } |
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285 lfo_pm_table[freq * 256 + pms * 32 + step] = value; |
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286 } |
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287 } |
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288 } |
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289 } |
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290 ym_reset(context); |
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291 ym_enable_zero_offset(context, 1); |
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292 } |
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293 |
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294 void ym_free(ym2612_context *context) |
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295 { |
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296 render_free_source(context->audio); |
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297 if (context == log_context) { |
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298 ym_finalize_log(); |
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299 } |
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300 free(context); |
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301 } |
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302 |
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303 void ym_enable_zero_offset(ym2612_context *context, uint8_t enabled) |
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304 { |
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305 if (enabled) { |
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306 context->zero_offset = 0x70; |
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307 context->volume_mult = 79; |
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308 context->volume_div = 120; |
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309 } else { |
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310 context->zero_offset = 0; |
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311 context->volume_mult = 2; |
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312 context->volume_div = 3; |
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313 } |
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314 } |
381
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315 #define YM_MOD_SHIFT 1 |
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316 |
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317 #define CSM_MODE 0x80 |
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318 |
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319 #define SSG_ENABLE 8 |
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320 #define SSG_INVERT 4 |
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321 #define SSG_ALTERNATE 2 |
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322 #define SSG_HOLD 1 |
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323 |
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324 #define SSG_CENTER 0x800 |
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325 |
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326 static void start_envelope(ym_operator *op, ym_channel *channel) |
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327 { |
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328 //Deal with "infinite" attack rates |
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329 uint8_t rate = op->rates[PHASE_ATTACK]; |
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330 if (rate) { |
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331 uint8_t ks = channel->keycode >> op->key_scaling;; |
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332 rate = rate*2 + ks; |
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333 } |
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334 if (rate >= 62) { |
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335 op->env_phase = PHASE_DECAY; |
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336 op->envelope = 0; |
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337 } else { |
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338 op->env_phase = PHASE_ATTACK; |
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339 } |
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340 } |
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341 |
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342 static void keyon(ym_operator *op, ym_channel *channel) |
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343 { |
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344 start_envelope(op, channel); |
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345 op->phase_counter = 0; |
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346 op->inverted = op->ssg & SSG_INVERT; |
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347 } |
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348 |
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349 static const uint8_t keyon_bits[] = {0x10, 0x40, 0x20, 0x80}; |
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350 |
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351 static void keyoff(ym_operator *op) |
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352 { |
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353 op->env_phase = PHASE_RELEASE; |
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354 if (op->inverted) { |
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355 //Nemesis says the inversion state doesn't change here, but I don't see how that is observable either way |
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356 op->inverted = 0; |
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357 op->envelope = (SSG_CENTER - op->envelope) & MAX_ENVELOPE; |
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358 } |
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359 } |
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360 |
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361 static void csm_keyoff(ym2612_context *context) |
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362 { |
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363 context->csm_keyon = 0; |
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364 uint8_t changes = 0xF0 ^ context->channels[2].keyon; |
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365 for (uint8_t op = 2*4, bit = 0; op < 3*4; op++, bit++) |
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366 { |
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367 if (changes & keyon_bits[bit]) { |
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368 keyoff(context->operators + op); |
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369 } |
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370 } |
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371 } |
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372 |
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373 void ym_run_timers(ym2612_context *context) |
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374 { |
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375 if (context->timer_control & BIT_TIMERA_ENABLE) { |
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376 if (context->timer_a != TIMER_A_MAX) { |
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377 context->timer_a++; |
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378 if (context->csm_keyon) { |
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379 csm_keyoff(context); |
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380 } |
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381 } else { |
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382 if (context->timer_control & BIT_TIMERA_LOAD) { |
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383 context->timer_control &= ~BIT_TIMERA_LOAD; |
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384 } else if (context->timer_control & BIT_TIMERA_OVEREN) { |
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385 context->status |= BIT_STATUS_TIMERA; |
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386 } |
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387 context->timer_a = context->timer_a_load; |
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388 if (!context->csm_keyon && context->ch3_mode == CSM_MODE) { |
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389 context->csm_keyon = 0xF0; |
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390 uint8_t changes = 0xF0 ^ context->channels[2].keyon;; |
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391 for (uint8_t op = 2*4, bit = 0; op < 3*4; op++, bit++) |
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392 { |
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393 if (changes & keyon_bits[bit]) { |
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394 keyon(context->operators + op, context->channels + 2); |
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395 } |
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396 } |
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397 } |
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398 } |
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399 } |
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400 if (!context->sub_timer_b) { |
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401 if (context->timer_control & BIT_TIMERB_ENABLE) { |
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402 if (context->timer_b != TIMER_B_MAX) { |
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403 context->timer_b++; |
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404 } else { |
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405 if (context->timer_control & BIT_TIMERB_LOAD) { |
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406 context->timer_control &= ~BIT_TIMERB_LOAD; |
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407 } else if (context->timer_control & BIT_TIMERB_OVEREN) { |
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408 context->status |= BIT_STATUS_TIMERB; |
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409 } |
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410 context->timer_b = context->timer_b_load; |
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411 } |
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412 } |
2029
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413 } else if (context->timer_control & BIT_TIMERB_LOAD) { |
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414 context->timer_control &= ~BIT_TIMERB_LOAD; |
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415 context->timer_b = context->timer_b_load; |
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416 } |
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417 context->sub_timer_b += 0x10; |
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418 //Update LFO |
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419 if (context->lfo_enable) { |
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420 if (context->lfo_counter) { |
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421 context->lfo_counter--; |
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422 } else { |
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423 context->lfo_counter = lfo_timer_values[context->lfo_freq]; |
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424 context->lfo_am_step += 2; |
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425 context->lfo_am_step &= 0xFE; |
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426 uint8_t old_pm_step = context->lfo_pm_step; |
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427 context->lfo_pm_step = context->lfo_am_step / 8; |
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428 if (context->lfo_pm_step != old_pm_step) { |
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429 for (int chan = 0; chan < NUM_CHANNELS; chan++) |
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430 { |
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431 if (context->channels[chan].pms) { |
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432 for (int op = chan * 4; op < (chan + 1) * 4; op++) |
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433 { |
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434 context->operators[op].phase_inc = ym_calc_phase_inc(context, context->operators + op, op); |
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435 } |
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436 } |
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437 } |
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438 } |
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439 } |
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440 } |
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441 } |
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442 |
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443 void ym_run_envelope(ym2612_context *context, ym_channel *channel, ym_operator *operator) |
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444 { |
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445 uint32_t env_cyc = context->env_counter; |
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|
446 uint8_t rate; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
447 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
448 //operator->envelope = operator->sustain_level; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
449 operator->env_phase = PHASE_SUSTAIN; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
450 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
451 rate = operator->rates[operator->env_phase]; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
452 if (rate) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
453 uint8_t ks = channel->keycode >> operator->key_scaling;; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
454 rate = rate*2 + ks; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
455 if (rate > 63) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
456 rate = 63; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
457 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
458 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
459 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
460 if (!(env_cyc & ((1 << cycle_shift) - 1))) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
461 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
462 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle]; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
463 if (operator->env_phase == PHASE_ATTACK) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
464 //this can probably be optimized to a single shift rather than a multiply + shift |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
465 uint16_t old_env = operator->envelope; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
466 operator->envelope += ((~operator->envelope * envelope_inc) >> 4) & 0xFFFFFFFC; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
467 if (operator->envelope > old_env) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
468 //Handle overflow |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
469 operator->envelope = 0; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
470 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
471 if (!operator->envelope) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
472 operator->env_phase = PHASE_DECAY; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
473 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
474 } else { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
475 if (operator->ssg) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
476 if (operator->envelope < SSG_CENTER) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
477 envelope_inc *= 4; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
478 } else { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
479 envelope_inc = 0; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
480 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
481 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
482 //envelope value is 10-bits, but it will be used as a 4.8 value |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
483 operator->envelope += envelope_inc << 2; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
484 //clamp to max attenuation value |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
485 if ( |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
486 operator->envelope > MAX_ENVELOPE |
1879
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
487 || (operator->env_phase == PHASE_RELEASE && operator->envelope >= SSG_CENTER) |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
488 ) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
489 operator->envelope = MAX_ENVELOPE; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
490 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
491 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
492 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
493 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
494 |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
495 void ym_run_phase(ym2612_context *context, uint32_t channel, uint32_t op) |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
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1808
diff
changeset
|
496 { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
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1808
diff
changeset
|
497 if (channel != 5 || !context->dac_enable) { |
43a6cee4fd00
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1808
diff
changeset
|
498 //printf("updating operator %d of channel %d\n", op, channel); |
43a6cee4fd00
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1808
diff
changeset
|
499 ym_operator * operator = context->operators + op; |
43a6cee4fd00
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1808
diff
changeset
|
500 ym_channel * chan = context->channels + channel; |
43a6cee4fd00
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1808
diff
changeset
|
501 uint16_t phase = operator->phase_counter >> 10 & 0x3FF; |
2243
0d1d5dccdd28
Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents:
2081
diff
changeset
|
502 uint32_t old_phase = operator->phase_counter; |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
503 operator->phase_counter += operator->phase_inc;//ym_calc_phase_inc(context, operator, op); |
2243
0d1d5dccdd28
Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents:
2081
diff
changeset
|
504 operator->phase_overflow = (old_phase & 0xFFFFF) > (operator->phase_counter & 0xFFFFF); |
1879
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
505 int16_t mod = 0; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
506 if (op & 3) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
507 if (operator->mod_src[0]) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
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1808
diff
changeset
|
508 mod = *operator->mod_src[0]; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
509 if (operator->mod_src[1]) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
510 mod += *operator->mod_src[1]; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
511 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
512 mod >>= YM_MOD_SHIFT; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
513 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
514 } else { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
515 if (chan->feedback) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
516 mod = (chan->op1_old + operator->output) >> (10-chan->feedback); |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
517 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
518 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
519 uint16_t env = operator->envelope; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
520 if (operator->ssg) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
521 if (env >= SSG_CENTER) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
522 if (operator->ssg & SSG_ALTERNATE) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
523 if (operator->env_phase != PHASE_RELEASE && ( |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
524 !(operator->ssg & SSG_HOLD) || ((operator->ssg ^ operator->inverted) & SSG_INVERT) == 0 |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
525 )) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
526 operator->inverted ^= SSG_INVERT; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
527 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
528 } else if (!(operator->ssg & SSG_HOLD)) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
529 phase = operator->phase_counter = 0; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
530 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
531 if ( |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
532 (operator->env_phase == PHASE_DECAY || operator->env_phase == PHASE_SUSTAIN) |
1879
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
533 && !(operator->ssg & SSG_HOLD) |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
534 ) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
535 start_envelope(operator, chan); |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
536 env = operator->envelope; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
537 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
538 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
539 if (operator->inverted) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
540 env = (SSG_CENTER - env) & MAX_ENVELOPE; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
541 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
542 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
543 env += operator->total_level; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
544 if (operator->am) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
545 uint16_t base_am = (context->lfo_am_step & 0x80 ? context->lfo_am_step : ~context->lfo_am_step) & 0x7E; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
546 if (ams_shift[chan->ams] >= 0) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
547 env += (base_am >> ams_shift[chan->ams]) & MAX_ENVELOPE; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
548 } else { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
549 env += base_am << (-ams_shift[chan->ams]); |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
550 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
551 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
552 if (env > MAX_ENVELOPE) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
553 env = MAX_ENVELOPE; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
554 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
555 if (first_key_on) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
556 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]); |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
557 } |
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|
558 //if ((channel != 0 && channel != 4) || chan->algorithm != 5) { |
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|
559 phase += mod; |
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|
560 //} |
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|
561 |
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|
562 int16_t output = pow_table[sine_table[phase & 0x1FF] + env]; |
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|
563 if (phase & 0x200) { |
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changeset
|
564 output = -output; |
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|
565 } |
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diff
changeset
|
566 if (op % 4 == 0) { |
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changeset
|
567 chan->op1_old = operator->output; |
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changeset
|
568 } else if (op % 4 == 2) { |
43a6cee4fd00
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changeset
|
569 chan->op2_old = operator->output; |
43a6cee4fd00
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diff
changeset
|
570 } |
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changeset
|
571 operator->output = output; |
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changeset
|
572 //Update the channel output if we've updated all operators |
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changeset
|
573 if (op % 4 == 3) { |
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changeset
|
574 if (chan->algorithm < 4) { |
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changeset
|
575 chan->output = operator->output; |
2243
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|
576 chan->phase_overflow = operator->phase_overflow; |
1879
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|
577 } else if(chan->algorithm == 4) { |
2243
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|
578 ym_operator *other_op = context->operators + channel * 4 + 2; |
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|
579 chan->output = operator->output + other_op->output; |
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|
580 if (operator->phase_inc < other_op->phase_inc) { |
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|
581 chan->phase_overflow = operator->phase_overflow; |
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Initial implementation of oscilloscope debug view
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|
582 } else { |
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|
583 chan->phase_overflow = other_op->phase_overflow; |
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|
584 } |
1879
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|
585 } else { |
43a6cee4fd00
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|
586 output = 0; |
2243
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|
587 uint32_t lowest_phase_inc = 0xFFFFFFFF; |
1879
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|
588 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) { |
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|
589 output += context->operators[op].output; |
2243
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|
590 if (context->operators[op].phase_inc < lowest_phase_inc) { |
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|
591 lowest_phase_inc = context->operators[op].phase_inc; |
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|
592 chan->phase_overflow = context->operators[op].phase_overflow; |
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|
593 } |
1879
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|
594 } |
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changeset
|
595 chan->output = output; |
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|
596 } |
43a6cee4fd00
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diff
changeset
|
597 } |
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changeset
|
598 //puts("operator update done"); |
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|
599 } |
43a6cee4fd00
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changeset
|
600 } |
43a6cee4fd00
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changeset
|
601 |
43a6cee4fd00
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changeset
|
602 void ym_output_sample(ym2612_context *context) |
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|
603 { |
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changeset
|
604 int16_t left = 0, right = 0; |
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|
605 for (int i = 0; i < NUM_CHANNELS; i++) { |
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changeset
|
606 int16_t value = context->channels[i].output; |
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changeset
|
607 if (value > 0x1FE0) { |
43a6cee4fd00
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changeset
|
608 value = 0x1FE0; |
43a6cee4fd00
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|
609 } else if (value < -0x1FF0) { |
43a6cee4fd00
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changeset
|
610 value = -0x1FF0; |
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changeset
|
611 } else { |
43a6cee4fd00
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changeset
|
612 value &= 0x3FE0; |
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changeset
|
613 if (value & 0x2000) { |
43a6cee4fd00
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changeset
|
614 value |= 0xC000; |
43a6cee4fd00
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diff
changeset
|
615 } |
43a6cee4fd00
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Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
616 } |
43a6cee4fd00
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diff
changeset
|
617 if (value >= 0) { |
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changeset
|
618 value += context->zero_offset; |
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changeset
|
619 } else { |
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changeset
|
620 value -= context->zero_offset; |
43a6cee4fd00
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changeset
|
621 } |
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changeset
|
622 if (context->channels[i].logfile) { |
43a6cee4fd00
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changeset
|
623 fwrite(&value, sizeof(value), 1, context->channels[i].logfile); |
43a6cee4fd00
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diff
changeset
|
624 } |
2243
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Initial implementation of oscilloscope debug view
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2081
diff
changeset
|
625 if (context->scope) { |
0d1d5dccdd28
Initial implementation of oscilloscope debug view
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diff
changeset
|
626 scope_add_sample(context->scope, context->channels[i].scope_channel, value, context->channels[i].phase_overflow); |
0d1d5dccdd28
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2081
diff
changeset
|
627 } |
1879
43a6cee4fd00
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1808
diff
changeset
|
628 if (context->channels[i].lr & 0x80) { |
43a6cee4fd00
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1808
diff
changeset
|
629 left += (value * context->volume_mult) / context->volume_div; |
43a6cee4fd00
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1808
diff
changeset
|
630 } else if (context->zero_offset) { |
43a6cee4fd00
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1808
diff
changeset
|
631 if (value >= 0) { |
43a6cee4fd00
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1808
diff
changeset
|
632 left += (context->zero_offset * context->volume_mult) / context->volume_div; |
43a6cee4fd00
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1808
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changeset
|
633 } else { |
43a6cee4fd00
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changeset
|
634 left -= (context->zero_offset * context->volume_mult) / context->volume_div; |
43a6cee4fd00
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1808
diff
changeset
|
635 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
636 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
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1808
diff
changeset
|
637 if (context->channels[i].lr & 0x40) { |
43a6cee4fd00
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1808
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changeset
|
638 right += (value * context->volume_mult) / context->volume_div; |
43a6cee4fd00
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1808
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changeset
|
639 } else if (context->zero_offset) { |
43a6cee4fd00
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1808
diff
changeset
|
640 if (value >= 0) { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
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1808
diff
changeset
|
641 right += (context->zero_offset * context->volume_mult) / context->volume_div; |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
642 } else { |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
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1808
diff
changeset
|
643 right -= (context->zero_offset * context->volume_mult) / context->volume_div; |
43a6cee4fd00
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Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
644 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
645 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
646 } |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
647 render_put_stereo_sample(context->audio, left, right); |
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
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1808
diff
changeset
|
648 } |
43a6cee4fd00
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1808
diff
changeset
|
649 |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
650 void ym_run(ym2612_context * context, uint32_t to_cycle) |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
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parents:
diff
changeset
|
651 { |
1879
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diff
changeset
|
652 if (context->current_cycle >= to_cycle) { |
43a6cee4fd00
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diff
changeset
|
653 return; |
43a6cee4fd00
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changeset
|
654 } |
362 | 655 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle); |
656 //TODO: Fix channel update order OR remap channels in register write | |
380
1c8d74f2ab0b
Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents:
379
diff
changeset
|
657 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) { |
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
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288
diff
changeset
|
658 //Update timers at beginning of 144 cycle period |
403 | 659 if (!context->current_op) { |
1879
43a6cee4fd00
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1808
diff
changeset
|
660 ym_run_timers(context); |
411
baf4688901f2
Initial stab at LFO phase modulation
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parents:
407
diff
changeset
|
661 } |
359
cc39629e8d06
YM2612 WIP snapshot before register refactor
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288
diff
changeset
|
662 //Update Envelope Generator |
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
663 if (!(context->current_op % 3)) { |
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
664 uint32_t op = context->current_env_op; |
362 | 665 ym_operator * operator = context->operators + op; |
666 ym_channel * channel = context->channels + op/4; | |
1879
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changeset
|
667 ym_run_envelope(context, channel, operator); |
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
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parents:
362
diff
changeset
|
668 context->current_env_op++; |
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
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parents:
362
diff
changeset
|
669 if (context->current_env_op == NUM_OPERATORS) { |
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
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362
diff
changeset
|
670 context->current_env_op = 0; |
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
671 context->env_counter++; |
362 | 672 } |
673 } | |
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
674 |
362 | 675 //Update Phase Generator |
1879
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
676 ym_run_phase(context, context->current_op / 4, context->current_op); |
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
677 context->current_op++; |
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
678 if (context->current_op == NUM_OPERATORS) { |
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
679 context->current_op = 0; |
1879
43a6cee4fd00
Split ym_run into a few different functions to enhance clarity
Michael Pavone <pavone@retrodev.com>
parents:
1808
diff
changeset
|
680 ym_output_sample(context); |
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
681 } |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
682 |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
683 } |
362 | 684 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle); |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
685 } |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
686 |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
687 void ym_address_write_part1(ym2612_context * context, uint8_t address) |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
688 { |
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
689 //printf("address_write_part1: %X\n", address); |
362 | 690 context->selected_reg = address; |
691 context->selected_part = 0; | |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
692 } |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
693 |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
694 void ym_address_write_part2(ym2612_context * context, uint8_t address) |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
695 { |
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
696 //printf("address_write_part2: %X\n", address); |
362 | 697 context->selected_reg = address; |
698 context->selected_part = 1; | |
699 } | |
700 | |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1002
diff
changeset
|
701 static uint8_t fnum_to_keycode[] = { |
362 | 702 //F11 = 0 |
703 0,0,0,0,0,0,0,1, | |
704 //F11 = 1 | |
705 2,3,3,3,3,3,3,3 | |
706 }; | |
707 | |
708 //table courtesy of Nemesis | |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1002
diff
changeset
|
709 static uint32_t detune_table[][4] = { |
362 | 710 {0, 0, 1, 2}, //0 (0x00) |
711 {0, 0, 1, 2}, //1 (0x01) | |
712 {0, 0, 1, 2}, //2 (0x02) | |
713 {0, 0, 1, 2}, //3 (0x03) | |
714 {0, 1, 2, 2}, //4 (0x04) | |
715 {0, 1, 2, 3}, //5 (0x05) | |
716 {0, 1, 2, 3}, //6 (0x06) | |
717 {0, 1, 2, 3}, //7 (0x07) | |
718 {0, 1, 2, 4}, //8 (0x08) | |
719 {0, 1, 3, 4}, //9 (0x09) | |
720 {0, 1, 3, 4}, //10 (0x0A) | |
721 {0, 1, 3, 5}, //11 (0x0B) | |
722 {0, 2, 4, 5}, //12 (0x0C) | |
723 {0, 2, 4, 6}, //13 (0x0D) | |
724 {0, 2, 4, 6}, //14 (0x0E) | |
725 {0, 2, 5, 7}, //15 (0x0F) | |
726 {0, 2, 5, 8}, //16 (0x10) | |
727 {0, 3, 6, 8}, //17 (0x11) | |
728 {0, 3, 6, 9}, //18 (0x12) | |
729 {0, 3, 7,10}, //19 (0x13) | |
730 {0, 4, 8,11}, //20 (0x14) | |
731 {0, 4, 8,12}, //21 (0x15) | |
732 {0, 4, 9,13}, //22 (0x16) | |
733 {0, 5,10,14}, //23 (0x17) | |
734 {0, 5,11,16}, //24 (0x18) | |
735 {0, 6,12,17}, //25 (0x19) | |
736 {0, 6,13,19}, //26 (0x1A) | |
737 {0, 7,14,20}, //27 (0x1B) | |
738 {0, 8,16,22}, //28 (0x1C) | |
739 {0, 8,16,22}, //29 (0x1D) | |
740 {0, 8,16,22}, //30 (0x1E) | |
741 {0, 8,16,22} | |
742 }; //31 (0x1F) | |
743 | |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1002
diff
changeset
|
744 static uint32_t ym_calc_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op) |
362 | 745 { |
746 uint32_t chan_num = op / 4; | |
747 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op); | |
748 //base frequency | |
749 ym_channel * channel = context->channels + chan_num; | |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
750 uint32_t inc, detune; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
751 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) { |
738
8972378e314f
Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents:
650
diff
changeset
|
752 //supplemental fnum registers are in a different order than normal slot paramters |
936
f1a8124ad881
Fix register to operator mapping for channel 3 special mode and actually get it right this time
Michael Pavone <pavone@retrodev.com>
parents:
935
diff
changeset
|
753 int index = op-2*4; |
f1a8124ad881
Fix register to operator mapping for channel 3 special mode and actually get it right this time
Michael Pavone <pavone@retrodev.com>
parents:
935
diff
changeset
|
754 if (index < 2) { |
f1a8124ad881
Fix register to operator mapping for channel 3 special mode and actually get it right this time
Michael Pavone <pavone@retrodev.com>
parents:
935
diff
changeset
|
755 index ^= 1; |
f1a8124ad881
Fix register to operator mapping for channel 3 special mode and actually get it right this time
Michael Pavone <pavone@retrodev.com>
parents:
935
diff
changeset
|
756 } |
738
8972378e314f
Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents:
650
diff
changeset
|
757 inc = context->ch3_supp[index].fnum; |
935
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
758 if (channel->pms) { |
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
759 inc = inc * 2 + lfo_pm_table[(inc & 0x7F0) * 16 + channel->pms + context->lfo_pm_step]; |
1802
1d1198f16279
Fix a couple of minor cases of extra precision in LFO implementation
Michael Pavone <pavone@retrodev.com>
parents:
1798
diff
changeset
|
760 inc &= 0xFFF; |
935
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
761 } |
738
8972378e314f
Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents:
650
diff
changeset
|
762 if (!context->ch3_supp[index].block) { |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
763 inc >>= 1; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
764 } else { |
738
8972378e314f
Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents:
650
diff
changeset
|
765 inc <<= (context->ch3_supp[index].block-1); |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
766 } |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
767 //detune |
738
8972378e314f
Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents:
650
diff
changeset
|
768 detune = detune_table[context->ch3_supp[index].keycode][operator->detune & 0x3]; |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
769 } else { |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
770 inc = channel->fnum; |
935
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
771 if (channel->pms) { |
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
772 inc = inc * 2 + lfo_pm_table[(inc & 0x7F0) * 16 + channel->pms + context->lfo_pm_step]; |
1808
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
773 inc &= 0xFFF; |
935
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
774 } |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
775 if (!channel->block) { |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
776 inc >>= 1; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
777 } else { |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
778 inc <<= (channel->block-1); |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
779 } |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
780 //detune |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
781 detune = detune_table[channel->keycode][operator->detune & 0x3]; |
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
782 } |
935
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
783 if (channel->pms) { |
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
784 inc >>= 1; |
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
785 } |
739
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
786 if (operator->detune & 0x4) { |
362 | 787 inc -= detune; |
788 //this can underflow, mask to 17-bit result | |
789 inc &= 0x1FFFF; | |
790 } else { | |
791 inc += detune; | |
792 } | |
793 //multiple | |
794 if (operator->multiple) { | |
795 inc *= operator->multiple; | |
739
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
796 inc &= 0xFFFFF; |
362 | 797 } else { |
798 //0.5 | |
799 inc >>= 1; | |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
800 } |
365
3ba3b6656fff
Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents:
364
diff
changeset
|
801 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple); |
935
01fb50390b27
Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents:
930
diff
changeset
|
802 return inc; |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
803 } |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
804 |
1909
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
805 void ym_vgm_log(ym2612_context *context, uint32_t master_clock, vgm_writer *vgm) |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
806 { |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
807 vgm_ym2612_init(vgm, 6 * master_clock / context->clock_inc); |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
808 context->vgm = vgm; |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
809 for (uint8_t reg = YM_PART1_START; reg < YM_REG_END; reg++) { |
1912
00fb99805445
Skip invalid registers when dumping initial YM2612 state to VGM log
Michael Pavone <pavone@retrodev.com>
parents:
1909
diff
changeset
|
810 if ((reg >= REG_DETUNE_MULT && (reg & 3) == 3) || (reg >= 0x2D && reg < REG_DETUNE_MULT) || reg == 0x23 || reg == 0x29) { |
00fb99805445
Skip invalid registers when dumping initial YM2612 state to VGM log
Michael Pavone <pavone@retrodev.com>
parents:
1909
diff
changeset
|
811 //skip invalid registers |
00fb99805445
Skip invalid registers when dumping initial YM2612 state to VGM log
Michael Pavone <pavone@retrodev.com>
parents:
1909
diff
changeset
|
812 continue; |
00fb99805445
Skip invalid registers when dumping initial YM2612 state to VGM log
Michael Pavone <pavone@retrodev.com>
parents:
1909
diff
changeset
|
813 } |
1909
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
814 vgm_ym2612_part1_write(context->vgm, context->current_cycle, reg, context->part1_regs[reg - YM_PART1_START]); |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
815 } |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
816 |
1909
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
817 for (uint8_t reg = YM_PART2_START; reg < YM_REG_END; reg++) { |
1912
00fb99805445
Skip invalid registers when dumping initial YM2612 state to VGM log
Michael Pavone <pavone@retrodev.com>
parents:
1909
diff
changeset
|
818 if ((reg & 3) == 3 || (reg >= REG_FNUM_LOW_CH3 && reg < REG_ALG_FEEDBACK)) { |
00fb99805445
Skip invalid registers when dumping initial YM2612 state to VGM log
Michael Pavone <pavone@retrodev.com>
parents:
1909
diff
changeset
|
819 //skip invalid registers |
00fb99805445
Skip invalid registers when dumping initial YM2612 state to VGM log
Michael Pavone <pavone@retrodev.com>
parents:
1909
diff
changeset
|
820 continue; |
00fb99805445
Skip invalid registers when dumping initial YM2612 state to VGM log
Michael Pavone <pavone@retrodev.com>
parents:
1909
diff
changeset
|
821 } |
1909
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
822 vgm_ym2612_part2_write(context->vgm, context->current_cycle, reg, context->part2_regs[reg - YM_PART2_START]); |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
823 } |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
824 } |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
825 |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
826 void ym_data_write(ym2612_context * context, uint8_t value) |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
827 { |
1902
32a3aa7b4a45
Fix YM2612 busy flag timing
Michael Pavone <pavone@retrodev.com>
parents:
1880
diff
changeset
|
828 context->write_cycle = context->current_cycle; |
32a3aa7b4a45
Fix YM2612 busy flag timing
Michael Pavone <pavone@retrodev.com>
parents:
1880
diff
changeset
|
829 context->busy_start = context->current_cycle + context->clock_inc; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
830 |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
831 if (context->selected_reg >= YM_REG_END) { |
362 | 832 return; |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
833 } |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
834 if (context->selected_part) { |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
835 if (context->selected_reg < YM_PART2_START) { |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
836 return; |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
837 } |
1909
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
838 if (context->vgm) { |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
839 vgm_ym2612_part2_write(context->vgm, context->current_cycle, context->selected_reg, value); |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
840 } |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
841 context->part2_regs[context->selected_reg - YM_PART2_START] = value; |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
842 } else { |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
843 if (context->selected_reg < YM_PART1_START) { |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
844 return; |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
845 } |
1909
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
846 if (context->vgm) { |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
847 vgm_ym2612_part1_write(context->vgm, context->current_cycle, context->selected_reg, value); |
508522f08e4d
Initial stab at VGM logging support
Michael Pavone <pavone@retrodev.com>
parents:
1904
diff
changeset
|
848 } |
451
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
849 context->part1_regs[context->selected_reg - YM_PART1_START] = value; |
b7c3b2d22858
Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents:
448
diff
changeset
|
850 } |
1946 | 851 uint8_t buffer[3] = {context->selected_part, context->selected_reg, value}; |
852 event_log(EVENT_YM_REG, context->current_cycle, sizeof(buffer), buffer); | |
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
853 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1); |
362 | 854 if (context->selected_reg < 0x30) { |
855 //Shared regs | |
856 switch (context->selected_reg) | |
857 { | |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
858 //TODO: Test reg |
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
859 case REG_LFO: |
532
666210adf87b
Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents:
527
diff
changeset
|
860 /*if ((value & 0x8) && !context->lfo_enable) { |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
861 printf("LFO Enabled, Freq: %d\n", value & 0x7); |
532
666210adf87b
Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents:
527
diff
changeset
|
862 }*/ |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
863 context->lfo_enable = value & 0x8; |
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
864 if (!context->lfo_enable) { |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
865 uint8_t old_pm_step = context->lfo_pm_step; |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
866 context->lfo_am_step = context->lfo_pm_step = 0; |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
867 if (old_pm_step) { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
868 for (int chan = 0; chan < NUM_CHANNELS; chan++) |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
869 { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
870 if (context->channels[chan].pms) { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
871 for (int op = chan * 4; op < (chan + 1) * 4; op++) |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
872 { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
873 context->operators[op].phase_inc = ym_calc_phase_inc(context, context->operators + op, op); |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
874 } |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
875 } |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
876 } |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
877 } |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
878 } |
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
879 context->lfo_freq = value & 0x7; |
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
880 |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
881 break; |
362 | 882 case REG_TIMERA_HIGH: |
883 context->timer_a_load &= 0x3; | |
884 context->timer_a_load |= value << 2; | |
885 break; | |
886 case REG_TIMERA_LOW: | |
887 context->timer_a_load &= 0xFFFC; | |
888 context->timer_a_load |= value & 0x3; | |
889 break; | |
890 case REG_TIMERB: | |
845
3a18b5f63afc
Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents:
740
diff
changeset
|
891 context->timer_b_load = value; |
362 | 892 break; |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
893 case REG_TIME_CTRL: { |
403 | 894 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) { |
845
3a18b5f63afc
Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents:
740
diff
changeset
|
895 context->timer_a = TIMER_A_MAX; |
3a18b5f63afc
Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents:
740
diff
changeset
|
896 context->timer_control |= BIT_TIMERA_LOAD; |
403 | 897 } |
898 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) { | |
845
3a18b5f63afc
Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents:
740
diff
changeset
|
899 context->timer_b = TIMER_B_MAX; |
3a18b5f63afc
Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents:
740
diff
changeset
|
900 context->timer_control |= BIT_TIMERB_LOAD; |
403 | 901 } |
845
3a18b5f63afc
Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents:
740
diff
changeset
|
902 context->timer_control &= (BIT_TIMERA_LOAD | BIT_TIMERB_LOAD); |
3a18b5f63afc
Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents:
740
diff
changeset
|
903 context->timer_control |= value & 0xF; |
403 | 904 if (value & BIT_TIMERA_RESET) { |
905 context->status &= ~BIT_STATUS_TIMERA; | |
906 } | |
907 if (value & BIT_TIMERB_RESET) { | |
908 context->status &= ~BIT_STATUS_TIMERB; | |
909 } | |
1300
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
910 if (context->ch3_mode == CSM_MODE && (value & 0xC0) != CSM_MODE && context->csm_keyon) { |
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
911 csm_keyoff(context); |
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
912 } |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
913 uint8_t old_mode = context->ch3_mode; |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
914 context->ch3_mode = value & 0xC0; |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
915 if (context->ch3_mode != old_mode) { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
916 for (int op = 2 * 4; op < 3*4; op++) |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
917 { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
918 context->operators[op].phase_inc = ym_calc_phase_inc(context, context->operators + op, op); |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
919 } |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
920 } |
362 | 921 break; |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
922 } |
362 | 923 case REG_KEY_ONOFF: { |
924 uint8_t channel = value & 0x7; | |
386
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
925 if (channel != 3 && channel != 7) { |
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
926 if (channel > 2) { |
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
927 channel--; |
6e5c4f3ab0e2
Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents:
383
diff
changeset
|
928 } |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
929 uint8_t changes = channel == 2 |
1300
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
930 ? (value | context->csm_keyon) ^ (context->channels[channel].keyon | context->csm_keyon) |
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
931 : value ^ context->channels[channel].keyon; |
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
932 context->channels[channel].keyon = value & 0xF0; |
851
b10cf2c921ad
Fix mapping of key on/off reg bits to operators
Michael Pavone <pavone@retrodev.com>
parents:
848
diff
changeset
|
933 for (uint8_t op = channel * 4, bit = 0; op < (channel + 1) * 4; op++, bit++) { |
1300
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
934 if (changes & keyon_bits[bit]) { |
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
935 if (value & keyon_bits[bit]) { |
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
936 first_key_on = 1; |
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
937 //printf("Key On for operator %d in channel %d\n", op, channel); |
1300
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
938 keyon(context->operators + op, context->channels + channel); |
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
939 } else { |
4b893b02444e
Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents:
1102
diff
changeset
|
940 //printf("Key Off for operator %d in channel %d\n", op, channel); |
1301
babff81e4cfd
Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents:
1300
diff
changeset
|
941 keyoff(context->operators + op); |
448
e85a107e6ec0
Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents:
424
diff
changeset
|
942 } |
362 | 943 } |
944 } | |
945 } | |
946 break; | |
947 } | |
948 case REG_DAC: | |
949 if (context->dac_enable) { | |
950 context->channels[5].output = (((int16_t)value) - 0x80) << 6; | |
396
09328dbe6700
Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents:
386
diff
changeset
|
951 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle); |
362 | 952 } |
953 break; | |
954 case REG_DAC_ENABLE: | |
364
62177cc39049
Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents:
362
diff
changeset
|
955 //printf("DAC Enable: %X\n", value); |
362 | 956 context->dac_enable = value & 0x80; |
957 break; | |
958 } | |
959 } else if (context->selected_reg < 0xA0) { | |
960 //part | |
961 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0; | |
962 //channel in part | |
963 if ((context->selected_reg & 0x3) != 0x3) { | |
370
5f215603d001
Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents:
369
diff
changeset
|
964 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4); |
362 | 965 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4); |
966 ym_operator * operator = context->operators + op; | |
967 switch (context->selected_reg & 0xF0) | |
968 { | |
969 case REG_DETUNE_MULT: | |
970 operator->detune = value >> 4 & 0x7; | |
971 operator->multiple = value & 0xF; | |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
972 operator->phase_inc = ym_calc_phase_inc(context, operator, op); |
362 | 973 break; |
974 case REG_TOTAL_LEVEL: | |
975 operator->total_level = (value & 0x7F) << 5; | |
976 break; | |
977 case REG_ATTACK_KS: | |
376 | 978 operator->key_scaling = 3 - (value >> 6); |
362 | 979 operator->rates[PHASE_ATTACK] = value & 0x1F; |
980 break; | |
981 case REG_DECAY_AM: | |
739
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
982 operator->am = value & 0x80; |
362 | 983 operator->rates[PHASE_DECAY] = value & 0x1F; |
984 break; | |
985 case REG_SUSTAIN_RATE: | |
986 operator->rates[PHASE_SUSTAIN] = value & 0x1F; | |
987 break; | |
988 case REG_S_LVL_R_RATE: | |
989 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1; | |
852
5de8759b87af
Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents:
851
diff
changeset
|
990 operator->sustain_level = (value & 0xF0) << 3; |
5de8759b87af
Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents:
851
diff
changeset
|
991 if (operator->sustain_level == 0x780) { |
5de8759b87af
Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents:
851
diff
changeset
|
992 operator->sustain_level = MAX_ENVELOPE; |
5de8759b87af
Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents:
851
diff
changeset
|
993 } |
362 | 994 break; |
1301
babff81e4cfd
Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents:
1300
diff
changeset
|
995 case REG_SSG_EG: |
babff81e4cfd
Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
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1300
diff
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|
996 if (!(value & SSG_ENABLE)) { |
babff81e4cfd
Initial implementation of YM2612 SSG-EG mode
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1300
diff
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|
997 value = 0; |
babff81e4cfd
Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents:
1300
diff
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|
998 } |
babff81e4cfd
Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents:
1300
diff
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|
999 if ((value ^ operator->ssg) & SSG_INVERT) { |
babff81e4cfd
Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents:
1300
diff
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|
1000 operator->inverted ^= SSG_INVERT; |
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Initial implementation of YM2612 SSG-EG mode
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1300
diff
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|
1001 } |
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Michael Pavone <pavone@retrodev.com>
parents:
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diff
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|
1002 operator->ssg = value; |
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diff
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|
1003 break; |
362 | 1004 } |
1005 } | |
1006 } else { | |
1007 uint8_t channel = context->selected_reg & 0x3; | |
1008 if (channel != 3) { | |
1009 if (context->selected_part) { | |
1010 channel += 3; | |
1011 } | |
1012 //printf("write targets channel %d\n", channel); | |
1013 switch (context->selected_reg & 0xFC) | |
1014 { | |
1015 case REG_FNUM_LOW: | |
1016 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7; | |
1017 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value; | |
1018 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7]; | |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
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|
1019 for (int op = channel * 4; op < (channel + 1) * 4; op++) |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1020 { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1021 context->operators[op].phase_inc = ym_calc_phase_inc(context, context->operators + op, op); |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
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1879
diff
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|
1022 } |
362 | 1023 break; |
1024 case REG_BLOCK_FNUM_H:{ | |
1025 context->channels[channel].block_fnum_latch = value; | |
1026 break; | |
1027 } | |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
1028 case REG_FNUM_LOW_CH3: |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
1029 if (channel < 3) { |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
1030 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
1031 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
1032 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7]; |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
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1879
diff
changeset
|
1033 if (context->ch3_mode) { |
e77f7a7c79a5
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Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1034 int op = 2 * 4 + (channel < 2 ? (channel ^ 1) : channel); |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1035 context->operators[op].phase_inc = ym_calc_phase_inc(context, context->operators + op, op); |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
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|
1036 } |
383
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
1037 } |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
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|
1038 break; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
1039 case REG_BLOCK_FN_CH3: |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
changeset
|
1040 if (channel < 3) { |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
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|
1041 context->ch3_supp[channel].block_fnum_latch = value; |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
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|
1042 } |
72933100c55c
Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents:
382
diff
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|
1043 break; |
362 | 1044 case REG_ALG_FEEDBACK: |
1045 context->channels[channel].algorithm = value & 0x7; | |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
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diff
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|
1046 switch (context->channels[channel].algorithm) |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1047 { |
804f13c090b4
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Mike Pavone <pavone@retrodev.com>
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1654
diff
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|
1048 case 0: |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
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diff
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|
1049 //operator 3 modulated by operator 2 |
1808
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1050 //this uses a special op2 result reg on HW, but that reg will have the most recent |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1051 //result from op2 when op3 starts executing |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1052 context->operators[channel*4+1].mod_src[0] = &context->operators[channel*4+2].output; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1053 context->operators[channel*4+1].mod_src[1] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1054 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1055 //operator 2 modulated by operator 1 |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1056 context->operators[channel*4+2].mod_src[0] = &context->operators[channel*4+0].output; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1057 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
1058 //operator 4 modulated by operator 3 |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
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diff
changeset
|
1059 context->operators[channel*4+3].mod_src[0] = &context->operators[channel*4+1].output; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1060 context->operators[channel*4+3].mod_src[1] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1061 break; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1062 case 1: |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1063 //operator 3 modulated by operator 1+2 |
1808
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1064 //op1 starts executing before this, but due to pipeline length the most current result is |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1065 //not available and instead the previous result is used |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1066 context->operators[channel*4+1].mod_src[0] = &context->channels[channel].op1_old; |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1067 //this uses a special op2 result reg on HW, but that reg will have the most recent |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1068 //result from op2 when op3 starts executing |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1069 context->operators[channel*4+1].mod_src[1] = &context->operators[channel*4+2].output; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1070 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1071 //operator 2 unmodulated |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1072 context->operators[channel*4+2].mod_src[0] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1073 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1074 //operator 4 modulated by operator 3 |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1075 context->operators[channel*4+3].mod_src[0] = &context->operators[channel*4+1].output; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1076 context->operators[channel*4+3].mod_src[1] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1077 break; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1078 case 2: |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1079 //operator 3 modulated by operator 2 |
1808
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1080 //this uses a special op2 result reg on HW, but that reg will have the most recent |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1081 //result from op2 when op3 starts executing |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1082 context->operators[channel*4+1].mod_src[0] = &context->operators[channel*4+2].output; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1083 context->operators[channel*4+1].mod_src[1] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1084 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1085 //operator 2 unmodulated |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1086 context->operators[channel*4+2].mod_src[0] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1087 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1088 //operator 4 modulated by operator 1+3 |
1808
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1089 //this uses a special op1 result reg on HW, but that reg will have the most recent |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1090 //result from op1 when op4 starts executing |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1091 context->operators[channel*4+3].mod_src[0] = &context->operators[channel*4+0].output; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1092 context->operators[channel*4+3].mod_src[1] = &context->operators[channel*4+1].output; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1093 break; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1094 case 3: |
804f13c090b4
Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1095 //operator 3 unmodulated |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1096 context->operators[channel*4+1].mod_src[0] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1097 context->operators[channel*4+1].mod_src[1] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1098 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1099 //operator 2 modulated by operator 1 |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1100 context->operators[channel*4+2].mod_src[0] = &context->operators[channel*4+0].output; |
2081
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Initial stab at RF5C164 emulation
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parents:
2029
diff
changeset
|
1101 |
1656
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Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1102 //operator 4 modulated by operator 2+3 |
1808
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
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parents:
1803
diff
changeset
|
1103 //op2 starts executing before this, but due to pipeline length the most current result is |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1104 //not available and instead the previous result is used |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1105 context->operators[channel*4+3].mod_src[0] = &context->channels[channel].op2_old; |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1106 context->operators[channel*4+3].mod_src[1] = &context->operators[channel*4+1].output; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1107 break; |
804f13c090b4
Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1108 case 4: |
804f13c090b4
Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1109 //operator 3 unmodulated |
804f13c090b4
Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1110 context->operators[channel*4+1].mod_src[0] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1111 context->operators[channel*4+1].mod_src[1] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1112 |
1656
804f13c090b4
Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1113 //operator 2 modulated by operator 1 |
804f13c090b4
Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1114 context->operators[channel*4+2].mod_src[0] = &context->operators[channel*4+0].output; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
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parents:
2029
diff
changeset
|
1115 |
1656
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parents:
1654
diff
changeset
|
1116 //operator 4 modulated by operator 3 |
804f13c090b4
Optimize YM operator modulation
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parents:
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diff
changeset
|
1117 context->operators[channel*4+3].mod_src[0] = &context->operators[channel*4+1].output; |
804f13c090b4
Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1118 context->operators[channel*4+3].mod_src[1] = NULL; |
804f13c090b4
Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1119 break; |
804f13c090b4
Optimize YM operator modulation
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parents:
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diff
changeset
|
1120 case 5: |
804f13c090b4
Optimize YM operator modulation
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parents:
1654
diff
changeset
|
1121 //operator 3 modulated by operator 1 |
1808
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
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parents:
1803
diff
changeset
|
1122 //op1 starts executing before this, but due to pipeline length the most current result is |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1123 //not available and instead the previous result is used |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1124 context->operators[channel*4+1].mod_src[0] = &context->channels[channel].op1_old; |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1125 context->operators[channel*4+1].mod_src[1] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1126 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1127 //operator 2 modulated by operator 1 |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1128 context->operators[channel*4+2].mod_src[0] = &context->operators[channel*4+0].output; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1129 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1130 //operator 4 modulated by operator 1 |
1808
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1131 //this uses a special op1 result reg on HW, but that reg will have the most recent |
ce6881d64eef
Operator results should be delayed by one sample when used as a modulator in some cases based on relative execution time and pipeline length
Michael Pavone <pavone@retrodev.com>
parents:
1803
diff
changeset
|
1132 //result from op1 when op4 starts executing |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1133 context->operators[channel*4+3].mod_src[0] = &context->operators[channel*4+0].output; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1134 context->operators[channel*4+3].mod_src[1] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1135 break; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1136 case 6: |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1137 //operator 3 unmodulated |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1138 context->operators[channel*4+1].mod_src[0] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1139 context->operators[channel*4+1].mod_src[1] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1140 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1141 //operator 2 modulated by operator 1 |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1142 context->operators[channel*4+2].mod_src[0] = &context->operators[channel*4+0].output; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1143 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1144 //operator 4 unmodulated |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1145 context->operators[channel*4+3].mod_src[0] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1146 context->operators[channel*4+3].mod_src[1] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1147 break; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1148 case 7: |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1149 //everything is an output so no modulation (except for op 1 feedback) |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1150 context->operators[channel*4+1].mod_src[0] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1151 context->operators[channel*4+1].mod_src[1] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1152 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1153 context->operators[channel*4+2].mod_src[0] = NULL; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1154 |
1656
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1155 context->operators[channel*4+3].mod_src[0] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1156 context->operators[channel*4+3].mod_src[1] = NULL; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1157 break; |
804f13c090b4
Optimize YM operator modulation
Mike Pavone <pavone@retrodev.com>
parents:
1654
diff
changeset
|
1158 } |
362 | 1159 context->channels[channel].feedback = value >> 3 & 0x7; |
527
7df7f493b3b6
Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents:
522
diff
changeset
|
1160 //printf("Algorithm %d, feedback %d for channel %d\n", value & 0x7, value >> 3 & 0x7, channel); |
362 | 1161 break; |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1162 case REG_LR_AMS_PMS: { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1163 uint8_t old_pms = context->channels[channel].pms; |
411
baf4688901f2
Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents:
407
diff
changeset
|
1164 context->channels[channel].pms = (value & 0x7) * 32; |
362 | 1165 context->channels[channel].ams = value >> 4 & 0x3; |
1166 context->channels[channel].lr = value & 0xC0; | |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1167 if (old_pms != context->channels[channel].pms) { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1168 for (int op = channel * 4; op < (channel + 1) * 4; op++) |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1169 { |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1170 context->operators[op].phase_inc = ym_calc_phase_inc(context, context->operators + op, op); |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1171 } |
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1172 } |
369
fc820ab1394b
Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents:
365
diff
changeset
|
1173 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel); |
362 | 1174 break; |
1175 } | |
1880
e77f7a7c79a5
Cache operator phase increment for a small perf improvement
Michael Pavone <pavone@retrodev.com>
parents:
1879
diff
changeset
|
1176 } |
362 | 1177 } |
1178 } | |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1179 } |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1180 |
1904
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1181 uint8_t ym_read_status(ym2612_context * context, uint32_t cycle, uint32_t port) |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1182 { |
1904
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1183 uint8_t status; |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1184 port &= context->status_address_mask; |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1185 if (port) { |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1186 if (context->last_status_cycle != CYCLE_NEVER && cycle - context->last_status_cycle > context->invalid_status_decay) { |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1187 context->last_status = 0; |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1188 } |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1189 status = context->last_status; |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1190 } else { |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1191 status = context->status; |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1192 if (cycle >= context->busy_start && cycle < context->busy_start + context->busy_cycles) { |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1193 status |= 0x80; |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1194 } |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1195 context->last_status = status; |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1196 context->last_status_cycle = cycle; |
1902
32a3aa7b4a45
Fix YM2612 busy flag timing
Michael Pavone <pavone@retrodev.com>
parents:
1880
diff
changeset
|
1197 } |
32a3aa7b4a45
Fix YM2612 busy flag timing
Michael Pavone <pavone@retrodev.com>
parents:
1880
diff
changeset
|
1198 return status; |
2081
cfd53c94fffb
Initial stab at RF5C164 emulation
Michael Pavone <pavone@retrodev.com>
parents:
2029
diff
changeset
|
1199 |
288
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1200 } |
a8ee7934a1f8
Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1201 |
739
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1202 void ym_print_channel_info(ym2612_context *context, int channel) |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1203 { |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1204 ym_channel *chan = context->channels + channel; |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1205 printf("\n***Channel %d***\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1206 "Algorithm: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1207 "Feedback: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1208 "Pan: %s\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1209 "AMS: %d\n" |
845
3a18b5f63afc
Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents:
740
diff
changeset
|
1210 "PMS: %d\n", |
739
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1211 channel+1, chan->algorithm, chan->feedback, |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1212 chan->lr == 0xC0 ? "LR" : chan->lr == 0x80 ? "L" : chan->lr == 0x40 ? "R" : "", |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1213 chan->ams, chan->pms); |
930
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1214 if (channel == 2) { |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1215 printf( |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1216 "Mode: %X: %s\n", |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1217 context->ch3_mode, context->ch3_mode ? "special" : "normal"); |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1218 } |
739
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1219 for (int operator = channel * 4; operator < channel * 4+4; operator++) |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1220 { |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1221 int dispnum = operator - channel * 4 + 1; |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1222 if (dispnum == 2) { |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1223 dispnum = 3; |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1224 } else if (dispnum == 3) { |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1225 dispnum = 2; |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1226 } |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1227 ym_operator *op = context->operators + operator; |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1228 printf("\nOperator %d:\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1229 " Multiple: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1230 " Detune: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1231 " Total Level: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1232 " Attack Rate: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1233 " Key Scaling: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1234 " Decay Rate: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1235 " Sustain Level: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1236 " Sustain Rate: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1237 " Release Rate: %d\n" |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1238 " Amplitude Modulation %s\n", |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1239 dispnum, op->multiple, op->detune, op->total_level, |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1240 op->rates[PHASE_ATTACK], op->key_scaling, op->rates[PHASE_DECAY], |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1241 op->sustain_level, op->rates[PHASE_SUSTAIN], op->rates[PHASE_RELEASE], |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1242 op->am ? "On" : "Off"); |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1243 } |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1244 } |
2317bdca03b4
Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents:
738
diff
changeset
|
1245 |
930
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1246 void ym_print_timer_info(ym2612_context *context) |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1247 { |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1248 printf("***Timer A***\n" |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1249 "Current Value: %d\n" |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1250 "Load Value: %d\n" |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1251 "Triggered: %s\n" |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1252 "Enabled: %s\n\n", |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1253 context->timer_a, |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1254 context->timer_a_load, |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1255 context->status & BIT_STATUS_TIMERA ? "yes" : "no", |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1256 context->timer_control & BIT_TIMERA_ENABLE ? "yes" : "no"); |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1257 printf("***Timer B***\n" |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1258 "Current Value: %d\n" |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1259 "Load Value: %d\n" |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1260 "Triggered: %s\n" |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1261 "Enabled: %s\n\n", |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1262 context->timer_b, |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1263 context->timer_b_load, |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1264 context->status & BIT_STATUS_TIMERB ? "yes" : "no", |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1265 context->timer_control & BIT_TIMERB_ENABLE ? "yes" : "no"); |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1266 } |
f33e8d88ab6f
Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents:
929
diff
changeset
|
1267 |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1268 void ym_serialize(ym2612_context *context, serialize_buffer *buf) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1269 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1270 save_buffer8(buf, context->part1_regs, YM_PART1_REGS); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1271 save_buffer8(buf, context->part2_regs, YM_PART2_REGS); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1272 for (int i = 0; i < NUM_OPERATORS; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1273 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1274 save_int32(buf, context->operators[i].phase_counter); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1275 save_int16(buf, context->operators[i].envelope); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1276 save_int16(buf, context->operators[i].output); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1277 save_int8(buf, context->operators[i].env_phase); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1278 save_int8(buf, context->operators[i].inverted); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1279 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1280 for (int i = 0; i < NUM_CHANNELS; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1281 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1282 save_int16(buf, context->channels[i].output); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1283 save_int16(buf, context->channels[i].op1_old); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1284 //Due to the latching behavior, these need to be saved |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1285 //even though duplicate info is probably in the regs array |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1286 save_int8(buf, context->channels[i].block); |
1450
08bc099a622f
Save entirety of fnum register, not just the low 8 bits
Michael Pavone <pavone@retrodev.com>
parents:
1447
diff
changeset
|
1287 save_int16(buf, context->channels[i].fnum); |
1447
a094815b1168
Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
1288 save_int8(buf, context->channels[i].keyon); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1289 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1290 for (int i = 0; i < 3; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1291 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1292 //Due to the latching behavior, these need to be saved |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1293 //even though duplicate info is probably in the regs array |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1294 save_int8(buf, context->ch3_supp[i].block); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1295 save_int8(buf, context->ch3_supp[i].fnum); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1296 } |
1447
a094815b1168
Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
1297 save_int8(buf, context->timer_control); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1298 save_int16(buf, context->timer_a); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1299 save_int8(buf, context->timer_b); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1300 save_int8(buf, context->sub_timer_b); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1301 save_int16(buf, context->env_counter); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1302 save_int8(buf, context->current_op); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1303 save_int8(buf, context->current_env_op); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1304 save_int8(buf, context->lfo_counter); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1305 save_int8(buf, context->csm_keyon); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1306 save_int8(buf, context->status); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1307 save_int8(buf, context->selected_reg); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1308 save_int8(buf, context->selected_part); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1309 save_int32(buf, context->current_cycle); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1310 save_int32(buf, context->write_cycle); |
1902
32a3aa7b4a45
Fix YM2612 busy flag timing
Michael Pavone <pavone@retrodev.com>
parents:
1880
diff
changeset
|
1311 save_int32(buf, context->busy_start); |
1904
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1312 save_int32(buf, context->last_status_cycle); |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1313 save_int32(buf, context->invalid_status_decay); |
8312e574100a
Implement selectable YM2612/YM3834 invalid status port behavior
Michael Pavone <pavone@retrodev.com>
parents:
1902
diff
changeset
|
1314 save_int8(buf, context->last_status); |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1315 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1316 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1317 void ym_deserialize(deserialize_buffer *buf, void *vcontext) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1318 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1319 ym2612_context *context = vcontext; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1320 uint8_t temp_regs[YM_PART1_REGS]; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1321 load_buffer8(buf, temp_regs, YM_PART1_REGS); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1322 context->selected_part = 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1323 for (int i = 0; i < YM_PART1_REGS; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1324 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1325 uint8_t reg = YM_PART1_START + i; |
1447
a094815b1168
Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
1326 if (reg == REG_TIME_CTRL) { |
a094815b1168
Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
1327 context->ch3_mode = temp_regs[i] & 0xC0; |
a094815b1168
Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
1328 } else if (reg != REG_FNUM_LOW && reg != REG_KEY_ONOFF) { |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1329 context->selected_reg = reg; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1330 ym_data_write(context, temp_regs[i]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1331 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1332 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1333 load_buffer8(buf, temp_regs, YM_PART2_REGS); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1334 context->selected_part = 1; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1335 for (int i = 0; i < YM_PART2_REGS; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1356
diff
changeset
|
1336 { |
4e5797b3935a
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parents:
1356
diff
changeset
|
1337 uint8_t reg = YM_PART2_START + i; |
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1338 if (reg != REG_FNUM_LOW) { |
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1339 context->selected_reg = reg; |
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1340 ym_data_write(context, temp_regs[i]); |
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1341 } |
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1342 } |
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1343 for (int i = 0; i < NUM_OPERATORS; i++) |
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1344 { |
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1345 context->operators[i].phase_counter = load_int32(buf); |
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1346 context->operators[i].envelope = load_int16(buf); |
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1347 context->operators[i].output = load_int16(buf); |
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1348 context->operators[i].env_phase = load_int8(buf); |
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1349 if (context->operators[i].env_phase > PHASE_RELEASE) { |
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1350 context->operators[i].env_phase = PHASE_RELEASE; |
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1351 } |
1450
08bc099a622f
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1352 context->operators[i].inverted = load_int8(buf) != 0 ? SSG_INVERT : 0; |
1427
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1353 } |
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1354 for (int i = 0; i < NUM_CHANNELS; i++) |
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1355 { |
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1356 context->channels[i].output = load_int16(buf); |
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1357 context->channels[i].op1_old = load_int16(buf); |
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1358 context->channels[i].block = load_int8(buf); |
1450
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1359 context->channels[i].fnum = load_int16(buf); |
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1360 context->channels[i].keycode = context->channels[i].block << 2 | fnum_to_keycode[context->channels[i].fnum >> 7]; |
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1361 context->channels[i].keyon = load_int8(buf); |
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1362 } |
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1363 for (int i = 0; i < 3; i++) |
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1364 { |
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1365 context->ch3_supp[i].block = load_int8(buf); |
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1366 context->ch3_supp[i].fnum = load_int8(buf); |
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1367 context->ch3_supp[i].keycode = context->ch3_supp[i].block << 2 | fnum_to_keycode[context->ch3_supp[i].fnum >> 7]; |
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1368 } |
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1369 context->timer_control = load_int8(buf); |
1427
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1370 context->timer_a = load_int16(buf); |
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1371 context->timer_b = load_int8(buf); |
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1372 context->sub_timer_b = load_int8(buf); |
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1373 context->env_counter = load_int16(buf); |
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1374 context->current_op = load_int8(buf); |
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1375 if (context->current_op >= NUM_OPERATORS) { |
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1376 context->current_op = 0; |
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1377 } |
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1378 context->current_env_op = load_int8(buf); |
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1379 if (context->current_env_op >= NUM_OPERATORS) { |
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1380 context->current_env_op = 0; |
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1381 } |
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1382 context->lfo_counter = load_int8(buf); |
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1383 context->csm_keyon = load_int8(buf); |
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1384 context->status = load_int8(buf); |
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1385 context->selected_reg = load_int8(buf); |
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1386 context->selected_part = load_int8(buf); |
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1387 context->current_cycle = load_int32(buf); |
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1388 context->write_cycle = load_int32(buf); |
1902
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1389 context->busy_start = load_int32(buf); |
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1390 if (buf->size > buf->cur_pos) { |
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1391 context->last_status_cycle = load_int32(buf); |
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1392 context->invalid_status_decay = load_int32(buf); |
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1393 context->last_status = load_int8(buf); |
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1394 } else { |
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1395 context->last_status = context->status; |
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1396 context->last_status_cycle = context->write_cycle; |
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1397 } |
1427
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1398 } |
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1399 |
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1400 void ym_enable_scope(ym2612_context *context, oscilloscope *scope, uint32_t master_clock) |
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1401 { |
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1402 static const char *names[] = { |
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1403 "YM2612 #1", |
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1404 "YM2612 #2", |
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1405 "YM2612 #3", |
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1406 "YM2612 #4", |
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1407 "YM2612 #5", |
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1408 "YM2612 #6" |
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1409 }; |
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1410 context->scope = scope; |
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1411 for (int i = 0; i < NUM_CHANNELS; i++) |
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1412 { |
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1413 context->channels[i].scope_channel = scope_add_channel(scope, names[i], master_clock / (context->clock_inc * NUM_OPERATORS)); |
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1414 } |
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1415 } |