annotate ym2612.c @ 930:f33e8d88ab6f

Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
author Michael Pavone <pavone@retrodev.com>
date Sat, 13 Feb 2016 22:20:37 -0800
parents 0ee8cfcc06d1
children 01fb50390b27
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
rev   line source
467
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 451
diff changeset
1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 451
diff changeset
2 Copyright 2013 Michael Pavone
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
3 This file is part of BlastEm.
467
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 451
diff changeset
4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING
Mike Pavone <pavone@retrodev.com>
parents: 451
diff changeset
5 */
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
6 #include <string.h>
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
7 #include <math.h>
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
8 #include <stdio.h>
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
9 #include <stdlib.h>
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
10 #include "ym2612.h"
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
11 #include "render.h"
407
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
12 #include "wave.h"
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 483
diff changeset
13 #include "blastem.h"
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
14
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
15 //#define DO_DEBUG_PRINT
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
16 #ifdef DO_DEBUG_PRINT
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
17 #define dfprintf fprintf
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
18 #define dfopen(var, fname, mode) var=fopen(fname, mode)
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
19 #else
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
20 #define dfprintf
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
21 #define dfopen(var, fname, mode)
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
22 #endif
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
23
535
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
24 #define BUSY_CYCLES_ADDRESS 17
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
25 #define BUSY_CYCLES_DATA_LOW 83
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
26 #define BUSY_CYCLES_DATA_HIGH 47
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
27 #define OP_UPDATE_PERIOD 144
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
28
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
29 #define BIT_TIMERA_ENABLE 0x1
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
30 #define BIT_TIMERB_ENABLE 0x2
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
31 #define BIT_TIMERA_OVEREN 0x4
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
32 #define BIT_TIMERB_OVEREN 0x8
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
33 #define BIT_TIMERA_RESET 0x10
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
34 #define BIT_TIMERB_RESET 0x20
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
35
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
36 #define BIT_TIMERA_LOAD 0x40
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
37 #define BIT_TIMERB_LOAD 0x80
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
38
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
39 #define BIT_STATUS_TIMERA 0x1
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
40 #define BIT_STATUS_TIMERB 0x2
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
41
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
42 enum {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
43 PHASE_ATTACK,
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
44 PHASE_DECAY,
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
45 PHASE_SUSTAIN,
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
46 PHASE_RELEASE
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
47 };
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
48
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
49 uint8_t did_tbl_init = 0;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
50 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however,
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
51 //memory is cheap so using a half sine table will probably save some cycles
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
52 //a full sine table would be nice, but negative numbers don't get along with log2
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
53 #define SINE_TABLE_SIZE 512
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
54 uint16_t sine_table[SINE_TABLE_SIZE];
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
55 //Similar deal here with the power table for log -> linear conversion
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
56 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
57 //and uses the whole part as a shift amount.
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
58 #define POW_TABLE_SIZE (1 << 13)
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
59 uint16_t pow_table[POW_TABLE_SIZE];
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
60
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
61 uint16_t rate_table_base[] = {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
62 //main portion
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
63 0,1,0,1,0,1,0,1,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
64 0,1,0,1,1,1,0,1,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
65 0,1,1,1,0,1,1,1,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
66 0,1,1,1,1,1,1,1,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
67 //top end
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
68 1,1,1,1,1,1,1,1,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
69 1,1,1,2,1,1,1,2,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
70 1,2,1,2,1,2,1,2,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
71 1,2,2,2,1,2,2,2,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
72 };
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
73
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
74 uint16_t rate_table[64*8];
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
75
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
76 uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5};
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
77 uint8_t lfo_pm_base[][8] = {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
78 {0, 0, 0, 0, 0, 0, 0, 0},
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
79 {0, 0, 0, 0, 4, 4, 4, 4},
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
80 {0, 0, 0, 4, 4, 4, 8, 8},
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
81 {0, 0, 4, 4, 8, 8, 0xc, 0xc},
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
82 {0, 0, 4, 8, 8, 8, 0xc,0x10},
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
83 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18},
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
84 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30},
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
85 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60}
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
86 };
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
87 int16_t lfo_pm_table[128 * 32 * 8];
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
88
930
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
89 int16_t ams_shift[] = {8, 1, -1, -2};
740
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
90
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
91 #define MAX_ENVELOPE 0xFFC
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
92 #define YM_DIVIDER 2
374
d42a8a3e4894 Fix YM2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 371
diff changeset
93 #define CYCLE_NEVER 0xFFFFFFFF
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
94
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
95 uint16_t round_fixed_point(double value, int dec_bits)
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
96 {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
97 return value * (1 << dec_bits) + 0.5;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
98 }
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
99
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
100 FILE * debug_file = NULL;
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
101 uint32_t first_key_on=0;
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
102
407
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
103 ym2612_context * log_context = NULL;
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
104
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
105 void ym_finalize_log()
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
106 {
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
107 if (!log_context) {
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
108 return;
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
109 }
407
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
110 for (int i = 0; i < NUM_CHANNELS; i++) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
111 if (log_context->channels[i].logfile) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
112 wave_finalize(log_context->channels[i].logfile);
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
113 }
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
114 }
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
115 log_context = NULL;
407
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
116 }
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
117 #define BUFFER_INC_RES 1000000000UL
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
118
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
119 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock)
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
120 {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
121 uint64_t old_inc = context->buffer_inc;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
122 context->buffer_inc = ((BUFFER_INC_RES * (uint64_t)context->sample_rate) / (uint64_t)master_clock) * (uint64_t)context->clock_inc;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
123 }
407
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
124
859
46bb673eed4e Load config file and rom.db from appropriate locations on Android
Michael Pavone <pavone@retrodev.com>
parents: 853
diff changeset
125 #ifdef __ANDROID__
46bb673eed4e Load config file and rom.db from appropriate locations on Android
Michael Pavone <pavone@retrodev.com>
parents: 853
diff changeset
126 #define log2(x) (log(x)/log(2))
46bb673eed4e Load config file and rom.db from appropriate locations on Android
Michael Pavone <pavone@retrodev.com>
parents: 853
diff changeset
127 #endif
46bb673eed4e Load config file and rom.db from appropriate locations on Android
Michael Pavone <pavone@retrodev.com>
parents: 853
diff changeset
128
407
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
129 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options)
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
130 {
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
131 static uint8_t registered_finalize;
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
132 dfopen(debug_file, "ym_debug.txt", "w");
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
133 memset(context, 0, sizeof(*context));
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
134 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2);
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
135 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2);
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
136 context->sample_rate = sample_rate;
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
137 context->clock_inc = clock_div * 6;
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
138 ym_adjust_master_clock(context, master_clock);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
139
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
140 context->sample_limit = sample_limit*2;
374
d42a8a3e4894 Fix YM2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 371
diff changeset
141 context->write_cycle = CYCLE_NEVER;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
142 for (int i = 0; i < NUM_OPERATORS; i++) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
143 context->operators[i].envelope = MAX_ENVELOPE;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
144 context->operators[i].env_phase = PHASE_RELEASE;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
145 }
369
fc820ab1394b Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents: 365
diff changeset
146 //some games seem to expect that the LR flags start out as 1
fc820ab1394b Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents: 365
diff changeset
147 for (int i = 0; i < NUM_CHANNELS; i++) {
fc820ab1394b Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents: 365
diff changeset
148 context->channels[i].lr = 0xC0;
407
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
149 if (options & YM_OPT_WAVE_LOG) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
150 char fname[64];
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
151 sprintf(fname, "ym_channel_%d.wav", i);
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
152 FILE * f = context->channels[i].logfile = fopen(fname, "wb");
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
153 if (!f) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
154 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname);
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
155 continue;
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
156 }
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
157 if (!wave_init(f, sample_rate, 16, 1)) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
158 fclose(f);
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
159 context->channels[i].logfile = NULL;
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
160 }
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
161 }
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
162 }
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
163 if (options & YM_OPT_WAVE_LOG) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
164 log_context = context;
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
165 if (!registered_finalize) {
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
166 atexit(ym_finalize_log);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
167 registered_finalize = 1;
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
168 }
369
fc820ab1394b Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents: 365
diff changeset
169 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
170 if (!did_tbl_init) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
171 //populate sine table
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
172 for (int32_t i = 0; i < 512; i++) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
173 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 );
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
174
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
175 //table stores 4.8 fixed pointed representation of the base 2 log
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
176 sine_table[i] = round_fixed_point(-log2(sine), 8);
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
177 }
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
178 //populate power table
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
179 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
180 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0));
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
181 int32_t tmp = round_fixed_point(linear, 11);
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
182 int32_t shift = (i >> 8) - 2;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
183 if (shift < 0) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
184 tmp <<= 0-shift;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
185 } else {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
186 tmp >>= shift;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
187 }
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
188 pow_table[i] = tmp;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
189 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
190 //populate envelope generator rate table, from small base table
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
191 for (int rate = 0; rate < 64; rate++) {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
192 for (int cycle = 0; cycle < 8; cycle++) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
193 uint16_t value;
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
194 if (rate < 2) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
195 value = 0;
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
196 } else if (rate >= 60) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
197 value = 8;
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
198 } else if (rate < 8) {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
199 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle];
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
200 } else if (rate < 48) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
201 value = rate_table_base[(rate & 0x3) * 8 + cycle];
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
202 } else {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
203 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
204 }
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
205 rate_table[rate * 8 + cycle] = value;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
206 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
207 }
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
208 //populate LFO PM table from small base table
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
209 //seems like there must be a better way to derive this
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
210 for (int freq = 0; freq < 128; freq++) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
211 for (int pms = 0; pms < 8; pms++) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
212 for (int step = 0; step < 32; step++) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
213 int16_t value = 0;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
214 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
215 if (freq & bit) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
216 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
217 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
218 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
219 if (step & 0x10) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
220 value = -value;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
221 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
222 lfo_pm_table[freq * 256 + pms * 32 + step] = value;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
223 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
224 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
225 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
226 }
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
227 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
228
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
229 void ym_free(ym2612_context *context)
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
230 {
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
231 if (context == log_context) {
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
232 ym_finalize_log();
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
233 }
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
234 free(context->audio_buffer);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
235 //TODO: Figure out how to make this 100% safe
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
236 //audio thread could still be using this
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
237 free(context->back_buffer);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
238 free(context);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
239 }
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
240
522
6a14c5a95648 Adjust PSG and YM-2612 volume to be closer to the real console
Michael Pavone <pavone@retrodev.com>
parents: 521
diff changeset
241 #define YM_VOLUME_MULTIPLIER 2
6a14c5a95648 Adjust PSG and YM-2612 volume to be closer to the real console
Michael Pavone <pavone@retrodev.com>
parents: 521
diff changeset
242 #define YM_VOLUME_DIVIDER 3
381
7815ebbbd705 Fix modulation shift value
Mike Pavone <pavone@retrodev.com>
parents: 380
diff changeset
243 #define YM_MOD_SHIFT 1
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
244
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
245 #define TIMER_A_MAX 1023
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
246 #define TIMER_B_MAX 255
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
247
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
248 void ym_run(ym2612_context * context, uint32_t to_cycle)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
249 {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
250 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
251 //TODO: Fix channel update order OR remap channels in register write
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
252 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) {
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
253 //Update timers at beginning of 144 cycle period
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
254 if (!context->current_op) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
255 if (context->timer_control & BIT_TIMERA_ENABLE) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
256 if (context->timer_a != TIMER_A_MAX) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
257 context->timer_a++;
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
258 } else {
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
259 if (context->timer_control & BIT_TIMERA_LOAD) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
260 context->timer_control &= ~BIT_TIMERA_LOAD;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
261 } else if (context->timer_control & BIT_TIMERA_OVEREN) {
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
262 context->status |= BIT_STATUS_TIMERA;
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
263 }
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
264 context->timer_a = context->timer_a_load;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
265 }
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
266 }
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
267 if (!context->sub_timer_b) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
268 if (context->timer_control & BIT_TIMERB_ENABLE) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
269 if (context->timer_b != TIMER_B_MAX) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
270 context->timer_b++;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
271 } else {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
272 if (context->timer_control & BIT_TIMERB_LOAD) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
273 context->timer_control &= ~BIT_TIMERB_LOAD;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
274 } else if (context->timer_control & BIT_TIMERB_OVEREN) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
275 context->status |= BIT_STATUS_TIMERB;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
276 }
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
277 context->timer_b = context->timer_b_load;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
278 }
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
279 }
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
280 }
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
281 context->sub_timer_b += 0x10;
740
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
282 //Update LFO
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
283 if (context->lfo_enable) {
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
284 if (context->lfo_counter) {
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
285 context->lfo_counter--;
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
286 } else {
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
287 context->lfo_counter = lfo_timer_values[context->lfo_freq];
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
288 context->lfo_am_step += 2;
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
289 context->lfo_am_step &= 0xFE;
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
290 context->lfo_pm_step = context->lfo_am_step / 8;
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
291 }
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
292 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
293 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
294 //Update Envelope Generator
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
295 if (!(context->current_op % 3)) {
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
296 uint32_t env_cyc = context->env_counter;
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
297 uint32_t op = context->current_env_op;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
298 ym_operator * operator = context->operators + op;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
299 ym_channel * channel = context->channels + op/4;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
300 uint8_t rate;
929
0ee8cfcc06d1 Change where decay to sustain transition happens to match hardware when decay rate is slow or 0
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
301 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) {
0ee8cfcc06d1 Change where decay to sustain transition happens to match hardware when decay rate is slow or 0
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
302 //operator->envelope = operator->sustain_level;
0ee8cfcc06d1 Change where decay to sustain transition happens to match hardware when decay rate is slow or 0
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
303 operator->env_phase = PHASE_SUSTAIN;
0ee8cfcc06d1 Change where decay to sustain transition happens to match hardware when decay rate is slow or 0
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
304 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
305 for(;;) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
306 rate = operator->rates[operator->env_phase];
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
307 if (rate) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
308 uint8_t ks = channel->keycode >> operator->key_scaling;;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
309 rate = rate*2 + ks;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
310 if (rate > 63) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
311 rate = 63;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
312 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
313 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
314 //Deal with "infinite" rates
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
315 //According to Nemesis this should be handled in key-on instead
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
316 if (rate >= 62 && operator->env_phase == PHASE_ATTACK) {
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
317 operator->env_phase = PHASE_DECAY;
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
318 operator->envelope = 0;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
319 } else {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
320 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
321 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
322 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
323 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0;
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
324 if (first_key_on) {
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
325 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1));
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
326 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
327 if (!(env_cyc & ((1 << cycle_shift) - 1))) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
328 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7;
852
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
329 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle];
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
330 if (operator->env_phase == PHASE_ATTACK) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
331 //this can probably be optimized to a single shift rather than a multiply + shift
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
332 if (first_key_on) {
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
333 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc);
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
334 }
513
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
335 uint16_t old_env = operator->envelope;
852
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
336 operator->envelope += ((~operator->envelope * envelope_inc) >> 4) & 0xFFFFFFFC;
513
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
337 if (operator->envelope > old_env) {
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
338 //Handle overflow
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
339 operator->envelope = 0;
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
340 }
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
341 if (!operator->envelope) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
342 operator->env_phase = PHASE_DECAY;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
343 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
344 } else {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
345 if (first_key_on) {
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
346 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc,
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
347 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release"));
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
348 }
852
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
349 //envelope value is 10-bits, but it will be used as a 4.8 value
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
350 operator->envelope += envelope_inc << 2;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
351 //clamp to max attenuation value
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
352 if (operator->envelope > MAX_ENVELOPE) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
353 operator->envelope = MAX_ENVELOPE;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
354 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
355 }
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
356 }
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
357 context->current_env_op++;
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
358 if (context->current_env_op == NUM_OPERATORS) {
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
359 context->current_env_op = 0;
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
360 context->env_counter++;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
361 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
362 }
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
363
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
364 //Update Phase Generator
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
365 uint32_t channel = context->current_op / 4;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
366 if (channel != 5 || !context->dac_enable) {
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
367 uint32_t op = context->current_op;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
368 //printf("updating operator %d of channel %d\n", op, channel);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
369 ym_operator * operator = context->operators + op;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
370 ym_channel * chan = context->channels + channel;
396
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
371 uint16_t phase = operator->phase_counter >> 10 & 0x3FF;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
372 operator->phase_counter += operator->phase_inc;
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
373 if (chan->pms) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
374 //not entirely sure this will get the precision correct, but I'd like to avoid recalculating phase
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
375 //increment every update when LFO phase modulation is enabled
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
376 int16_t lfo_mod = lfo_pm_table[(chan->fnum & 0x7F0) * 16 + chan->pms + context->lfo_pm_step];
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
377 if (operator->multiple) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
378 lfo_mod *= operator->multiple;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
379 } else {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
380 lfo_mod >>= 1;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
381 }
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
382 operator->phase_counter += lfo_mod;
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
383 }
371
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
384 int16_t mod = 0;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
385 switch (op % 4)
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
386 {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
387 case 0://Operator 1
377
da8d53dc914b Initial stab at feedback
Mike Pavone <pavone@retrodev.com>
parents: 376
diff changeset
388 if (chan->feedback) {
527
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
389 mod = (chan->op1_old + operator->output) >> (10-chan->feedback);
377
da8d53dc914b Initial stab at feedback
Mike Pavone <pavone@retrodev.com>
parents: 376
diff changeset
390 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
391 break;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
392 case 1://Operator 3
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
393 switch(chan->algorithm)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
394 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
395 case 0:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
396 case 2:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
397 //modulate by operator 2
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
398 mod = context->operators[op+1].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
399 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
400 case 1:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
401 //modulate by operator 1+2
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
402 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
403 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
404 case 5:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
405 //modulate by operator 1
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
406 mod = context->operators[op-1].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
407 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
408 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
409 case 2://Operator 2
406
b1bc1947d949 Fix modulation condition for operator 2
Mike Pavone <pavone@retrodev.com>
parents: 403
diff changeset
410 if (chan->algorithm != 1 && chan->algorithm != 2 && chan->algorithm != 7) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
411 //modulate by Operator 1
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
412 mod = context->operators[op-2].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
413 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
414 break;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
415 case 3://Operator 4
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
416 switch(chan->algorithm)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
417 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
418 case 0:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
419 case 1:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
420 case 4:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
421 //modulate by operator 3
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
422 mod = context->operators[op-2].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
423 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
424 case 2:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
425 //modulate by operator 1+3
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
426 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
427 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
428 case 3:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
429 //modulate by operator 2+3
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
430 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
431 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
432 case 5:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
433 //modulate by operator 1
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
434 mod = context->operators[op-3].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
435 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
436 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
437 break;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
438 }
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
439 uint16_t env = operator->envelope + operator->total_level;
740
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
440 if (operator->am) {
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
441 uint16_t base_am = (context->lfo_am_step & 0x80 ? context->lfo_am_step : ~context->lfo_am_step) & 0x7E;
930
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
442 if (ams_shift[chan->ams] >= 0) {
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
443 env += base_am >> ams_shift[chan->ams];
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
444 } else {
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
445 env += base_am << (-ams_shift[chan->ams]);
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
446 }
740
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
447 }
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
448 if (env > MAX_ENVELOPE) {
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
449 env = MAX_ENVELOPE;
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
450 }
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
451 if (first_key_on) {
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
452 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]);
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
453 }
527
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
454 //if ((channel != 0 && channel != 4) || chan->algorithm != 5) {
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
455 phase += mod;
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
456 //}
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
457
371
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
458 int16_t output = pow_table[sine_table[phase & 0x1FF] + env];
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
459 if (phase & 0x200) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
460 output = -output;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
461 }
527
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
462 if (op % 4 == 0) {
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
463 chan->op1_old = operator->output;
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
464 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
465 operator->output = output;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
466 //Update the channel output if we've updated all operators
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
467 if (op % 4 == 3) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
468 if (chan->algorithm < 4) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
469 chan->output = operator->output;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
470 } else if(chan->algorithm == 4) {
396
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
471 chan->output = operator->output + context->operators[channel * 4 + 2].output;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
472 } else {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
473 output = 0;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
474 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
475 output += context->operators[op].output;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
476 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
477 chan->output = output;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
478 }
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
479 if (first_key_on) {
371
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
480 int16_t value = context->channels[channel].output & 0x3FE0;
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
481 if (value & 0x2000) {
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
482 value |= 0xC000;
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
483 }
522
6a14c5a95648 Adjust PSG and YM-2612 volume to be closer to the real console
Michael Pavone <pavone@retrodev.com>
parents: 521
diff changeset
484 dfprintf(debug_file, "channel %d output: %d\n", channel, (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER);
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
485 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
486 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
487 //puts("operator update done");
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
488 }
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
489 context->current_op++;
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
490 context->buffer_fraction += context->buffer_inc;
396
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
491 if (context->current_op == NUM_OPERATORS) {
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
492 context->current_op = 0;
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
493 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
494 if (context->buffer_fraction > BUFFER_INC_RES) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
495 context->buffer_fraction -= BUFFER_INC_RES;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
496 context->audio_buffer[context->buffer_pos] = 0;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
497 context->audio_buffer[context->buffer_pos + 1] = 0;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
498 for (int i = 0; i < NUM_CHANNELS; i++) {
521
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
499 int16_t value = context->channels[i].output;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
500 if (value > 0x1FE0) {
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
501 value = 0x1FE0;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
502 } else if (value < -0x1FF0) {
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
503 value = -0x1FF0;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
504 } else {
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
505 value &= 0x3FE0;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
506 if (value & 0x2000) {
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
507 value |= 0xC000;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
508 }
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
509 }
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
510 if (context->channels[i].logfile) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
511 fwrite(&value, sizeof(value), 1, context->channels[i].logfile);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
512 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
513 if (context->channels[i].lr & 0x80) {
522
6a14c5a95648 Adjust PSG and YM-2612 volume to be closer to the real console
Michael Pavone <pavone@retrodev.com>
parents: 521
diff changeset
514 context->audio_buffer[context->buffer_pos] += (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER;
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
515 }
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
516 if (context->channels[i].lr & 0x40) {
522
6a14c5a95648 Adjust PSG and YM-2612 volume to be closer to the real console
Michael Pavone <pavone@retrodev.com>
parents: 521
diff changeset
517 context->audio_buffer[context->buffer_pos+1] += (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER;
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
518 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
519 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
520 context->buffer_pos += 2;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
521 if (context->buffer_pos == context->sample_limit) {
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 483
diff changeset
522 if (!headless) {
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 483
diff changeset
523 render_wait_ym(context);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 483
diff changeset
524 }
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
525 }
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
526 }
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
527 }
535
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
528 if (context->current_cycle >= context->write_cycle + (context->busy_cycles * context->clock_inc / 6)) {
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
529 context->status &= 0x7F;
374
d42a8a3e4894 Fix YM2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 371
diff changeset
530 context->write_cycle = CYCLE_NEVER;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
531 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
532 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle);
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
533 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
534
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
535 void ym_address_write_part1(ym2612_context * context, uint8_t address)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
536 {
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
537 //printf("address_write_part1: %X\n", address);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
538 context->selected_reg = address;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
539 context->selected_part = 0;
535
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
540 context->write_cycle = context->current_cycle;
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
541 context->busy_cycles = BUSY_CYCLES_ADDRESS;
650
55b550fe8891 Set the busy flag after a YM-2612 address write
Michael Pavone <pavone@retrodev.com>
parents: 535
diff changeset
542 context->status |= 0x80;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
543 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
544
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
545 void ym_address_write_part2(ym2612_context * context, uint8_t address)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
546 {
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
547 //printf("address_write_part2: %X\n", address);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
548 context->selected_reg = address;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
549 context->selected_part = 1;
535
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
550 context->write_cycle = context->current_cycle;
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
551 context->busy_cycles = BUSY_CYCLES_ADDRESS;
650
55b550fe8891 Set the busy flag after a YM-2612 address write
Michael Pavone <pavone@retrodev.com>
parents: 535
diff changeset
552 context->status |= 0x80;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
553 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
554
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
555 uint8_t fnum_to_keycode[] = {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
556 //F11 = 0
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
557 0,0,0,0,0,0,0,1,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
558 //F11 = 1
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
559 2,3,3,3,3,3,3,3
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
560 };
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
561
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
562 //table courtesy of Nemesis
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
563 uint32_t detune_table[][4] = {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
564 {0, 0, 1, 2}, //0 (0x00)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
565 {0, 0, 1, 2}, //1 (0x01)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
566 {0, 0, 1, 2}, //2 (0x02)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
567 {0, 0, 1, 2}, //3 (0x03)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
568 {0, 1, 2, 2}, //4 (0x04)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
569 {0, 1, 2, 3}, //5 (0x05)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
570 {0, 1, 2, 3}, //6 (0x06)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
571 {0, 1, 2, 3}, //7 (0x07)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
572 {0, 1, 2, 4}, //8 (0x08)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
573 {0, 1, 3, 4}, //9 (0x09)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
574 {0, 1, 3, 4}, //10 (0x0A)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
575 {0, 1, 3, 5}, //11 (0x0B)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
576 {0, 2, 4, 5}, //12 (0x0C)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
577 {0, 2, 4, 6}, //13 (0x0D)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
578 {0, 2, 4, 6}, //14 (0x0E)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
579 {0, 2, 5, 7}, //15 (0x0F)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
580 {0, 2, 5, 8}, //16 (0x10)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
581 {0, 3, 6, 8}, //17 (0x11)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
582 {0, 3, 6, 9}, //18 (0x12)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
583 {0, 3, 7,10}, //19 (0x13)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
584 {0, 4, 8,11}, //20 (0x14)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
585 {0, 4, 8,12}, //21 (0x15)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
586 {0, 4, 9,13}, //22 (0x16)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
587 {0, 5,10,14}, //23 (0x17)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
588 {0, 5,11,16}, //24 (0x18)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
589 {0, 6,12,17}, //25 (0x19)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
590 {0, 6,13,19}, //26 (0x1A)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
591 {0, 7,14,20}, //27 (0x1B)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
592 {0, 8,16,22}, //28 (0x1C)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
593 {0, 8,16,22}, //29 (0x1D)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
594 {0, 8,16,22}, //30 (0x1E)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
595 {0, 8,16,22}
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
596 }; //31 (0x1F)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
597
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
598 void ym_update_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
599 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
600 uint32_t chan_num = op / 4;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
601 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
602 //base frequency
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
603 ym_channel * channel = context->channels + chan_num;
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
604 uint32_t inc, detune;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
605 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) {
738
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
606 //supplemental fnum registers are in a different order than normal slot paramters
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
607 int index = (op-2*4) ^ 2;
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
608 inc = context->ch3_supp[index].fnum;
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
609 if (!context->ch3_supp[index].block) {
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
610 inc >>= 1;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
611 } else {
738
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
612 inc <<= (context->ch3_supp[index].block-1);
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
613 }
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
614 //detune
738
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
615 detune = detune_table[context->ch3_supp[index].keycode][operator->detune & 0x3];
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
616 } else {
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
617 inc = channel->fnum;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
618 if (!channel->block) {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
619 inc >>= 1;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
620 } else {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
621 inc <<= (channel->block-1);
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
622 }
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
623 //detune
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
624 detune = detune_table[channel->keycode][operator->detune & 0x3];
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
625 }
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
626 if (operator->detune & 0x4) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
627 inc -= detune;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
628 //this can underflow, mask to 17-bit result
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
629 inc &= 0x1FFFF;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
630 } else {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
631 inc += detune;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
632 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
633 //multiple
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
634 if (operator->multiple) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
635 inc *= operator->multiple;
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
636 inc &= 0xFFFFF;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
637 } else {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
638 //0.5
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
639 inc >>= 1;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
640 }
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
641 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple);
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
642 operator->phase_inc = inc;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
643 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
644
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
645 void ym_data_write(ym2612_context * context, uint8_t value)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
646 {
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
647 if (context->selected_reg >= YM_REG_END) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
648 return;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
649 }
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
650 if (context->selected_part) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
651 if (context->selected_reg < YM_PART2_START) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
652 return;
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
653 }
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
654 context->part2_regs[context->selected_reg - YM_PART2_START] = value;
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
655 } else {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
656 if (context->selected_reg < YM_PART1_START) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
657 return;
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
658 }
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
659 context->part1_regs[context->selected_reg - YM_PART1_START] = value;
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
660 }
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
661 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
662 if (context->selected_reg < 0x30) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
663 //Shared regs
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
664 switch (context->selected_reg)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
665 {
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
666 //TODO: Test reg
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
667 case REG_LFO:
532
666210adf87b Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents: 527
diff changeset
668 /*if ((value & 0x8) && !context->lfo_enable) {
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
669 printf("LFO Enabled, Freq: %d\n", value & 0x7);
532
666210adf87b Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents: 527
diff changeset
670 }*/
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
671 context->lfo_enable = value & 0x8;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
672 if (!context->lfo_enable) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
673 context->lfo_am_step = context->lfo_pm_step = 0;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
674 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
675 context->lfo_freq = value & 0x7;
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
676
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
677 break;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
678 case REG_TIMERA_HIGH:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
679 context->timer_a_load &= 0x3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
680 context->timer_a_load |= value << 2;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
681 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
682 case REG_TIMERA_LOW:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
683 context->timer_a_load &= 0xFFFC;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
684 context->timer_a_load |= value & 0x3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
685 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
686 case REG_TIMERB:
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
687 context->timer_b_load = value;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
688 break;
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
689 case REG_TIME_CTRL: {
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
690 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) {
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
691 context->timer_a = TIMER_A_MAX;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
692 context->timer_control |= BIT_TIMERA_LOAD;
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
693 }
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
694 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) {
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
695 context->timer_b = TIMER_B_MAX;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
696 context->timer_control |= BIT_TIMERB_LOAD;
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
697 }
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
698 context->timer_control &= (BIT_TIMERA_LOAD | BIT_TIMERB_LOAD);
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
699 context->timer_control |= value & 0xF;
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
700 if (value & BIT_TIMERA_RESET) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
701 context->status &= ~BIT_STATUS_TIMERA;
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
702 }
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
703 if (value & BIT_TIMERB_RESET) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
704 context->status &= ~BIT_STATUS_TIMERB;
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
705 }
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
706 uint8_t old_mode = context->ch3_mode;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
707 context->ch3_mode = value & 0xC0;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
708 if (context->ch3_mode != old_mode) {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
709 ym_update_phase_inc(context, context->operators + 2*4, 2*4);
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
710 ym_update_phase_inc(context, context->operators + 2*4+1, 2*4+1);
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
711 ym_update_phase_inc(context, context->operators + 2*4+2, 2*4+2);
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
712 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
713 break;
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
714 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
715 case REG_KEY_ONOFF: {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
716 uint8_t channel = value & 0x7;
386
6e5c4f3ab0e2 Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents: 383
diff changeset
717 if (channel != 3 && channel != 7) {
6e5c4f3ab0e2 Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents: 383
diff changeset
718 if (channel > 2) {
6e5c4f3ab0e2 Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents: 383
diff changeset
719 channel--;
6e5c4f3ab0e2 Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents: 383
diff changeset
720 }
851
b10cf2c921ad Fix mapping of key on/off reg bits to operators
Michael Pavone <pavone@retrodev.com>
parents: 848
diff changeset
721 uint8_t bits[] = {0x10, 0x40, 0x20, 0x80};
b10cf2c921ad Fix mapping of key on/off reg bits to operators
Michael Pavone <pavone@retrodev.com>
parents: 848
diff changeset
722 for (uint8_t op = channel * 4, bit = 0; op < (channel + 1) * 4; op++, bit++) {
b10cf2c921ad Fix mapping of key on/off reg bits to operators
Michael Pavone <pavone@retrodev.com>
parents: 848
diff changeset
723 if (value & bits[bit]) {
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
724 if (context->operators[op].env_phase == PHASE_RELEASE)
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
725 {
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
726 first_key_on = 1;
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
727 //printf("Key On for operator %d in channel %d\n", op, channel);
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
728 context->operators[op].phase_counter = 0;
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
729 context->operators[op].env_phase = PHASE_ATTACK;
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
730 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
731 } else {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
732 //printf("Key Off for operator %d in channel %d\n", op, channel);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
733 context->operators[op].env_phase = PHASE_RELEASE;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
734 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
735 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
736 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
737 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
738 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
739 case REG_DAC:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
740 if (context->dac_enable) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
741 context->channels[5].output = (((int16_t)value) - 0x80) << 6;
396
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
742 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
743 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
744 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
745 case REG_DAC_ENABLE:
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
746 //printf("DAC Enable: %X\n", value);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
747 context->dac_enable = value & 0x80;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
748 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
749 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
750 } else if (context->selected_reg < 0xA0) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
751 //part
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
752 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
753 //channel in part
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
754 if ((context->selected_reg & 0x3) != 0x3) {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
755 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
756 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
757 ym_operator * operator = context->operators + op;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
758 switch (context->selected_reg & 0xF0)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
759 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
760 case REG_DETUNE_MULT:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
761 operator->detune = value >> 4 & 0x7;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
762 operator->multiple = value & 0xF;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
763 ym_update_phase_inc(context, operator, op);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
764 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
765 case REG_TOTAL_LEVEL:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
766 operator->total_level = (value & 0x7F) << 5;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
767 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
768 case REG_ATTACK_KS:
376
f6def5cdf1b4 Fix key scaling
Mike Pavone <pavone@retrodev.com>
parents: 374
diff changeset
769 operator->key_scaling = 3 - (value >> 6);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
770 operator->rates[PHASE_ATTACK] = value & 0x1F;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
771 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
772 case REG_DECAY_AM:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
773 //TODO: AM flag for LFO
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
774 operator->am = value & 0x80;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
775 operator->rates[PHASE_DECAY] = value & 0x1F;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
776 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
777 case REG_SUSTAIN_RATE:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
778 operator->rates[PHASE_SUSTAIN] = value & 0x1F;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
779 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
780 case REG_S_LVL_R_RATE:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
781 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1;
852
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
782 operator->sustain_level = (value & 0xF0) << 3;
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
783 if (operator->sustain_level == 0x780) {
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
784 operator->sustain_level = MAX_ENVELOPE;
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
785 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
786 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
787 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
788 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
789 } else {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
790 uint8_t channel = context->selected_reg & 0x3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
791 if (channel != 3) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
792 if (context->selected_part) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
793 channel += 3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
794 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
795 //printf("write targets channel %d\n", channel);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
796 switch (context->selected_reg & 0xFC)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
797 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
798 case REG_FNUM_LOW:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
799 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
800 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
801 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7];
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
802 ym_update_phase_inc(context, context->operators + channel*4, channel*4);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
803 ym_update_phase_inc(context, context->operators + channel*4+1, channel*4+1);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
804 ym_update_phase_inc(context, context->operators + channel*4+2, channel*4+2);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
805 ym_update_phase_inc(context, context->operators + channel*4+3, channel*4+3);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
806 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
807 case REG_BLOCK_FNUM_H:{
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
808 context->channels[channel].block_fnum_latch = value;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
809 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
810 }
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
811 case REG_FNUM_LOW_CH3:
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
812 if (channel < 3) {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
813 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
814 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
815 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7];
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
816 if (context->ch3_mode) {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
817 ym_update_phase_inc(context, context->operators + 2*4 + channel, 2*4);
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
818 }
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
819 }
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
820 break;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
821 case REG_BLOCK_FN_CH3:
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
822 if (channel < 3) {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
823 context->ch3_supp[channel].block_fnum_latch = value;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
824 }
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
825 break;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
826 case REG_ALG_FEEDBACK:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
827 context->channels[channel].algorithm = value & 0x7;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
828 context->channels[channel].feedback = value >> 3 & 0x7;
527
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
829 //printf("Algorithm %d, feedback %d for channel %d\n", value & 0x7, value >> 3 & 0x7, channel);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
830 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
831 case REG_LR_AMS_PMS:
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
832 context->channels[channel].pms = (value & 0x7) * 32;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
833 context->channels[channel].ams = value >> 4 & 0x3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
834 context->channels[channel].lr = value & 0xC0;
369
fc820ab1394b Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents: 365
diff changeset
835 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
836 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
837 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
838 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
839 }
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
840
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
841 context->write_cycle = context->current_cycle;
535
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
842 context->busy_cycles = context->selected_reg < 0xA0 ? BUSY_CYCLES_DATA_LOW : BUSY_CYCLES_DATA_HIGH;
374
d42a8a3e4894 Fix YM2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 371
diff changeset
843 context->status |= 0x80;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
844 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
845
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
846 uint8_t ym_read_status(ym2612_context * context)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
847 {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
848 return context->status;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
849 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
850
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
851 void ym_print_channel_info(ym2612_context *context, int channel)
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
852 {
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
853 ym_channel *chan = context->channels + channel;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
854 printf("\n***Channel %d***\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
855 "Algorithm: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
856 "Feedback: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
857 "Pan: %s\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
858 "AMS: %d\n"
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
859 "PMS: %d\n",
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
860 channel+1, chan->algorithm, chan->feedback,
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
861 chan->lr == 0xC0 ? "LR" : chan->lr == 0x80 ? "L" : chan->lr == 0x40 ? "R" : "",
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
862 chan->ams, chan->pms);
930
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
863 if (channel == 2) {
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
864 printf(
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
865 "Mode: %X: %s\n",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
866 context->ch3_mode, context->ch3_mode ? "special" : "normal");
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
867 }
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
868 for (int operator = channel * 4; operator < channel * 4+4; operator++)
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
869 {
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
870 int dispnum = operator - channel * 4 + 1;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
871 if (dispnum == 2) {
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
872 dispnum = 3;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
873 } else if (dispnum == 3) {
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
874 dispnum = 2;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
875 }
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
876 ym_operator *op = context->operators + operator;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
877 printf("\nOperator %d:\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
878 " Multiple: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
879 " Detune: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
880 " Total Level: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
881 " Attack Rate: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
882 " Key Scaling: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
883 " Decay Rate: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
884 " Sustain Level: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
885 " Sustain Rate: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
886 " Release Rate: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
887 " Amplitude Modulation %s\n",
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
888 dispnum, op->multiple, op->detune, op->total_level,
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
889 op->rates[PHASE_ATTACK], op->key_scaling, op->rates[PHASE_DECAY],
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
890 op->sustain_level, op->rates[PHASE_SUSTAIN], op->rates[PHASE_RELEASE],
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
891 op->am ? "On" : "Off");
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
892 }
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
893 }
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
894
930
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
895 void ym_print_timer_info(ym2612_context *context)
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
896 {
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
897 printf("***Timer A***\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
898 "Current Value: %d\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
899 "Load Value: %d\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
900 "Triggered: %s\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
901 "Enabled: %s\n\n",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
902 context->timer_a,
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
903 context->timer_a_load,
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
904 context->status & BIT_STATUS_TIMERA ? "yes" : "no",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
905 context->timer_control & BIT_TIMERA_ENABLE ? "yes" : "no");
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
906 printf("***Timer B***\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
907 "Current Value: %d\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
908 "Load Value: %d\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
909 "Triggered: %s\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
910 "Enabled: %s\n\n",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
911 context->timer_b,
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
912 context->timer_b_load,
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
913 context->status & BIT_STATUS_TIMERB ? "yes" : "no",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
914 context->timer_control & BIT_TIMERB_ENABLE ? "yes" : "no");
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
915 }
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
916