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annotate ym2612.c @ 1447:a094815b1168

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Save and restore YM2612 timer control and keyon/off state in native save states
author Michael Pavone <pavone@retrodev.com>
date Tue, 29 Aug 2017 00:09:35 -0700
parents 4e5797b3935a
children 08bc099a622f
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1 /*
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2 Copyright 2013 Michael Pavone
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3 This file is part of BlastEm.
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
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5 */
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6 #include <string.h>
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7 #include <math.h>
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8 #include <stdio.h>
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9 #include <stdlib.h>
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10 #include "ym2612.h"
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11 #include "render.h"
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12 #include "wave.h"
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13 #include "blastem.h"
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14
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15 //#define DO_DEBUG_PRINT
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16 #ifdef DO_DEBUG_PRINT
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17 #define dfprintf fprintf
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18 #define dfopen(var, fname, mode) var=fopen(fname, mode)
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19 #else
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20 #define dfprintf
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21 #define dfopen(var, fname, mode)
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22 #endif
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23
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24 #define BUSY_CYCLES_ADDRESS 17
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25 #define BUSY_CYCLES_DATA_LOW 83
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26 #define BUSY_CYCLES_DATA_HIGH 47
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27 #define OP_UPDATE_PERIOD 144
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29 #define BIT_TIMERA_ENABLE 0x1
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30 #define BIT_TIMERB_ENABLE 0x2
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31 #define BIT_TIMERA_OVEREN 0x4
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32 #define BIT_TIMERB_OVEREN 0x8
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33 #define BIT_TIMERA_RESET 0x10
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34 #define BIT_TIMERB_RESET 0x20
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35
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36 #define BIT_TIMERA_LOAD 0x40
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37 #define BIT_TIMERB_LOAD 0x80
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38
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39 #define BIT_STATUS_TIMERA 0x1
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40 #define BIT_STATUS_TIMERB 0x2
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41
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42 static uint32_t ym_calc_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op);
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43
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44 enum {
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45 PHASE_ATTACK,
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46 PHASE_DECAY,
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47 PHASE_SUSTAIN,
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48 PHASE_RELEASE
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49 };
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50
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51 uint8_t did_tbl_init = 0;
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52 //According to Nemesis, real hardware only uses a 256 entry quarter sine table; however,
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53 //memory is cheap so using a half sine table will probably save some cycles
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54 //a full sine table would be nice, but negative numbers don't get along with log2
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55 #define SINE_TABLE_SIZE 512
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56 static uint16_t sine_table[SINE_TABLE_SIZE];
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57 //Similar deal here with the power table for log -> linear conversion
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58 //According to Nemesis, real hardware only uses a 256 entry table for the fractional part
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59 //and uses the whole part as a shift amount.
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60 #define POW_TABLE_SIZE (1 << 13)
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61 static uint16_t pow_table[POW_TABLE_SIZE];
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62
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63 static uint16_t rate_table_base[] = {
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64 //main portion
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65 0,1,0,1,0,1,0,1,
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66 0,1,0,1,1,1,0,1,
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67 0,1,1,1,0,1,1,1,
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68 0,1,1,1,1,1,1,1,
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69 //top end
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70 1,1,1,1,1,1,1,1,
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71 1,1,1,2,1,1,1,2,
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72 1,2,1,2,1,2,1,2,
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73 1,2,2,2,1,2,2,2,
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74 };
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75
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76 static uint16_t rate_table[64*8];
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77
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78 static uint8_t lfo_timer_values[] = {108, 77, 71, 67, 62, 44, 8, 5};
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79 static uint8_t lfo_pm_base[][8] = {
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80 {0, 0, 0, 0, 0, 0, 0, 0},
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81 {0, 0, 0, 0, 4, 4, 4, 4},
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82 {0, 0, 0, 4, 4, 4, 8, 8},
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83 {0, 0, 4, 4, 8, 8, 0xc, 0xc},
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84 {0, 0, 4, 8, 8, 8, 0xc,0x10},
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85 {0, 0, 8, 0xc,0x10,0x10,0x14,0x18},
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86 {0, 0,0x10,0x18,0x20,0x20,0x28,0x30},
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87 {0, 0,0x20,0x30,0x40,0x40,0x50,0x60}
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88 };
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89 static int16_t lfo_pm_table[128 * 32 * 8];
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90
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91 int16_t ams_shift[] = {8, 1, -1, -2};
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92
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93 #define MAX_ENVELOPE 0xFFC
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94 #define YM_DIVIDER 2
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95 #define CYCLE_NEVER 0xFFFFFFFF
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96
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97 static uint16_t round_fixed_point(double value, int dec_bits)
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98 {
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99 return value * (1 << dec_bits) + 0.5;
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100 }
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101
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102 static FILE * debug_file = NULL;
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103 static uint32_t first_key_on=0;
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104
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105 static ym2612_context * log_context = NULL;
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106
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107 static void ym_finalize_log()
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108 {
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109 if (!log_context) {
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110 return;
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111 }
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112 for (int i = 0; i < NUM_CHANNELS; i++) {
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113 if (log_context->channels[i].logfile) {
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114 wave_finalize(log_context->channels[i].logfile);
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115 }
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116 }
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117 log_context = NULL;
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118 }
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119 #define BUFFER_INC_RES 0x40000000UL
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120
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121 void ym_adjust_master_clock(ym2612_context * context, uint32_t master_clock)
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122 {
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123 uint64_t old_inc = context->buffer_inc;
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5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
124 context->buffer_inc = ((BUFFER_INC_RES * (uint64_t)context->sample_rate) / (uint64_t)master_clock) * (uint64_t)context->clock_inc * NUM_OPERATORS;
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
125 }
407
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
126
859
46bb673eed4e Load config file and rom.db from appropriate locations on Android
Michael Pavone <pavone@retrodev.com>
parents: 853
diff changeset
127 #ifdef __ANDROID__
46bb673eed4e Load config file and rom.db from appropriate locations on Android
Michael Pavone <pavone@retrodev.com>
parents: 853
diff changeset
128 #define log2(x) (log(x)/log(2))
46bb673eed4e Load config file and rom.db from appropriate locations on Android
Michael Pavone <pavone@retrodev.com>
parents: 853
diff changeset
129 #endif
46bb673eed4e Load config file and rom.db from appropriate locations on Android
Michael Pavone <pavone@retrodev.com>
parents: 853
diff changeset
130
1308
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
131
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
132 #define TIMER_A_MAX 1023
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
133 #define TIMER_B_MAX 255
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
134
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
135 void ym_reset(ym2612_context *context)
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
136 {
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
137 memset(context->part1_regs, 0, sizeof(context->part1_regs));
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
138 memset(context->part2_regs, 0, sizeof(context->part2_regs));
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
139 memset(context->operators, 0, sizeof(context->operators));
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
140 memset(context->channels, 0, sizeof(context->channels));
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
141 memset(context->ch3_supp, 0, sizeof(context->ch3_supp));
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
142 context->selected_reg = 0;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
143 context->csm_keyon = 0;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
144 context->ch3_mode = 0;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
145 context->dac_enable = 0;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
146 context->status = 0;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
147 context->timer_a_load = 0;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
148 context->timer_b_load = 0;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
149 //TODO: Confirm these on hardware
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
150 context->timer_a = TIMER_A_MAX;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
151 context->timer_b = TIMER_B_MAX;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
152
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
153 //TODO: Reset LFO state
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
154
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
155 //some games seem to expect that the LR flags start out as 1
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
156 for (int i = 0; i < NUM_CHANNELS; i++) {
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
157 context->channels[i].lr = 0xC0;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
158 }
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
159 context->write_cycle = CYCLE_NEVER;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
160 for (int i = 0; i < NUM_OPERATORS; i++) {
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
161 context->operators[i].envelope = MAX_ENVELOPE;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
162 context->operators[i].env_phase = PHASE_RELEASE;
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
163 }
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
164 }
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
165
1002
8d032a368dd5 Made low pass filter frequency configurable
Michael Pavone <pavone@retrodev.com>
parents: 965
diff changeset
166 void ym_init(ym2612_context * context, uint32_t sample_rate, uint32_t master_clock, uint32_t clock_div, uint32_t sample_limit, uint32_t options, uint32_t lowpass_cutoff)
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
167 {
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
168 static uint8_t registered_finalize;
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
169 dfopen(debug_file, "ym_debug.txt", "w");
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
170 memset(context, 0, sizeof(*context));
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
171 context->audio_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2);
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
172 context->back_buffer = malloc(sizeof(*context->audio_buffer) * sample_limit*2);
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
173 context->sample_rate = sample_rate;
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
174 context->clock_inc = clock_div * 6;
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
175 ym_adjust_master_clock(context, master_clock);
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
176
1002
8d032a368dd5 Made low pass filter frequency configurable
Michael Pavone <pavone@retrodev.com>
parents: 965
diff changeset
177 double rc = (1.0 / (double)lowpass_cutoff) / (2.0 * M_PI);
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
178 double dt = 1.0 / ((double)master_clock / (double)(context->clock_inc * NUM_OPERATORS));
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
179 double alpha = dt / (dt + rc);
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
180 context->lowpass_alpha = (int32_t)(((double)0x10000) * alpha);
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
181
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
182 context->sample_limit = sample_limit*2;
1308
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
183
369
fc820ab1394b Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents: 365
diff changeset
184 //some games seem to expect that the LR flags start out as 1
fc820ab1394b Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents: 365
diff changeset
185 for (int i = 0; i < NUM_CHANNELS; i++) {
407
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
186 if (options & YM_OPT_WAVE_LOG) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
187 char fname[64];
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
188 sprintf(fname, "ym_channel_%d.wav", i);
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
189 FILE * f = context->channels[i].logfile = fopen(fname, "wb");
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
190 if (!f) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
191 fprintf(stderr, "Failed to open WAVE log file %s for writing\n", fname);
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
192 continue;
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
193 }
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
194 if (!wave_init(f, sample_rate, 16, 1)) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
195 fclose(f);
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
196 context->channels[i].logfile = NULL;
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
197 }
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
198 }
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
199 }
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
200 if (options & YM_OPT_WAVE_LOG) {
c3abc4ada43d Add support for logging YM2612 channels to WAVE files
Mike Pavone <pavone@retrodev.com>
parents: 406
diff changeset
201 log_context = context;
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
202 if (!registered_finalize) {
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
203 atexit(ym_finalize_log);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
204 registered_finalize = 1;
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
205 }
369
fc820ab1394b Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents: 365
diff changeset
206 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
207 if (!did_tbl_init) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
208 //populate sine table
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
209 for (int32_t i = 0; i < 512; i++) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
210 double sine = sin( ((double)(i*2+1) / SINE_TABLE_SIZE) * M_PI_2 );
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
211
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
212 //table stores 4.8 fixed pointed representation of the base 2 log
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
213 sine_table[i] = round_fixed_point(-log2(sine), 8);
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
214 }
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
215 //populate power table
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
216 for (int32_t i = 0; i < POW_TABLE_SIZE; i++) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
217 double linear = pow(2, -((double)((i & 0xFF)+1) / 256.0));
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
218 int32_t tmp = round_fixed_point(linear, 11);
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
219 int32_t shift = (i >> 8) - 2;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
220 if (shift < 0) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
221 tmp <<= 0-shift;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
222 } else {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
223 tmp >>= shift;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
224 }
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
225 pow_table[i] = tmp;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
226 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
227 //populate envelope generator rate table, from small base table
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
228 for (int rate = 0; rate < 64; rate++) {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
229 for (int cycle = 0; cycle < 8; cycle++) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
230 uint16_t value;
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
231 if (rate < 2) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
232 value = 0;
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
233 } else if (rate >= 60) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
234 value = 8;
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
235 } else if (rate < 8) {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
236 value = rate_table_base[((rate & 6) == 6 ? 16 : 0) + cycle];
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
237 } else if (rate < 48) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
238 value = rate_table_base[(rate & 0x3) * 8 + cycle];
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
239 } else {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
240 value = rate_table_base[32 + (rate & 0x3) * 8 + cycle] << ((rate - 48) >> 2);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
241 }
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
242 rate_table[rate * 8 + cycle] = value;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
243 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
244 }
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
245 //populate LFO PM table from small base table
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
246 //seems like there must be a better way to derive this
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
247 for (int freq = 0; freq < 128; freq++) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
248 for (int pms = 0; pms < 8; pms++) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
249 for (int step = 0; step < 32; step++) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
250 int16_t value = 0;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
251 for (int bit = 0x40, shift = 0; bit > 0; bit >>= 1, shift++) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
252 if (freq & bit) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
253 value += lfo_pm_base[pms][(step & 0x8) ? 7-step & 7 : step & 7] >> shift;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
254 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
255 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
256 if (step & 0x10) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
257 value = -value;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
258 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
259 lfo_pm_table[freq * 256 + pms * 32 + step] = value;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
260 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
261 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
262 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
263 }
1308
1b3fe6e03e7b Reset YM2612 whenver the Z80 is reset. Fixes issue with stuck notes in Fantastic Dizzy and Kid Chameleon
Michael Pavone <pavone@retrodev.com>
parents: 1301
diff changeset
264 ym_reset(context);
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
265 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
266
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
267 void ym_free(ym2612_context *context)
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
268 {
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
269 if (context == log_context) {
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
270 ym_finalize_log();
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
271 }
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
272 free(context->audio_buffer);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
273 //TODO: Figure out how to make this 100% safe
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
274 //audio thread could still be using this
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
275 free(context->back_buffer);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
276 free(context);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
277 }
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 859
diff changeset
278
522
6a14c5a95648 Adjust PSG and YM-2612 volume to be closer to the real console
Michael Pavone <pavone@retrodev.com>
parents: 521
diff changeset
279 #define YM_VOLUME_MULTIPLIER 2
6a14c5a95648 Adjust PSG and YM-2612 volume to be closer to the real console
Michael Pavone <pavone@retrodev.com>
parents: 521
diff changeset
280 #define YM_VOLUME_DIVIDER 3
381
7815ebbbd705 Fix modulation shift value
Mike Pavone <pavone@retrodev.com>
parents: 380
diff changeset
281 #define YM_MOD_SHIFT 1
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
282
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
283 #define CSM_MODE 0x80
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
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parents: 1102
diff changeset
284
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
285 #define SSG_ENABLE 8
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
286 #define SSG_INVERT 4
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
287 #define SSG_ALTERNATE 2
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
288 #define SSG_HOLD 1
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
289
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
290 #define SSG_CENTER 0x800
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
291
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
292 static void start_envelope(ym_operator *op, ym_channel *channel)
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
293 {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
294 //Deal with "infinite" attack rates
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
295 uint8_t rate = op->rates[PHASE_ATTACK];
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
296 if (rate) {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
297 uint8_t ks = channel->keycode >> op->key_scaling;;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
298 rate = rate*2 + ks;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
299 }
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
300 if (rate >= 62) {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
301 op->env_phase = PHASE_DECAY;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
302 op->envelope = 0;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
303 } else {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
304 op->env_phase = PHASE_ATTACK;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
305 }
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
306 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
307
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
308 static void keyon(ym_operator *op, ym_channel *channel)
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
309 {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
310 start_envelope(op, channel);
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
311 op->phase_counter = 0;
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
312 op->inverted = op->ssg & SSG_INVERT;
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
313 }
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
314
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
315 static const uint8_t keyon_bits[] = {0x10, 0x40, 0x20, 0x80};
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
316
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
317 static void keyoff(ym_operator *op)
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
318 {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
319 op->env_phase = PHASE_RELEASE;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
320 if (op->inverted) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
321 //Nemesis says the inversion state doesn't change here, but I don't see how that is observable either way
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
322 op->inverted = 0;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
323 op->envelope = (SSG_CENTER - op->envelope) & MAX_ENVELOPE;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
324 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
325 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
326
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
327 static void csm_keyoff(ym2612_context *context)
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
328 {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
329 context->csm_keyon = 0;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
330 uint8_t changes = 0xF0 ^ context->channels[2].keyon;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
331 for (uint8_t op = 2*4, bit = 0; op < 3*4; op++, bit++)
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
332 {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
333 if (changes & keyon_bits[bit]) {
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
334 keyoff(context->operators + op);
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
335 }
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
336 }
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
337 }
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
338
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
339 void ym_run(ym2612_context * context, uint32_t to_cycle)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
340 {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
341 //printf("Running YM2612 from cycle %d to cycle %d\n", context->current_cycle, to_cycle);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
342 //TODO: Fix channel update order OR remap channels in register write
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
343 for (; context->current_cycle < to_cycle; context->current_cycle += context->clock_inc) {
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
344 //Update timers at beginning of 144 cycle period
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
345 if (!context->current_op) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
346 if (context->timer_control & BIT_TIMERA_ENABLE) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
347 if (context->timer_a != TIMER_A_MAX) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
348 context->timer_a++;
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
349 if (context->csm_keyon) {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
350 csm_keyoff(context);
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
351 }
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
352 } else {
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
353 if (context->timer_control & BIT_TIMERA_LOAD) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
354 context->timer_control &= ~BIT_TIMERA_LOAD;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
355 } else if (context->timer_control & BIT_TIMERA_OVEREN) {
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
356 context->status |= BIT_STATUS_TIMERA;
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
357 }
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
358 context->timer_a = context->timer_a_load;
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
359 if (!context->csm_keyon && context->ch3_mode == CSM_MODE) {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
360 context->csm_keyon = 0xF0;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
361 uint8_t changes = 0xF0 ^ context->channels[2].keyon;;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
362 for (uint8_t op = 2*4, bit = 0; op < 3*4; op++, bit++)
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
363 {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
364 if (changes & keyon_bits[bit]) {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
365 keyon(context->operators + op, context->channels + 2);
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
366 }
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
367 }
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
368 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
369 }
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
370 }
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
371 if (!context->sub_timer_b) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
372 if (context->timer_control & BIT_TIMERB_ENABLE) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
373 if (context->timer_b != TIMER_B_MAX) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
374 context->timer_b++;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
375 } else {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
376 if (context->timer_control & BIT_TIMERB_LOAD) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
377 context->timer_control &= ~BIT_TIMERB_LOAD;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
378 } else if (context->timer_control & BIT_TIMERB_OVEREN) {
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
379 context->status |= BIT_STATUS_TIMERB;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
380 }
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
381 context->timer_b = context->timer_b_load;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
382 }
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
383 }
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
384 }
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
385 context->sub_timer_b += 0x10;
740
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
386 //Update LFO
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
387 if (context->lfo_enable) {
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
388 if (context->lfo_counter) {
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
389 context->lfo_counter--;
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
390 } else {
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
391 context->lfo_counter = lfo_timer_values[context->lfo_freq];
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
392 context->lfo_am_step += 2;
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
393 context->lfo_am_step &= 0xFE;
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
394 context->lfo_pm_step = context->lfo_am_step / 8;
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
395 }
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
396 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
397 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
398 //Update Envelope Generator
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
399 if (!(context->current_op % 3)) {
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
400 uint32_t env_cyc = context->env_counter;
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
401 uint32_t op = context->current_env_op;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
402 ym_operator * operator = context->operators + op;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
403 ym_channel * channel = context->channels + op/4;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
404 uint8_t rate;
929
0ee8cfcc06d1 Change where decay to sustain transition happens to match hardware when decay rate is slow or 0
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
405 if (operator->env_phase == PHASE_DECAY && operator->envelope >= operator->sustain_level) {
0ee8cfcc06d1 Change where decay to sustain transition happens to match hardware when decay rate is slow or 0
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
406 //operator->envelope = operator->sustain_level;
0ee8cfcc06d1 Change where decay to sustain transition happens to match hardware when decay rate is slow or 0
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
407 operator->env_phase = PHASE_SUSTAIN;
0ee8cfcc06d1 Change where decay to sustain transition happens to match hardware when decay rate is slow or 0
Michael Pavone <pavone@retrodev.com>
parents: 884
diff changeset
408 }
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
409 rate = operator->rates[operator->env_phase];
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
410 if (rate) {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
411 uint8_t ks = channel->keycode >> operator->key_scaling;;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
412 rate = rate*2 + ks;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
413 if (rate > 63) {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
414 rate = 63;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
415 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
416 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
417 uint32_t cycle_shift = rate < 0x30 ? ((0x2F - rate) >> 2) : 0;
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
418 if (first_key_on) {
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
419 dfprintf(debug_file, "Operator: %d, env rate: %d (2*%d+%d), env_cyc: %d, cycle_shift: %d, env_cyc & ((1 << cycle_shift) - 1): %d\n", op, rate, operator->rates[operator->env_phase], channel->keycode >> operator->key_scaling,env_cyc, cycle_shift, env_cyc & ((1 << cycle_shift) - 1));
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
420 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
421 if (!(env_cyc & ((1 << cycle_shift) - 1))) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
422 uint32_t update_cycle = env_cyc >> cycle_shift & 0x7;
852
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
423 uint16_t envelope_inc = rate_table[rate * 8 + update_cycle];
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
424 if (operator->env_phase == PHASE_ATTACK) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
425 //this can probably be optimized to a single shift rather than a multiply + shift
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
426 if (first_key_on) {
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
427 dfprintf(debug_file, "Changing op %d envelope %d by %d(%d * %d) in attack phase\n", op, operator->envelope, (~operator->envelope * envelope_inc) >> 4, ~operator->envelope, envelope_inc);
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
428 }
513
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
429 uint16_t old_env = operator->envelope;
852
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
430 operator->envelope += ((~operator->envelope * envelope_inc) >> 4) & 0xFFFFFFFC;
513
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
431 if (operator->envelope > old_env) {
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
432 //Handle overflow
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
433 operator->envelope = 0;
24ebabd89162 Properly clamp envelope value to zero when it overflows during the attack phase. This fixes a number of instruments that sounded rather wrong as well as the missing melody line from Mushroom Hill Zone in Sonic and Knuckles
Michael Pavone <pavone@retrodev.com>
parents: 505
diff changeset
434 }
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
435 if (!operator->envelope) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
436 operator->env_phase = PHASE_DECAY;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
437 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
438 } else {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
439 if (first_key_on) {
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
440 dfprintf(debug_file, "Changing op %d envelope %d by %d in %s phase\n", op, operator->envelope, envelope_inc,
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
441 operator->env_phase == PHASE_SUSTAIN ? "sustain" : (operator->env_phase == PHASE_DECAY ? "decay": "release"));
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
442 }
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
443 if (operator->ssg) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
444 if (operator->envelope < SSG_CENTER) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
445 envelope_inc *= 4;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
446 } else {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
447 envelope_inc = 0;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
448 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
449 }
852
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
450 //envelope value is 10-bits, but it will be used as a 4.8 value
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
451 operator->envelope += envelope_inc << 2;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
452 //clamp to max attenuation value
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
453 if (
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
454 operator->envelope > MAX_ENVELOPE
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
455 || (operator->env_phase == PHASE_RELEASE && operator->envelope >= SSG_CENTER)
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
456 ) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
457 operator->envelope = MAX_ENVELOPE;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
458 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
459 }
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
460 }
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
461 context->current_env_op++;
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
462 if (context->current_env_op == NUM_OPERATORS) {
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
463 context->current_env_op = 0;
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
464 context->env_counter++;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
465 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
466 }
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
467
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
468 //Update Phase Generator
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
469 uint32_t channel = context->current_op / 4;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
470 if (channel != 5 || !context->dac_enable) {
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
471 uint32_t op = context->current_op;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
472 //printf("updating operator %d of channel %d\n", op, channel);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
473 ym_operator * operator = context->operators + op;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
474 ym_channel * chan = context->channels + channel;
396
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
475 uint16_t phase = operator->phase_counter >> 10 & 0x3FF;
935
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
476 operator->phase_counter += ym_calc_phase_inc(context, operator, context->current_op);
371
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
477 int16_t mod = 0;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
478 switch (op % 4)
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
479 {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
480 case 0://Operator 1
377
da8d53dc914b Initial stab at feedback
Mike Pavone <pavone@retrodev.com>
parents: 376
diff changeset
481 if (chan->feedback) {
527
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
482 mod = (chan->op1_old + operator->output) >> (10-chan->feedback);
377
da8d53dc914b Initial stab at feedback
Mike Pavone <pavone@retrodev.com>
parents: 376
diff changeset
483 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
484 break;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
485 case 1://Operator 3
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
486 switch(chan->algorithm)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
487 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
488 case 0:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
489 case 2:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
490 //modulate by operator 2
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
491 mod = context->operators[op+1].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
492 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
493 case 1:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
494 //modulate by operator 1+2
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
495 mod = (context->operators[op-1].output + context->operators[op+1].output) >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
496 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
497 case 5:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
498 //modulate by operator 1
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
499 mod = context->operators[op-1].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
500 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
501 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
502 case 2://Operator 2
406
b1bc1947d949 Fix modulation condition for operator 2
Mike Pavone <pavone@retrodev.com>
parents: 403
diff changeset
503 if (chan->algorithm != 1 && chan->algorithm != 2 && chan->algorithm != 7) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
504 //modulate by Operator 1
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
505 mod = context->operators[op-2].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
506 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
507 break;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
508 case 3://Operator 4
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
509 switch(chan->algorithm)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
510 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
511 case 0:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
512 case 1:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
513 case 4:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
514 //modulate by operator 3
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
515 mod = context->operators[op-2].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
516 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
517 case 2:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
518 //modulate by operator 1+3
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
519 mod = (context->operators[op-3].output + context->operators[op-2].output) >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
520 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
521 case 3:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
522 //modulate by operator 2+3
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
523 mod = (context->operators[op-1].output + context->operators[op-2].output) >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
524 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
525 case 5:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
526 //modulate by operator 1
379
3218e2f8d685 Make shift value of operator output to modulation input a define
Mike Pavone <pavone@retrodev.com>
parents: 378
diff changeset
527 mod = context->operators[op-3].output >> YM_MOD_SHIFT;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
528 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
529 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
530 break;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
531 }
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
532 uint16_t env = operator->envelope;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
533 if (operator->ssg) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
534 if (env >= SSG_CENTER) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
535 if (operator->ssg & SSG_ALTERNATE) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
536 if (operator->env_phase != PHASE_RELEASE && (
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
537 !(operator->ssg & SSG_HOLD) || ((operator->ssg ^ operator->inverted) & SSG_INVERT) == 0
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
538 )) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
539 operator->inverted ^= SSG_INVERT;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
540 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
541 } else if (!(operator->ssg & SSG_HOLD)) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
542 phase = operator->phase_counter = 0;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
543 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
544 if (
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
545 (operator->env_phase == PHASE_DECAY || operator->env_phase == PHASE_SUSTAIN)
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
546 && !(operator->ssg & SSG_HOLD)
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
547 ) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
548 start_envelope(operator, chan);
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
549 env = operator->envelope;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
550 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
551 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
552 if (operator->inverted) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
553 env = (SSG_CENTER - env) & MAX_ENVELOPE;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
554 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
555 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
556 env += operator->total_level;
740
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
557 if (operator->am) {
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
558 uint16_t base_am = (context->lfo_am_step & 0x80 ? context->lfo_am_step : ~context->lfo_am_step) & 0x7E;
930
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
559 if (ams_shift[chan->ams] >= 0) {
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
560 env += base_am >> ams_shift[chan->ams];
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
561 } else {
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
562 env += base_am << (-ams_shift[chan->ams]);
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
563 }
740
25c9e9d39997 Fix LFO counter update speed and implement amplitude modulation
Michael Pavone <pavone@retrodev.com>
parents: 739
diff changeset
564 }
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
565 if (env > MAX_ENVELOPE) {
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
566 env = MAX_ENVELOPE;
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
567 }
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
568 if (first_key_on) {
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
569 dfprintf(debug_file, "op %d, base phase: %d, mod: %d, sine: %d, out: %d\n", op, phase, mod, sine_table[(phase+mod) & 0x1FF], pow_table[sine_table[phase & 0x1FF] + env]);
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
570 }
527
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
571 //if ((channel != 0 && channel != 4) || chan->algorithm != 5) {
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
572 phase += mod;
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
573 //}
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
574
371
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
575 int16_t output = pow_table[sine_table[phase & 0x1FF] + env];
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
576 if (phase & 0x200) {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
577 output = -output;
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
578 }
527
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
579 if (op % 4 == 0) {
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
580 chan->op1_old = operator->output;
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
581 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
582 operator->output = output;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
583 //Update the channel output if we've updated all operators
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
584 if (op % 4 == 3) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
585 if (chan->algorithm < 4) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
586 chan->output = operator->output;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
587 } else if(chan->algorithm == 4) {
396
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
588 chan->output = operator->output + context->operators[channel * 4 + 2].output;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
589 } else {
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
590 output = 0;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
591 for (uint32_t op = ((chan->algorithm == 7) ? 0 : 1) + channel*4; op < (channel+1)*4; op++) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
592 output += context->operators[op].output;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
593 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
594 chan->output = output;
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
595 }
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
596 if (first_key_on) {
371
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
597 int16_t value = context->channels[channel].output & 0x3FE0;
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
598 if (value & 0x2000) {
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
599 value |= 0xC000;
0f8a759f1ff4 Use signed ints for things that represent signed values in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 370
diff changeset
600 }
522
6a14c5a95648 Adjust PSG and YM-2612 volume to be closer to the real console
Michael Pavone <pavone@retrodev.com>
parents: 521
diff changeset
601 dfprintf(debug_file, "channel %d output: %d\n", channel, (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER);
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
602 }
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
603 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
604 //puts("operator update done");
359
cc39629e8d06 YM2612 WIP snapshot before register refactor
Mike Pavone <pavone@retrodev.com>
parents: 288
diff changeset
605 }
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
606 context->current_op++;
396
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
607 if (context->current_op == NUM_OPERATORS) {
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
608 context->current_op = 0;
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
609
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
610 context->buffer_fraction += context->buffer_inc;
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
611 int16_t left = 0, right = 0;
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
612 for (int i = 0; i < NUM_CHANNELS; i++) {
521
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
613 int16_t value = context->channels[i].output;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
614 if (value > 0x1FE0) {
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
615 value = 0x1FE0;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
616 } else if (value < -0x1FF0) {
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
617 value = -0x1FF0;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
618 } else {
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
619 value &= 0x3FE0;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
620 if (value & 0x2000) {
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
621 value |= 0xC000;
7565ec2ac652 Fix overflow handling on FM channel output
Michael Pavone <pavone@retrodev.com>
parents: 513
diff changeset
622 }
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
623 }
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
624 if (context->channels[i].logfile && context->buffer_fraction > BUFFER_INC_RES) {
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
625 fwrite(&value, sizeof(value), 1, context->channels[i].logfile);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
626 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
627 if (context->channels[i].lr & 0x80) {
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
628 left += (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER;
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
629 }
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
630 if (context->channels[i].lr & 0x40) {
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
631 right += (value * YM_VOLUME_MULTIPLIER) / YM_VOLUME_DIVIDER;
483
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
632 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
633 }
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
634 int32_t tmp = left * context->lowpass_alpha + context->last_left * (0x10000 - context->lowpass_alpha);
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
635 left = tmp >> 16;
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
636 tmp = right * context->lowpass_alpha + context->last_right * (0x10000 - context->lowpass_alpha);
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
637 right = tmp >> 16;
1356
4d16c09210fd Fix resampling code to deal with case in which output frequency is greater than the input frequency. Probably could stand to be improved, but at least it doesn't cause the emulator to deadlock
Michael Pavone <pavone@retrodev.com>
parents: 1308
diff changeset
638 while (context->buffer_fraction > BUFFER_INC_RES) {
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
639 context->buffer_fraction -= BUFFER_INC_RES;
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
640
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
641 int64_t tmp = context->last_left * ((context->buffer_fraction << 16) / context->buffer_inc);
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
642 tmp += left * (0x10000 - ((context->buffer_fraction << 16) / context->buffer_inc));
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
643 context->audio_buffer[context->buffer_pos] = tmp >> 16;
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
644
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
645 tmp = context->last_right * ((context->buffer_fraction << 16) / context->buffer_inc);
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
646 tmp += right * (0x10000 - ((context->buffer_fraction << 16) / context->buffer_inc));
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
647 context->audio_buffer[context->buffer_pos+1] = tmp >> 16;
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
648
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
649 context->buffer_pos += 2;
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
650 if (context->buffer_pos == context->sample_limit) {
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
651 if (!headless) {
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
652 render_wait_ym(context);
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
653 }
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 483
diff changeset
654 }
380
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run.
Mike Pavone <pavone@retrodev.com>
parents: 379
diff changeset
655 }
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
656 context->last_left = left;
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
657 context->last_right = right;
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
658 }
965
5257e85364ed Implemented linear resampling and low pass filter for the YM2612
Michael Pavone <pavone@retrodev.com>
parents: 936
diff changeset
659
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
660 }
535
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
661 if (context->current_cycle >= context->write_cycle + (context->busy_cycles * context->clock_inc / 6)) {
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
662 context->status &= 0x7F;
374
d42a8a3e4894 Fix YM2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 371
diff changeset
663 context->write_cycle = CYCLE_NEVER;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
664 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
665 //printf("Done running YM2612 at cycle %d\n", context->current_cycle, to_cycle);
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
666 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
667
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
668 void ym_address_write_part1(ym2612_context * context, uint8_t address)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
669 {
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
670 //printf("address_write_part1: %X\n", address);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
671 context->selected_reg = address;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
672 context->selected_part = 0;
535
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
673 context->write_cycle = context->current_cycle;
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
674 context->busy_cycles = BUSY_CYCLES_ADDRESS;
650
55b550fe8891 Set the busy flag after a YM-2612 address write
Michael Pavone <pavone@retrodev.com>
parents: 535
diff changeset
675 context->status |= 0x80;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
676 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
677
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
678 void ym_address_write_part2(ym2612_context * context, uint8_t address)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
679 {
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
680 //printf("address_write_part2: %X\n", address);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
681 context->selected_reg = address;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
682 context->selected_part = 1;
535
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
683 context->write_cycle = context->current_cycle;
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
684 context->busy_cycles = BUSY_CYCLES_ADDRESS;
650
55b550fe8891 Set the busy flag after a YM-2612 address write
Michael Pavone <pavone@retrodev.com>
parents: 535
diff changeset
685 context->status |= 0x80;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
686 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
687
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1002
diff changeset
688 static uint8_t fnum_to_keycode[] = {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
689 //F11 = 0
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
690 0,0,0,0,0,0,0,1,
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
691 //F11 = 1
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
692 2,3,3,3,3,3,3,3
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
693 };
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
694
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
695 //table courtesy of Nemesis
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1002
diff changeset
696 static uint32_t detune_table[][4] = {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
697 {0, 0, 1, 2}, //0 (0x00)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
698 {0, 0, 1, 2}, //1 (0x01)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
699 {0, 0, 1, 2}, //2 (0x02)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
700 {0, 0, 1, 2}, //3 (0x03)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
701 {0, 1, 2, 2}, //4 (0x04)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
702 {0, 1, 2, 3}, //5 (0x05)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
703 {0, 1, 2, 3}, //6 (0x06)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
704 {0, 1, 2, 3}, //7 (0x07)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
705 {0, 1, 2, 4}, //8 (0x08)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
706 {0, 1, 3, 4}, //9 (0x09)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
707 {0, 1, 3, 4}, //10 (0x0A)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
708 {0, 1, 3, 5}, //11 (0x0B)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
709 {0, 2, 4, 5}, //12 (0x0C)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
710 {0, 2, 4, 6}, //13 (0x0D)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
711 {0, 2, 4, 6}, //14 (0x0E)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
712 {0, 2, 5, 7}, //15 (0x0F)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
713 {0, 2, 5, 8}, //16 (0x10)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
714 {0, 3, 6, 8}, //17 (0x11)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
715 {0, 3, 6, 9}, //18 (0x12)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
716 {0, 3, 7,10}, //19 (0x13)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
717 {0, 4, 8,11}, //20 (0x14)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
718 {0, 4, 8,12}, //21 (0x15)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
719 {0, 4, 9,13}, //22 (0x16)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
720 {0, 5,10,14}, //23 (0x17)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
721 {0, 5,11,16}, //24 (0x18)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
722 {0, 6,12,17}, //25 (0x19)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
723 {0, 6,13,19}, //26 (0x1A)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
724 {0, 7,14,20}, //27 (0x1B)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
725 {0, 8,16,22}, //28 (0x1C)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
726 {0, 8,16,22}, //29 (0x1D)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
727 {0, 8,16,22}, //30 (0x1E)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
728 {0, 8,16,22}
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
729 }; //31 (0x1F)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
730
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1002
diff changeset
731 static uint32_t ym_calc_phase_inc(ym2612_context * context, ym_operator * operator, uint32_t op)
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
732 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
733 uint32_t chan_num = op / 4;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
734 //printf("ym_update_phase_inc | channel: %d, op: %d\n", chan_num, op);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
735 //base frequency
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
736 ym_channel * channel = context->channels + chan_num;
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
737 uint32_t inc, detune;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
738 if (chan_num == 2 && context->ch3_mode && (op < (2*4 + 3))) {
738
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
739 //supplemental fnum registers are in a different order than normal slot paramters
936
f1a8124ad881 Fix register to operator mapping for channel 3 special mode and actually get it right this time
Michael Pavone <pavone@retrodev.com>
parents: 935
diff changeset
740 int index = op-2*4;
f1a8124ad881 Fix register to operator mapping for channel 3 special mode and actually get it right this time
Michael Pavone <pavone@retrodev.com>
parents: 935
diff changeset
741 if (index < 2) {
f1a8124ad881 Fix register to operator mapping for channel 3 special mode and actually get it right this time
Michael Pavone <pavone@retrodev.com>
parents: 935
diff changeset
742 index ^= 1;
f1a8124ad881 Fix register to operator mapping for channel 3 special mode and actually get it right this time
Michael Pavone <pavone@retrodev.com>
parents: 935
diff changeset
743 }
738
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
744 inc = context->ch3_supp[index].fnum;
935
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
745 if (channel->pms) {
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
746 inc = inc * 2 + lfo_pm_table[(inc & 0x7F0) * 16 + channel->pms + context->lfo_pm_step];
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
747 }
738
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
748 if (!context->ch3_supp[index].block) {
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
749 inc >>= 1;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
750 } else {
738
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
751 inc <<= (context->ch3_supp[index].block-1);
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
752 }
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
753 //detune
738
8972378e314f Fix register to operator mapping for channel 3 special mode
Michael Pavone <pavone@retrodev.com>
parents: 650
diff changeset
754 detune = detune_table[context->ch3_supp[index].keycode][operator->detune & 0x3];
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
755 } else {
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
756 inc = channel->fnum;
935
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
757 if (channel->pms) {
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
758 inc = inc * 2 + lfo_pm_table[(inc & 0x7F0) * 16 + channel->pms + context->lfo_pm_step];
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
759 }
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
760 if (!channel->block) {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
761 inc >>= 1;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
762 } else {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
763 inc <<= (channel->block-1);
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
764 }
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
765 //detune
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
766 detune = detune_table[channel->keycode][operator->detune & 0x3];
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
767 }
935
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
768 if (channel->pms) {
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
769 inc >>= 1;
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
770 }
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
771 if (operator->detune & 0x4) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
772 inc -= detune;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
773 //this can underflow, mask to 17-bit result
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
774 inc &= 0x1FFFF;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
775 } else {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
776 inc += detune;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
777 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
778 //multiple
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
779 if (operator->multiple) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
780 inc *= operator->multiple;
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
781 inc &= 0xFFFFF;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
782 } else {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
783 //0.5
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
784 inc >>= 1;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
785 }
365
3ba3b6656fff Actually save the shifted phase inc after applying the block shift
Mike Pavone <pavone@retrodev.com>
parents: 364
diff changeset
786 //printf("phase_inc for operator %d: %d, block: %d, fnum: %d, detune: %d, multiple: %d\n", op, inc, channel->block, channel->fnum, detune, operator->multiple);
935
01fb50390b27 Remove phase increment caching. Fix LFO phase modulation calculation
Michael Pavone <pavone@retrodev.com>
parents: 930
diff changeset
787 return inc;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
788 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
789
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
790 void ym_data_write(ym2612_context * context, uint8_t value)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
791 {
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
792 if (context->selected_reg >= YM_REG_END) {
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
793 return;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
794 }
451
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
795 if (context->selected_part) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
796 if (context->selected_reg < YM_PART2_START) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
797 return;
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
798 }
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
799 context->part2_regs[context->selected_reg - YM_PART2_START] = value;
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
800 } else {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
801 if (context->selected_reg < YM_PART1_START) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
802 return;
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
803 }
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
804 context->part1_regs[context->selected_reg - YM_PART1_START] = value;
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness
Mike Pavone <pavone@retrodev.com>
parents: 448
diff changeset
805 }
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
806 dfprintf(debug_file, "write of %X to reg %X in part %d\n", value, context->selected_reg, context->selected_part+1);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
807 if (context->selected_reg < 0x30) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
808 //Shared regs
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
809 switch (context->selected_reg)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
810 {
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
811 //TODO: Test reg
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
812 case REG_LFO:
532
666210adf87b Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents: 527
diff changeset
813 /*if ((value & 0x8) && !context->lfo_enable) {
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
814 printf("LFO Enabled, Freq: %d\n", value & 0x7);
532
666210adf87b Comment out LFO debug printf
Mike Pavone <pavone@retrodev.com>
parents: 527
diff changeset
815 }*/
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
816 context->lfo_enable = value & 0x8;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
817 if (!context->lfo_enable) {
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
818 context->lfo_am_step = context->lfo_pm_step = 0;
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
819 }
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
820 context->lfo_freq = value & 0x7;
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
821
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
822 break;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
823 case REG_TIMERA_HIGH:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
824 context->timer_a_load &= 0x3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
825 context->timer_a_load |= value << 2;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
826 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
827 case REG_TIMERA_LOW:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
828 context->timer_a_load &= 0xFFFC;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
829 context->timer_a_load |= value & 0x3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
830 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
831 case REG_TIMERB:
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
832 context->timer_b_load = value;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
833 break;
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
834 case REG_TIME_CTRL: {
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
835 if (value & BIT_TIMERA_ENABLE && !(context->timer_control & BIT_TIMERA_ENABLE)) {
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
836 context->timer_a = TIMER_A_MAX;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
837 context->timer_control |= BIT_TIMERA_LOAD;
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
838 }
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
839 if (value & BIT_TIMERB_ENABLE && !(context->timer_control & BIT_TIMERB_ENABLE)) {
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
840 context->timer_b = TIMER_B_MAX;
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
841 context->timer_control |= BIT_TIMERB_LOAD;
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
842 }
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
843 context->timer_control &= (BIT_TIMERA_LOAD | BIT_TIMERB_LOAD);
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
844 context->timer_control |= value & 0xF;
403
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
845 if (value & BIT_TIMERA_RESET) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
846 context->status &= ~BIT_STATUS_TIMERA;
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
847 }
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
848 if (value & BIT_TIMERB_RESET) {
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
849 context->status &= ~BIT_STATUS_TIMERB;
f0a3f86595ae Fix YM2612 timers
Mike Pavone <pavone@retrodev.com>
parents: 396
diff changeset
850 }
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
851 if (context->ch3_mode == CSM_MODE && (value & 0xC0) != CSM_MODE && context->csm_keyon) {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
852 csm_keyoff(context);
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
853 }
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
854 context->ch3_mode = value & 0xC0;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
855 break;
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
856 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
857 case REG_KEY_ONOFF: {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
858 uint8_t channel = value & 0x7;
386
6e5c4f3ab0e2 Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents: 383
diff changeset
859 if (channel != 3 && channel != 7) {
6e5c4f3ab0e2 Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents: 383
diff changeset
860 if (channel > 2) {
6e5c4f3ab0e2 Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents: 383
diff changeset
861 channel--;
6e5c4f3ab0e2 Fix channel mapping in key on/off register
Mike Pavone <pavone@retrodev.com>
parents: 383
diff changeset
862 }
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
863 uint8_t changes = channel == 2
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
864 ? (value | context->csm_keyon) ^ (context->channels[channel].keyon | context->csm_keyon)
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
865 : value ^ context->channels[channel].keyon;
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
866 context->channels[channel].keyon = value & 0xF0;
851
b10cf2c921ad Fix mapping of key on/off reg bits to operators
Michael Pavone <pavone@retrodev.com>
parents: 848
diff changeset
867 for (uint8_t op = channel * 4, bit = 0; op < (channel + 1) * 4; op++, bit++) {
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
868 if (changes & keyon_bits[bit]) {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
869 if (value & keyon_bits[bit]) {
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
870 first_key_on = 1;
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
871 //printf("Key On for operator %d in channel %d\n", op, channel);
1300
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
872 keyon(context->operators + op, context->channels + channel);
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
873 } else {
4b893b02444e Basic implementation of CSM mode that should handle documented edge cases. Dodesn't handle the weird undocumented edge cases I don't have a good understanding of yet though
Michael Pavone <pavone@retrodev.com>
parents: 1102
diff changeset
874 //printf("Key Off for operator %d in channel %d\n", op, channel);
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
875 keyoff(context->operators + op);
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
876 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
877 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
878 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
879 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
880 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
881 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
882 case REG_DAC:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
883 if (context->dac_enable) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
884 context->channels[5].output = (((int16_t)value) - 0x80) << 6;
396
09328dbe6700 Fix output of algorithm 4 and make some other minor YM2612 core improvements
Mike Pavone <pavone@retrodev.com>
parents: 386
diff changeset
885 //printf("DAC Write %X(%d) @ %d\n", value, context->channels[5].output, context->current_cycle);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
886 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
887 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
888 case REG_DAC_ENABLE:
364
62177cc39049 Incredibly broken YM2612 support plus a fix to Z80 bus request
Mike Pavone <pavone@retrodev.com>
parents: 362
diff changeset
889 //printf("DAC Enable: %X\n", value);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
890 context->dac_enable = value & 0x80;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
891 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
892 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
893 } else if (context->selected_reg < 0xA0) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
894 //part
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
895 uint8_t op = context->selected_part ? (NUM_OPERATORS/2) : 0;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
896 //channel in part
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
897 if ((context->selected_reg & 0x3) != 0x3) {
370
5f215603d001 Fix register to operator mapping. Fix rate table generation. Add TL to envelope value rather than using it as a limit for the attack phase.
Mike Pavone <pavone@retrodev.com>
parents: 369
diff changeset
898 op += 4 * (context->selected_reg & 0x3) + ((context->selected_reg & 0xC) / 4);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
899 //printf("write targets operator %d (%d of channel %d)\n", op, op % 4, op / 4);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
900 ym_operator * operator = context->operators + op;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
901 switch (context->selected_reg & 0xF0)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
902 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
903 case REG_DETUNE_MULT:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
904 operator->detune = value >> 4 & 0x7;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
905 operator->multiple = value & 0xF;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
906 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
907 case REG_TOTAL_LEVEL:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
908 operator->total_level = (value & 0x7F) << 5;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
909 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
910 case REG_ATTACK_KS:
376
f6def5cdf1b4 Fix key scaling
Mike Pavone <pavone@retrodev.com>
parents: 374
diff changeset
911 operator->key_scaling = 3 - (value >> 6);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
912 operator->rates[PHASE_ATTACK] = value & 0x1F;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
913 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
914 case REG_DECAY_AM:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
915 //TODO: AM flag for LFO
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
916 operator->am = value & 0x80;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
917 operator->rates[PHASE_DECAY] = value & 0x1F;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
918 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
919 case REG_SUSTAIN_RATE:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
920 operator->rates[PHASE_SUSTAIN] = value & 0x1F;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
921 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
922 case REG_S_LVL_R_RATE:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
923 operator->rates[PHASE_RELEASE] = (value & 0xF) << 1 | 1;
852
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
924 operator->sustain_level = (value & 0xF0) << 3;
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
925 if (operator->sustain_level == 0x780) {
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
926 operator->sustain_level = MAX_ENVELOPE;
5de8759b87af Fix some bugs in the attack phase and sustain level in the envelope generator
Michael Pavone <pavone@retrodev.com>
parents: 851
diff changeset
927 }
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
928 break;
1301
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
929 case REG_SSG_EG:
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
930 if (!(value & SSG_ENABLE)) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
931 value = 0;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
932 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
933 if ((value ^ operator->ssg) & SSG_INVERT) {
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
934 operator->inverted ^= SSG_INVERT;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
935 }
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
936 operator->ssg = value;
babff81e4cfd Initial implementation of YM2612 SSG-EG mode
Michael Pavone <pavone@retrodev.com>
parents: 1300
diff changeset
937 break;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
938 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
939 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
940 } else {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
941 uint8_t channel = context->selected_reg & 0x3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
942 if (channel != 3) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
943 if (context->selected_part) {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
944 channel += 3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
945 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
946 //printf("write targets channel %d\n", channel);
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
947 switch (context->selected_reg & 0xFC)
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
948 {
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
949 case REG_FNUM_LOW:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
950 context->channels[channel].block = context->channels[channel].block_fnum_latch >> 3 & 0x7;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
951 context->channels[channel].fnum = (context->channels[channel].block_fnum_latch & 0x7) << 8 | value;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
952 context->channels[channel].keycode = context->channels[channel].block << 2 | fnum_to_keycode[context->channels[channel].fnum >> 7];
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
953 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
954 case REG_BLOCK_FNUM_H:{
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
955 context->channels[channel].block_fnum_latch = value;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
956 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
957 }
383
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
958 case REG_FNUM_LOW_CH3:
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
959 if (channel < 3) {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
960 context->ch3_supp[channel].block = context->ch3_supp[channel].block_fnum_latch >> 3 & 0x7;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
961 context->ch3_supp[channel].fnum = (context->ch3_supp[channel].block_fnum_latch & 0x7) << 8 | value;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
962 context->ch3_supp[channel].keycode = context->ch3_supp[channel].block << 2 | fnum_to_keycode[context->ch3_supp[channel].fnum >> 7];
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
963 }
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
964 break;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
965 case REG_BLOCK_FN_CH3:
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
966 if (channel < 3) {
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
967 context->ch3_supp[channel].block_fnum_latch = value;
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
968 }
72933100c55c Initial implementation of channel 3 special mode
Mike Pavone <pavone@retrodev.com>
parents: 382
diff changeset
969 break;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
970 case REG_ALG_FEEDBACK:
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
971 context->channels[channel].algorithm = value & 0x7;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
972 context->channels[channel].feedback = value >> 3 & 0x7;
527
7df7f493b3b6 Fix operator 1 self-feedback
Michael Pavone <pavone@retrodev.com>
parents: 522
diff changeset
973 //printf("Algorithm %d, feedback %d for channel %d\n", value & 0x7, value >> 3 & 0x7, channel);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
974 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
975 case REG_LR_AMS_PMS:
411
baf4688901f2 Initial stab at LFO phase modulation
Mike Pavone <pavone@retrodev.com>
parents: 407
diff changeset
976 context->channels[channel].pms = (value & 0x7) * 32;
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
977 context->channels[channel].ams = value >> 4 & 0x3;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
978 context->channels[channel].lr = value & 0xC0;
369
fc820ab1394b Fix left/right enable default value
Mike Pavone <pavone@retrodev.com>
parents: 365
diff changeset
979 //printf("Write of %X to LR_AMS_PMS reg for channel %d\n", value, channel);
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
980 break;
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
981 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
982 }
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
983 }
448
e85a107e6ec0 Fix handling of key on in YM2612 core
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
984
362
b7c3facee762 YM2612 WIP update
Mike Pavone <pavone@retrodev.com>
parents: 359
diff changeset
985 context->write_cycle = context->current_cycle;
535
aaa77e351c24 Better emulation of the YM-2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 532
diff changeset
986 context->busy_cycles = context->selected_reg < 0xA0 ? BUSY_CYCLES_DATA_LOW : BUSY_CYCLES_DATA_HIGH;
374
d42a8a3e4894 Fix YM2612 busy flag
Mike Pavone <pavone@retrodev.com>
parents: 371
diff changeset
987 context->status |= 0x80;
288
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
988 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
989
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
990 uint8_t ym_read_status(ym2612_context * context)
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
991 {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
992 return context->status;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
993 }
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run.
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
994
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
995 void ym_print_channel_info(ym2612_context *context, int channel)
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
996 {
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
997 ym_channel *chan = context->channels + channel;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
998 printf("\n***Channel %d***\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
999 "Algorithm: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1000 "Feedback: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1001 "Pan: %s\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1002 "AMS: %d\n"
845
3a18b5f63afc Small fix to how manual YM-2612 timer reloads work. Seems to better match a small test program and gets audio to match up in TM.EE's "I've got Italo Inside" track.
Michael Pavone <pavone@retrodev.com>
parents: 740
diff changeset
1003 "PMS: %d\n",
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1004 channel+1, chan->algorithm, chan->feedback,
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1005 chan->lr == 0xC0 ? "LR" : chan->lr == 0x80 ? "L" : chan->lr == 0x40 ? "R" : "",
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1006 chan->ams, chan->pms);
930
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1007 if (channel == 2) {
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1008 printf(
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1009 "Mode: %X: %s\n",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1010 context->ch3_mode, context->ch3_mode ? "special" : "normal");
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1011 }
739
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1012 for (int operator = channel * 4; operator < channel * 4+4; operator++)
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1013 {
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1014 int dispnum = operator - channel * 4 + 1;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1015 if (dispnum == 2) {
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1016 dispnum = 3;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1017 } else if (dispnum == 3) {
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1018 dispnum = 2;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1019 }
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1020 ym_operator *op = context->operators + operator;
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1021 printf("\nOperator %d:\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1022 " Multiple: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1023 " Detune: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1024 " Total Level: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1025 " Attack Rate: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1026 " Key Scaling: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1027 " Decay Rate: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1028 " Sustain Level: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1029 " Sustain Rate: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1030 " Release Rate: %d\n"
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1031 " Amplitude Modulation %s\n",
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1032 dispnum, op->multiple, op->detune, op->total_level,
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1033 op->rates[PHASE_ATTACK], op->key_scaling, op->rates[PHASE_DECAY],
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1034 op->sustain_level, op->rates[PHASE_SUSTAIN], op->rates[PHASE_RELEASE],
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1035 op->am ? "On" : "Off");
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1036 }
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1037 }
2317bdca03b4 Add a basic YM-2612 command to the debugger. Fix negative detune values and get the correct precision for the multiplication step of phase inc calculation
Michael Pavone <pavone@retrodev.com>
parents: 738
diff changeset
1038
930
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1039 void ym_print_timer_info(ym2612_context *context)
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1040 {
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1041 printf("***Timer A***\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1042 "Current Value: %d\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1043 "Load Value: %d\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1044 "Triggered: %s\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1045 "Enabled: %s\n\n",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1046 context->timer_a,
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1047 context->timer_a_load,
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1048 context->status & BIT_STATUS_TIMERA ? "yes" : "no",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1049 context->timer_control & BIT_TIMERA_ENABLE ? "yes" : "no");
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1050 printf("***Timer B***\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1051 "Current Value: %d\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1052 "Load Value: %d\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1053 "Triggered: %s\n"
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1054 "Enabled: %s\n\n",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1055 context->timer_b,
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1056 context->timer_b_load,
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1057 context->status & BIT_STATUS_TIMERB ? "yes" : "no",
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1058 context->timer_control & BIT_TIMERB_ENABLE ? "yes" : "no");
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1059 }
f33e8d88ab6f Add yt debug command for printing YM-2612 timer info. Fix AMS shift values.
Michael Pavone <pavone@retrodev.com>
parents: 929
diff changeset
1060
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1061 void ym_serialize(ym2612_context *context, serialize_buffer *buf)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1062 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1063 save_buffer8(buf, context->part1_regs, YM_PART1_REGS);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1064 save_buffer8(buf, context->part2_regs, YM_PART2_REGS);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1065 for (int i = 0; i < NUM_OPERATORS; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1066 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1067 save_int32(buf, context->operators[i].phase_counter);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1068 save_int16(buf, context->operators[i].envelope);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1069 save_int16(buf, context->operators[i].output);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1070 save_int8(buf, context->operators[i].env_phase);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1071 save_int8(buf, context->operators[i].inverted);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1072 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1073 for (int i = 0; i < NUM_CHANNELS; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1074 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1075 save_int16(buf, context->channels[i].output);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1076 save_int16(buf, context->channels[i].op1_old);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1077 //Due to the latching behavior, these need to be saved
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1078 //even though duplicate info is probably in the regs array
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1079 save_int8(buf, context->channels[i].block);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1080 save_int8(buf, context->channels[i].fnum);
1447
a094815b1168 Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
1081 save_int8(buf, context->channels[i].keyon);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1082 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1083 for (int i = 0; i < 3; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1084 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1085 //Due to the latching behavior, these need to be saved
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1086 //even though duplicate info is probably in the regs array
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1087 save_int8(buf, context->ch3_supp[i].block);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1088 save_int8(buf, context->ch3_supp[i].fnum);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1089 }
1447
a094815b1168 Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
1090 save_int8(buf, context->timer_control);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1091 save_int16(buf, context->timer_a);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1092 save_int8(buf, context->timer_b);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1093 save_int8(buf, context->sub_timer_b);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1094 save_int16(buf, context->env_counter);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1095 save_int8(buf, context->current_op);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1096 save_int8(buf, context->current_env_op);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1097 save_int8(buf, context->lfo_counter);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1098 save_int8(buf, context->csm_keyon);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1099 save_int8(buf, context->status);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1100 save_int8(buf, context->selected_reg);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1101 save_int8(buf, context->selected_part);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1102 save_int32(buf, context->current_cycle);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1103 save_int32(buf, context->write_cycle);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1104 save_int32(buf, context->busy_cycles);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1105 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1106
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1107 void ym_deserialize(deserialize_buffer *buf, void *vcontext)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1108 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1109 ym2612_context *context = vcontext;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1110 uint8_t temp_regs[YM_PART1_REGS];
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1111 load_buffer8(buf, temp_regs, YM_PART1_REGS);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1112 context->selected_part = 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1113 for (int i = 0; i < YM_PART1_REGS; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1114 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1115 uint8_t reg = YM_PART1_START + i;
1447
a094815b1168 Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
1116 if (reg == REG_TIME_CTRL) {
a094815b1168 Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
1117 context->ch3_mode = temp_regs[i] & 0xC0;
a094815b1168 Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
1118 } else if (reg != REG_FNUM_LOW && reg != REG_KEY_ONOFF) {
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1119 context->selected_reg = reg;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1120 ym_data_write(context, temp_regs[i]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1121 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1122 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1123 load_buffer8(buf, temp_regs, YM_PART2_REGS);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1124 context->selected_part = 1;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1125 for (int i = 0; i < YM_PART2_REGS; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1126 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1127 uint8_t reg = YM_PART2_START + i;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1128 if (reg != REG_FNUM_LOW) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1129 context->selected_reg = reg;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1130 ym_data_write(context, temp_regs[i]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1131 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1132 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1133 for (int i = 0; i < NUM_OPERATORS; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1134 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1135 context->operators[i].phase_counter = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1136 context->operators[i].envelope = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1137 context->operators[i].output = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1138 context->operators[i].env_phase = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1139 if (context->operators[i].env_phase > PHASE_RELEASE) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1140 context->operators[i].env_phase = PHASE_RELEASE;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1141 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1142 context->operators[i].inverted = load_int8(buf) != 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1143 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1144 for (int i = 0; i < NUM_CHANNELS; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1145 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1146 context->channels[i].output = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1147 context->channels[i].op1_old = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1148 context->channels[i].block = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1149 context->channels[i].fnum = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1150 context->channels[i].keycode = context->channels[i].block << 2 | fnum_to_keycode[context->channels[i].fnum >> 7];
1447
a094815b1168 Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
1151 context->channels[i].keyon = load_int8(buf);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1152 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1153 for (int i = 0; i < 3; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1154 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1155 context->ch3_supp[i].block = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1156 context->ch3_supp[i].fnum = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1157 context->ch3_supp[i].keycode = context->ch3_supp[i].block << 2 | fnum_to_keycode[context->ch3_supp[i].fnum >> 7];
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1158 }
1447
a094815b1168 Save and restore YM2612 timer control and keyon/off state in native save states
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
1159 context->timer_control = load_int8(buf);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1160 context->timer_a = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1161 context->timer_b = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1162 context->sub_timer_b = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1163 context->env_counter = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1164 context->current_op = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1165 if (context->current_op >= NUM_OPERATORS) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1166 context->current_op = 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1167 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1168 context->current_env_op = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1169 if (context->current_env_op >= NUM_OPERATORS) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1170 context->current_env_op = 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1171 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1172 context->lfo_counter = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1173 context->csm_keyon = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1174 context->status = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1175 context->selected_reg = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1176 context->selected_part = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1177 context->current_cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1178 context->write_cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1179 context->busy_cycles = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1356
diff changeset
1180 }