Mercurial > repos > blastem
annotate m68k_core_x86.c @ 728:cb1c005880e7
Generate an error in x86-32 builds for most cases when a REX prefix would be generated
author | Michael Pavone <pavone@retrodev.com> |
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date | Sat, 23 May 2015 20:25:16 -0700 |
parents | 59a98179d3ba |
children | 61467483eb31 |
rev | line source |
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "gen_x86.h" |
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7 #include "m68k_core.h" |
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8 #include "m68k_internal.h" |
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9 #include "68kinst.h" |
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10 #include "mem.h" |
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11 #include "backend.h" |
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12 #include <stdio.h> |
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13 #include <stddef.h> |
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14 #include <stdlib.h> |
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15 #include <string.h> |
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16 |
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17 enum { |
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18 FLAG_X, |
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19 FLAG_N, |
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20 FLAG_Z, |
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21 FLAG_V, |
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22 FLAG_C |
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23 }; |
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24 |
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25 void set_flag(m68k_options * opts, uint8_t val, uint8_t flag) |
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26 { |
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27 if (opts->flag_regs[flag] >= 0) { |
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28 mov_ir(&opts->gen.code, val, opts->flag_regs[flag], SZ_B); |
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29 } else { |
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30 int8_t offset = offsetof(m68k_context, flags) + flag; |
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31 if (offset) { |
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32 mov_irdisp(&opts->gen.code, val, opts->gen.context_reg, offset, SZ_B); |
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33 } else { |
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34 mov_irind(&opts->gen.code, val, opts->gen.context_reg, SZ_B); |
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35 } |
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36 } |
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37 } |
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38 |
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39 void set_flag_cond(m68k_options *opts, uint8_t cond, uint8_t flag) |
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40 { |
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41 if (opts->flag_regs[flag] >= 0) { |
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42 setcc_r(&opts->gen.code, cond, opts->flag_regs[flag]); |
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43 } else { |
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44 int8_t offset = offsetof(m68k_context, flags) + flag; |
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45 if (offset) { |
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46 setcc_rdisp(&opts->gen.code, cond, opts->gen.context_reg, offset); |
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47 } else { |
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48 setcc_rind(&opts->gen.code, cond, opts->gen.context_reg); |
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49 } |
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50 } |
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51 } |
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52 |
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53 void check_flag(m68k_options *opts, uint8_t flag) |
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54 { |
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55 if (opts->flag_regs[flag] >= 0) { |
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56 cmp_ir(&opts->gen.code, 0, opts->flag_regs[flag], SZ_B); |
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57 } else { |
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58 cmp_irdisp(&opts->gen.code, 0, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, SZ_B); |
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59 } |
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60 } |
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61 |
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62 void flag_to_reg(m68k_options *opts, uint8_t flag, uint8_t reg) |
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63 { |
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64 if (opts->flag_regs[flag] >= 0) { |
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65 mov_rr(&opts->gen.code, opts->flag_regs[flag], reg, SZ_B); |
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66 } else { |
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67 int8_t offset = offsetof(m68k_context, flags) + flag; |
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68 if (offset) { |
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69 mov_rdispr(&opts->gen.code, opts->gen.context_reg, offset, reg, SZ_B); |
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70 } else { |
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71 mov_rindr(&opts->gen.code, opts->gen.context_reg, reg, SZ_B); |
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72 } |
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73 } |
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74 } |
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75 |
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76 void reg_to_flag(m68k_options *opts, uint8_t reg, uint8_t flag) |
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77 { |
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78 if (opts->flag_regs[flag] >= 0) { |
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79 mov_rr(&opts->gen.code, reg, opts->flag_regs[flag], SZ_B); |
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80 } else { |
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81 int8_t offset = offsetof(m68k_context, flags) + flag; |
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82 if (offset) { |
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83 mov_rrdisp(&opts->gen.code, reg, opts->gen.context_reg, offset, SZ_B); |
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84 } else { |
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85 mov_rrind(&opts->gen.code, reg, opts->gen.context_reg, SZ_B); |
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86 } |
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87 } |
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88 } |
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89 |
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90 void flag_to_flag(m68k_options *opts, uint8_t flag1, uint8_t flag2) |
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91 { |
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92 code_info *code = &opts->gen.code; |
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93 if (opts->flag_regs[flag1] >= 0 && opts->flag_regs[flag2] >= 0) { |
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94 mov_rr(code, opts->flag_regs[flag1], opts->flag_regs[flag2], SZ_B); |
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95 } else if(opts->flag_regs[flag1] >= 0) { |
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96 mov_rrdisp(code, opts->flag_regs[flag1], opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B); |
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97 } else if (opts->flag_regs[flag2] >= 0) { |
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98 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag1, opts->flag_regs[flag2], SZ_B); |
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99 } else { |
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100 push_r(code, opts->gen.scratch1); |
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101 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag1, opts->gen.scratch1, SZ_B); |
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102 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B); |
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103 pop_r(code, opts->gen.scratch1); |
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104 } |
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105 } |
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106 |
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107 void update_flags(m68k_options *opts, uint32_t update_mask) |
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108 { |
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109 uint8_t native_flags[] = {0, CC_S, CC_Z, CC_O, CC_C}; |
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110 for (int8_t flag = FLAG_C; flag >= FLAG_X; --flag) |
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111 { |
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112 if (update_mask & X0 << (flag*3)) { |
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113 set_flag(opts, 0, flag); |
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114 } else if(update_mask & X1 << (flag*3)) { |
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115 set_flag(opts, 1, flag); |
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116 } else if(update_mask & X << (flag*3)) { |
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117 if (flag == FLAG_X) { |
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118 if (opts->flag_regs[FLAG_C] >= 0 || !(update_mask & (C0|C1|C))) { |
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119 flag_to_flag(opts, FLAG_C, FLAG_X); |
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120 } else if(update_mask & C0) { |
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121 set_flag(opts, 0, flag); |
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122 } else if(update_mask & C1) { |
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123 set_flag(opts, 1, flag); |
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124 } else { |
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125 set_flag_cond(opts, CC_C, flag); |
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126 } |
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127 } else { |
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128 set_flag_cond(opts, native_flags[flag], flag); |
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129 } |
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130 } |
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131 } |
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132 } |
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133 |
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134 void flag_to_carry(m68k_options * opts, uint8_t flag) |
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135 { |
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136 if (opts->flag_regs[flag] >= 0) { |
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137 bt_ir(&opts->gen.code, 0, opts->flag_regs[flag], SZ_B); |
546
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138 } else { |
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139 bt_irdisp(&opts->gen.code, 0, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, SZ_B); |
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140 } |
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141 } |
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142 |
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143 void or_flag_to_reg(m68k_options *opts, uint8_t flag, uint8_t reg) |
546
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144 { |
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145 if (opts->flag_regs[flag] >= 0) { |
567
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146 or_rr(&opts->gen.code, opts->flag_regs[flag], reg, SZ_B); |
546
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147 } else { |
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148 or_rdispr(&opts->gen.code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, reg, SZ_B); |
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149 } |
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150 } |
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151 |
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152 void xor_flag_to_reg(m68k_options *opts, uint8_t flag, uint8_t reg) |
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153 { |
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154 if (opts->flag_regs[flag] >= 0) { |
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155 xor_rr(&opts->gen.code, opts->flag_regs[flag], reg, SZ_B); |
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156 } else { |
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157 xor_rdispr(&opts->gen.code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, reg, SZ_B); |
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158 } |
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159 } |
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160 |
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161 void xor_flag(m68k_options *opts, uint8_t val, uint8_t flag) |
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162 { |
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163 if (opts->flag_regs[flag] >= 0) { |
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164 xor_ir(&opts->gen.code, val, opts->flag_regs[flag], SZ_B); |
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165 } else { |
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166 xor_irdisp(&opts->gen.code, val, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, SZ_B); |
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167 } |
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168 } |
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169 |
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170 void cmp_flags(m68k_options *opts, uint8_t flag1, uint8_t flag2) |
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171 { |
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172 code_info *code = &opts->gen.code; |
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173 if (opts->flag_regs[flag1] >= 0 && opts->flag_regs[flag2] >= 0) { |
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174 cmp_rr(code, opts->flag_regs[flag1], opts->flag_regs[flag2], SZ_B); |
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175 } else if(opts->flag_regs[flag1] >= 0 || opts->flag_regs[flag2] >= 0) { |
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176 if (opts->flag_regs[flag2] >= 0) { |
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177 uint8_t tmp = flag1; |
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178 flag1 = flag2; |
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179 flag2 = tmp; |
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180 } |
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181 cmp_rrdisp(code, opts->flag_regs[flag1], opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B); |
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182 } else { |
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183 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag1, opts->gen.scratch1, SZ_B); |
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184 cmp_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, flags) + flag2, SZ_B); |
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185 } |
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186 } |
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187 |
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188 void areg_to_native(m68k_options *opts, uint8_t reg, uint8_t native_reg) |
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189 { |
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190 if (opts->aregs[reg] >= 0) { |
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191 mov_rr(&opts->gen.code, opts->aregs[reg], native_reg, SZ_D); |
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192 } else { |
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193 mov_rdispr(&opts->gen.code, opts->gen.context_reg, areg_offset(reg), native_reg, SZ_D); |
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194 } |
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195 } |
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196 |
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197 void dreg_to_native(m68k_options *opts, uint8_t reg, uint8_t native_reg) |
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198 { |
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199 if (opts->dregs[reg] >= 0) { |
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200 mov_rr(&opts->gen.code, opts->dregs[reg], native_reg, SZ_D); |
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201 } else { |
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202 mov_rdispr(&opts->gen.code, opts->gen.context_reg, dreg_offset(reg), native_reg, SZ_D); |
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203 } |
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204 } |
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205 |
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206 void areg_to_native_sx(m68k_options *opts, uint8_t reg, uint8_t native_reg) |
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207 { |
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208 if (opts->aregs[reg] >= 0) { |
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209 movsx_rr(&opts->gen.code, opts->aregs[reg], native_reg, SZ_W, SZ_D); |
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210 } else { |
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211 movsx_rdispr(&opts->gen.code, opts->gen.context_reg, areg_offset(reg), native_reg, SZ_W, SZ_D); |
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212 } |
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213 } |
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214 |
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215 void dreg_to_native_sx(m68k_options *opts, uint8_t reg, uint8_t native_reg) |
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216 { |
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217 if (opts->dregs[reg] >= 0) { |
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218 movsx_rr(&opts->gen.code, opts->dregs[reg], native_reg, SZ_W, SZ_D); |
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219 } else { |
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220 movsx_rdispr(&opts->gen.code, opts->gen.context_reg, dreg_offset(reg), native_reg, SZ_W, SZ_D); |
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221 } |
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222 } |
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223 |
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224 void native_to_areg(m68k_options *opts, uint8_t native_reg, uint8_t reg) |
682 | 225 { |
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226 if (opts->aregs[reg] >= 0) { |
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227 mov_rr(&opts->gen.code, native_reg, opts->aregs[reg], SZ_D); |
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228 } else { |
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229 mov_rrdisp(&opts->gen.code, native_reg, opts->gen.context_reg, areg_offset(reg), SZ_D); |
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230 } |
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231 } |
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232 |
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233 void native_to_dreg(m68k_options *opts, uint8_t native_reg, uint8_t reg) |
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234 { |
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235 if (opts->dregs[reg] >= 0) { |
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236 mov_rr(&opts->gen.code, native_reg, opts->dregs[reg], SZ_D); |
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237 } else { |
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238 mov_rrdisp(&opts->gen.code, native_reg, opts->gen.context_reg, dreg_offset(reg), SZ_D); |
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239 } |
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240 } |
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241 |
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242 void ldi_areg(m68k_options *opts, int32_t value, uint8_t reg) |
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243 { |
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244 if (opts->aregs[reg] >= 0) { |
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245 mov_ir(&opts->gen.code, value, opts->aregs[reg], SZ_D); |
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246 } else { |
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247 mov_irdisp(&opts->gen.code, value, opts->gen.context_reg, areg_offset(reg), SZ_D); |
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248 } |
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249 } |
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250 |
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251 void ldi_native(m68k_options *opts, int32_t value, uint8_t reg) |
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252 { |
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253 mov_ir(&opts->gen.code, value, reg, SZ_D); |
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254 } |
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255 |
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256 void addi_native(m68k_options *opts, int32_t value, uint8_t reg) |
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257 { |
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258 add_ir(&opts->gen.code, value, reg, SZ_D); |
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260 |
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261 void subi_native(m68k_options *opts, int32_t value, uint8_t reg) |
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262 { |
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263 sub_ir(&opts->gen.code, value, reg, SZ_D); |
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264 } |
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265 |
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266 void push_native(m68k_options *opts, uint8_t reg) |
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267 { |
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268 push_r(&opts->gen.code, reg); |
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269 } |
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270 |
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271 void pop_native(m68k_options *opts, uint8_t reg) |
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272 { |
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273 pop_r(&opts->gen.code, reg); |
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274 } |
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275 |
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276 void sign_extend16_native(m68k_options *opts, uint8_t reg) |
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277 { |
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278 movsx_rr(&opts->gen.code, reg, reg, SZ_W, SZ_D); |
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279 } |
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280 |
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281 void addi_areg(m68k_options *opts, int32_t val, uint8_t reg) |
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282 { |
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283 if (opts->aregs[reg] >= 0) { |
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284 add_ir(&opts->gen.code, val, opts->aregs[reg], SZ_D); |
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285 } else { |
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286 add_irdisp(&opts->gen.code, val, opts->gen.context_reg, areg_offset(reg), SZ_D); |
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287 } |
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288 } |
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289 |
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290 void subi_areg(m68k_options *opts, int32_t val, uint8_t reg) |
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291 { |
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292 if (opts->aregs[reg] >= 0) { |
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293 sub_ir(&opts->gen.code, val, opts->aregs[reg], SZ_D); |
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294 } else { |
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295 sub_irdisp(&opts->gen.code, val, opts->gen.context_reg, areg_offset(reg), SZ_D); |
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296 } |
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297 } |
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298 |
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299 void add_areg_native(m68k_options *opts, uint8_t reg, uint8_t native_reg) |
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300 { |
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301 if (opts->aregs[reg] >= 0) { |
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302 add_rr(&opts->gen.code, opts->aregs[reg], native_reg, SZ_D); |
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303 } else { |
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304 add_rdispr(&opts->gen.code, opts->gen.context_reg, areg_offset(reg), native_reg, SZ_D); |
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305 } |
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306 } |
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307 |
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308 void add_dreg_native(m68k_options *opts, uint8_t reg, uint8_t native_reg) |
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309 { |
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310 if (opts->dregs[reg] >= 0) { |
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311 add_rr(&opts->gen.code, opts->dregs[reg], native_reg, SZ_D); |
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312 } else { |
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313 add_rdispr(&opts->gen.code, opts->gen.context_reg, dreg_offset(reg), native_reg, SZ_D); |
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314 } |
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315 } |
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316 |
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317 void calc_areg_displace(m68k_options *opts, m68k_op_info *op, uint8_t native_reg) |
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318 { |
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319 areg_to_native(opts, op->params.regs.pri, native_reg); |
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320 add_ir(&opts->gen.code, op->params.regs.displacement, native_reg, SZ_D); |
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321 } |
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322 |
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323 void calc_index_disp8(m68k_options *opts, m68k_op_info *op, uint8_t native_reg) |
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324 { |
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325 uint8_t sec_reg = (op->params.regs.sec >> 1) & 0x7; |
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326 if (op->params.regs.sec & 1) { |
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327 if (op->params.regs.sec & 0x10) { |
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328 add_areg_native(opts, sec_reg, native_reg); |
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329 } else { |
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330 add_dreg_native(opts, sec_reg, native_reg); |
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331 } |
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682
diff
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|
332 } else { |
574
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More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
333 uint8_t other_reg = native_reg == opts->gen.scratch1 ? opts->gen.scratch2 : opts->gen.scratch1; |
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More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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parents:
571
diff
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|
334 if (op->params.regs.sec & 0x10) { |
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More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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parents:
571
diff
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|
335 areg_to_native_sx(opts, sec_reg, other_reg); |
686
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Fix indentation that presumably got messed up in a merge
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682
diff
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|
336 } else { |
574
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parents:
571
diff
changeset
|
337 dreg_to_native_sx(opts, sec_reg, other_reg); |
686
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Fix indentation that presumably got messed up in a merge
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parents:
682
diff
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|
338 } |
574
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parents:
571
diff
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|
339 add_rr(&opts->gen.code, other_reg, native_reg, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
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parents:
682
diff
changeset
|
340 } |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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parents:
571
diff
changeset
|
341 if (op->params.regs.displacement) { |
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More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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571
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342 add_ir(&opts->gen.code, op->params.regs.displacement, native_reg, SZ_D); |
686
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Fix indentation that presumably got messed up in a merge
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diff
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|
343 } |
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parents:
682
diff
changeset
|
344 } |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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parents:
571
diff
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|
345 |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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|
346 void calc_areg_index_disp8(m68k_options *opts, m68k_op_info *op, uint8_t native_reg) |
686
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parents:
682
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347 { |
574
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More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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|
348 areg_to_native(opts, op->params.regs.pri, native_reg); |
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More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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|
349 calc_index_disp8(opts, op, native_reg); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
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parents:
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350 } |
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|
351 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
352 void translate_m68k_op(m68kinst * inst, host_ea * ea, m68k_options * opts, uint8_t dst) |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
353 { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
354 code_info *code = &opts->gen.code; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
355 m68k_op_info *op = dst ? &inst->dst : &inst->src; |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
356 int8_t reg = native_reg(op, opts); |
81
6d231dbe75ab
Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
Mike Pavone <pavone@retrodev.com>
parents:
78
diff
changeset
|
357 uint8_t sec_reg; |
682 | 358 int32_t dec_amount, inc_amount; |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
359 if (reg >= 0) { |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
360 ea->mode = MODE_REG_DIRECT; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
361 if (!dst && inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
362 movsx_rr(code, reg, opts->gen.scratch1, SZ_W, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
363 ea->base = opts->gen.scratch1; |
181
3b4ef459aa8d
Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
179
diff
changeset
|
364 } else { |
686
8cb61671777b
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Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
365 ea->base = reg; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
366 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
367 return; |
14
2bdad0f52f42
x86 code gen, initial work on translator
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parents:
diff
changeset
|
368 } |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
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|
369 switch (op->addr_mode) |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
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|
370 { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
14
diff
changeset
|
371 case MODE_REG: |
3e7bfde7606e
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parents:
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diff
changeset
|
372 case MODE_AREG: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
373 //We only get one memory parameter, so if the dst operand is a register in memory, |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
374 //we need to copy this to a temp register first if we're translating the src operand |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
375 if (dst || native_reg(&(inst->dst), opts) >= 0 || inst->dst.addr_mode == MODE_UNUSED || !(inst->dst.addr_mode == MODE_REG || inst->dst.addr_mode == MODE_AREG) |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
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parents:
14
diff
changeset
|
376 || inst->op == M68K_EXG) { |
447
e730fc040169
Fix performance regression from stop instruction work
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parents:
446
diff
changeset
|
377 |
686
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Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
378 ea->mode = MODE_REG_DISPLACE8; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
379 ea->base = opts->gen.context_reg; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
380 ea->disp = reg_offset(op); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
381 } else { |
181
3b4ef459aa8d
Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
179
diff
changeset
|
382 if (inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD) { |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
383 movsx_rdispr(code, opts->gen.context_reg, reg_offset(op), opts->gen.scratch1, SZ_W, SZ_D); |
181
3b4ef459aa8d
Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
179
diff
changeset
|
384 } else { |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
385 mov_rdispr(code, opts->gen.context_reg, reg_offset(op), opts->gen.scratch1, inst->extra.size); |
181
3b4ef459aa8d
Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
179
diff
changeset
|
386 } |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
387 ea->mode = MODE_REG_DIRECT; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
388 ea->base = opts->gen.scratch1; |
181
3b4ef459aa8d
Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
179
diff
changeset
|
389 //we're explicitly handling the areg dest here, so we exit immediately |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
390 return; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
391 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
392 break; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
393 case MODE_AREG_PREDEC: |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
394 if (dst && inst->src.addr_mode == MODE_AREG_PREDEC) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
395 push_r(code, opts->gen.scratch1); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
396 } |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
397 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (op->params.regs.pri == 7 ? 2 :1)); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
398 if (!dst) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
399 cycles(&opts->gen, PREDEC_PENALTY); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
400 } |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
401 subi_areg(opts, dec_amount, op->params.regs.pri); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
402 case MODE_AREG_INDIRECT: |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
403 case MODE_AREG_POSTINC: |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
404 areg_to_native(opts, op->params.regs.pri, opts->gen.scratch1); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
405 m68k_read_size(opts, inst->extra.size); |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
406 |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
407 if (dst) { |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
408 if (inst->src.addr_mode == MODE_AREG_PREDEC) { |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
409 //restore src operand to opts->gen.scratch2 |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
410 pop_r(code, opts->gen.scratch2); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
411 } else { |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
412 //save reg value in opts->gen.scratch2 so we can use it to save the result in memory later |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
413 areg_to_native(opts, op->params.regs.pri, opts->gen.scratch2); |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
414 } |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
415 } |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
416 |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
417 if (op->addr_mode == MODE_AREG_POSTINC) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
418 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (op->params.regs.pri == 7 ? 2 : 1)); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
419 addi_areg(opts, inc_amount, op->params.regs.pri); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
420 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
421 ea->mode = MODE_REG_DIRECT; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
422 ea->base = (!dst && inst->dst.addr_mode == MODE_AREG_PREDEC && inst->op != M68K_MOVE) ? opts->gen.scratch2 : opts->gen.scratch1; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
423 break; |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
424 case MODE_AREG_DISPLACE: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
425 cycles(&opts->gen, BUS); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
426 calc_areg_displace(opts, op, opts->gen.scratch1); |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
427 if (dst) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
428 push_r(code, opts->gen.scratch1); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
429 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
430 m68k_read_size(opts, inst->extra.size); |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
431 if (dst) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
432 pop_r(code, opts->gen.scratch2); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
433 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
434 |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
435 ea->mode = MODE_REG_DIRECT; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
436 ea->base = opts->gen.scratch1; |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
437 break; |
81
6d231dbe75ab
Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
Mike Pavone <pavone@retrodev.com>
parents:
78
diff
changeset
|
438 case MODE_AREG_INDEX_DISP8: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
439 cycles(&opts->gen, 6); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
440 calc_areg_index_disp8(opts, op, opts->gen.scratch1); |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
441 if (dst) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
442 push_r(code, opts->gen.scratch1); |
81
6d231dbe75ab
Add support for indexed modes as a source, some work on jmp and jsr with areg indirect mode
Mike Pavone <pavone@retrodev.com>
parents:
78
diff
changeset
|
443 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
444 m68k_read_size(opts, inst->extra.size); |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
445 if (dst) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
446 pop_r(code, opts->gen.scratch2); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
447 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
448 |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
449 ea->mode = MODE_REG_DIRECT; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
450 ea->base = opts->gen.scratch1; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
451 break; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
452 case MODE_PC_DISPLACE: |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
453 cycles(&opts->gen, BUS); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
454 mov_ir(code, op->params.regs.displacement + inst->address+2, opts->gen.scratch1, SZ_D); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
455 if (dst) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
456 push_r(code, opts->gen.scratch1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
457 } |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
458 m68k_read_size(opts, inst->extra.size); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
459 if (dst) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
460 pop_r(code, opts->gen.scratch2); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
461 } |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
462 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
463 ea->mode = MODE_REG_DIRECT; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
464 ea->base = opts->gen.scratch1; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
465 break; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
466 case MODE_PC_INDEX_DISP8: |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
467 cycles(&opts->gen, 6); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
468 mov_ir(code, inst->address+2, opts->gen.scratch1, SZ_D); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
469 calc_index_disp8(opts, op, opts->gen.scratch1); |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
470 if (dst) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
471 push_r(code, opts->gen.scratch1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
472 } |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
473 m68k_read_size(opts, inst->extra.size); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
474 if (dst) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
475 pop_r(code, opts->gen.scratch2); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
476 } |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
477 |
98
104e257fb93c
Allow indexed modes to be used as a destination
Mike Pavone <pavone@retrodev.com>
parents:
97
diff
changeset
|
478 ea->mode = MODE_REG_DIRECT; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
479 ea->base = opts->gen.scratch1; |
98
104e257fb93c
Allow indexed modes to be used as a destination
Mike Pavone <pavone@retrodev.com>
parents:
97
diff
changeset
|
480 break; |
61
918468c623e9
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
481 case MODE_ABSOLUTE: |
918468c623e9
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
482 case MODE_ABSOLUTE_SHORT: |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
483 cycles(&opts->gen, op->addr_mode == MODE_ABSOLUTE ? BUS*2 : BUS); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
484 mov_ir(code, op->params.immed, opts->gen.scratch1, SZ_D); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
485 if (dst) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
486 push_r(code, opts->gen.scratch1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
487 } |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
488 m68k_read_size(opts, inst->extra.size); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
489 if (dst) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
490 pop_r(code, opts->gen.scratch2); |
61
918468c623e9
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
491 } |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
492 |
61
918468c623e9
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
493 ea->mode = MODE_REG_DIRECT; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
494 ea->base = opts->gen.scratch1; |
61
918468c623e9
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
495 break; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
496 case MODE_IMMEDIATE: |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
497 case MODE_IMMEDIATE_WORD: |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
498 if (inst->variant != VAR_QUICK) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
499 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG && op->addr_mode == MODE_IMMEDIATE) ? BUS*2 : BUS); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
500 } |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
501 ea->mode = MODE_IMMED; |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
502 ea->disp = op->params.immed; |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
503 //sign extend value when the destination is an address register |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
504 if (inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD && ea->disp & 0x8000) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
505 ea->disp |= 0xFFFF0000; |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
506 } |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
507 return; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
508 default: |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
|
509 m68k_disasm(inst, disasm_buf); |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
510 printf("%X: %s\naddress mode %d not implemented (%s)\n", inst->address, disasm_buf, op->addr_mode, dst ? "dst" : "src"); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
511 exit(1); |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
512 } |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
513 if (!dst && inst->dst.addr_mode == MODE_AREG && inst->extra.size == OPSIZE_WORD) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
514 if (ea->mode == MODE_REG_DIRECT) { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
515 movsx_rr(code, ea->base, opts->gen.scratch1, SZ_W, SZ_D); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
516 } else { |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
517 movsx_rdispr(code, ea->base, ea->disp, opts->gen.scratch1, SZ_W, SZ_D); |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
518 ea->mode = MODE_REG_DIRECT; |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
519 } |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
520 ea->base = opts->gen.scratch1; |
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
521 } |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
522 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
523 |
687
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
524 void check_user_mode_swap_ssp_usp(m68k_options *opts) |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
525 { |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
526 code_info * code = &opts->gen.code; |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
527 //Check if we've switched to user mode and swap stack pointers if needed |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
528 bt_irdisp(code, 5, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
529 code_ptr end_off = code->cur + 1; |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
530 jcc(code, CC_C, code->cur + 2); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
531 swap_ssp_usp(opts); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
532 *end_off = code->cur - (end_off + 1); |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
533 } |
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
534 |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
535 void translate_m68k_move(m68k_options * opts, m68kinst * inst) |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
536 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
537 code_info *code = &opts->gen.code; |
99
8491de5d6c06
Allow use of indexed modes as move dst
Mike Pavone <pavone@retrodev.com>
parents:
98
diff
changeset
|
538 int8_t reg, flags_reg, sec_reg; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
539 uint8_t dir = 0; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
540 int32_t offset; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
541 int32_t inc_amount, dec_amount; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
542 host_ea src; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
543 translate_m68k_op(inst, &src, opts, 0); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
544 reg = native_reg(&(inst->dst), opts); |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
545 |
216
0b5ec22dcda2
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
546 if (inst->dst.addr_mode != MODE_AREG) { |
0b5ec22dcda2
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
547 if (src.mode == MODE_REG_DIRECT) { |
0b5ec22dcda2
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
548 flags_reg = src.base; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
549 } else { |
216
0b5ec22dcda2
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
550 if (reg >= 0) { |
0b5ec22dcda2
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
551 flags_reg = reg; |
128
fe598ffd85ce
Cleanup bit instructions and fix bug in translate_m68k_move that caused incorrect results once translate_m68k_src was fixed
Mike Pavone <pavone@retrodev.com>
parents:
126
diff
changeset
|
552 } else { |
216
0b5ec22dcda2
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
553 if(src.mode == MODE_REG_DISPLACE8) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
554 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size); |
216
0b5ec22dcda2
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
555 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
556 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size); |
216
0b5ec22dcda2
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
557 } |
0b5ec22dcda2
Fix some bugs related to sign-extension of address registers and pre-decrement amount for a7 when used as a source.
Mike Pavone <pavone@retrodev.com>
parents:
213
diff
changeset
|
558 src.mode = MODE_REG_DIRECT; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
559 flags_reg = src.base = opts->gen.scratch1; |
128
fe598ffd85ce
Cleanup bit instructions and fix bug in translate_m68k_move that caused incorrect results once translate_m68k_src was fixed
Mike Pavone <pavone@retrodev.com>
parents:
126
diff
changeset
|
560 } |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
561 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
562 } |
181
3b4ef459aa8d
Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
179
diff
changeset
|
563 uint8_t size = inst->extra.size; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
564 switch(inst->dst.addr_mode) |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
565 { |
181
3b4ef459aa8d
Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
179
diff
changeset
|
566 case MODE_AREG: |
3b4ef459aa8d
Fix signed division with negative result, fix address reg destination with word-sized operand, fix cmpm decoding and code generation, fix unbalanced pop in bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
179
diff
changeset
|
567 size = OPSIZE_LONG; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
568 case MODE_REG: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
569 if (reg >= 0) { |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
570 if (src.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
571 mov_rr(code, src.base, reg, size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
572 } else if (src.mode == MODE_REG_DISPLACE8) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
573 mov_rdispr(code, src.base, src.disp, reg, size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
574 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
575 mov_ir(code, src.disp, reg, size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
576 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
577 } else if(src.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
578 mov_rrdisp(code, src.base, opts->gen.context_reg, reg_offset(&(inst->dst)), size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
579 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
580 mov_irdisp(code, src.disp, opts->gen.context_reg, reg_offset(&(inst->dst)), size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
581 } |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
582 break; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
583 case MODE_AREG_PREDEC: |
182
924af8b2f7a0
Fix -(a7) dest when size is byte
Mike Pavone <pavone@retrodev.com>
parents:
181
diff
changeset
|
584 dec_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1)); |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
585 case MODE_AREG_INDIRECT: |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
586 case MODE_AREG_POSTINC: |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
587 if (src.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
588 if (src.base != opts->gen.scratch1) { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
589 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
590 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
591 } else if (src.mode == MODE_REG_DISPLACE8) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
592 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
593 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
594 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
595 } |
610
314373222b1a
Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg
Michael Pavone <pavone@retrodev.com>
parents:
605
diff
changeset
|
596 if (inst->dst.addr_mode == MODE_AREG_PREDEC) { |
314373222b1a
Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg
Michael Pavone <pavone@retrodev.com>
parents:
605
diff
changeset
|
597 subi_areg(opts, dec_amount, inst->dst.params.regs.pri); |
314373222b1a
Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg
Michael Pavone <pavone@retrodev.com>
parents:
605
diff
changeset
|
598 } |
314373222b1a
Decrement address register after fetching source in move with -(ax) dest to avoid bug when src is the dst addres reg
Michael Pavone <pavone@retrodev.com>
parents:
605
diff
changeset
|
599 areg_to_native(opts, inst->dst.params.regs.pri, opts->gen.scratch2); |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
600 break; |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
601 case MODE_AREG_DISPLACE: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
602 cycles(&opts->gen, BUS); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
603 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
604 if (src.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
605 if (src.base != opts->gen.scratch1) { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
606 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
607 } |
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
608 } else if (src.mode == MODE_REG_DISPLACE8) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
609 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
610 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
611 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
612 } |
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
613 break; |
99
8491de5d6c06
Allow use of indexed modes as move dst
Mike Pavone <pavone@retrodev.com>
parents:
98
diff
changeset
|
614 case MODE_AREG_INDEX_DISP8: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
615 cycles(&opts->gen, 6);//TODO: Check to make sure this is correct |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
616 //calc_areg_index_disp8 will clober scratch1 when a 16-bit index is used |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
617 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) { |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
618 push_r(code, opts->gen.scratch1); |
99
8491de5d6c06
Allow use of indexed modes as move dst
Mike Pavone <pavone@retrodev.com>
parents:
98
diff
changeset
|
619 } |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
620 calc_areg_index_disp8(opts, &inst->dst, opts->gen.scratch2); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
621 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) { |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
622 pop_r(code, opts->gen.scratch1); |
99
8491de5d6c06
Allow use of indexed modes as move dst
Mike Pavone <pavone@retrodev.com>
parents:
98
diff
changeset
|
623 } |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
624 if (src.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
625 if (src.base != opts->gen.scratch1) { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
626 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
627 } |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
628 } else if (src.mode == MODE_REG_DISPLACE8) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
629 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
630 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
631 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
632 } |
99
8491de5d6c06
Allow use of indexed modes as move dst
Mike Pavone <pavone@retrodev.com>
parents:
98
diff
changeset
|
633 break; |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
634 case MODE_PC_DISPLACE: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
635 cycles(&opts->gen, BUS); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
636 mov_ir(code, inst->dst.params.regs.displacement + inst->address+2, opts->gen.scratch2, SZ_D); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
637 if (src.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
638 if (src.base != opts->gen.scratch1) { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
639 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
640 } |
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
641 } else if (src.mode == MODE_REG_DISPLACE8) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
642 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
643 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
644 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
645 } |
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
646 break; |
196
f8955d33486d
Implement pc indexed mode as move dst
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
647 case MODE_PC_INDEX_DISP8: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
648 cycles(&opts->gen, 6);//TODO: Check to make sure this is correct |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
649 mov_ir(code, inst->address, opts->gen.scratch2, SZ_D); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
650 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) { |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
651 push_r(code, opts->gen.scratch1); |
689
858e31f977ae
A couple more indentation fixes
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
652 } |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
653 calc_index_disp8(opts, &inst->dst, opts->gen.scratch2); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
654 if (src.base == opts->gen.scratch1 && !(inst->dst.params.regs.sec & 1)) { |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
655 pop_r(code, opts->gen.scratch1); |
196
f8955d33486d
Implement pc indexed mode as move dst
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
656 } |
f8955d33486d
Implement pc indexed mode as move dst
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
657 if (src.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
658 if (src.base != opts->gen.scratch1) { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
659 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size); |
196
f8955d33486d
Implement pc indexed mode as move dst
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
660 } |
f8955d33486d
Implement pc indexed mode as move dst
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
661 } else if (src.mode == MODE_REG_DISPLACE8) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
662 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size); |
196
f8955d33486d
Implement pc indexed mode as move dst
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
663 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
664 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size); |
196
f8955d33486d
Implement pc indexed mode as move dst
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
665 } |
f8955d33486d
Implement pc indexed mode as move dst
Mike Pavone <pavone@retrodev.com>
parents:
194
diff
changeset
|
666 break; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
667 case MODE_ABSOLUTE: |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
668 case MODE_ABSOLUTE_SHORT: |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
669 if (src.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
670 if (src.base != opts->gen.scratch1) { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
671 mov_rr(code, src.base, opts->gen.scratch1, inst->extra.size); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
672 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
673 } else if (src.mode == MODE_REG_DISPLACE8) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
674 mov_rdispr(code, src.base, src.disp, opts->gen.scratch1, inst->extra.size); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
675 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
676 mov_ir(code, src.disp, opts->gen.scratch1, inst->extra.size); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
677 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
678 if (inst->dst.addr_mode == MODE_ABSOLUTE) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
679 cycles(&opts->gen, BUS*2); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
680 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
681 cycles(&opts->gen, BUS); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
682 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
683 mov_ir(code, inst->dst.params.immed, opts->gen.scratch2, SZ_D); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
53
diff
changeset
|
684 break; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
685 default: |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
|
686 m68k_disasm(inst, disasm_buf); |
154
4791c0204410
Small fix for bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
687 printf("%X: %s\naddress mode %d not implemented (move dst)\n", inst->address, disasm_buf, inst->dst.addr_mode); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
688 exit(1); |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
689 } |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
690 |
576
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
691 if (inst->dst.addr_mode != MODE_AREG) { |
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
692 cmp_ir(code, 0, flags_reg, inst->extra.size); |
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
693 update_flags(opts, N|Z|V0|C0); |
689
858e31f977ae
A couple more indentation fixes
Michael Pavone <pavone@retrodev.com>
parents:
688
diff
changeset
|
694 } |
576
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
695 if (inst->dst.addr_mode != MODE_REG && inst->dst.addr_mode != MODE_AREG) { |
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
696 m68k_write_size(opts, inst->extra.size); |
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
697 if (inst->dst.addr_mode == MODE_AREG_POSTINC) { |
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
698 inc_amount = inst->extra.size == OPSIZE_WORD ? 2 : (inst->extra.size == OPSIZE_LONG ? 4 : (inst->dst.params.regs.pri == 7 ? 2 : 1)); |
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
699 addi_areg(opts, inc_amount, inst->dst.params.regs.pri); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
700 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
701 } |
576
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
702 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
703 //add cycles for prefetch |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
704 cycles(&opts->gen, BUS); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
705 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
706 |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
707 void translate_m68k_clr(m68k_options * opts, m68kinst * inst) |
52
f02ba3808757
Implement CLR, minor refactor of register offset calculation in context struct
Mike Pavone <pavone@retrodev.com>
parents:
51
diff
changeset
|
708 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
709 code_info *code = &opts->gen.code; |
576
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
710 update_flags(opts, N0|V0|C0|Z1); |
92
c3d034e076ee
Fix some bugs in emulation of CLR
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
711 int8_t reg = native_reg(&(inst->dst), opts); |
52
f02ba3808757
Implement CLR, minor refactor of register offset calculation in context struct
Mike Pavone <pavone@retrodev.com>
parents:
51
diff
changeset
|
712 if (reg >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
713 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG ? 6 : 4)); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
714 xor_rr(code, reg, reg, inst->extra.size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
715 return; |
52
f02ba3808757
Implement CLR, minor refactor of register offset calculation in context struct
Mike Pavone <pavone@retrodev.com>
parents:
51
diff
changeset
|
716 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
717 host_ea dst_op; |
576
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
718 //TODO: fix timing |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
719 translate_m68k_op(inst, &dst_op, opts, 1); |
92
c3d034e076ee
Fix some bugs in emulation of CLR
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
720 if (dst_op.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
721 xor_rr(code, dst_op.base, dst_op.base, inst->extra.size); |
92
c3d034e076ee
Fix some bugs in emulation of CLR
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
722 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
723 mov_irdisp(code, 0, dst_op.base, dst_op.disp, inst->extra.size); |
52
f02ba3808757
Implement CLR, minor refactor of register offset calculation in context struct
Mike Pavone <pavone@retrodev.com>
parents:
51
diff
changeset
|
724 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
725 m68k_save_result(inst, opts); |
52
f02ba3808757
Implement CLR, minor refactor of register offset calculation in context struct
Mike Pavone <pavone@retrodev.com>
parents:
51
diff
changeset
|
726 } |
f02ba3808757
Implement CLR, minor refactor of register offset calculation in context struct
Mike Pavone <pavone@retrodev.com>
parents:
51
diff
changeset
|
727 |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
728 void translate_m68k_ext(m68k_options * opts, m68kinst * inst) |
93
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
729 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
730 code_info *code = &opts->gen.code; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
731 host_ea dst_op; |
93
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
732 uint8_t dst_size = inst->extra.size; |
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
733 inst->extra.size--; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
734 translate_m68k_op(inst, &dst_op, opts, 1); |
93
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
735 if (dst_op.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
736 movsx_rr(code, dst_op.base, dst_op.base, inst->extra.size, dst_size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
737 cmp_ir(code, 0, dst_op.base, dst_size); |
93
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
738 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
739 movsx_rdispr(code, dst_op.base, dst_op.disp, opts->gen.scratch1, inst->extra.size, dst_size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
740 cmp_ir(code, 0, opts->gen.scratch1, dst_size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
741 mov_rrdisp(code, opts->gen.scratch1, dst_op.base, dst_op.disp, dst_size); |
93
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
742 } |
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
743 inst->extra.size = dst_size; |
576
a6f2db4df70d
Small refactor to flag handling in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
574
diff
changeset
|
744 update_flags(opts, N|V0|C0|Z); |
93
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
745 //M68K EXT only operates on registers so no need for a call to save result here |
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
746 } |
f63b0e58e2d5
Implement EXT, add some fixes to LINK/UNLK
Mike Pavone <pavone@retrodev.com>
parents:
92
diff
changeset
|
747 |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
748 uint8_t m68k_eval_cond(m68k_options * opts, uint8_t cc) |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
749 { |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
750 uint8_t cond = CC_NZ; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
751 switch (cc) |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
752 { |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
753 case COND_HIGH: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
754 cond = CC_Z; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
755 case COND_LOW_SAME: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
756 flag_to_reg(opts, FLAG_Z, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
757 or_flag_to_reg(opts, FLAG_C, opts->gen.scratch1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
758 break; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
759 case COND_CARRY_CLR: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
760 cond = CC_Z; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
761 case COND_CARRY_SET: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
762 check_flag(opts, FLAG_C); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
763 break; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
764 case COND_NOT_EQ: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
765 cond = CC_Z; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
766 case COND_EQ: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
767 check_flag(opts, FLAG_Z); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
768 break; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
769 case COND_OVERF_CLR: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
770 cond = CC_Z; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
771 case COND_OVERF_SET: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
772 check_flag(opts, FLAG_V); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
773 break; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
774 case COND_PLUS: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
775 cond = CC_Z; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
776 case COND_MINUS: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
777 check_flag(opts, FLAG_N); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
778 break; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
779 case COND_GREATER_EQ: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
780 cond = CC_Z; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
781 case COND_LESS: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
782 cmp_flags(opts, FLAG_N, FLAG_V); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
783 break; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
784 case COND_GREATER: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
785 cond = CC_Z; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
786 case COND_LESS_EQ: |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
787 flag_to_reg(opts, FLAG_V, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
788 xor_flag_to_reg(opts, FLAG_N, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
789 or_flag_to_reg(opts, FLAG_Z, opts->gen.scratch1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
790 break; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
791 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
792 return cond; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
793 } |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
794 |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
795 void translate_m68k_bcc(m68k_options * opts, m68kinst * inst) |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
796 { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
797 code_info *code = &opts->gen.code; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
798 cycles(&opts->gen, 10);//TODO: Adjust this for branch not taken case |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
799 int32_t disp = inst->src.params.immed; |
46
f2aaaf36c875
Add support for dbcc instruction
Mike Pavone <pavone@retrodev.com>
parents:
19
diff
changeset
|
800 uint32_t after = inst->address + 2; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
801 if (inst->extra.cond == COND_TRUE) { |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
802 jump_m68k_abs(opts, after + disp); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
803 } else { |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
698
diff
changeset
|
804 code_ptr dest_addr = get_native_address(opts, after + disp); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
805 uint8_t cond = m68k_eval_cond(opts, inst->extra.cond); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
806 if (!dest_addr) { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
807 opts->gen.deferred = defer_address(opts->gen.deferred, after + disp, code->cur + 2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
808 //dummy address to be replaced later, make sure it generates a 4-byte displacement |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
809 dest_addr = code->cur + 256; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
810 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
811 jcc(code, cond, dest_addr); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
812 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
813 } |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
814 |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
815 void translate_m68k_scc(m68k_options * opts, m68kinst * inst) |
112 | 816 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
817 code_info *code = &opts->gen.code; |
112 | 818 uint8_t cond = inst->extra.cond; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
819 host_ea dst_op; |
112 | 820 inst->extra.size = OPSIZE_BYTE; |
571
c90fc522e7e3
Refactor translat_m68k_src and translate_m68k_dst into a single function
Michael Pavone <pavone@retrodev.com>
parents:
570
diff
changeset
|
821 translate_m68k_op(inst, &dst_op, opts, 1); |
112 | 822 if (cond == COND_TRUE || cond == COND_FALSE) { |
823 if ((inst->dst.addr_mode == MODE_REG || inst->dst.addr_mode == MODE_AREG) && inst->extra.cond == COND_TRUE) { | |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
824 cycles(&opts->gen, 6); |
112 | 825 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
826 cycles(&opts->gen, BUS); |
112 | 827 } |
828 if (dst_op.mode == MODE_REG_DIRECT) { | |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
829 mov_ir(code, cond == COND_TRUE ? 0xFF : 0, dst_op.base, SZ_B); |
112 | 830 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
831 mov_irdisp(code, cond == COND_TRUE ? 0xFF : 0, dst_op.base, dst_op.disp, SZ_B); |
112 | 832 } |
833 } else { | |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
834 uint8_t cc = m68k_eval_cond(opts, cond); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
835 check_alloc_code(code, 6*MAX_INST_LEN); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
836 code_ptr true_off = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
837 jcc(code, cc, code->cur+2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
838 cycles(&opts->gen, BUS); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
839 if (dst_op.mode == MODE_REG_DIRECT) { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
840 mov_ir(code, 0, dst_op.base, SZ_B); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
841 } else { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
842 mov_irdisp(code, 0, dst_op.base, dst_op.disp, SZ_B); |
112 | 843 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
844 code_ptr end_off = code->cur+1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
845 jmp(code, code->cur+2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
846 *true_off = code->cur - (true_off+1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
847 cycles(&opts->gen, 6); |
179
68af8a56ab7a
Fix scc to set reg to 0xFF rather than 1 when the condition is true
Mike Pavone <pavone@retrodev.com>
parents:
178
diff
changeset
|
848 if (dst_op.mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
849 mov_ir(code, 0xFF, dst_op.base, SZ_B); |
112 | 850 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
851 mov_irdisp(code, 0xFF, dst_op.base, dst_op.disp, SZ_B); |
112 | 852 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
853 *end_off = code->cur - (end_off+1); |
112 | 854 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
855 m68k_save_result(inst, opts); |
112 | 856 } |
857 | |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
858 void translate_m68k_dbcc(m68k_options * opts, m68kinst * inst) |
46
f2aaaf36c875
Add support for dbcc instruction
Mike Pavone <pavone@retrodev.com>
parents:
19
diff
changeset
|
859 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
860 code_info *code = &opts->gen.code; |
46
f2aaaf36c875
Add support for dbcc instruction
Mike Pavone <pavone@retrodev.com>
parents:
19
diff
changeset
|
861 //best case duration |
567
8e395210f50f
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862 cycles(&opts->gen, 10); |
558
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863 code_ptr skip_loc = NULL; |
46
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864 //TODO: Check if COND_TRUE technically valid here even though |
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865 //it's basically a slow NOP |
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866 if (inst->extra.cond != COND_FALSE) { |
567
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867 uint8_t cond = m68k_eval_cond(opts, inst->extra.cond); |
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868 check_alloc_code(code, 6*MAX_INST_LEN); |
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869 skip_loc = code->cur + 1; |
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870 jcc(code, cond, code->cur + 2); |
46
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871 } |
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872 if (opts->dregs[inst->dst.params.regs.pri] >= 0) { |
567
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873 sub_ir(code, 1, opts->dregs[inst->dst.params.regs.pri], SZ_W); |
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874 cmp_ir(code, -1, opts->dregs[inst->dst.params.regs.pri], SZ_W); |
46
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875 } else { |
567
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876 sub_irdisp(code, 1, opts->gen.context_reg, offsetof(m68k_context, dregs) + 4 * inst->dst.params.regs.pri, SZ_W); |
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877 cmp_irdisp(code, -1, opts->gen.context_reg, offsetof(m68k_context, dregs) + 4 * inst->dst.params.regs.pri, SZ_W); |
46
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878 } |
567
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879 code_ptr loop_end_loc = code->cur + 1; |
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880 jcc(code, CC_Z, code->cur + 2); |
46
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881 uint32_t after = inst->address + 2; |
574
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882 jump_m68k_abs(opts, after + inst->src.params.immed); |
567
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883 *loop_end_loc = code->cur - (loop_end_loc+1); |
46
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884 if (skip_loc) { |
567
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885 cycles(&opts->gen, 2); |
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886 *skip_loc = code->cur - (skip_loc+1); |
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887 cycles(&opts->gen, 2); |
46
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888 } else { |
567
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889 cycles(&opts->gen, 4); |
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890 } |
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891 } |
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892 |
569
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893 void translate_m68k_movep(m68k_options * opts, m68kinst * inst) |
172 | 894 { |
567
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895 code_info *code = &opts->gen.code; |
172 | 896 int8_t reg; |
567
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897 cycles(&opts->gen, BUS*2); |
172 | 898 if (inst->src.addr_mode == MODE_REG) { |
574
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899 calc_areg_displace(opts, &inst->dst, opts->gen.scratch2); |
172 | 900 reg = native_reg(&(inst->src), opts); |
901 if (inst->extra.size == OPSIZE_LONG) { | |
902 if (reg >= 0) { | |
567
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903 mov_rr(code, reg, opts->gen.scratch1, SZ_D); |
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904 shr_ir(code, 24, opts->gen.scratch1, SZ_D); |
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905 push_r(code, opts->gen.scratch2); |
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906 call(code, opts->write_8); |
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907 pop_r(code, opts->gen.scratch2); |
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908 mov_rr(code, reg, opts->gen.scratch1, SZ_D); |
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909 shr_ir(code, 16, opts->gen.scratch1, SZ_D); |
447
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910 |
172 | 911 } else { |
567
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912 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src))+3, opts->gen.scratch1, SZ_B); |
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913 push_r(code, opts->gen.scratch2); |
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914 call(code, opts->write_8); |
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915 pop_r(code, opts->gen.scratch2); |
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916 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src))+2, opts->gen.scratch1, SZ_B); |
172 | 917 } |
567
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918 add_ir(code, 2, opts->gen.scratch2, SZ_D); |
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919 push_r(code, opts->gen.scratch2); |
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920 call(code, opts->write_8); |
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921 pop_r(code, opts->gen.scratch2); |
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922 add_ir(code, 2, opts->gen.scratch2, SZ_D); |
172 | 923 } |
924 if (reg >= 0) { | |
567
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925 mov_rr(code, reg, opts->gen.scratch1, SZ_W); |
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926 shr_ir(code, 8, opts->gen.scratch1, SZ_W); |
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927 push_r(code, opts->gen.scratch2); |
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928 call(code, opts->write_8); |
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929 pop_r(code, opts->gen.scratch2); |
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930 mov_rr(code, reg, opts->gen.scratch1, SZ_W); |
172 | 931 } else { |
567
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932 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src))+1, opts->gen.scratch1, SZ_B); |
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933 push_r(code, opts->gen.scratch2); |
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934 call(code, opts->write_8); |
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935 pop_r(code, opts->gen.scratch2); |
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936 mov_rdispr(code, opts->gen.context_reg, reg_offset(&(inst->src)), opts->gen.scratch1, SZ_B); |
172 | 937 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
938 add_ir(code, 2, opts->gen.scratch2, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
939 call(code, opts->write_8); |
172 | 940 } else { |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
941 calc_areg_displace(opts, &inst->src, opts->gen.scratch1); |
172 | 942 reg = native_reg(&(inst->dst), opts); |
943 if (inst->extra.size == OPSIZE_LONG) { | |
944 if (reg >= 0) { | |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
945 push_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
946 call(code, opts->read_8); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
947 shl_ir(code, 24, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
948 mov_rr(code, opts->gen.scratch1, reg, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
949 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
950 add_ir(code, 2, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
951 push_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
952 call(code, opts->read_8); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
953 shl_ir(code, 16, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
954 or_rr(code, opts->gen.scratch1, reg, SZ_D); |
172 | 955 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
956 push_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
957 call(code, opts->read_8); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
958 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst))+3, SZ_B); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
959 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
960 add_ir(code, 2, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
961 push_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
962 call(code, opts->read_8); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
963 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst))+2, SZ_B); |
172 | 964 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
965 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
966 add_ir(code, 2, opts->gen.scratch1, SZ_D); |
172 | 967 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
968 push_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
969 call(code, opts->read_8); |
172 | 970 if (reg >= 0) { |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
971 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
972 shl_ir(code, 8, opts->gen.scratch1, SZ_W); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
973 mov_rr(code, opts->gen.scratch1, reg, SZ_W); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
974 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
975 add_ir(code, 2, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
976 call(code, opts->read_8); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
977 mov_rr(code, opts->gen.scratch1, reg, SZ_B); |
172 | 978 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
979 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst))+1, SZ_B); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
980 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
981 add_ir(code, 2, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
982 call(code, opts->read_8); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
983 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, reg_offset(&(inst->dst)), SZ_B); |
172 | 984 } |
985 } | |
986 } | |
987 | |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
988 typedef void (*shift_ir_t)(code_info *code, uint8_t val, uint8_t dst, uint8_t size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
989 typedef void (*shift_irdisp_t)(code_info *code, uint8_t val, uint8_t dst_base, int32_t disp, uint8_t size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
990 typedef void (*shift_clr_t)(code_info *code, uint8_t dst, uint8_t size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
991 typedef void (*shift_clrdisp_t)(code_info *code, uint8_t dst_base, int32_t disp, uint8_t size); |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
992 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
993 void translate_shift(m68k_options * opts, m68kinst * inst, host_ea *src_op, host_ea * dst_op, shift_ir_t shift_ir, shift_irdisp_t shift_irdisp, shift_clr_t shift_clr, shift_clrdisp_t shift_clrdisp, shift_ir_t special, shift_irdisp_t special_disp) |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
994 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
995 code_info *code = &opts->gen.code; |
558
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
996 code_ptr end_off = NULL; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
997 code_ptr nz_off = NULL; |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
998 code_ptr z_off = NULL; |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
999 if (inst->src.addr_mode == MODE_UNUSED) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1000 cycles(&opts->gen, BUS); |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1001 //Memory shift |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1002 shift_ir(code, 1, dst_op->base, SZ_W); |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1003 } else { |
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1004 if (src_op->mode == MODE_IMMED) { |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1005 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG ? 8 : 6) + 2 * src_op->disp); |
207 | 1006 if (src_op->disp != 1 && inst->op == M68K_ASL) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1007 set_flag(opts, 0, FLAG_V); |
207 | 1008 for (int i = 0; i < src_op->disp; i++) { |
1009 if (dst_op->mode == MODE_REG_DIRECT) { | |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1010 shift_ir(code, 1, dst_op->base, inst->extra.size); |
207 | 1011 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1012 shift_irdisp(code, 1, dst_op->base, dst_op->disp, inst->extra.size); |
207 | 1013 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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1014 check_alloc_code(code, 2*MAX_INST_LEN); |
8e395210f50f
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1015 code_ptr after_flag_set = code->cur + 1; |
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1016 jcc(code, CC_NO, code->cur + 2); |
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1017 set_flag(opts, 1, FLAG_V); |
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1018 *after_flag_set = code->cur - (after_flag_set+1); |
207 | 1019 } |
51
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1020 } else { |
207 | 1021 if (dst_op->mode == MODE_REG_DIRECT) { |
567
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1022 shift_ir(code, src_op->disp, dst_op->base, inst->extra.size); |
207 | 1023 } else { |
567
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1024 shift_irdisp(code, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size); |
207 | 1025 } |
567
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1026 set_flag_cond(opts, CC_O, FLAG_V); |
51
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1027 } |
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1028 } else { |
667
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1029 cycles(&opts->gen, inst->extra.size == OPSIZE_LONG ? 8 : 6); |
51
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1030 if (src_op->base != RCX) { |
937b47c9b79b
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1031 if (src_op->mode == MODE_REG_DIRECT) { |
567
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1032 mov_rr(code, src_op->base, RCX, SZ_B); |
51
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1033 } else { |
567
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1034 mov_rdispr(code, src_op->base, src_op->disp, RCX, SZ_B); |
51
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1035 } |
447
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1036 |
51
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1037 } |
567
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1038 and_ir(code, 63, RCX, SZ_D); |
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1039 check_alloc_code(code, 7*MAX_INST_LEN); |
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1040 nz_off = code->cur + 1; |
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1041 jcc(code, CC_NZ, code->cur + 2); |
207 | 1042 //Flag behavior for shift count of 0 is different for x86 than 68K |
1043 if (dst_op->mode == MODE_REG_DIRECT) { | |
567
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1044 cmp_ir(code, 0, dst_op->base, inst->extra.size); |
207 | 1045 } else { |
567
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1046 cmp_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size); |
207 | 1047 } |
567
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1048 set_flag_cond(opts, CC_Z, FLAG_Z); |
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1049 set_flag_cond(opts, CC_S, FLAG_N); |
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1050 set_flag(opts, 0, FLAG_C); |
207 | 1051 //For other instructions, this flag will be set below |
1052 if (inst->op == M68K_ASL) { | |
567
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1053 set_flag(opts, 0, FLAG_V); |
207 | 1054 } |
567
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1055 z_off = code->cur + 1; |
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1056 jmp(code, code->cur + 2); |
8e395210f50f
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1057 *nz_off = code->cur - (nz_off + 1); |
51
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1058 //add 2 cycles for every bit shifted |
667
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1059 mov_ir(code, 2 * opts->gen.clock_divider, opts->gen.scratch2, SZ_D); |
30ccf56842d6
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1060 imul_rr(code, RCX, opts->gen.scratch2, SZ_D); |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
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|
1061 add_rr(code, opts->gen.scratch2, opts->gen.cycles, SZ_D); |
207 | 1062 if (inst->op == M68K_ASL) { |
1063 //ASL has Overflow flag behavior that depends on all of the bits shifted through the MSB | |
1064 //Easiest way to deal with this is to shift one bit at a time | |
567
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1065 set_flag(opts, 0, FLAG_V); |
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|
1066 check_alloc_code(code, 5*MAX_INST_LEN); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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|
1067 code_ptr loop_start = code->cur; |
51
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|
1068 if (dst_op->mode == MODE_REG_DIRECT) { |
567
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|
1069 shift_ir(code, 1, dst_op->base, inst->extra.size); |
51
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Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
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|
1070 } else { |
567
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Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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|
1071 shift_irdisp(code, 1, dst_op->base, dst_op->disp, inst->extra.size); |
51
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1072 } |
567
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|
1073 code_ptr after_flag_set = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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|
1074 jcc(code, CC_NO, code->cur + 2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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|
1075 set_flag(opts, 1, FLAG_V); |
8e395210f50f
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|
1076 *after_flag_set = code->cur - (after_flag_set+1); |
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|
1077 loop(code, loop_start); |
207 | 1078 } else { |
1079 //x86 shifts modulo 32 for operand sizes less than 64-bits | |
1080 //but M68K shifts modulo 64, so we need to check for large shifts here | |
567
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|
1081 cmp_ir(code, 32, RCX, SZ_B); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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|
1082 check_alloc_code(code, 14*MAX_INST_LEN); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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|
1083 code_ptr norm_shift_off = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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|
1084 jcc(code, CC_L, code->cur + 2); |
207 | 1085 if (special) { |
558
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
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|
1086 code_ptr after_flag_set = NULL; |
207 | 1087 if (inst->extra.size == OPSIZE_LONG) { |
567
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|
1088 code_ptr neq_32_off = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
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|
1089 jcc(code, CC_NZ, code->cur + 2); |
447
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Fix performance regression from stop instruction work
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|
1090 |
207 | 1091 //set the carry bit to the lsb |
1092 if (dst_op->mode == MODE_REG_DIRECT) { | |
567
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|
1093 special(code, 1, dst_op->base, SZ_D); |
207 | 1094 } else { |
567
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|
1095 special_disp(code, 1, dst_op->base, dst_op->disp, SZ_D); |
207 | 1096 } |
567
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|
1097 set_flag_cond(opts, CC_C, FLAG_C); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1098 after_flag_set = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1099 jmp(code, code->cur + 2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1100 *neq_32_off = code->cur - (neq_32_off+1); |
207 | 1101 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1102 set_flag(opts, 0, FLAG_C); |
546
90aca661542b
Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done.
Michael Pavone <pavone@retrodev.com>
parents:
545
diff
changeset
|
1103 if (after_flag_set) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1104 *after_flag_set = code->cur - (after_flag_set+1); |
546
90aca661542b
Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done.
Michael Pavone <pavone@retrodev.com>
parents:
545
diff
changeset
|
1105 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1106 set_flag(opts, 1, FLAG_Z); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1107 set_flag(opts, 0, FLAG_N); |
207 | 1108 if (dst_op->mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1109 xor_rr(code, dst_op->base, dst_op->base, inst->extra.size); |
207 | 1110 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1111 mov_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size); |
207 | 1112 } |
1113 } else { | |
1114 if (dst_op->mode == MODE_REG_DIRECT) { | |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1115 shift_ir(code, 31, dst_op->base, inst->extra.size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1116 shift_ir(code, 1, dst_op->base, inst->extra.size); |
207 | 1117 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1118 shift_irdisp(code, 31, dst_op->base, dst_op->disp, inst->extra.size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1119 shift_irdisp(code, 1, dst_op->base, dst_op->disp, inst->extra.size); |
207 | 1120 } |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
1121 |
207 | 1122 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1123 end_off = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1124 jmp(code, code->cur + 2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1125 *norm_shift_off = code->cur - (norm_shift_off+1); |
207 | 1126 if (dst_op->mode == MODE_REG_DIRECT) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1127 shift_clr(code, dst_op->base, inst->extra.size); |
207 | 1128 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1129 shift_clrdisp(code, dst_op->base, dst_op->disp, inst->extra.size); |
207 | 1130 } |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1131 } |
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1132 } |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
1133 |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1134 } |
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1135 if (!special && end_off) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1136 *end_off = code->cur - (end_off + 1); |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1137 } |
583
819921b76b4b
Use update_flags instead of individual set_flag calls in a few places
Michael Pavone <pavone@retrodev.com>
parents:
582
diff
changeset
|
1138 update_flags(opts, C|Z|N); |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1139 if (special && end_off) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1140 *end_off = code->cur - (end_off + 1); |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1141 } |
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1142 //set X flag to same as C flag |
546
90aca661542b
Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done.
Michael Pavone <pavone@retrodev.com>
parents:
545
diff
changeset
|
1143 if (opts->flag_regs[FLAG_C] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1144 flag_to_flag(opts, FLAG_C, FLAG_X); |
546
90aca661542b
Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done.
Michael Pavone <pavone@retrodev.com>
parents:
545
diff
changeset
|
1145 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1146 set_flag_cond(opts, CC_C, FLAG_X); |
546
90aca661542b
Make references to flags in the M68K core respect the flag_regs options array so that flags can be moved out of registers for the 32-bit port. set/get ccr/sr still need to be updated to support this, but everything else should be done.
Michael Pavone <pavone@retrodev.com>
parents:
545
diff
changeset
|
1147 } |
207 | 1148 if (z_off) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1149 *z_off = code->cur - (z_off + 1); |
207 | 1150 } |
219
8d3c16071559
Fix overflow flag behavior for lsl/lsr/asr
Mike Pavone <pavone@retrodev.com>
parents:
218
diff
changeset
|
1151 if (inst->op != M68K_ASL) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1152 set_flag(opts, 0, FLAG_V); |
207 | 1153 } |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1154 if (inst->src.addr_mode == MODE_UNUSED) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1155 m68k_save_result(inst, opts); |
51
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1156 } |
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1157 } |
937b47c9b79b
Implement shift instructions (asl, lsl, asr, lsr). Add flags to register printout. Fix minor bug in shift/rotate instruction decoding.
Mike Pavone <pavone@retrodev.com>
parents:
49
diff
changeset
|
1158 |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1159 void op_ir(code_info *code, m68kinst *inst, int32_t val, uint8_t dst, uint8_t size) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1160 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1161 switch (inst->op) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1162 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1163 case M68K_ADD: add_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1164 case M68K_ADDX: adc_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1165 case M68K_AND: and_ir(code, val, dst, size); break; |
581
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1166 case M68K_BTST: bt_ir(code, val, dst, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1167 case M68K_BSET: bts_ir(code, val, dst, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1168 case M68K_BCLR: btr_ir(code, val, dst, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1169 case M68K_BCHG: btc_ir(code, val, dst, size); break; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1170 case M68K_CMP: cmp_ir(code, val, dst, size); break; |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1171 case M68K_EOR: xor_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1172 case M68K_OR: or_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1173 case M68K_ROL: rol_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1174 case M68K_ROR: ror_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1175 case M68K_ROXL: rcl_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1176 case M68K_ROXR: rcr_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1177 case M68K_SUB: sub_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1178 case M68K_SUBX: sbb_ir(code, val, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1179 } |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1180 } |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1181 |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1182 void op_irdisp(code_info *code, m68kinst *inst, int32_t val, uint8_t dst, int32_t disp, uint8_t size) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1183 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1184 switch (inst->op) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1185 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1186 case M68K_ADD: add_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1187 case M68K_ADDX: adc_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1188 case M68K_AND: and_irdisp(code, val, dst, disp, size); break; |
581
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1189 case M68K_BTST: bt_irdisp(code, val, dst, disp, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1190 case M68K_BSET: bts_irdisp(code, val, dst, disp, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1191 case M68K_BCLR: btr_irdisp(code, val, dst, disp, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1192 case M68K_BCHG: btc_irdisp(code, val, dst, disp, size); break; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1193 case M68K_CMP: cmp_irdisp(code, val, dst, disp, size); break; |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1194 case M68K_EOR: xor_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1195 case M68K_OR: or_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1196 case M68K_ROL: rol_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1197 case M68K_ROR: ror_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1198 case M68K_ROXL: rcl_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1199 case M68K_ROXR: rcr_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1200 case M68K_SUB: sub_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1201 case M68K_SUBX: sbb_irdisp(code, val, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1202 } |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1203 } |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1204 |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1205 void op_rr(code_info *code, m68kinst *inst, uint8_t src, uint8_t dst, uint8_t size) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1206 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1207 switch (inst->op) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1208 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1209 case M68K_ADD: add_rr(code, src, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1210 case M68K_ADDX: adc_rr(code, src, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1211 case M68K_AND: and_rr(code, src, dst, size); break; |
581
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1212 case M68K_BTST: bt_rr(code, src, dst, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1213 case M68K_BSET: bts_rr(code, src, dst, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1214 case M68K_BCLR: btr_rr(code, src, dst, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1215 case M68K_BCHG: btc_rr(code, src, dst, size); break; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1216 case M68K_CMP: cmp_rr(code, src, dst, size); break; |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1217 case M68K_EOR: xor_rr(code, src, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1218 case M68K_OR: or_rr(code, src, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1219 case M68K_SUB: sub_rr(code, src, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1220 case M68K_SUBX: sbb_rr(code, src, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1221 } |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1222 } |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1223 |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1224 void op_rrdisp(code_info *code, m68kinst *inst, uint8_t src, uint8_t dst, int32_t disp, uint8_t size) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1225 { |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1226 switch(inst->op) |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1227 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1228 case M68K_ADD: add_rrdisp(code, src, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1229 case M68K_ADDX: adc_rrdisp(code, src, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1230 case M68K_AND: and_rrdisp(code, src, dst, disp, size); break; |
581
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1231 case M68K_BTST: bt_rrdisp(code, src, dst, disp, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1232 case M68K_BSET: bts_rrdisp(code, src, dst, disp, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1233 case M68K_BCLR: btr_rrdisp(code, src, dst, disp, size); break; |
9f40aa5243c2
Combine implementations of lea and pea. Update bit instructions to use the op_ family of functions to simplify their implementation a bit.
Michael Pavone <pavone@retrodev.com>
parents:
580
diff
changeset
|
1234 case M68K_BCHG: btc_rrdisp(code, src, dst, disp, size); break; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1235 case M68K_CMP: cmp_rrdisp(code, src, dst, disp, size); break; |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1236 case M68K_EOR: xor_rrdisp(code, src, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1237 case M68K_OR: or_rrdisp(code, src, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1238 case M68K_SUB: sub_rrdisp(code, src, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1239 case M68K_SUBX: sbb_rrdisp(code, src, dst, disp, size); break; |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1240 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1241 } |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1242 |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1243 void op_rdispr(code_info *code, m68kinst *inst, uint8_t src, int32_t disp, uint8_t dst, uint8_t size) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1244 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1245 switch (inst->op) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1246 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1247 case M68K_ADD: add_rdispr(code, src, disp, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1248 case M68K_ADDX: adc_rdispr(code, src, disp, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1249 case M68K_AND: and_rdispr(code, src, disp, dst, size); break; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1250 case M68K_CMP: cmp_rdispr(code, src, disp, dst, size); break; |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1251 case M68K_EOR: xor_rdispr(code, src, disp, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1252 case M68K_OR: or_rdispr(code, src, disp, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1253 case M68K_SUB: sub_rdispr(code, src, disp, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1254 case M68K_SUBX: sbb_rdispr(code, src, disp, dst, size); break; |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1255 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1256 } |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1257 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1258 void translate_m68k_arith(m68k_options *opts, m68kinst * inst, uint32_t flag_mask, host_ea *src_op, host_ea *dst_op) |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1259 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1260 code_info *code = &opts->gen.code; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1261 cycles(&opts->gen, BUS); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1262 if (inst->op == M68K_ADDX || inst->op == M68K_SUBX) { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1263 flag_to_carry(opts, FLAG_X); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1264 } |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1265 uint8_t size = inst->dst.addr_mode == MODE_AREG ? OPSIZE_LONG : inst->extra.size; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1266 if (src_op->mode == MODE_REG_DIRECT) { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1267 if (dst_op->mode == MODE_REG_DIRECT) { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1268 op_rr(code, inst, src_op->base, dst_op->base, size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1269 } else { |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1270 op_rrdisp(code, inst, src_op->base, dst_op->base, dst_op->disp, size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1271 } |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1272 } else if (src_op->mode == MODE_REG_DISPLACE8) { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1273 op_rdispr(code, inst, src_op->base, src_op->disp, dst_op->base, size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1274 } else { |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1275 if (dst_op->mode == MODE_REG_DIRECT) { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1276 op_ir(code, inst, src_op->disp, dst_op->base, size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1277 } else { |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1278 op_irdisp(code, inst, src_op->disp, dst_op->base, dst_op->disp, size); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1279 } |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1280 } |
580
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1281 if (inst->dst.addr_mode != MODE_AREG || inst->op == M68K_CMP) { |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1282 update_flags(opts, flag_mask); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1283 if (inst->op == M68K_ADDX || inst->op == M68K_SUBX) { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1284 check_alloc_code(code, 2*MAX_INST_LEN); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1285 code_ptr after_flag_set = code->cur + 1; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1286 jcc(code, CC_Z, code->cur + 2); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1287 set_flag(opts, 0, FLAG_Z); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1288 *after_flag_set = code->cur - (after_flag_set+1); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1289 } |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1290 } |
580
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1291 if (inst->op != M68K_CMP) { |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1292 m68k_save_result(inst, opts); |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1293 } |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1294 } |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1295 |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1296 void translate_m68k_cmp(m68k_options * opts, m68kinst * inst) |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1297 { |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1298 code_info *code = &opts->gen.code; |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1299 uint8_t size = inst->extra.size; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1300 host_ea src_op, dst_op; |
580
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1301 translate_m68k_op(inst, &src_op, opts, 0); |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1302 if (inst->dst.addr_mode == MODE_AREG_POSTINC) { |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1303 push_r(code, opts->gen.scratch1); |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1304 translate_m68k_op(inst, &dst_op, opts, 1); |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1305 pop_r(code, opts->gen.scratch2); |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1306 src_op.base = opts->gen.scratch2; |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1307 } else { |
580
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1308 translate_m68k_op(inst, &dst_op, opts, 1); |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1309 if (inst->dst.addr_mode == MODE_AREG && size == OPSIZE_WORD) { |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1310 size = OPSIZE_LONG; |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1311 } |
580
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1312 } |
5157bc966c1a
Refactor translate_m68k_cmp to use translate_m68k_arith
Michael Pavone <pavone@retrodev.com>
parents:
579
diff
changeset
|
1313 translate_m68k_arith(opts, inst, N|Z|V|C, &src_op, &dst_op); |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1314 } |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1315 |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1316 void op_r(code_info *code, m68kinst *inst, uint8_t dst, uint8_t size) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1317 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1318 switch(inst->op) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1319 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1320 case M68K_NEG: neg_r(code, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1321 case M68K_NOT: not_r(code, dst, size); cmp_ir(code, 0, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1322 case M68K_ROL: rol_clr(code, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1323 case M68K_ROR: ror_clr(code, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1324 case M68K_ROXL: rcl_clr(code, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1325 case M68K_ROXR: rcr_clr(code, dst, size); break; |
578
ec1365fb2954
Use translate_m68k_unary for SWAP in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
577
diff
changeset
|
1326 case M68K_SWAP: rol_ir(code, 16, dst, SZ_D); cmp_ir(code, 0, dst, SZ_D); break; |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1327 case M68K_TST: cmp_ir(code, 0, dst, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1328 } |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1329 } |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1330 |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1331 void op_rdisp(code_info *code, m68kinst *inst, uint8_t dst, int32_t disp, uint8_t size) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1332 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1333 switch(inst->op) |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1334 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1335 case M68K_NEG: neg_rdisp(code, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1336 case M68K_NOT: not_rdisp(code, dst, disp, size); cmp_irdisp(code, 0, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1337 case M68K_ROL: rol_clrdisp(code, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1338 case M68K_ROR: ror_clrdisp(code, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1339 case M68K_ROXL: rcl_clrdisp(code, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1340 case M68K_ROXR: rcr_clrdisp(code, dst, disp, size); break; |
578
ec1365fb2954
Use translate_m68k_unary for SWAP in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
577
diff
changeset
|
1341 case M68K_SWAP: rol_irdisp(code, 16, dst, disp, SZ_D); cmp_irdisp(code, 0, dst, disp, SZ_D); break; |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1342 case M68K_TST: cmp_irdisp(code, 0, dst, disp, size); break; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1343 } |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1344 } |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1345 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1346 void translate_m68k_unary(m68k_options *opts, m68kinst *inst, uint32_t flag_mask, host_ea *dst_op) |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1347 { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1348 code_info *code = &opts->gen.code; |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1349 cycles(&opts->gen, BUS); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1350 if (dst_op->mode == MODE_REG_DIRECT) { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1351 op_r(code, inst, dst_op->base, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1352 } else { |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1353 op_rdisp(code, inst, dst_op->base, dst_op->disp, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1354 } |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1355 update_flags(opts, flag_mask); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1356 m68k_save_result(inst, opts); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1357 } |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1358 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1359 void translate_m68k_invalid(m68k_options *opts, m68kinst *inst) |
14
2bdad0f52f42
x86 code gen, initial work on translator
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1360 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1361 code_info *code = &opts->gen.code; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1362 if (inst->src.params.immed == 0x7100) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1363 retn(code); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1364 return; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1365 } |
727
59a98179d3ba
Eliminate runtime.S/runtime_32.S.
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
1366 mov_ir(code, (int64_t)stderr, RDI, SZ_PTR); |
59a98179d3ba
Eliminate runtime.S/runtime_32.S.
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
1367 mov_ir(code, (int64_t)"Invalid instruction at %X\n", RSI, SZ_PTR); |
59a98179d3ba
Eliminate runtime.S/runtime_32.S.
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
1368 mov_ir(code, inst->address, RDX, SZ_D); |
59a98179d3ba
Eliminate runtime.S/runtime_32.S.
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
1369 call_args_abi(code, (code_ptr)fprintf, 3, RDI, RSI, RDX); |
59a98179d3ba
Eliminate runtime.S/runtime_32.S.
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
1370 mov_ir(code, 1, RDI, SZ_D); |
59a98179d3ba
Eliminate runtime.S/runtime_32.S.
Michael Pavone <pavone@retrodev.com>
parents:
726
diff
changeset
|
1371 call_args(code, (code_ptr)exit, 1, RDI); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1372 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1373 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1374 void translate_m68k_abcd_sbcd(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1375 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1376 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1377 if (src_op->base != opts->gen.scratch2) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1378 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1379 mov_rr(code, src_op->base, opts->gen.scratch2, SZ_B); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1380 } else { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1381 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_B); |
208
3457dc6fd558
Tweaks to make blastem compatible with m68k-tester
Mike Pavone <pavone@retrodev.com>
parents:
207
diff
changeset
|
1382 } |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
1383 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1384 if (dst_op->base != opts->gen.scratch1) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1385 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1386 mov_rr(code, dst_op->base, opts->gen.scratch1, SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1387 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1388 mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch1, SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1389 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1390 } |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1391 uint8_t other_reg; |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1392 //WARNING: This may need adjustment if register assignments change |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1393 if (opts->gen.scratch2 > RBX) { |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1394 other_reg = RAX; |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1395 xchg_rr(code, opts->gen.scratch2, RAX, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1396 } else { |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1397 other_reg = opts->gen.scratch2; |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1398 } |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1399 mov_rr(code, opts->gen.scratch1, opts->gen.scratch1 + (AH-RAX), SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1400 mov_rr(code, other_reg, other_reg + (AH-RAX), SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1401 and_ir(code, 0xF0, opts->gen.scratch1, SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1402 and_ir(code, 0xF0, other_reg, SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1403 and_ir(code, 0xF, opts->gen.scratch1 + (AH-RAX), SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1404 and_ir(code, 0xF, other_reg + (AH-RAX), SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1405 //do op on low nibble |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1406 flag_to_carry(opts, FLAG_X); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1407 if (inst->op == M68K_ABCD) { |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1408 adc_rr(code, other_reg + (AH-RAX), opts->gen.scratch1 + (AH-RAX), SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1409 } else { |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1410 sbb_rr(code, other_reg + (AH-RAX), opts->gen.scratch1 + (AH-RAX), SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1411 } |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1412 cmp_ir(code, 0xA, opts->gen.scratch1 + (AH-RAX), SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1413 code_ptr no_adjust = code->cur+1; |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1414 //add correction factor if necessary |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1415 jcc(code, CC_B, no_adjust); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1416 if (inst->op == M68K_ABCD) { |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1417 add_ir(code, 6, opts->gen.scratch1 + (AH-RAX), SZ_B); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1418 } else { |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1419 sub_ir(code, 6, opts->gen.scratch1 + (AH-RAX), SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1420 } |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1421 *no_adjust = code->cur - (no_adjust+1); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1422 //add low nibble result to one of the high nibble operands |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1423 add_rr(code, opts->gen.scratch1 + (AH-RAX), opts->gen.scratch1, SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1424 if (inst->op == M68K_ABCD) { |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1425 add_rr(code, other_reg, opts->gen.scratch1, SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1426 } else { |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1427 sub_rr(code, other_reg, opts->gen.scratch1, SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1428 } |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1429 if (opts->gen.scratch2 > RBX) { |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1430 mov_rr(code, opts->gen.scratch2, RAX, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1431 } |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1432 set_flag(opts, 0, FLAG_C); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1433 set_flag(opts, 0, FLAG_V); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1434 code_ptr def_adjust = code->cur+1; |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1435 jcc(code, CC_C, def_adjust); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1436 cmp_ir(code, 0xA0, opts->gen.scratch1, SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1437 no_adjust = code->cur+1; |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1438 jcc(code, CC_B, no_adjust); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1439 *def_adjust = code->cur - (def_adjust + 1); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1440 set_flag(opts, 1, FLAG_C); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1441 if (inst->op == M68K_ABCD) { |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1442 add_ir(code, 0x60, opts->gen.scratch1, SZ_B); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1443 } else { |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1444 sub_ir(code, 0x60, opts->gen.scratch1, SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1445 } |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1446 //V flag is set based on the result of the addition of the |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1447 //result and the correction factor |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1448 set_flag_cond(opts, CC_O, FLAG_V); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1449 *no_adjust = code->cur - (no_adjust+1); |
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1450 flag_to_flag(opts, FLAG_C, FLAG_X); |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
1451 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1452 cmp_ir(code, 0, opts->gen.scratch1, SZ_B); |
612
5a6ff0d76032
Removed bcd_add and bcd_sub from runtime.S and generated the logic inline with the rest of abcd and sbcd translation. Fixed some edge cases and undefined flag behavior in the process
Michael Pavone <pavone@retrodev.com>
parents:
611
diff
changeset
|
1453 set_flag_cond(opts, CC_S, FLAG_N); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1454 jcc(code, CC_Z, code->cur + 4); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1455 set_flag(opts, 0, FLAG_Z); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1456 if (dst_op->base != opts->gen.scratch1) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1457 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1458 mov_rr(code, opts->gen.scratch1, dst_op->base, SZ_B); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1459 } else { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1460 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, SZ_B); |
73
8da611e69b32
Implement a couple of supervisor instructions
Mike Pavone <pavone@retrodev.com>
parents:
71
diff
changeset
|
1461 } |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1462 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1463 m68k_save_result(inst, opts); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1464 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1465 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1466 void translate_m68k_sl(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1467 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1468 translate_shift(opts, inst, src_op, dst_op, shl_ir, shl_irdisp, shl_clr, shl_clrdisp, shr_ir, shr_irdisp); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1469 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1470 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1471 void translate_m68k_asr(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1472 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1473 translate_shift(opts, inst, src_op, dst_op, sar_ir, sar_irdisp, sar_clr, sar_clrdisp, NULL, NULL); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1474 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1475 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1476 void translate_m68k_lsr(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1477 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1478 translate_shift(opts, inst, src_op, dst_op, shr_ir, shr_irdisp, shr_clr, shr_clrdisp, shl_ir, shl_irdisp); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1479 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1480 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1481 void translate_m68k_bit(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1482 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1483 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1484 cycles(&opts->gen, inst->extra.size == OPSIZE_BYTE ? 4 : ( |
457
6a315728fede
Fix bit instruction timing
Mike Pavone <pavone@retrodev.com>
parents:
447
diff
changeset
|
1485 inst->op == M68K_BTST ? 6 : (inst->op == M68K_BCLR ? 10 : 8)) |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1486 ); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1487 if (src_op->mode == MODE_IMMED) { |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1488 if (inst->extra.size == OPSIZE_BYTE) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1489 src_op->disp &= 0x7; |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1490 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1491 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1492 op_ir(code, inst, src_op->disp, dst_op->base, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1493 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1494 op_irdisp(code, inst, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1495 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1496 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1497 if (src_op->mode == MODE_REG_DISPLACE8 || (inst->dst.addr_mode != MODE_REG && src_op->base != opts->gen.scratch1 && src_op->base != opts->gen.scratch2)) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1498 if (dst_op->base == opts->gen.scratch1) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1499 push_r(code, opts->gen.scratch2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1500 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1501 mov_rr(code, src_op->base, opts->gen.scratch2, SZ_B); |
61
918468c623e9
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
1502 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1503 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_B); |
154
4791c0204410
Small fix for bit instructions
Mike Pavone <pavone@retrodev.com>
parents:
152
diff
changeset
|
1504 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1505 src_op->base = opts->gen.scratch2; |
61
918468c623e9
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
1506 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1507 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1508 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_B); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1509 } else { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1510 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_B); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1511 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1512 src_op->base = opts->gen.scratch1; |
61
918468c623e9
Add support for BTST instruction (untested), absolute addressing mode for instructions other than move (untested) and fix decoding of MOVEM.
Mike Pavone <pavone@retrodev.com>
parents:
59
diff
changeset
|
1513 } |
226
28a6697e847b
Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents:
225
diff
changeset
|
1514 } |
221
71f6b76639db
Fix modulo on bit operations with a memory destination
Mike Pavone <pavone@retrodev.com>
parents:
219
diff
changeset
|
1515 uint8_t size = inst->extra.size; |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1516 if (dst_op->mode == MODE_REG_DISPLACE8) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1517 if (src_op->base != opts->gen.scratch1 && src_op->base != opts->gen.scratch2) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1518 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1519 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1520 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1521 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1522 src_op->mode = MODE_REG_DIRECT; |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1523 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1524 src_op->base = opts->gen.scratch1; |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1525 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1526 //b### with register destination is modulo 32 |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1527 //x86 with a memory destination isn't modulo anything |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1528 //so use an and here to force the value to be modulo 32 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1529 and_ir(code, 31, opts->gen.scratch1, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1530 } else if(inst->dst.addr_mode != MODE_REG) { |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1531 //b### with memory destination is modulo 8 |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1532 //x86-64 doesn't support 8-bit bit operations |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1533 //so we fake it by forcing the bit number to be modulo 8 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1534 and_ir(code, 7, src_op->base, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1535 size = SZ_D; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1536 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1537 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1538 op_rr(code, inst, src_op->base, dst_op->base, size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1539 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1540 op_rrdisp(code, inst, src_op->base, dst_op->base, dst_op->disp, size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1541 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1542 if (src_op->base == opts->gen.scratch2) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1543 pop_r(code, opts->gen.scratch2); |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
|
1544 } |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1545 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1546 //x86 sets the carry flag to the value of the bit tested |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1547 //68K sets the zero flag to the complement of the bit tested |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1548 set_flag_cond(opts, CC_NC, FLAG_Z); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1549 if (inst->op != M68K_BTST) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1550 m68k_save_result(inst, opts); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1551 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1552 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1553 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1554 void translate_m68k_chk(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
226
28a6697e847b
Implement CHK instruction (not fully tested).
Mike Pavone <pavone@retrodev.com>
parents:
225
diff
changeset
|
1555 { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1556 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1557 cycles(&opts->gen, 6); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1558 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1559 cmp_ir(code, 0, dst_op->base, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1560 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1561 cmp_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1562 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1563 uint32_t isize; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1564 switch(inst->src.addr_mode) |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1565 { |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1566 case MODE_AREG_DISPLACE: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1567 case MODE_AREG_INDEX_DISP8: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1568 case MODE_ABSOLUTE_SHORT: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1569 case MODE_PC_INDEX_DISP8: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1570 case MODE_PC_DISPLACE: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1571 case MODE_IMMEDIATE: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1572 isize = 4; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1573 break; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1574 case MODE_ABSOLUTE: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1575 isize = 6; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1576 break; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1577 default: |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1578 isize = 2; |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1579 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1580 //make sure we won't start a new chunk in the middle of these branches |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1581 check_alloc_code(code, MAX_INST_LEN * 11); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1582 code_ptr passed = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1583 jcc(code, CC_GE, code->cur + 2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1584 set_flag(opts, 1, FLAG_N); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1585 mov_ir(code, VECTOR_CHK, opts->gen.scratch2, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1586 mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1587 jmp(code, opts->trap); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1588 *passed = code->cur - (passed+1); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1589 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1590 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1591 cmp_rr(code, src_op->base, dst_op->base, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1592 } else if(src_op->mode == MODE_REG_DISPLACE8) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1593 cmp_rdispr(code, src_op->base, src_op->disp, dst_op->base, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1594 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1595 cmp_ir(code, src_op->disp, dst_op->base, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1596 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1597 } else if(dst_op->mode == MODE_REG_DISPLACE8) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1598 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1599 cmp_rrdisp(code, src_op->base, dst_op->base, dst_op->disp, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1600 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1601 cmp_irdisp(code, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size); |
171 | 1602 } |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1603 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1604 passed = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1605 jcc(code, CC_LE, code->cur + 2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1606 set_flag(opts, 0, FLAG_N); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1607 mov_ir(code, VECTOR_CHK, opts->gen.scratch2, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1608 mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1609 jmp(code, opts->trap); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1610 *passed = code->cur - (passed+1); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1611 cycles(&opts->gen, 4); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1612 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1613 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1614 void translate_m68k_div(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1615 { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1616 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1617 check_alloc_code(code, MAX_NATIVE_SIZE); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1618 //TODO: cycle exact division |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1619 cycles(&opts->gen, inst->op == M68K_DIVS ? 158 : 140); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1620 set_flag(opts, 0, FLAG_C); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1621 push_r(code, RDX); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1622 push_r(code, RAX); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1623 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1624 mov_rr(code, dst_op->base, RAX, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1625 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1626 mov_rdispr(code, dst_op->base, dst_op->disp, RAX, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1627 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1628 if (src_op->mode == MODE_IMMED) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1629 mov_ir(code, (src_op->disp & 0x8000) && inst->op == M68K_DIVS ? src_op->disp | 0xFFFF0000 : src_op->disp, opts->gen.scratch2, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1630 } else if (src_op->mode == MODE_REG_DIRECT) { |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1631 if (inst->op == M68K_DIVS) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1632 movsx_rr(code, src_op->base, opts->gen.scratch2, SZ_W, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1633 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1634 movzx_rr(code, src_op->base, opts->gen.scratch2, SZ_W, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1635 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1636 } else if (src_op->mode == MODE_REG_DISPLACE8) { |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1637 if (inst->op == M68K_DIVS) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1638 movsx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_W, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1639 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1640 movzx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch2, SZ_W, SZ_D); |
71
f80fa1776507
Implement more instructions and address modes
Mike Pavone <pavone@retrodev.com>
parents:
70
diff
changeset
|
1641 } |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1642 } |
611
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1643 uint32_t isize = 2; |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1644 switch(inst->src.addr_mode) |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1645 { |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1646 case MODE_AREG_DISPLACE: |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1647 case MODE_AREG_INDEX_DISP8: |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1648 case MODE_ABSOLUTE_SHORT: |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1649 case MODE_PC_INDEX_DISP8: |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1650 case MODE_IMMEDIATE: |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
1651 isize = 4; |
611
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1652 break; |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1653 case MODE_ABSOLUTE: |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1654 isize = 6; |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1655 break; |
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1656 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1657 cmp_ir(code, 0, opts->gen.scratch2, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1658 check_alloc_code(code, 6*MAX_INST_LEN); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1659 code_ptr not_zero = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1660 jcc(code, CC_NZ, code->cur + 2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1661 pop_r(code, RAX); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1662 pop_r(code, RDX); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1663 mov_ir(code, VECTOR_INT_DIV_ZERO, opts->gen.scratch2, SZ_D); |
611
744b305965f7
Fix divide by zero exception return address when div instruction is bigger than 1 word
Michael Pavone <pavone@retrodev.com>
parents:
610
diff
changeset
|
1664 mov_ir(code, inst->address+isize, opts->gen.scratch1, SZ_D); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1665 jmp(code, opts->trap); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1666 *not_zero = code->cur - (not_zero+1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1667 if (inst->op == M68K_DIVS) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1668 cdq(code); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1669 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1670 xor_rr(code, RDX, RDX, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1671 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1672 if (inst->op == M68K_DIVS) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1673 idiv_r(code, opts->gen.scratch2, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1674 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1675 div_r(code, opts->gen.scratch2, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1676 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1677 code_ptr skip_sec_check, norm_off; |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1678 if (inst->op == M68K_DIVS) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1679 cmp_ir(code, 0x8000, RAX, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1680 skip_sec_check = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1681 jcc(code, CC_GE, code->cur + 2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1682 cmp_ir(code, -0x8000, RAX, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1683 norm_off = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1684 jcc(code, CC_L, code->cur + 2); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1685 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1686 cmp_ir(code, 0x10000, RAX, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1687 norm_off = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1688 jcc(code, CC_NC, code->cur + 2); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1689 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1690 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1691 mov_rr(code, RDX, dst_op->base, SZ_W); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1692 shl_ir(code, 16, dst_op->base, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1693 mov_rr(code, RAX, dst_op->base, SZ_W); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1694 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1695 mov_rrdisp(code, RDX, dst_op->base, dst_op->disp, SZ_W); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1696 shl_irdisp(code, 16, dst_op->base, dst_op->disp, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1697 mov_rrdisp(code, RAX, dst_op->base, dst_op->disp, SZ_W); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1698 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1699 cmp_ir(code, 0, RAX, SZ_W); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1700 pop_r(code, RAX); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1701 pop_r(code, RDX); |
583
819921b76b4b
Use update_flags instead of individual set_flag calls in a few places
Michael Pavone <pavone@retrodev.com>
parents:
582
diff
changeset
|
1702 update_flags(opts, V0|Z|N); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1703 code_ptr end_off = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1704 jmp(code, code->cur + 2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1705 *norm_off = code->cur - (norm_off + 1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1706 if (inst->op == M68K_DIVS) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1707 *skip_sec_check = code->cur - (skip_sec_check+1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1708 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1709 pop_r(code, RAX); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1710 pop_r(code, RDX); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1711 set_flag(opts, 1, FLAG_V); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1712 *end_off = code->cur - (end_off + 1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1713 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1714 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1715 void translate_m68k_exg(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1716 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1717 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1718 cycles(&opts->gen, 6); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1719 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1720 mov_rr(code, dst_op->base, opts->gen.scratch2, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1721 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1722 mov_rr(code, src_op->base, dst_op->base, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1723 mov_rr(code, opts->gen.scratch2, src_op->base, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1724 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1725 mov_rdispr(code, src_op->base, src_op->disp, dst_op->base, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1726 mov_rrdisp(code, opts->gen.scratch2, src_op->base, src_op->disp, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1727 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1728 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1729 mov_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1730 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1731 mov_rrdisp(code, src_op->base, dst_op->base, dst_op->disp, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1732 mov_rr(code, opts->gen.scratch2, src_op->base, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1733 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1734 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1735 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1736 mov_rrdisp(code, opts->gen.scratch2, src_op->base, src_op->disp, SZ_D); |
151
6b593ea0ed90
Implement MULU/MULS and DIVU/DIVS
Mike Pavone <pavone@retrodev.com>
parents:
150
diff
changeset
|
1737 } |
686
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Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
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682
diff
changeset
|
1738 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1739 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1740 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1741 void translate_m68k_mul(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1742 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1743 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1744 cycles(&opts->gen, 70); //TODO: Calculate the actual value based on the value of the <ea> parameter |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1745 if (src_op->mode == MODE_IMMED) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1746 mov_ir(code, inst->op == M68K_MULU ? (src_op->disp & 0xFFFF) : ((src_op->disp & 0x8000) ? src_op->disp | 0xFFFF0000 : src_op->disp), opts->gen.scratch1, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1747 } else if (src_op->mode == MODE_REG_DIRECT) { |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1748 if (inst->op == M68K_MULS) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1749 movsx_rr(code, src_op->base, opts->gen.scratch1, SZ_W, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1750 } else { |
686
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Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
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682
diff
changeset
|
1751 movzx_rr(code, src_op->base, opts->gen.scratch1, SZ_W, SZ_D); |
8cb61671777b
Fix indentation that presumably got messed up in a merge
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682
diff
changeset
|
1752 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
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682
diff
changeset
|
1753 } else { |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
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682
diff
changeset
|
1754 if (inst->op == M68K_MULS) { |
682 | 1755 movsx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_W, SZ_D); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1756 } else { |
682 | 1757 movzx_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_W, SZ_D); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1758 } |
686
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Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
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682
diff
changeset
|
1759 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1760 uint8_t dst_reg; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1761 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1762 dst_reg = dst_op->base; |
686
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Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
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682
diff
changeset
|
1763 if (inst->op == M68K_MULS) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1764 movsx_rr(code, dst_reg, dst_reg, SZ_W, SZ_D); |
686
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Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
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682
diff
changeset
|
1765 } else { |
682 | 1766 movzx_rr(code, dst_reg, dst_reg, SZ_W, SZ_D); |
686
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Michael Pavone <pavone@retrodev.com>
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682
diff
changeset
|
1767 } |
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Michael Pavone <pavone@retrodev.com>
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682
diff
changeset
|
1768 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
diff
changeset
|
1769 dst_reg = opts->gen.scratch2; |
686
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Fix indentation that presumably got messed up in a merge
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682
diff
changeset
|
1770 if (inst->op == M68K_MULS) { |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
diff
changeset
|
1771 movsx_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_W, SZ_D); |
686
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|
1772 } else { |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
diff
changeset
|
1773 movzx_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch2, SZ_W, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
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|
1774 } |
686
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|
1775 } |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
1776 imul_rr(code, opts->gen.scratch1, dst_reg, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
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changeset
|
1777 if (dst_op->mode == MODE_REG_DISPLACE8) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
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changeset
|
1778 mov_rrdisp(code, dst_reg, dst_op->base, dst_op->disp, SZ_D); |
686
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|
1779 } |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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changeset
|
1780 cmp_ir(code, 0, dst_reg, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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|
1781 update_flags(opts, N|Z|V0|C0); |
686
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|
1782 } |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
1783 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
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changeset
|
1784 void translate_m68k_negx(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1785 { |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1786 code_info *code = &opts->gen.code; |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
diff
changeset
|
1787 cycles(&opts->gen, BUS); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1788 if (dst_op->mode == MODE_REG_DIRECT) { |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
1789 if (dst_op->base == opts->gen.scratch1) { |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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581
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changeset
|
1790 push_r(code, opts->gen.scratch2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
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changeset
|
1791 xor_rr(code, opts->gen.scratch2, opts->gen.scratch2, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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581
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changeset
|
1792 flag_to_carry(opts, FLAG_X); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1793 sbb_rr(code, dst_op->base, opts->gen.scratch2, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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changeset
|
1794 mov_rr(code, opts->gen.scratch2, dst_op->base, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
diff
changeset
|
1795 pop_r(code, opts->gen.scratch2); |
173 | 1796 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1797 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, inst->extra.size); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
1798 flag_to_carry(opts, FLAG_X); |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1799 sbb_rr(code, dst_op->base, opts->gen.scratch1, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
1800 mov_rr(code, opts->gen.scratch1, dst_op->base, inst->extra.size); |
106 | 1801 } |
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|
1802 } else { |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1803 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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581
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changeset
|
1804 flag_to_carry(opts, FLAG_X); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1805 sbb_rdispr(code, dst_op->base, dst_op->disp, opts->gen.scratch1, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1806 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, inst->extra.size); |
686
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|
1807 } |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1808 set_flag_cond(opts, CC_C, FLAG_C); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1809 code_ptr after_flag_set = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1810 jcc(code, CC_Z, code->cur + 2); |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1811 set_flag(opts, 0, FLAG_Z); |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
1812 *after_flag_set = code->cur - (after_flag_set+1); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1813 set_flag_cond(opts, CC_S, FLAG_N); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1814 set_flag_cond(opts, CC_O, FLAG_V); |
686
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changeset
|
1815 if (opts->flag_regs[FLAG_C] >= 0) { |
582
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|
1816 flag_to_flag(opts, FLAG_C, FLAG_X); |
686
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|
1817 } else { |
582
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changeset
|
1818 set_flag_cond(opts, CC_C, FLAG_X); |
686
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|
1819 } |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1820 m68k_save_result(inst, opts); |
686
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|
1821 } |
582
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|
1822 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1823 void translate_m68k_rot(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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|
1824 { |
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1825 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1826 int32_t init_flags = C|V0; |
686
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|
1827 if (inst->src.addr_mode == MODE_UNUSED) { |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1828 cycles(&opts->gen, BUS); |
686
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682
diff
changeset
|
1829 //Memory rotate |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1830 if (inst->op == M68K_ROXR || inst->op == M68K_ROXL) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1831 flag_to_carry(opts, FLAG_X); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1832 init_flags |= X; |
106 | 1833 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1834 op_ir(code, inst, 1, dst_op->base, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1835 update_flags(opts, init_flags); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1836 cmp_ir(code, 0, dst_op->base, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1837 update_flags(opts, Z|N); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1838 m68k_save_result(inst, opts); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1839 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1840 if (src_op->mode == MODE_IMMED) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1841 cycles(&opts->gen, (inst->extra.size == OPSIZE_LONG ? 8 : 6) + src_op->disp*2); |
577
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1842 if (inst->op == M68K_ROXR || inst->op == M68K_ROXL) { |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1843 flag_to_carry(opts, FLAG_X); |
0f367276a80c
Refactor a bunch of the arithmetic instructions in the 68K core to reduce duplicate code
Michael Pavone <pavone@retrodev.com>
parents:
576
diff
changeset
|
1844 init_flags |= X; |
122 | 1845 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1846 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1847 op_ir(code, inst, src_op->disp, dst_op->base, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1848 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1849 op_irdisp(code, inst, src_op->disp, dst_op->base, dst_op->disp, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1850 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1851 update_flags(opts, init_flags); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1852 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1853 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1854 if (src_op->base != opts->gen.scratch1) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1855 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1856 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1857 } else { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1858 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1859 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1860 and_ir(code, 63, opts->gen.scratch1, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1861 code_ptr zero_off = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1862 jcc(code, CC_Z, code->cur + 2); |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1863 //add 2 cycles for every bit shifted |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1864 mov_ir(code, 2 * opts->gen.clock_divider, opts->gen.scratch2, SZ_D); |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1865 imul_rr(code, RCX, opts->gen.scratch2, SZ_D); |
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
1866 add_rr(code, opts->gen.scratch2, opts->gen.cycles, SZ_D); |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1867 cmp_ir(code, 32, opts->gen.scratch1, SZ_B); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1868 code_ptr norm_off = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1869 jcc(code, CC_L, code->cur + 2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1870 if (inst->op == M68K_ROXR || inst->op == M68K_ROXL) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1871 flag_to_carry(opts, FLAG_X); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1872 init_flags |= X; |
686
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Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1873 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1874 sub_ir(code, 32, opts->gen.scratch1, SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1875 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1876 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1877 op_ir(code, inst, 31, dst_op->base, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1878 op_ir(code, inst, 1, dst_op->base, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
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682
diff
changeset
|
1879 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1880 op_irdisp(code, inst, 31, dst_op->base, dst_op->disp, inst->extra.size); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1881 op_irdisp(code, inst, 1, dst_op->base, dst_op->disp, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1882 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1883 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1884 if (inst->op == M68K_ROXR || inst->op == M68K_ROXL) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1885 set_flag_cond(opts, CC_C, FLAG_X); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1886 sub_ir(code, 32, opts->gen.scratch1, SZ_B); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1887 *norm_off = code->cur - (norm_off+1); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1888 flag_to_carry(opts, FLAG_X); |
686
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Fix indentation that presumably got messed up in a merge
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682
diff
changeset
|
1889 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1890 *norm_off = code->cur - (norm_off+1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
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parents:
682
diff
changeset
|
1891 } |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1892 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1893 op_r(code, inst, dst_op->base, inst->extra.size); |
686
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Fix indentation that presumably got messed up in a merge
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diff
changeset
|
1894 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1895 op_rdisp(code, inst, dst_op->base, dst_op->disp, inst->extra.size); |
686
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Fix indentation that presumably got messed up in a merge
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diff
changeset
|
1896 } |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1897 update_flags(opts, init_flags); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1898 code_ptr end_off = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1899 jmp(code, code->cur + 2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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parents:
581
diff
changeset
|
1900 *zero_off = code->cur - (zero_off+1); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1901 if (inst->op == M68K_ROXR || inst->op == M68K_ROXL) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1902 //Carry flag is set to X flag when count is 0, this is different from ROR/ROL |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1903 flag_to_flag(opts, FLAG_X, FLAG_C); |
686
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Fix indentation that presumably got messed up in a merge
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682
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changeset
|
1904 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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581
diff
changeset
|
1905 set_flag(opts, 0, FLAG_C); |
686
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Fix indentation that presumably got messed up in a merge
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682
diff
changeset
|
1906 } |
582
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Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1907 *end_off = code->cur - (end_off+1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
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parents:
682
diff
changeset
|
1908 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1909 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1910 cmp_ir(code, 0, dst_op->base, inst->extra.size); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
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parents:
682
diff
changeset
|
1911 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1912 cmp_irdisp(code, 0, dst_op->base, dst_op->disp, inst->extra.size); |
686
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Fix indentation that presumably got messed up in a merge
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diff
changeset
|
1913 } |
682 | 1914 update_flags(opts, Z|N); |
686
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Fix indentation that presumably got messed up in a merge
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parents:
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changeset
|
1915 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
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parents:
682
diff
changeset
|
1916 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
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changeset
|
1917 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1918 void translate_m68k_illegal(m68k_options *opts, m68kinst *inst) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
diff
changeset
|
1919 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1920 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
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581
diff
changeset
|
1921 call(code, opts->gen.save_context); |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
1922 call_args(code, (code_ptr)print_regs_exit, 1, opts->gen.context_reg); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1923 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1924 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1925 #define BIT_SUPERVISOR 5 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1926 |
584
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1927 void translate_m68k_andi_ori_ccr_sr(m68k_options *opts, m68kinst *inst) |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1928 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1929 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1930 cycles(&opts->gen, 20); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1931 //TODO: If ANDI to SR, trap if not in supervisor mode |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1932 uint32_t flag_mask = 0; |
584
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1933 uint32_t base_flag = inst->op == M68K_ANDI_SR || inst->op == M68K_ANDI_CCR ? X0 : X1; |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1934 for (int i = 0; i < 5; i++) |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1935 { |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1936 if ((base_flag == X0) ^ (inst->src.params.immed & 1 << i) > 0) |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1937 { |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1938 flag_mask |= base_flag << ((4 - i) * 3); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1939 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1940 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1941 update_flags(opts, flag_mask); |
584
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1942 if (inst->op == M68K_ANDI_SR || inst->op == M68K_ORI_SR) { |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1943 if (inst->op == M68K_ANDI_SR) { |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1944 and_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1945 } else { |
584
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1946 or_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1947 } |
605
49d9928353be
Fix a bug in ori to SR that was swapping USP and SSP inappropriately
Michael Pavone <pavone@retrodev.com>
parents:
601
diff
changeset
|
1948 if (inst->op == M68K_ANDI_SR && !(inst->src.params.immed & (1 << (BIT_SUPERVISOR + 8)))) { |
446
1e828ed04a7c
Implement 68K stop instruction
Mike Pavone <pavone@retrodev.com>
parents:
443
diff
changeset
|
1949 //leave supervisor mode |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
1950 swap_ssp_usp(opts); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1951 } |
584
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1952 if ((inst->op == M68K_ANDI_SR && (inst->src.params.immed & 0x700) != 0x700) |
b6713c1b6f55
Combine andi ccr/sr and ori ccr/sr.
Michael Pavone <pavone@retrodev.com>
parents:
583
diff
changeset
|
1953 || (inst->op == M68K_ORI_SR && inst->src.params.immed & 0x700)) { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1954 call(code, opts->do_sync); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1955 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1956 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1957 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1958 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1959 void translate_m68k_eori_ccr_sr(m68k_options *opts, m68kinst *inst) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1960 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1961 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1962 cycles(&opts->gen, 20); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1963 //TODO: If ANDI to SR, trap if not in supervisor mode |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1964 if (inst->src.params.immed & 0x1) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1965 xor_flag(opts, 1, FLAG_C); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1966 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1967 if (inst->src.params.immed & 0x2) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1968 xor_flag(opts, 1, FLAG_V); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1969 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1970 if (inst->src.params.immed & 0x4) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1971 xor_flag(opts, 1, FLAG_Z); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1972 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1973 if (inst->src.params.immed & 0x8) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1974 xor_flag(opts, 1, FLAG_N); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1975 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1976 if (inst->src.params.immed & 0x10) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1977 xor_flag(opts, 1, FLAG_X); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1978 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1979 if (inst->op == M68K_ORI_SR) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1980 xor_irdisp(code, inst->src.params.immed >> 8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1981 if (inst->src.params.immed & 0x700) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1982 call(code, opts->do_sync); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1983 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1984 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1985 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1986 |
586
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
1987 void set_all_flags(m68k_options *opts, uint8_t flags) |
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
1988 { |
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
1989 uint32_t flag_mask = flags & 0x10 ? X1 : X0; |
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
1990 flag_mask |= flags & 0x8 ? N1 : N0; |
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
1991 flag_mask |= flags & 0x4 ? Z1 : Z0; |
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
1992 flag_mask |= flags & 0x2 ? V1 : V0; |
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
1993 flag_mask |= flags & 0x1 ? C1 : C0; |
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
1994 update_flags(opts, flag_mask); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
1995 } |
586
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
1996 |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1997 void translate_m68k_move_ccr_sr(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1998 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
1999 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2000 //TODO: Privilege check for MOVE to SR |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2001 if (src_op->mode == MODE_IMMED) { |
586
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
2002 set_all_flags(opts, src_op->disp); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2003 if (inst->op == M68K_MOVE_SR) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2004 mov_irdisp(code, (src_op->disp >> 8), opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2005 if (!((inst->src.params.immed >> 8) & (1 << BIT_SUPERVISOR))) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2006 //leave supervisor mode |
585
82aadd5d103a
Use swap_ssp_usp in translate_m68k_move_ccr_sr
Michael Pavone <pavone@retrodev.com>
parents:
584
diff
changeset
|
2007 swap_ssp_usp(opts); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2008 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2009 call(code, opts->do_sync); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2010 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2011 cycles(&opts->gen, 12); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2012 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2013 if (src_op->base != opts->gen.scratch1) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2014 if (src_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2015 mov_rr(code, src_op->base, opts->gen.scratch1, SZ_W); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2016 } else { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2017 mov_rdispr(code, src_op->base, src_op->disp, opts->gen.scratch1, SZ_W); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2018 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2019 } |
698
0a86e81fa87d
Fixed a missed call to do_sync when updating SR in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
690
diff
changeset
|
2020 if (inst->op == M68K_MOVE_SR) { |
0a86e81fa87d
Fixed a missed call to do_sync when updating SR in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
690
diff
changeset
|
2021 call(code, opts->set_sr); |
0a86e81fa87d
Fixed a missed call to do_sync when updating SR in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
690
diff
changeset
|
2022 call(code, opts->do_sync); |
0a86e81fa87d
Fixed a missed call to do_sync when updating SR in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
690
diff
changeset
|
2023 } else { |
0a86e81fa87d
Fixed a missed call to do_sync when updating SR in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
690
diff
changeset
|
2024 call(code, opts->set_ccr); |
0a86e81fa87d
Fixed a missed call to do_sync when updating SR in 68K core
Michael Pavone <pavone@retrodev.com>
parents:
690
diff
changeset
|
2025 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2026 cycles(&opts->gen, 12); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2027 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2028 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2029 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2030 void translate_m68k_stop(m68k_options *opts, m68kinst *inst) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2031 { |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2032 //TODO: Trap if not in system mode |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2033 //manual says 4 cycles, but it has to be at least 8 since it's a 2-word instruction |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2034 //possibly even 12 since that's how long MOVE to SR takes |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2035 //On further thought prefetch + the fact that this stops the CPU may make |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2036 //Motorola's accounting make sense here |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2037 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2038 cycles(&opts->gen, BUS*2); |
586
aa35ccb90aa9
Minor refactor to translate_m68k_move_ccr_sr and translate_m68k_stop to reduce code duplication
Michael Pavone <pavone@retrodev.com>
parents:
585
diff
changeset
|
2039 set_all_flags(opts, inst->src.params.immed); |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2040 mov_irdisp(code, (inst->src.params.immed >> 8), opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2041 if (!((inst->src.params.immed >> 8) & (1 << BIT_SUPERVISOR))) { |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2042 //leave supervisor mode |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2043 swap_ssp_usp(opts); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2044 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2045 code_ptr loop_top = code->cur; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2046 call(code, opts->do_sync); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2047 cmp_rr(code, opts->gen.limit, opts->gen.cycles, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2048 code_ptr normal_cycle_up = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2049 jcc(code, CC_A, code->cur + 2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2050 cycles(&opts->gen, BUS); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2051 code_ptr after_cycle_up = code->cur + 1; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2052 jmp(code, code->cur + 2); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2053 *normal_cycle_up = code->cur - (normal_cycle_up + 1); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2054 mov_rr(code, opts->gen.limit, opts->gen.cycles, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2055 *after_cycle_up = code->cur - (after_cycle_up+1); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2056 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_cycle), opts->gen.cycles, SZ_D); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2057 jcc(code, CC_C, loop_top); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2058 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2059 |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2060 void translate_m68k_move_from_sr(m68k_options *opts, m68kinst *inst, host_ea *src_op, host_ea *dst_op) |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2061 { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2062 code_info *code = &opts->gen.code; |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2063 //TODO: Trap if not in system mode |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2064 call(code, opts->get_sr); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2065 if (dst_op->mode == MODE_REG_DIRECT) { |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2066 mov_rr(code, opts->gen.scratch1, dst_op->base, SZ_W); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2067 } else { |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2068 mov_rrdisp(code, opts->gen.scratch1, dst_op->base, dst_op->disp, SZ_W); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2069 } |
582
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2070 m68k_save_result(inst, opts); |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2071 } |
c05fcbfe1b1a
Refactored translate_m68k so that it contains no host-cpu specific code and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
581
diff
changeset
|
2072 |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
569
diff
changeset
|
2073 void translate_out_of_bounds(code_info *code) |
319
0bcab0475a7f
Port instruction retranslation improvements from Z80 core to M68K core
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2074 { |
570
76bba9ffe351
Initial stab at separating the generic parts of the 68K core from the host-cpu specific parts.
Michael Pavone <pavone@retrodev.com>
parents:
569
diff
changeset
|
2075 xor_rr(code, RDI, RDI, SZ_D); |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2076 call_args(code, (code_ptr)exit, 1, RDI); |
319
0bcab0475a7f
Port instruction retranslation improvements from Z80 core to M68K core
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2077 } |
0bcab0475a7f
Port instruction retranslation improvements from Z80 core to M68K core
Mike Pavone <pavone@retrodev.com>
parents:
235
diff
changeset
|
2078 |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
586
diff
changeset
|
2079 void nop_fill_or_jmp_next(code_info *code, code_ptr old_end, code_ptr next_inst) |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
586
diff
changeset
|
2080 { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
586
diff
changeset
|
2081 if (next_inst == old_end && next_inst - code->cur < 2) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
586
diff
changeset
|
2082 while (code->cur < old_end) { |
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
586
diff
changeset
|
2083 *(code->cur++) = 0x90; //NOP |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2084 } |
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2085 } else { |
587
55c5b0f913ce
Made m68k_retranslate_inst host-cpu generic and moved it to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
586
diff
changeset
|
2086 jmp(code, next_inst); |
193
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2087 } |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2088 } |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2089 |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2090 m68k_context * m68k_handle_code_write(uint32_t address, m68k_context * context) |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2091 { |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2092 uint32_t inst_start = get_instruction_start(context->native_code_map, address | 0xFF0000); |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2093 if (inst_start) { |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
2094 m68k_options * options = context->options; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2095 code_info *code = &options->gen.code; |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
698
diff
changeset
|
2096 code_ptr dst = get_native_address(context->options, inst_start); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2097 code_info orig; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2098 orig.cur = dst; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2099 orig.last = dst + 128; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2100 mov_ir(&orig, inst_start, options->gen.scratch2, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2101 |
543
915a1cb98bac
Generate retrans_stub at runtime so it can use the generated save/load_context functions
Michael Pavone <pavone@retrodev.com>
parents:
542
diff
changeset
|
2102 if (!options->retrans_stub) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2103 options->retrans_stub = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2104 call(code, options->gen.save_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2105 push_r(code, options->gen.context_reg); |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2106 call_args(code,(code_ptr)m68k_retranslate_inst, 2, options->gen.scratch2, options->gen.context_reg); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2107 pop_r(code, options->gen.context_reg); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2108 mov_rr(code, RAX, options->gen.scratch1, SZ_PTR); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2109 call(code, options->gen.load_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2110 jmp_r(code, options->gen.scratch1); |
686
8cb61671777b
Fix indentation that presumably got messed up in a merge
Michael Pavone <pavone@retrodev.com>
parents:
682
diff
changeset
|
2111 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2112 jmp(&orig, options->retrans_stub); |
193
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2113 } |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2114 return context; |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2115 } |
c66e4636f991
Implement support for self-modifying code
Mike Pavone <pavone@retrodev.com>
parents:
192
diff
changeset
|
2116 |
558
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
2117 void insert_breakpoint(m68k_context * context, uint32_t address, code_ptr bp_handler) |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2118 { |
558
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
2119 static code_ptr bp_stub = NULL; |
569
9b7fcf748be0
Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively
Michael Pavone <pavone@retrodev.com>
parents:
567
diff
changeset
|
2120 m68k_options * opts = context->options; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2121 code_info native; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2122 native.cur = get_native_address_trans(context, address); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2123 native.last = native.cur + 128; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2124 code_ptr start_native = native.cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2125 mov_ir(&native, address, opts->gen.scratch1, SZ_D); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2126 if (!bp_stub) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2127 code_info *code = &opts->gen.code; |
654
98927f1b005b
Fix some issues with 68K instruction retranslation
Michael Pavone <pavone@retrodev.com>
parents:
653
diff
changeset
|
2128 check_code_prologue(code); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2129 bp_stub = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2130 call(&native, bp_stub); |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
2131 |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2132 //Calculate length of prologue |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2133 check_cycles_int(&opts->gen, address); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2134 int check_int_size = code->cur-bp_stub; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2135 code->cur = bp_stub; |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
2136 |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2137 //Save context and call breakpoint handler |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2138 call(code, opts->gen.save_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2139 push_r(code, opts->gen.scratch1); |
657
92ce5ea5ffc9
Use call_args and call_args_abi in Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
656
diff
changeset
|
2140 call_args_abi(code, bp_handler, 2, opts->gen.context_reg, opts->gen.scratch1); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2141 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2142 //Restore context |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2143 call(code, opts->gen.load_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2144 pop_r(code, opts->gen.scratch1); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2145 //do prologue stuff |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2146 cmp_rr(code, opts->gen.cycles, opts->gen.limit, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2147 code_ptr jmp_off = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2148 jcc(code, CC_NC, code->cur + 7); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2149 call(code, opts->gen.handle_cycle_limit_int); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2150 *jmp_off = code->cur - (jmp_off+1); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2151 //jump back to body of translated instruction |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2152 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2153 add_ir(code, check_int_size - (native.cur-start_native), opts->gen.scratch1, SZ_PTR); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2154 jmp_r(code, opts->gen.scratch1); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2155 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2156 call(&native, bp_stub); |
184
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2157 } |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2158 } |
ebcbdd1c4cc8
Fix a bunch of bugs in the CPU core, add a 68K debugger
Mike Pavone <pavone@retrodev.com>
parents:
183
diff
changeset
|
2159 |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2160 void init_m68k_opts(m68k_options * opts, memmap_chunk * memmap, uint32_t num_chunks, uint32_t clock_divider) |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2161 { |
440 | 2162 memset(opts, 0, sizeof(*opts)); |
653
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
2163 opts->gen.memmap = memmap; |
a18e3923481e
Remove some of the hard coded assumptions about the memory map from the CPU cores
Michael Pavone <pavone@retrodev.com>
parents:
620
diff
changeset
|
2164 opts->gen.memmap_chunks = num_chunks; |
589
2dde38c1744f
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
588
diff
changeset
|
2165 opts->gen.address_size = SZ_D; |
2dde38c1744f
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
588
diff
changeset
|
2166 opts->gen.address_mask = 0xFFFFFF; |
596
9853bcce4729
Set the byte_swap flag in the M68K core so gen_mem_fun correctly inserts xor instructions for byte access functions
Michael Pavone <pavone@retrodev.com>
parents:
590
diff
changeset
|
2167 opts->gen.byte_swap = 1; |
589
2dde38c1744f
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
588
diff
changeset
|
2168 opts->gen.max_address = 0x1000000; |
2dde38c1744f
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
588
diff
changeset
|
2169 opts->gen.bus_cycles = BUS; |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2170 opts->gen.clock_divider = clock_divider; |
589
2dde38c1744f
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
588
diff
changeset
|
2171 opts->gen.mem_ptr_off = offsetof(m68k_context, mem_pointers); |
2dde38c1744f
Split gen_mem_fun out of m68k_core_x86 and make it more generic so it can be used by the Z80 core
Michael Pavone <pavone@retrodev.com>
parents:
588
diff
changeset
|
2172 opts->gen.ram_flags_off = offsetof(m68k_context, ram_code_flags); |
620
9d6fed6501ba
Fix handling of code writes for Z80 core. This seems to get things close to being back to where they were before the big refactor that broke the Z80 core. Some problems remain. Notably the sound driver in Sonic 2 is still quite broken.
Michael Pavone <pavone@retrodev.com>
parents:
612
diff
changeset
|
2173 opts->gen.ram_flags_shift = 11; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2174 for (int i = 0; i < 8; i++) |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2175 { |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2176 opts->dregs[i] = opts->aregs[i] = -1; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2177 } |
548
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2178 #ifdef X86_64 |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2179 opts->dregs[0] = R10; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2180 opts->dregs[1] = R11; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2181 opts->dregs[2] = R12; |
423
8e136187c0e0
Use the registers that were freed up by the memory map function changes
Mike Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
2182 opts->dregs[3] = R8; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2183 opts->aregs[0] = R13; |
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2184 opts->aregs[1] = R14; |
423
8e136187c0e0
Use the registers that were freed up by the memory map function changes
Mike Pavone <pavone@retrodev.com>
parents:
352
diff
changeset
|
2185 opts->aregs[2] = R9; |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2186 opts->aregs[7] = R15; |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2187 |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2188 opts->flag_regs[0] = -1; |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2189 opts->flag_regs[1] = RBX; |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2190 opts->flag_regs[2] = RDX; |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2191 opts->flag_regs[3] = BH; |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2192 opts->flag_regs[4] = DH; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2193 |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2194 opts->gen.scratch2 = RDI; |
548
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2195 #else |
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2196 opts->dregs[0] = RDX; |
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2197 opts->aregs[7] = RDI; |
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2198 |
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2199 for (int i = 0; i < 5; i++) |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2200 { |
548
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2201 opts->flag_regs[i] = -1; |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2202 } |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2203 opts->gen.scratch2 = RBX; |
548
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2204 #endif |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2205 opts->gen.context_reg = RSI; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2206 opts->gen.cycles = RAX; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2207 opts->gen.limit = RBP; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2208 opts->gen.scratch1 = RCX; |
548
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2209 |
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2210 |
558
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
2211 opts->gen.native_code_map = malloc(sizeof(native_map_slot) * NATIVE_MAP_CHUNKS); |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
2212 memset(opts->gen.native_code_map, 0, sizeof(native_map_slot) * NATIVE_MAP_CHUNKS); |
dc9f178085a0
Use a typedef code_ptr in place of uint8_t * in 68K core to better support host instruction sets with different instruction word sizes. Make x86_68k_options contain a cpu_options so that gen_mem_fun can eventually be shared with the Z80 core.
Mike Pavone <pavone@retrodev.com>
parents:
557
diff
changeset
|
2213 opts->gen.deferred = NULL; |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
689
diff
changeset
|
2214 |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
689
diff
changeset
|
2215 uint32_t inst_size_size = sizeof(uint8_t *) * ram_size(&opts->gen) / 1024; |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
689
diff
changeset
|
2216 opts->gen.ram_inst_sizes = malloc(inst_size_size); |
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
689
diff
changeset
|
2217 memset(opts->gen.ram_inst_sizes, 0, inst_size_size); |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
2218 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2219 code_info *code = &opts->gen.code; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2220 init_code_info(code); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2221 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2222 opts->gen.save_context = code->cur; |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2223 for (int i = 0; i < 5; i++) |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2224 if (opts->flag_regs[i] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2225 mov_rrdisp(code, opts->flag_regs[i], opts->gen.context_reg, offsetof(m68k_context, flags) + i, SZ_B); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2226 } |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2227 for (int i = 0; i < 8; i++) |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2228 { |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2229 if (opts->dregs[i] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2230 mov_rrdisp(code, opts->dregs[i], opts->gen.context_reg, offsetof(m68k_context, dregs) + sizeof(uint32_t) * i, SZ_D); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2231 } |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2232 if (opts->aregs[i] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2233 mov_rrdisp(code, opts->aregs[i], opts->gen.context_reg, offsetof(m68k_context, aregs) + sizeof(uint32_t) * i, SZ_D); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2234 } |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2235 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2236 mov_rrdisp(code, opts->gen.cycles, opts->gen.context_reg, offsetof(m68k_context, current_cycle), SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2237 retn(code); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2238 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2239 opts->gen.load_context = code->cur; |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2240 for (int i = 0; i < 5; i++) |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
689
diff
changeset
|
2241 { |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2242 if (opts->flag_regs[i] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2243 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + i, opts->flag_regs[i], SZ_B); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2244 } |
690
fc04781f4d28
Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM
Michael Pavone <pavone@retrodev.com>
parents:
689
diff
changeset
|
2245 } |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2246 for (int i = 0; i < 8; i++) |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2247 { |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2248 if (opts->dregs[i] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2249 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, dregs) + sizeof(uint32_t) * i, opts->dregs[i], SZ_D); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2250 } |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2251 if (opts->aregs[i] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2252 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, aregs) + sizeof(uint32_t) * i, opts->aregs[i], SZ_D); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2253 } |
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2254 } |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2255 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, current_cycle), opts->gen.cycles, SZ_D); |
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2256 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, target_cycle), opts->gen.limit, SZ_D); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2257 retn(code); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2258 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2259 opts->start_context = (start_fun)code->cur; |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
657
diff
changeset
|
2260 save_callee_save_regs(code); |
550
96489fb27dbf
Apart from the Z80 core, BlastEm now supports 32-bit x86
Michael Pavone <pavone@retrodev.com>
parents:
548
diff
changeset
|
2261 #ifdef X86_64 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2262 if (opts->gen.scratch2 != RDI) { |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2263 mov_rr(code, RDI, opts->gen.scratch2, SZ_PTR); |
548
a3afee2271ce
Initial work on the x86-32 target
Michael Pavone <pavone@retrodev.com>
parents:
547
diff
changeset
|
2264 } |
550
96489fb27dbf
Apart from the Z80 core, BlastEm now supports 32-bit x86
Michael Pavone <pavone@retrodev.com>
parents:
548
diff
changeset
|
2265 #else |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2266 mov_rdispr(code, RSP, 20, opts->gen.scratch2, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2267 mov_rdispr(code, RSP, 24, opts->gen.context_reg, SZ_D); |
550
96489fb27dbf
Apart from the Z80 core, BlastEm now supports 32-bit x86
Michael Pavone <pavone@retrodev.com>
parents:
548
diff
changeset
|
2268 #endif |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2269 call(code, opts->gen.load_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2270 call_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2271 call(code, opts->gen.save_context); |
665
d0943769353b
Added functions to gen_x86 for saving and restoring callee save registers to better abstract over ABI differences between x86 and x86-64
Michael Pavone <pavone@retrodev.com>
parents:
657
diff
changeset
|
2272 restore_callee_save_regs(code); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2273 retn(code); |
540
4ca826862174
Generate m68k_start_context at runtime so it can use the generated load_context and save_context
Michael Pavone <pavone@retrodev.com>
parents:
539
diff
changeset
|
2274 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2275 opts->native_addr = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2276 call(code, opts->gen.save_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2277 push_r(code, opts->gen.context_reg); |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2278 call_args(code, (code_ptr)get_native_address_trans, 2, opts->gen.context_reg, opts->gen.scratch1); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2279 mov_rr(code, RAX, opts->gen.scratch1, SZ_PTR); //move result to scratch reg |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2280 pop_r(code, opts->gen.context_reg); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2281 call(code, opts->gen.load_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2282 retn(code); |
544
8a26567852b7
Generate native_addr and native_addr_and_sync at runtime so they can use the generated save/load_context functions
Michael Pavone <pavone@retrodev.com>
parents:
543
diff
changeset
|
2283 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2284 opts->native_addr_and_sync = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2285 call(code, opts->gen.save_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2286 push_r(code, opts->gen.scratch1); |
667
30ccf56842d6
All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working
Michael Pavone <pavone@retrodev.com>
parents:
665
diff
changeset
|
2287 |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2288 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_D); |
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2289 call_args_abi(code, (code_ptr)sync_components, 2, opts->gen.context_reg, opts->gen.scratch1); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2290 pop_r(code, RSI); //restore saved address from opts->gen.scratch1 |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2291 push_r(code, RAX); //save context pointer for later |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2292 call_args(code, (code_ptr)get_native_address_trans, 2, RAX, RSI); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2293 mov_rr(code, RAX, opts->gen.scratch1, SZ_PTR); //move result to scratch reg |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2294 pop_r(code, opts->gen.context_reg); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2295 call(code, opts->gen.load_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2296 retn(code); |
544
8a26567852b7
Generate native_addr and native_addr_and_sync at runtime so they can use the generated save/load_context functions
Michael Pavone <pavone@retrodev.com>
parents:
543
diff
changeset
|
2297 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2298 opts->gen.handle_cycle_limit = code->cur; |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2299 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), opts->gen.cycles, SZ_D); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2300 code_ptr skip_sync = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2301 jcc(code, CC_C, code->cur + 2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2302 opts->do_sync = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2303 push_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2304 push_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2305 call(code, opts->gen.save_context); |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2306 xor_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_D); |
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2307 call_args_abi(code, (code_ptr)sync_components, 2, opts->gen.context_reg, opts->gen.scratch1); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2308 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2309 call(code, opts->gen.load_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2310 pop_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2311 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2312 *skip_sync = code->cur - (skip_sync+1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2313 retn(code); |
539
c2716b502a81
Generate save_context and load_context functions at runtime
Michael Pavone <pavone@retrodev.com>
parents:
516
diff
changeset
|
2314 |
590
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
589
diff
changeset
|
2315 opts->gen.handle_code_write = (code_ptr)m68k_handle_code_write; |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
589
diff
changeset
|
2316 |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
589
diff
changeset
|
2317 opts->read_16 = gen_mem_fun(&opts->gen, memmap, num_chunks, READ_16, NULL); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
589
diff
changeset
|
2318 opts->read_8 = gen_mem_fun(&opts->gen, memmap, num_chunks, READ_8, NULL); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
589
diff
changeset
|
2319 opts->write_16 = gen_mem_fun(&opts->gen, memmap, num_chunks, WRITE_16, NULL); |
ea80559c67cb
WIP effort to update z80 core for code gen changes
Michael Pavone <pavone@retrodev.com>
parents:
589
diff
changeset
|
2320 opts->write_8 = gen_mem_fun(&opts->gen, memmap, num_chunks, WRITE_8, NULL); |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
2321 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2322 opts->read_32 = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2323 push_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2324 call(code, opts->read_16); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2325 mov_rr(code, opts->gen.scratch1, opts->gen.scratch2, SZ_W); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2326 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2327 push_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2328 add_ir(code, 2, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2329 call(code, opts->read_16); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2330 pop_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2331 movzx_rr(code, opts->gen.scratch1, opts->gen.scratch1, SZ_W, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2332 shl_ir(code, 16, opts->gen.scratch2, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2333 or_rr(code, opts->gen.scratch2, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2334 retn(code); |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
2335 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2336 opts->write_32_lowfirst = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2337 push_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2338 push_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2339 add_ir(code, 2, opts->gen.scratch2, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2340 call(code, opts->write_16); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2341 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2342 pop_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2343 shr_ir(code, 16, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2344 jmp(code, opts->write_16); |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
2345 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2346 opts->write_32_highfirst = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2347 push_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2348 push_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2349 shr_ir(code, 16, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2350 call(code, opts->write_16); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2351 pop_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2352 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2353 add_ir(code, 2, opts->gen.scratch2, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2354 jmp(code, opts->write_16); |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
2355 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2356 opts->get_sr = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2357 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, status), opts->gen.scratch1, SZ_B); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2358 shl_ir(code, 8, opts->gen.scratch1, SZ_W); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2359 if (opts->flag_regs[FLAG_X] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2360 mov_rr(code, opts->flag_regs[FLAG_X], opts->gen.scratch1, SZ_B); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2361 } else { |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2362 int8_t offset = offsetof(m68k_context, flags); |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2363 if (offset) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2364 mov_rdispr(code, opts->gen.context_reg, offset, opts->gen.scratch1, SZ_B); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2365 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2366 mov_rindr(code, opts->gen.context_reg, opts->gen.scratch1, SZ_B); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2367 } |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2368 } |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2369 for (int flag = FLAG_N; flag <= FLAG_C; flag++) |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2370 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2371 shl_ir(code, 1, opts->gen.scratch1, SZ_B); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2372 if (opts->flag_regs[flag] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2373 or_rr(code, opts->flag_regs[flag], opts->gen.scratch1, SZ_B); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2374 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2375 or_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, flags) + flag, opts->gen.scratch1, SZ_B); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2376 } |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2377 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2378 retn(code); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2379 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2380 opts->set_sr = code->cur; |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2381 for (int flag = FLAG_C; flag >= FLAG_X; flag--) |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2382 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2383 rcr_ir(code, 1, opts->gen.scratch1, SZ_B); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2384 if (opts->flag_regs[flag] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2385 setcc_r(code, CC_C, opts->flag_regs[flag]); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2386 } else { |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2387 int8_t offset = offsetof(m68k_context, flags) + flag; |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2388 if (offset) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2389 setcc_rdisp(code, CC_C, opts->gen.context_reg, offset); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2390 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2391 setcc_rind(code, CC_C, opts->gen.context_reg); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2392 } |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2393 } |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2394 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2395 shr_ir(code, 8, opts->gen.scratch1, SZ_W); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2396 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2397 retn(code); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2398 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2399 opts->set_ccr = code->cur; |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2400 for (int flag = FLAG_C; flag >= FLAG_X; flag--) |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2401 { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2402 rcr_ir(code, 1, opts->gen.scratch1, SZ_B); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2403 if (opts->flag_regs[flag] >= 0) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2404 setcc_r(code, CC_C, opts->flag_regs[flag]); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2405 } else { |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2406 int8_t offset = offsetof(m68k_context, flags) + flag; |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2407 if (offset) { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2408 setcc_rdisp(code, CC_C, opts->gen.context_reg, offset); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2409 } else { |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2410 setcc_rind(code, CC_C, opts->gen.context_reg); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2411 } |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2412 } |
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2413 } |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2414 retn(code); |
547
3090d016c9e9
Generate get_sr, set_sr and set_ccr at runtime so they can respect the flag_regs setting
Michael Pavone <pavone@retrodev.com>
parents:
546
diff
changeset
|
2415 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2416 opts->gen.handle_cycle_limit_int = code->cur; |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2417 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_cycle), opts->gen.cycles, SZ_D); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2418 code_ptr do_int = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2419 jcc(code, CC_NC, code->cur + 2); |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2420 cmp_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), opts->gen.cycles, SZ_D); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2421 skip_sync = code->cur + 1; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2422 jcc(code, CC_C, code->cur + 2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2423 call(code, opts->gen.save_context); |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2424 call_args_abi(code, (code_ptr)sync_components, 2, opts->gen.context_reg, opts->gen.scratch1); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2425 mov_rr(code, RAX, opts->gen.context_reg, SZ_PTR); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2426 jmp(code, opts->gen.load_context); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2427 *skip_sync = code->cur - (skip_sync+1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2428 retn(code); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2429 *do_int = code->cur - (do_int+1); |
347
b24556b45d1e
Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
2430 //set target cycle to sync cycle |
656
24ccfd70133a
Added 2 new functions to gen_x86.c for handling passing args according to the C abi of the host system and adapted the code in m68k_core_x86.c to use that instead of doing everything by hand
Michael Pavone <pavone@retrodev.com>
parents:
654
diff
changeset
|
2431 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, sync_cycle), opts->gen.limit, SZ_D); |
347
b24556b45d1e
Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
2432 //swap USP and SSP if not already in supervisor mode |
687
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
2433 check_user_mode_swap_ssp_usp(opts); |
347
b24556b45d1e
Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
2434 //save PC |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
2435 subi_areg(opts, 4, 7); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
2436 areg_to_native(opts, 7, opts->gen.scratch2); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2437 call(code, opts->write_32_lowfirst); |
347
b24556b45d1e
Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
2438 //save status register |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
2439 subi_areg(opts, 2, 7); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2440 call(code, opts->get_sr); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
2441 areg_to_native(opts, 7, opts->gen.scratch2); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2442 call(code, opts->write_16); |
347
b24556b45d1e
Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
2443 //update status register |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2444 and_irdisp(code, 0xF8, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2445 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_B); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2446 or_ir(code, 0x20, opts->gen.scratch1, SZ_B); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2447 or_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
347
b24556b45d1e
Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
2448 //calculate interrupt vector address |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2449 mov_rdispr(code, opts->gen.context_reg, offsetof(m68k_context, int_num), opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2450 mov_rrdisp(code, opts->gen.scratch1, opts->gen.context_reg, offsetof(m68k_context, int_ack), SZ_W); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2451 shl_ir(code, 2, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2452 add_ir(code, 0x60, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2453 call(code, opts->read_32); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2454 call(code, opts->native_addr_and_sync); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2455 cycles(&opts->gen, 24); |
347
b24556b45d1e
Generate handle_cycle_limit_int at runtime so it can refer to the runtime generated memory map functions
Mike Pavone <pavone@retrodev.com>
parents:
343
diff
changeset
|
2456 //discard function return address |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2457 pop_r(code, opts->gen.scratch2); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2458 jmp_r(code, opts->gen.scratch1); |
447
e730fc040169
Fix performance regression from stop instruction work
Mike Pavone <pavone@retrodev.com>
parents:
446
diff
changeset
|
2459 |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2460 opts->trap = code->cur; |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2461 push_r(code, opts->gen.scratch2); |
348
3923dbc2dcc4
m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S
Mike Pavone <pavone@retrodev.com>
parents:
347
diff
changeset
|
2462 //swap USP and SSP if not already in supervisor mode |
687
a61d33ccea7d
Moved translate_m68k_rte and translate_m68k_reset to m68k_core.c
Michael Pavone <pavone@retrodev.com>
parents:
686
diff
changeset
|
2463 check_user_mode_swap_ssp_usp(opts); |
348
3923dbc2dcc4
m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S
Mike Pavone <pavone@retrodev.com>
parents:
347
diff
changeset
|
2464 //save PC |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
2465 subi_areg(opts, 4, 7); |
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
2466 areg_to_native(opts, 7, opts->gen.scratch2); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2467 call(code, opts->write_32_lowfirst); |
348
3923dbc2dcc4
m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S
Mike Pavone <pavone@retrodev.com>
parents:
347
diff
changeset
|
2468 //save status register |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
2469 subi_areg(opts, 2, 7); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2470 call(code, opts->get_sr); |
574
1594525e2157
More 68K core refactoring to both reduce the amount of code and better split the host-cpu specific parts from the generic parts
Michael Pavone <pavone@retrodev.com>
parents:
571
diff
changeset
|
2471 areg_to_native(opts, 7, opts->gen.scratch2); |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2472 call(code, opts->write_16); |
348
3923dbc2dcc4
m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S
Mike Pavone <pavone@retrodev.com>
parents:
347
diff
changeset
|
2473 //set supervisor bit |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2474 or_irdisp(code, 0x20, opts->gen.context_reg, offsetof(m68k_context, status), SZ_B); |
348
3923dbc2dcc4
m68k_trap is now replaced with a generated one so it can call the generated memory acccess functions. The old static memory access functions have been removed from runtime.S
Mike Pavone <pavone@retrodev.com>
parents:
347
diff
changeset
|
2475 //calculate vector address |
567
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2476 pop_r(code, opts->gen.scratch1); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2477 shl_ir(code, 2, opts->gen.scratch1, SZ_D); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2478 call(code, opts->read_32); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2479 call(code, opts->native_addr_and_sync); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2480 cycles(&opts->gen, 18); |
8e395210f50f
Refactor gen_x86 to use an interface more like gen_arm and to remove the need for the caller to decide whether an 8-bit or 32-bit displacement is needed in the rdisp functions. Update m68k_to_x86 to use the new version of the gen_x86 functions and do some minor refactoring there in the process
Michael Pavone <pavone@retrodev.com>
parents:
558
diff
changeset
|
2481 jmp_r(code, opts->gen.scratch1); |
726
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
698
diff
changeset
|
2482 |
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
698
diff
changeset
|
2483 opts->odd_address = code->cur; |
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
698
diff
changeset
|
2484 mov_ir(code, (int64_t)stderr, RDI, SZ_PTR); |
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
698
diff
changeset
|
2485 mov_ir(code, (int64_t)"Attempt to execute code at odd address\n", RSI, SZ_PTR); |
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
698
diff
changeset
|
2486 call_args_abi(code, (code_ptr)fprintf, 2, RDI, RSI, RDX); |
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
698
diff
changeset
|
2487 xor_rr(code, RDI, RDI, SZ_D); |
7367b14ac01c
Don't attempt to translate or map code at odd addresses. This fixes a bug that shows up when playing College Footbal USA 96
Michael Pavone <pavone@retrodev.com>
parents:
698
diff
changeset
|
2488 call_args(code, (code_ptr)exit, 1, RDI); |
18
3e7bfde7606e
M68K to x86 translation works for a limited subset of instructions and addressing modes
Mike Pavone <pavone@retrodev.com>
parents:
14
diff
changeset
|
2489 } |