repos/blastem: blastem.c annotate

annotate blastem.c @ 776:cbf97d335444

Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works.

author	Michael Pavone <pavone@retrodev.com>
date	Mon, 20 Jul 2015 21:15:34 -0700
parents	41dc895e85ff
children	79b10b421d3c

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	2 Copyright 2013 Michael Pavone
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	5 */
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "68kinst.h"
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 565 diff changeset	7 #include "m68k_core.h"
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	8 #include "z80_to_x86.h"
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #include "mem.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	10 #include "vdp.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	11 #include "render.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	12 #include "blastem.h"
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	13 #include "gdb_remote.h"
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	14 #include "gst.h"
496 6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	15 #include "util.h"
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	16 #include "romdb.h"
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	17 #include <stdio.h>
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	18 #include <stdlib.h>
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	19 #include <string.h>
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	20
531 46a60bb5f785 Update version number Mike Pavone <pavone@retrodev.com> parents: 529 diff changeset	21 #define BLASTEM_VERSION "0.2.0"
464 226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	22
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	23 #define MCLKS_NTSC 53693175
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	24 #define MCLKS_PAL 53203395
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	25
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	26 #define MCLKS_PER_68K 7
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	27 #define MCLKS_PER_YM MCLKS_PER_68K
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	28 #define MCLKS_PER_Z80 15
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	29 #define MCLKS_PER_PSG (MCLKS_PER_Z80*16)
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	30
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	31 //TODO: Figure out the exact value for this
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	32 #define LINES_NTSC 262
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	33 #define LINES_PAL 312
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	34
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	35 #define MAX_SOUND_CYCLES 100000
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	36
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	37 uint16_t *cart;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	38 uint16_t ram[RAM_WORDS];
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	39 uint8_t z80_ram[Z80_RAM_BYTES];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	40
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	41 int headless = 0;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	42 int exit_after = 0;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	43 int z80_enabled = 1;
356 79e4b466e7d0 Get rid of debug puts and limit based on audio rather than frame rate by default. Mike Pavone <pavone@retrodev.com> parents: 354 diff changeset	44 int frame_limit = 0;
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	45
430 7f84090ab1cd Add config file parser and default config file Mike Pavone <pavone@retrodev.com> parents: 425 diff changeset	46 tern_node * config;
7f84090ab1cd Add config file parser and default config file Mike Pavone <pavone@retrodev.com> parents: 425 diff changeset	47
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	48 #ifndef MIN
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	49 #define MIN(a,b) ((a) < (b) ? (a) : (b))
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	50 #endif
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	51
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	52 #define SMD_HEADER_SIZE 512
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	53 #define SMD_MAGIC1 0x03
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	54 #define SMD_MAGIC2 0xAA
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	55 #define SMD_MAGIC3 0xBB
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	56 #define SMD_BLOCK_SIZE 0x4000
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	57
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	58 int load_smd_rom(long filesize, FILE * f)
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	59 {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	60 uint8_t block[SMD_BLOCK_SIZE];
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	61 filesize -= SMD_HEADER_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	62 fseek(f, SMD_HEADER_SIZE, SEEK_SET);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	63
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	64 uint16_t * dst = cart;
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	65 int rom_size = filesize;
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	66 while (filesize > 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	67 fread(block, 1, SMD_BLOCK_SIZE, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	68 for (uint8_t low = block, high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) {
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	69 (dst++) = low << 8 \| *high;
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	70 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	71 filesize -= SMD_BLOCK_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	72 }
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	73 return filesize;
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	74 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	75
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	76 void byteswap_rom(int filesize)
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	77 {
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	78 for(unsigned short * cur = cart; cur - cart < filesize/2; ++cur)
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	79 {
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	80 cur = (cur >> 8) \| (*cur << 8);
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	81 }
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	82 }
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	83
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	84 int load_rom(char * filename)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	85 {
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	86 uint8_t header[10];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	87 FILE * f = fopen(filename, "rb");
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	88 if (!f) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	89 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	90 }
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	91 if (sizeof(header) != fread(header, 1, sizeof(header), f)) {
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	92 fprintf(stderr, "Error reading from %s\n", filename);
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	93 exit(1);
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	94 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	95 fseek(f, 0, SEEK_END);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	96 long filesize = ftell(f);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	97 fseek(f, 0, SEEK_SET);
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	98 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	99 int i;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	100 for (i = 3; i < 8; i++) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	101 if (header[i] != 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	102 break;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	103 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	104 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	105 if (i == 8) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	106 if (header[2]) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	107 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	108 exit(1);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	109 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	110 return load_smd_rom(filesize, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	111 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	112 }
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	113 cart = malloc(filesize);
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	114 if (filesize != fread(cart, 1, filesize, f)) {
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	115 fprintf(stderr, "Error reading from %s\n", filename);
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	116 exit(1);
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	117 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	118 fclose(f);
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	119 return filesize;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	120 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	121
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	122 uint16_t read_dma_value(uint32_t address)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	123 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	124 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	125 if (address < 0x200000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	126 return cart[address];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	127 } else if(address >= 0x700000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	128 return ram[address & 0x7FFF];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	129 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	130 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	131 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	132 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	133
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	134 void adjust_int_cycle(m68k_context * context, vdp_context * v_context)
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	135 {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	136 //static int old_int_cycle = CYCLE_NEVER;
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	137 genesis_context *gen = context->system;
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	138 if (context->sync_cycle - context->current_cycle > gen->max_cycles) {
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	139 context->sync_cycle = context->current_cycle + gen->max_cycles;
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	140 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	141 context->int_cycle = CYCLE_NEVER;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	142 if ((context->status & 0x7) < 6) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	143 uint32_t next_vint = vdp_next_vint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	144 if (next_vint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	145 context->int_cycle = next_vint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	146 context->int_num = 6;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	147 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	148 if ((context->status & 0x7) < 4) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	149 uint32_t next_hint = vdp_next_hint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	150 if (next_hint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	151 if (next_hint < context->int_cycle) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	152 context->int_cycle = next_hint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	153 context->int_num = 4;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	154
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	155 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	156 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	157 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	158 }
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	159 /*if (context->int_cycle != old_int_cycle) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	160 printf("int cycle changed to: %d, level: %d @ %d(%d), frame: %d, vcounter: %d, hslot: %d, mask: %d, hint_counter: %d\n", context->int_cycle, context->int_num, v_context->cycles, context->current_cycle, v_context->frame, v_context->vcounter, v_context->hslot, context->status & 0x7, v_context->hint_counter);
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	161 old_int_cycle = context->int_cycle;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	162 }*/
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	163
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	164 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	165 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n",
32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	166 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7),
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	167 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	168 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	169
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	170 int break_on_sync = 0;
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	171 int save_state = 0;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	172
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	173 //#define DO_DEBUG_PRINT
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	174 #ifdef DO_DEBUG_PRINT
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	175 #define dprintf printf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	176 #define dputs puts
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	177 #else
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	178 #define dprintf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	179 #define dputs
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	180 #endif
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	181
402 de2c085ce174 Assert z80 interrupt longer so that they are not missed when they should not be Mike Pavone <pavone@retrodev.com> parents: 398 diff changeset	182 #define Z80_VINT_DURATION 128
de2c085ce174 Assert z80 interrupt longer so that they are not missed when they should not be Mike Pavone <pavone@retrodev.com> parents: 398 diff changeset	183
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	184 void z80_next_int_pulse(z80_context * z_context)
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	185 {
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 680 559 diff changeset	186 genesis_context * gen = z_context->system;
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	187 z_context->int_pulse_start = vdp_next_vint_z80(gen->vdp);
670 f4f3e74b0ce6 Restore Z80 interrupt pulse duration and make a small improvement to debug print output Michael Pavone <pavone@retrodev.com> parents: 669 diff changeset	188 z_context->int_pulse_end = z_context->int_pulse_start + Z80_VINT_DURATION * MCLKS_PER_Z80;
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 680 559 diff changeset	189 }
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	190
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	191 void sync_z80(z80_context * z_context, uint32_t mclks)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	192 {
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	193 #ifndef NO_Z80
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	194 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	195 z80_run(z_context, mclks);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	196 } else
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	197 #endif
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	198 {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	199 z_context->current_cycle = mclks;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	200 }
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	201 }
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	202
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	203 void sync_sound(genesis_context * gen, uint32_t target)
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	204 {
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	205 //printf("YM \| Cycle: %d, bpos: %d, PSG \| Cycle: %d, bpos: %d\n", gen->ym->current_cycle, gen->ym->buffer_pos, gen->psg->cycles, gen->psg->buffer_pos * 2);
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	206 while (target > gen->psg->cycles && target - gen->psg->cycles > MAX_SOUND_CYCLES) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	207 uint32_t cur_target = gen->psg->cycles + MAX_SOUND_CYCLES;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	208 //printf("Running PSG to cycle %d\n", cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	209 psg_run(gen->psg, cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	210 //printf("Running YM-2612 to cycle %d\n", cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	211 ym_run(gen->ym, cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	212 }
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	213 psg_run(gen->psg, target);
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	214 ym_run(gen->ym, target);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	215
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	216 //printf("Target: %d, YM bufferpos: %d, PSG bufferpos: %d\n", target, gen->ym->buffer_pos, gen->psg->buffer_pos * 2);
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	217 }
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	218
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	219 uint32_t last_frame_num;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	220 m68k_context * sync_components(m68k_context * context, uint32_t address)
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	221 {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	222 genesis_context * gen = context->system;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	223 vdp_context * v_context = gen->vdp;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	224 z80_context * z_context = gen->z80;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	225 uint32_t mclks = context->current_cycle;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	226 sync_z80(z_context, mclks);
695 e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	227 sync_sound(gen, mclks);
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	228 while (context->current_cycle > mclks) {
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	229 mclks = context->current_cycle;
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	230 sync_z80(z_context, mclks);
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	231 sync_sound(gen, mclks);
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	232 }
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	233 vdp_run_context(v_context, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	234 if (v_context->frame != last_frame_num) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	235 //printf("reached frame end %d \| MCLK Cycles: %d, Target: %d, VDP cycles: %d, vcounter: %d, hslot: %d\n", last_frame_num, mclks, gen->frame_end, v_context->cycles, v_context->vcounter, v_context->hslot);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	236 last_frame_num = v_context->frame;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	237
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	238 if (!headless) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	239 break_on_sync \|= wait_render_frame(v_context, frame_limit);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	240 } else if(exit_after){
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	241 --exit_after;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	242 if (!exit_after) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	243 exit(0);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	244 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	245 }
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	246
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	247 vdp_adjust_cycles(v_context, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	248 io_adjust_cycles(gen->ports, context->current_cycle, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	249 io_adjust_cycles(gen->ports+1, context->current_cycle, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	250 io_adjust_cycles(gen->ports+2, context->current_cycle, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	251 context->current_cycle -= mclks;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	252 z80_adjust_cycles(z_context, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	253 gen->ym->current_cycle -= mclks;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	254 gen->psg->cycles -= mclks;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	255 if (gen->ym->write_cycle != CYCLE_NEVER) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	256 gen->ym->write_cycle = gen->ym->write_cycle >= mclks ? gen->ym->write_cycle - mclks : 0;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	257 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	258 }
700 72ab94527a8a Tiny cleanup Michael Pavone <pavone@retrodev.com> parents: 697 diff changeset	259 gen->frame_end = vdp_cycles_to_frame_end(v_context);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	260 context->sync_cycle = gen->frame_end;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	261 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	262 if (context->int_ack) {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	263 //printf("acknowledging %d @ %d:%d, vcounter: %d, hslot: %d\n", context->int_ack, context->current_cycle, v_context->cycles, v_context->vcounter, v_context->hslot);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	264 vdp_int_ack(v_context, context->int_ack);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	265 context->int_ack = 0;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	266 }
721 20be7d01e312 Better handling of savestate and debug break events with "uncooperative" games/demos Michael Pavone <pavone@retrodev.com> parents: 719 diff changeset	267 if (!address && (break_on_sync \|\| save_state)) {
20be7d01e312 Better handling of savestate and debug break events with "uncooperative" games/demos Michael Pavone <pavone@retrodev.com> parents: 719 diff changeset	268 context->sync_cycle = context->current_cycle + 1;
20be7d01e312 Better handling of savestate and debug break events with "uncooperative" games/demos Michael Pavone <pavone@retrodev.com> parents: 719 diff changeset	269 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	270 adjust_int_cycle(context, v_context);
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	271 if (address) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	272 if (break_on_sync) {
695 e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	273 break_on_sync = 0;
e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	274 debugger(context, address);
e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	275 }
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	276 if (save_state && (z_context->pc \|\| (!z_context->reset && !z_context->busreq))) {
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	277 save_state = 0;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	278 //advance Z80 core to the start of an instruction
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	279 while (!z_context->pc)
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	280 {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	281 sync_z80(z_context, z_context->current_cycle + MCLKS_PER_Z80);
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	282 }
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	283 save_gst(gen, "savestate.gst", address);
721 20be7d01e312 Better handling of savestate and debug break events with "uncooperative" games/demos Michael Pavone <pavone@retrodev.com> parents: 719 diff changeset	284 puts("Saved state to savestate.gst");
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	285 } else if(save_state) {
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	286 context->sync_cycle = context->current_cycle + 1;
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	287 }
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	288 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	289 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	290 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	291
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	292 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	293 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	294 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	295 printf("machine freeze due to write to address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	296 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	297 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	298 vdp_port &= 0x1F;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	299 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle);
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	300 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	301 vdp_context * v_context = context->video_context;
508 b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	302 genesis_context * gen = context->system;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	303 if (vdp_port < 0x10) {
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	304 int blocked;
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	305 uint32_t before_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	306 if (vdp_port < 4) {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	307
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	308 while (vdp_data_port_write(v_context, value) < 0) {
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	309 while(v_context->flags & FLAG_DMA_RUN) {
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	310 vdp_run_dma_done(v_context, gen->frame_end);
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	311 if (v_context->cycles >= gen->frame_end) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	312 context->current_cycle = v_context->cycles;
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	313 gen->bus_busy = 1;
534 c641006da28e Properly sync hardware when frame end is reached during DMA Mike Pavone <pavone@retrodev.com> parents: 531 diff changeset	314 sync_components(context, 0);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	315 gen->bus_busy = 0;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	316 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	317 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	318 //context->current_cycle = v_context->cycles;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	319 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	320 } else if(vdp_port < 8) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	321 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	322 if (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	323 while (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	324 while(v_context->flags & FLAG_DMA_RUN) {
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	325 vdp_run_dma_done(v_context, gen->frame_end);
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	326 if (v_context->cycles >= gen->frame_end) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	327 context->current_cycle = v_context->cycles;
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	328 gen->bus_busy = 1;
534 c641006da28e Properly sync hardware when frame end is reached during DMA Mike Pavone <pavone@retrodev.com> parents: 531 diff changeset	329 sync_components(context, 0);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	330 gen->bus_busy = 0;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	331 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	332 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	333 if (blocked < 0) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	334 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	335 } else {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	336 blocked = 0;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	337 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	338 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	339 } else {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	340 context->sync_cycle = gen->frame_end = vdp_cycles_to_frame_end(v_context);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	341 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot);
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	342 adjust_int_cycle(context, v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	343 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	344 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	345 printf("Illegal write to HV Counter port %X\n", vdp_port);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	346 exit(1);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	347 }
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	348 if (v_context->cycles != before_cycle) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	349 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for write\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	350 context->current_cycle = v_context->cycles;
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	351 //Lock the Z80 out of the bus until the VDP access is complete
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	352 gen->bus_busy = 1;
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	353 sync_z80(gen->z80, v_context->cycles);
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	354 gen->bus_busy = 0;
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	355 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	356 } else if (vdp_port < 0x18) {
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	357 psg_write(gen->psg, value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	358 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	359 //TODO: Implement undocumented test register(s)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	360 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	361 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	362 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	363
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	364 m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	365 {
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	366 return vdp_port_write(vdp_port, context, vdp_port < 0x10 ? value \| value << 8 : ((vdp_port & 1) ? value : 0));
fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	367 }
fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	368
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	369 void * z80_vdp_port_write(uint32_t vdp_port, void * vcontext, uint8_t value)
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	370 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	371 z80_context * context = vcontext;
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	372 genesis_context * gen = context->system;
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	373 vdp_port &= 0xFF;
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	374 if (vdp_port & 0xE0) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	375 printf("machine freeze due to write to Z80 address %X\n", 0x7F00 \| vdp_port);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	376 exit(1);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	377 }
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	378 if (vdp_port < 0x10) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	379 //These probably won't currently interact well with the 68K accessing the VDP
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	380 vdp_run_context(gen->vdp, context->current_cycle);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	381 if (vdp_port < 4) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	382 vdp_data_port_write(gen->vdp, value << 8 \| value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	383 } else if (vdp_port < 8) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	384 vdp_control_port_write(gen->vdp, value << 8 \| value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	385 } else {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	386 printf("Illegal write to HV Counter port %X\n", vdp_port);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	387 exit(1);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	388 }
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	389 } else if (vdp_port < 0x18) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	390 sync_sound(gen, context->current_cycle);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	391 psg_write(gen->psg, value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	392 } else {
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	393 vdp_test_port_write(gen->vdp, value);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	394 }
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	395 return context;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	396 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	397
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	398 uint16_t vdp_port_read(uint32_t vdp_port, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	399 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	400 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	401 printf("machine freeze due to read from address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	402 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	403 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	404 vdp_port &= 0x1F;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	405 uint16_t value;
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	406 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	407 vdp_context * v_context = context->video_context;
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	408 uint32_t before_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	409 if (vdp_port < 0x10) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	410 if (vdp_port < 4) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	411 value = vdp_data_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	412 } else if(vdp_port < 8) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	413 value = vdp_control_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	414 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	415 value = vdp_hv_counter_read(v_context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	416 //printf("HV Counter: %X at cycle %d\n", value, v_context->cycles);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	417 }
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	418 } else if (vdp_port < 0x18){
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	419 printf("Illegal read from PSG port %X\n", vdp_port);
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	420 exit(1);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	421 } else {
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	422 value = vdp_test_port_read(v_context);
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	423 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	424 if (v_context->cycles != before_cycle) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	425 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for read\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	426 context->current_cycle = v_context->cycles;
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	427 //Lock the Z80 out of the bus until the VDP access is complete
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	428 genesis_context *gen = context->system;
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	429 gen->bus_busy = 1;
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	430 sync_z80(gen->z80, v_context->cycles);
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	431 gen->bus_busy = 0;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	432 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	433 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	434 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	435
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	436 uint8_t vdp_port_read_b(uint32_t vdp_port, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	437 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	438 uint16_t value = vdp_port_read(vdp_port, context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	439 if (vdp_port & 1) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	440 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	441 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	442 return value >> 8;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	443 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	444 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	445
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	446 uint8_t z80_vdp_port_read(uint32_t vdp_port, void * vcontext)
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	447 {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	448 z80_context * context = vcontext;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	449 if (vdp_port & 0xE0) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	450 printf("machine freeze due to read from Z80 address %X\n", 0x7F00 \| vdp_port);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	451 exit(1);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	452 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	453 genesis_context * gen = context->system;
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	454 //VDP access goes over the 68K bus like a bank area access
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	455 //typical delay from bus arbitration
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	456 context->current_cycle += 3 * MCLKS_PER_Z80;
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	457 //TODO: add cycle for an access right after a previous one
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	458 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	459 // Needs a new logic analyzer capture to get the actual delay on the 68K side
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	460 gen->m68k->current_cycle += 8 * MCLKS_PER_68K;
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	461
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	462
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	463 vdp_port &= 0x1F;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	464 uint16_t ret;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	465 if (vdp_port < 0x10) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	466 //These probably won't currently interact well with the 68K accessing the VDP
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	467 vdp_run_context(gen->vdp, context->current_cycle);
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	468 if (vdp_port < 4) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	469 ret = vdp_data_port_read(gen->vdp);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	470 } else if (vdp_port < 8) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	471 ret = vdp_control_port_read(gen->vdp);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	472 } else {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	473 printf("Illegal write to HV Counter port %X\n", vdp_port);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	474 exit(1);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	475 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	476 } else {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	477 //TODO: Figure out the correct value today
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	478 ret = 0xFFFF;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	479 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	480 return vdp_port & 1 ? ret : ret >> 8;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	481 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	482
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	483 uint32_t zram_counter = 0;
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	484
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	485 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	486 {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	487 genesis_context * gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	488 if (location < 0x10000) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	489 if (!z80_enabled \|\| z80_get_busack(gen->z80, context->current_cycle)) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	490 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	491 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	492 z80_ram[location & 0x1FFF] = value;
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	493 #ifndef NO_Z80
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	494 z80_handle_code_write(location & 0x1FFF, gen->z80);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	495 #endif
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	496 } else if (location < 0x6000) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	497 sync_sound(gen, context->current_cycle);
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	498 if (location & 1) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	499 ym_data_write(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	500 } else if(location & 2) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	501 ym_address_write_part2(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	502 } else {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	503 ym_address_write_part1(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	504 }
405 042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	505 } else if (location == 0x6000) {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	506 gen->z80->bank_reg = (gen->z80->bank_reg >> 1 \| value << 8) & 0x1FF;
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	507 if (gen->z80->bank_reg < 0x80) {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	508 gen->z80->mem_pointers[1] = (gen->z80->bank_reg << 15) + ((char *)gen->z80->mem_pointers[2]);
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	509 } else {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	510 gen->z80->mem_pointers[1] = NULL;
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	511 }
395 0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	512 } else {
0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	513 printf("68K write to unhandled Z80 address %X\n", location);
0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	514 exit(1);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	515 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	516 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	517 } else {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	518 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	519 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	520 switch(location/2)
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	521 {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	522 case 0x1:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	523 io_data_write(gen->ports, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	524 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	525 case 0x2:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	526 io_data_write(gen->ports+1, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	527 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	528 case 0x3:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	529 io_data_write(gen->ports+2, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	530 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	531 case 0x4:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	532 gen->ports[0].control = value;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	533 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	534 case 0x5:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	535 gen->ports[1].control = value;
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	536 break;
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	537 case 0x6:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	538 gen->ports[2].control = value;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	539 break;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	540 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	541 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	542 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	543 if (value & 1) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	544 dputs("bus requesting Z80");
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	545 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	546 z80_assert_busreq(gen->z80, context->current_cycle);
677 687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	547 } else {
687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	548 gen->z80->busack = 1;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	549 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	550 } else {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	551 if (gen->z80->busreq) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	552 dputs("releasing z80 bus");
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	553 #ifdef DO_DEBUG_PRINT
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	554 char fname[20];
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	555 sprintf(fname, "zram-%d", zram_counter++);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	556 FILE * f = fopen(fname, "wb");
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	557 fwrite(z80_ram, 1, sizeof(z80_ram), f);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	558 fclose(f);
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	559 #endif
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	560 }
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	561 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	562 z80_clear_busreq(gen->z80, context->current_cycle);
677 687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	563 } else {
687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	564 gen->z80->busack = 0;
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	565 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	566 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	567 } else if (location == 0x1200) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	568 sync_z80(gen->z80, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	569 if (value & 1) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	570 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	571 z80_clear_reset(gen->z80, context->current_cycle);
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	572 } else {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	573 gen->z80->reset = 0;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	574 }
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	575 } else {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	576 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	577 z80_assert_reset(gen->z80, context->current_cycle);
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	578 } else {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	579 gen->z80->reset = 1;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	580 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	581 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	582 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	583 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	584 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	585 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	586 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	587
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	588 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	589 {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	590 if (location < 0x10000 \|\| (location & 0x1FFF) >= 0x100) {
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	591 return io_write(location, context, value >> 8);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	592 } else {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	593 return io_write(location, context, value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	594 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	595 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	596
130 0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	597 #define USA 0x80
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	598 #define JAP 0x00
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	599 #define EUR 0xC0
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	600 #define NO_DISK 0x20
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	601 uint8_t version_reg = NO_DISK \| USA;
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	602
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	603 uint8_t io_read(uint32_t location, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	604 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	605 uint8_t value;
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	606 genesis_context *gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	607 if (location < 0x10000) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	608 if (!z80_enabled \|\| z80_get_busack(gen->z80, context->current_cycle)) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	609 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	610 if (location < 0x4000) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	611 value = z80_ram[location & 0x1FFF];
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	612 } else if (location < 0x6000) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	613 sync_sound(gen, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	614 value = ym_read_status(gen->ym);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	615 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	616 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	617 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	618 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	619 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	620 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	621 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	622 location &= 0x1FFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	623 if (location < 0x100) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	624 switch(location/2)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	625 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	626 case 0x0:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	627 //version bits should be 0 for now since we're not emulating TMSS
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	628 value = version_reg;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	629 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	630 case 0x1:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	631 value = io_data_read(gen->ports, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	632 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	633 case 0x2:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	634 value = io_data_read(gen->ports+1, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	635 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	636 case 0x3:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	637 value = io_data_read(gen->ports+2, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	638 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	639 case 0x4:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	640 value = gen->ports[0].control;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	641 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	642 case 0x5:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	643 value = gen->ports[1].control;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	644 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	645 case 0x6:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	646 value = gen->ports[2].control;
405 042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	647 break;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	648 default:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	649 value = 0xFF;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	650 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	651 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	652 if (location == 0x1100) {
677 687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	653 value = z80_enabled ? !z80_get_busack(gen->z80, context->current_cycle) : !gen->z80->busack;
753 cee1275f5d08 Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values Michael Pavone <pavone@retrodev.com> parents: 752 diff changeset	654 //TODO: actual pre-fetch emulation
cee1275f5d08 Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values Michael Pavone <pavone@retrodev.com> parents: 752 diff changeset	655 value \|= 0x4E;
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	656 dprintf("Byte read of BUSREQ returned %d @ %d (reset: %d)\n", value, context->current_cycle, gen->z80->reset);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	657 } else if (location == 0x1200) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	658 value = !gen->z80->reset;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	659 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	660 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	661 printf("Byte read of unknown IO location: %X\n", location);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	662 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	663 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	664 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	665 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	666 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	667
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	668 uint16_t io_read_w(uint32_t location, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	669 {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	670 uint16_t value = io_read(location, context);
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	671 if (location < 0x10000 \|\| (location & 0x1FFF) < 0x100) {
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	672 value = value \| (value << 8);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	673 } else {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	674 value <<= 8;
753 cee1275f5d08 Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values Michael Pavone <pavone@retrodev.com> parents: 752 diff changeset	675 //TODO: actual pre-fetch emulation
cee1275f5d08 Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values Michael Pavone <pavone@retrodev.com> parents: 752 diff changeset	676 value \|= 0x73;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	677 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	678 return value;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	679 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	680
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	681 void * z80_write_ym(uint32_t location, void * vcontext, uint8_t value)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	682 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	683 z80_context * context = vcontext;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	684 genesis_context * gen = context->system;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	685 sync_sound(gen, context->current_cycle);
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	686 if (location & 1) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	687 ym_data_write(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	688 } else if (location & 2) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	689 ym_address_write_part2(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	690 } else {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	691 ym_address_write_part1(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	692 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	693 return context;
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	694 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	695
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	696 uint8_t z80_read_ym(uint32_t location, void * vcontext)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	697 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	698 z80_context * context = vcontext;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	699 genesis_context * gen = context->system;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	700 sync_sound(gen, context->current_cycle);
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	701 return ym_read_status(gen->ym);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	702 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	703
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	704 uint8_t z80_read_bank(uint32_t location, void * vcontext)
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	705 {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	706 z80_context * context = vcontext;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	707 genesis_context *gen = context->system;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	708 if (gen->bus_busy) {
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	709 context->current_cycle = context->sync_cycle;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	710 }
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	711 //typical delay from bus arbitration
671 8ad39a2b0bce Fix bank area access delay for master clock change Michael Pavone <pavone@retrodev.com> parents: 670 diff changeset	712 context->current_cycle += 3 * MCLKS_PER_Z80;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	713 //TODO: add cycle for an access right after a previous one
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	714 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	715 // Needs a new logic analyzer capture to get the actual delay on the 68K side
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	716 gen->m68k->current_cycle += 8 * MCLKS_PER_68K;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	717
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	718 location &= 0x7FFF;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	719 if (context->mem_pointers[1]) {
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	720 return context->mem_pointers[1][location ^ 1];
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	721 }
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	722 uint32_t address = context->bank_reg << 15 \| location;
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	723 if (address >= 0xC00000 && address < 0xE00000) {
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	724 return z80_vdp_port_read(location & 0xFF, context);
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	725 } else {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	726 fprintf(stderr, "Unhandled read by Z80 from address %X through banked memory area (%X)\n", address, context->bank_reg << 15);
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	727 }
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	728 return 0;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	729 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	730
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	731 void z80_write_bank(uint32_t location, void vcontext, uint8_t value)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	732 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	733 z80_context * context = vcontext;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	734 genesis_context *gen = context->system;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	735 if (gen->bus_busy) {
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	736 context->current_cycle = context->sync_cycle;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	737 }
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	738 //typical delay from bus arbitration
671 8ad39a2b0bce Fix bank area access delay for master clock change Michael Pavone <pavone@retrodev.com> parents: 670 diff changeset	739 context->current_cycle += 3 * MCLKS_PER_Z80;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	740 //TODO: add cycle for an access right after a previous one
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	741 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	742 // Needs a new logic analyzer capture to get the actual delay on the 68K side
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	743 gen->m68k->current_cycle += 8 * MCLKS_PER_68K;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	744
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	745 location &= 0x7FFF;
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	746 uint32_t address = context->bank_reg << 15 \| location;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	747 if (address >= 0xE00000) {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	748 address &= 0xFFFF;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	749 ((uint8_t *)ram)[address ^ 1] = value;
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	750 } else if (address >= 0xC00000) {
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	751 z80_vdp_port_write(location & 0xFF, context, value);
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	752 } else {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	753 fprintf(stderr, "Unhandled write by Z80 to address %X through banked memory area\n", address);
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	754 }
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	755 return context;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	756 }
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	757
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	758 void z80_write_bank_reg(uint32_t location, void vcontext, uint8_t value)
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	759 {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	760 z80_context * context = vcontext;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	761
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	762 context->bank_reg = (context->bank_reg >> 1 \| value << 8) & 0x1FF;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	763 if (context->bank_reg < 0x80) {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	764 genesis_context *gen = context->system;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	765 context->mem_pointers[1] = get_native_pointer(context->bank_reg << 15, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen);
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	766 } else {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	767 context->mem_pointers[1] = NULL;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	768 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	769
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	770 return context;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	771 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	772
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	773 void set_speed_percent(genesis_context * context, uint32_t percent)
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	774 {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	775 uint32_t old_clock = context->master_clock;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	776 context->master_clock = ((uint64_t)context->normal_clock * (uint64_t)percent) / 100;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	777 while (context->ym->current_cycle != context->psg->cycles) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	778 sync_sound(context, context->psg->cycles + MCLKS_PER_PSG);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	779 }
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	780 ym_adjust_master_clock(context->ym, context->master_clock);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	781 psg_adjust_master_clock(context->psg, context->master_clock);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	782 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	783
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	784 #define MAX_MAP_CHUNKS (4+7+1)
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	785
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	786 const memmap_chunk base_map[] = {
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	787 {0xE00000, 0x1000000, 0xFFFF, 0, MMAP_READ \| MMAP_WRITE \| MMAP_CODE, ram,
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	788 NULL, NULL, NULL, NULL},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	789 {0xC00000, 0xE00000, 0x1FFFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	790 (read_16_fun)vdp_port_read, (write_16_fun)vdp_port_write,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	791 (read_8_fun)vdp_port_read_b, (write_8_fun)vdp_port_write_b},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	792 {0xA00000, 0xA12000, 0x1FFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	793 (read_16_fun)io_read_w, (write_16_fun)io_write_w,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	794 (read_8_fun)io_read, (write_8_fun)io_write}
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	795 };
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	796
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	797 char * save_filename;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	798 genesis_context * genesis;
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	799 void persist_save()
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	800 {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	801 FILE * f = fopen(save_filename, "wb");
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	802 if (!f) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	803 fprintf(stderr, "Failed to open %s file %s for writing\n", genesis->save_type == SAVE_I2C ? "EEPROM" : "SRAM", save_filename);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	804 return;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	805 }
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	806 fwrite(genesis->save_storage, 1, genesis->save_size, f);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	807 fclose(f);
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	808 printf("Saved %s to %s\n", genesis->save_type == SAVE_I2C ? "EEPROM" : "SRAM", save_filename);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	809 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	810
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	811 void init_run_cpu(genesis_context * gen, rom_info rom, FILE address_log, char * statefile, uint8_t * debugger)
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	812 {
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 565 diff changeset	813 m68k_options opts;
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	814
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	815 gen->save_type = rom->save_type;
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	816 if (gen->save_type != SAVE_NONE) {
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	817 gen->save_ram_mask = rom->save_mask;
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	818 gen->save_size = rom->save_size;
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	819 gen->save_storage = rom->save_buffer;
769 4638b88bc72d Initial work on I2C EEPROM implementation Michael Pavone <pavone@retrodev.com> parents: 767 diff changeset	820 gen->eeprom_map = rom->eeprom_map;
4638b88bc72d Initial work on I2C EEPROM implementation Michael Pavone <pavone@retrodev.com> parents: 767 diff changeset	821 gen->num_eeprom = rom->num_eeprom;
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	822 FILE * f = fopen(save_filename, "rb");
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	823 if (f) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	824 uint32_t read = fread(gen->save_storage, 1, rom->save_size, f);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	825 fclose(f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	826 if (read > 0) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	827 printf("Loaded %s from %s\n", rom->save_type == SAVE_I2C ? "EEPROM" : "SRAM", save_filename);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	828 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	829 }
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	830 atexit(persist_save);
769 4638b88bc72d Initial work on I2C EEPROM implementation Michael Pavone <pavone@retrodev.com> parents: 767 diff changeset	831 if (gen->save_type == SAVE_I2C) {
770 a3b90f746dcf Broken EEPROM support Michael Pavone <pavone@retrodev.com> parents: 769 diff changeset	832 eeprom_init(&gen->eeprom, gen->save_storage, gen->save_size);
769 4638b88bc72d Initial work on I2C EEPROM implementation Michael Pavone <pavone@retrodev.com> parents: 767 diff changeset	833 }
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	834 } else {
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	835 gen->save_storage = NULL;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	836 }
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	837
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	838 init_m68k_opts(&opts, rom->map, rom->map_chunks, MCLKS_PER_68K);
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	839 opts.address_log = address_log;
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	840 m68k_context *context = init_68k_context(&opts);
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	841 gen->m68k = context;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	842
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	843 context->video_context = gen->vdp;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	844 context->system = gen;
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	845 for (int i = 0; i < rom->map_chunks; i++)
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	846 {
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	847 if (rom->map[i].flags & MMAP_PTR_IDX) {
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	848 context->mem_pointers[rom->map[i].ptr_index] = rom->map[i].buffer;
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	849 }
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	850 }
752 296ddfcf0d43 Minor cleanup in init_run_cpu Michael Pavone <pavone@retrodev.com> parents: 736 diff changeset	851
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	852 if (statefile) {
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	853 uint32_t pc = load_gst(gen, statefile);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	854 if (!pc) {
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	855 fprintf(stderr, "Failed to load save state %s\n", statefile);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	856 exit(1);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	857 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	858 printf("Loaded %s\n", statefile);
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	859 if (debugger) {
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	860 insert_breakpoint(context, pc, debugger);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	861 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	862 adjust_int_cycle(gen->m68k, gen->vdp);
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	863 start_68k_context(context, pc);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	864 } else {
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	865 if (debugger) {
752 296ddfcf0d43 Minor cleanup in init_run_cpu Michael Pavone <pavone@retrodev.com> parents: 736 diff changeset	866 uint32_t address = cart[2] << 16 \| cart[3];
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	867 insert_breakpoint(context, address, debugger);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	868 }
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	869 m68k_reset(context);
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	870 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	871 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	872
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	873 char *title;
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	874
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	875 void update_title(char *rom_name)
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	876 {
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	877 if (title) {
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	878 free(title);
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	879 title = NULL;
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	880 }
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	881 title = alloc_concat(rom_name, " - BlastEm");
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	882 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	883
765 dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	884 void set_region(rom_info *info, uint8_t region)
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	885 {
765 dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	886 if (!region) {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	887 char * def_region = tern_find_ptr(config, "default_region");
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	888 if (def_region && (!info->regions \|\| (info->regions & translate_region_char(toupper(*def_region))))) {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	889 region = translate_region_char(toupper(*def_region));
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	890 } else {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	891 region = info->regions;
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	892 }
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	893 }
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	894 if (region & REGION_E) {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	895 version_reg = NO_DISK \| EUR;
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	896 } else if (region & REGION_J) {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	897 version_reg = NO_DISK \| JAP;
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	898 } else {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	899 version_reg = NO_DISK \| USA;
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	900 }
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	901 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	902
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	903 #ifndef NO_Z80
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	904 const memmap_chunk z80_map[] = {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	905 { 0x0000, 0x4000, 0x1FFF, 0, MMAP_READ \| MMAP_WRITE \| MMAP_CODE, z80_ram, NULL, NULL, NULL, NULL },
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	906 { 0x8000, 0x10000, 0x7FFF, 0, 0, NULL, NULL, NULL, z80_read_bank, z80_write_bank},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	907 { 0x4000, 0x6000, 0x0003, 0, 0, NULL, NULL, NULL, z80_read_ym, z80_write_ym},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	908 { 0x6000, 0x6100, 0xFFFF, 0, 0, NULL, NULL, NULL, NULL, z80_write_bank_reg},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	909 { 0x7F00, 0x8000, 0x00FF, 0, 0, NULL, NULL, NULL, z80_vdp_port_read, z80_vdp_port_write}
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	910 };
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	911 #endif
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	912
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	913 int main(int argc, char ** argv)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	914 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	915 if (argc < 2) {
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	916 fputs("Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n", stderr);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	917 return 1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	918 }
496 6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	919 set_exe_str(argv[0]);
6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	920 config = load_config();
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	921 int width = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	922 int height = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	923 int debug = 0;
407 c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	924 int ym_log = 0;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	925 int loaded = 0;
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	926 uint8_t force_version = 0;
5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	927 char * romfname = NULL;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	928 FILE *address_log = NULL;
425 8b3ae850d1c4 Forgot to null initialize the statfile pointer Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	929 char * statefile = NULL;
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	930 int rom_size;
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	931 uint8_t * debuggerfun = NULL;
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	932 uint8_t fullscreen = 0, use_gl = 1;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	933 for (int i = 1; i < argc; i++) {
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	934 if (argv[i][0] == '-') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	935 switch(argv[i][1]) {
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	936 case 'b':
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	937 i++;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	938 if (i >= argc) {
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	939 fputs("-b must be followed by a frame count\n", stderr);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	940 return 1;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	941 }
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	942 headless = 1;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	943 exit_after = atoi(argv[i]);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	944 break;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	945 case 'd':
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	946 debuggerfun = (uint8_t *)debugger;
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	947 break;
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	948 case 'D':
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	949 gdb_remote_init();
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	950 debuggerfun = (uint8_t *)gdb_debug_enter;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	951 break;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	952 case 'f':
444 cc754a309ead Add fullscreen support and add a keybinding for exiting the emulator Mike Pavone <pavone@retrodev.com> parents: 434 diff changeset	953 fullscreen = 1;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	954 break;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	955 case 'g':
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	956 use_gl = 0;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	957 break;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	958 case 'l':
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	959 address_log = fopen("address.log", "w");
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	960 break;
464 226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	961 case 'v':
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	962 printf("blastem %s\n", BLASTEM_VERSION);
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	963 return 0;
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	964 break;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	965 case 'n':
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	966 z80_enabled = 0;
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	967 break;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	968 case 'r':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	969 i++;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	970 if (i >= argc) {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	971 fputs("-r must be followed by region (J, U or E)\n", stderr);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	972 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	973 }
765 dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	974 force_version = translate_region_char(toupper(argv[i][0]));
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	975 if (!force_version) {
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	976 fprintf(stderr, "'%c' is not a valid region character for the -r option\n", argv[i][0]);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	977 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	978 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	979 break;
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	980 case 's':
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	981 i++;
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	982 if (i >= argc) {
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	983 fputs("-s must be followed by a savestate filename\n", stderr);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	984 return 1;
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	985 }
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	986 statefile = argv[i];
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	987 break;
407 c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	988 case 'y':
c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	989 ym_log = 1;
c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	990 break;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	991 case 'h':
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	992 puts(
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	993 "Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	994 "Options:\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	995 " -h Print this help text\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	996 " -r (J\|U\|E) Force region to Japan, US or Europe respectively\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	997 " -f Start in fullscreen mode\n"
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	998 " -g Disable OpenGL rendering\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	999 " -s FILE Load a GST format savestate from FILE\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1000 " -d Enter debugger on startup\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1001 " -n Disable Z80\n"
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	1002 " -v Display version number and exit\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1003 " -l Log 68K code addresses (useful for assemblers)\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1004 " -y Log individual YM-2612 channels to WAVE files\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1005 );
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1006 return 0;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1007 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1008 fprintf(stderr, "Unrecognized switch %s\n", argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1009 return 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1010 }
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1011 } else if (!loaded) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1012 if (!(rom_size = load_rom(argv[i]))) {
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1013 fprintf(stderr, "Failed to open %s for reading\n", argv[i]);
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1014 return 1;
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1015 }
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1016 romfname = argv[i];
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1017 loaded = 1;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1018 } else if (width < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1019 width = atoi(argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1020 } else if (height < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1021 height = atoi(argv[i]);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1022 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1023 }
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1024 if (!loaded) {
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1025 fputs("You must specify a ROM filename!\n", stderr);
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1026 return 1;
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1027 }
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	1028 tern_node *rom_db = load_rom_db();
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1029 rom_info info = configure_rom(rom_db, cart, rom_size, base_map, sizeof(base_map)/sizeof(base_map[0]));
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	1030 byteswap_rom(rom_size);
765 dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	1031 set_region(&info, force_version);
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	1032 update_title(info.name);
433 ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1033 int def_width = 0;
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	1034 char *config_width = tern_find_path(config, "video\0width\0").ptrval;
433 ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1035 if (config_width) {
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1036 def_width = atoi(config_width);
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1037 }
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1038 if (!def_width) {
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1039 def_width = 640;
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1040 }
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1041 width = width < 320 ? def_width : width;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1042 height = height < 240 ? (width/320) * 240 : height;
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1043 uint32_t fps = 60;
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1044 if (version_reg & 0x40) {
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1045 fps = 50;
15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1046 }
15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1047 if (!headless) {
719 019d27995e32 Upgrade to SDL 2.0 and drop support for the non-OpenGL render path Michael Pavone <pavone@retrodev.com> parents: 718 diff changeset	1048 render_init(width, height, title, fps, fullscreen);
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1049 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1050 vdp_context v_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1051 genesis_context gen;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1052 memset(&gen, 0, sizeof(gen));
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1053 gen.master_clock = gen.normal_clock = fps == 60 ? MCLKS_NTSC : MCLKS_PAL;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1054
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1055 init_vdp_context(&v_context, version_reg & 0x40);
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	1056 gen.frame_end = vdp_cycles_to_frame_end(&v_context);
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	1057 char * config_cycles = tern_find_path(config, "clocks\0max_cycles\0").ptrval;
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	1058 gen.max_cycles = config_cycles ? atoi(config_cycles) : 10000000;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1059
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1060 ym2612_context y_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1061 ym_init(&y_context, render_sample_rate(), gen.master_clock, MCLKS_PER_YM, render_audio_buffer(), ym_log ? YM_OPT_WAVE_LOG : 0);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1062
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1063 psg_context p_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1064 psg_init(&p_context, render_sample_rate(), gen.master_clock, MCLKS_PER_PSG, render_audio_buffer());
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1065
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1066 z80_context z_context;
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1067 #ifndef NO_Z80
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1068 z80_options z_opts;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	1069 init_z80_opts(&z_opts, z80_map, 5, MCLKS_PER_Z80);
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1070 init_z80_context(&z_context, &z_opts);
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	1071 z80_assert_reset(&z_context, 0);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1072 #endif
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1073
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1074 z_context.system = &gen;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1075 z_context.mem_pointers[0] = z80_ram;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1076 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1077
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1078 gen.z80 = &z_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1079 gen.vdp = &v_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1080 gen.ym = &y_context;
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1081 gen.psg = &p_context;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1082 genesis = &gen;
693 318ebe078315 Fix missing call to setup_io_devices Michael Pavone <pavone@retrodev.com> parents: 690 diff changeset	1083 setup_io_devices(config, gen.ports);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1084
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1085 int fname_size = strlen(romfname);
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1086 char * ext = info.save_type == SAVE_I2C ? "eeprom" : "sram";
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1087 save_filename = malloc(fname_size+strlen(ext) + 2);
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1088 memcpy(save_filename, romfname, fname_size);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1089 int i;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1090 for (i = fname_size-1; fname_size >= 0; --i) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1091 if (save_filename[i] == '.') {
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1092 strcpy(save_filename + i + 1, ext);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1093 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1094 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1095 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1096 if (i < 0) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1097 save_filename[fname_size] = '.';
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1098 strcpy(save_filename + fname_size + 1, ext);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1099 }
645 d77c79cec800 Initial support for configurable IO, custom IO and sega transfer board emulation Michael Pavone <pavone@retrodev.com> parents: 628 diff changeset	1100 set_keybindings(gen.ports);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1101
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1102 init_run_cpu(&gen, &info, address_log, statefile, debuggerfun);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1103 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1104 }

Mercurial > repos > blastem

annotate blastem.c @ 776:cbf97d335444