repos/blastem: blastem.c annotate

annotate blastem.c @ 785:0e5f14d9a579

Prep for 0.3.0 release

author	Michael Pavone <pavone@retrodev.com>
date	Tue, 21 Jul 2015 22:03:58 -0700
parents	6e1711d56633
children	283bdcd5bdb8

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	2 Copyright 2013 Michael Pavone
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 464 diff changeset	5 */
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "68kinst.h"
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 565 diff changeset	7 #include "m68k_core.h"
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	8 #include "z80_to_x86.h"
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #include "mem.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	10 #include "vdp.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	11 #include "render.h"
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	12 #include "blastem.h"
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	13 #include "gdb_remote.h"
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	14 #include "gst.h"
496 6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	15 #include "util.h"
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	16 #include "romdb.h"
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	17 #include <stdio.h>
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	18 #include <stdlib.h>
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	19 #include <string.h>
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	20
785 0e5f14d9a579 Prep for 0.3.0 release Michael Pavone <pavone@retrodev.com> parents: 778 diff changeset	21 #define BLASTEM_VERSION "0.3.0"
464 226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	22
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	23 #define MCLKS_NTSC 53693175
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	24 #define MCLKS_PAL 53203395
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	25
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	26 #define MCLKS_PER_68K 7
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	27 #define MCLKS_PER_YM MCLKS_PER_68K
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	28 #define MCLKS_PER_Z80 15
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	29 #define MCLKS_PER_PSG (MCLKS_PER_Z80*16)
785 0e5f14d9a579 Prep for 0.3.0 release Michael Pavone <pavone@retrodev.com> parents: 778 diff changeset	30 #define DEFAULT_SYNC_INTERVAL MCLKS_LINE
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	31
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	32 //TODO: Figure out the exact value for this
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	33 #define LINES_NTSC 262
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	34 #define LINES_PAL 312
13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	35
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	36 #define MAX_SOUND_CYCLES 100000
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	37
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	38 uint16_t *cart;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	39 uint16_t ram[RAM_WORDS];
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	40 uint8_t z80_ram[Z80_RAM_BYTES];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	41
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	42 int headless = 0;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	43 int exit_after = 0;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	44 int z80_enabled = 1;
356 79e4b466e7d0 Get rid of debug puts and limit based on audio rather than frame rate by default. Mike Pavone <pavone@retrodev.com> parents: 354 diff changeset	45 int frame_limit = 0;
215 2b1c2c28b261 Added headless flag to avoid initializing SDL and opening a window when running tests. Mike Pavone <pavone@retrodev.com> parents: 211 diff changeset	46
430 7f84090ab1cd Add config file parser and default config file Mike Pavone <pavone@retrodev.com> parents: 425 diff changeset	47 tern_node * config;
7f84090ab1cd Add config file parser and default config file Mike Pavone <pavone@retrodev.com> parents: 425 diff changeset	48
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	49 #ifndef MIN
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	50 #define MIN(a,b) ((a) < (b) ? (a) : (b))
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	51 #endif
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	52
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	53 #define SMD_HEADER_SIZE 512
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	54 #define SMD_MAGIC1 0x03
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	55 #define SMD_MAGIC2 0xAA
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	56 #define SMD_MAGIC3 0xBB
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	57 #define SMD_BLOCK_SIZE 0x4000
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	58
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	59 int load_smd_rom(long filesize, FILE * f)
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	60 {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	61 uint8_t block[SMD_BLOCK_SIZE];
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	62 filesize -= SMD_HEADER_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	63 fseek(f, SMD_HEADER_SIZE, SEEK_SET);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	64
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	65 uint16_t * dst = cart;
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	66 int rom_size = filesize;
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	67 while (filesize > 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	68 fread(block, 1, SMD_BLOCK_SIZE, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	69 for (uint8_t low = block, high = (block+SMD_BLOCK_SIZE/2), *end = block+SMD_BLOCK_SIZE; high < end; high++, low++) {
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	70 (dst++) = low << 8 \| *high;
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	71 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	72 filesize -= SMD_BLOCK_SIZE;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	73 }
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	74 return filesize;
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	75 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	76
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	77 void byteswap_rom(int filesize)
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	78 {
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	79 for(unsigned short * cur = cart; cur - cart < filesize/2; ++cur)
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	80 {
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	81 cur = (cur >> 8) \| (*cur << 8);
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	82 }
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	83 }
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	84
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	85 int load_rom(char * filename)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	86 {
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	87 uint8_t header[10];
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	88 FILE * f = fopen(filename, "rb");
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	89 if (!f) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	90 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	91 }
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	92 if (sizeof(header) != fread(header, 1, sizeof(header), f)) {
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	93 fprintf(stderr, "Error reading from %s\n", filename);
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	94 exit(1);
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	95 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	96 fseek(f, 0, SEEK_END);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	97 long filesize = ftell(f);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	98 fseek(f, 0, SEEK_SET);
166 97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	99 if (header[1] == SMD_MAGIC1 && header[8] == SMD_MAGIC2 && header[9] == SMD_MAGIC3) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	100 int i;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	101 for (i = 3; i < 8; i++) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	102 if (header[i] != 0) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	103 break;
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	104 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	105 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	106 if (i == 8) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	107 if (header[2]) {
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	108 fprintf(stderr, "%s is a split SMD ROM which is not currently supported", filename);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	109 exit(1);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	110 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	111 return load_smd_rom(filesize, f);
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	112 }
97aa449706c2 Added SMD ROM support Mike Pavone <pavone@retrodev.com> parents: 158 diff changeset	113 }
777 79b10b421d3c Support large flat-mapped ROMs like Bad Apple or that Mortal Kombat hack Michael Pavone <pavone@retrodev.com> parents: 776 diff changeset	114 cart = malloc(nearest_pow2(filesize));
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	115 if (filesize != fread(cart, 1, filesize, f)) {
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	116 fprintf(stderr, "Error reading from %s\n", filename);
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	117 exit(1);
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	118 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	119 fclose(f);
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	120 return filesize;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	121 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	122
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	123 uint16_t read_dma_value(uint32_t address)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	124 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	125 //addresses here are word addresses (i.e. bit 0 corresponds to A1), so no need to do div by 2
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	126 if (address < 0x200000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	127 return cart[address];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	128 } else if(address >= 0x700000) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	129 return ram[address & 0x7FFF];
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	130 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	131 //TODO: Figure out what happens when you try to DMA from weird adresses like IO or banked Z80 area
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	132 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	133 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	134
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	135 void adjust_int_cycle(m68k_context * context, vdp_context * v_context)
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	136 {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	137 //static int old_int_cycle = CYCLE_NEVER;
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	138 genesis_context *gen = context->system;
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	139 if (context->sync_cycle - context->current_cycle > gen->max_cycles) {
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	140 context->sync_cycle = context->current_cycle + gen->max_cycles;
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	141 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	142 context->int_cycle = CYCLE_NEVER;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	143 if ((context->status & 0x7) < 6) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	144 uint32_t next_vint = vdp_next_vint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	145 if (next_vint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	146 context->int_cycle = next_vint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	147 context->int_num = 6;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	148 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	149 if ((context->status & 0x7) < 4) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	150 uint32_t next_hint = vdp_next_hint(v_context);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	151 if (next_hint != CYCLE_NEVER) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	152 if (next_hint < context->int_cycle) {
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	153 context->int_cycle = next_hint;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	154 context->int_num = 4;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	155
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	156 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	157 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	158 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	159 }
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	160 /*if (context->int_cycle != old_int_cycle) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	161 printf("int cycle changed to: %d, level: %d @ %d(%d), frame: %d, vcounter: %d, hslot: %d, mask: %d, hint_counter: %d\n", context->int_cycle, context->int_num, v_context->cycles, context->current_cycle, v_context->frame, v_context->vcounter, v_context->hslot, context->status & 0x7, v_context->hint_counter);
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	162 old_int_cycle = context->int_cycle;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 700 diff changeset	163 }*/
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	164
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	165 context->target_cycle = context->int_cycle < context->sync_cycle ? context->int_cycle : context->sync_cycle;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	166 /*printf("Cyc: %d, Trgt: %d, Int Cyc: %d, Int: %d, Mask: %X, V: %d, H: %d, HICount: %d, HReg: %d, Line: %d\n",
32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	167 context->current_cycle, context->target_cycle, context->int_cycle, context->int_num, (context->status & 0x7),
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	168 v_context->regs[REG_MODE_2] & 0x20, v_context->regs[REG_MODE_1] & 0x10, v_context->hint_counter, v_context->regs[REG_HINT], v_context->cycles / MCLKS_LINE);*/
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	169 }
02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	170
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	171 int break_on_sync = 0;
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	172 int save_state = 0;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	173
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	174 //#define DO_DEBUG_PRINT
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	175 #ifdef DO_DEBUG_PRINT
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	176 #define dprintf printf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	177 #define dputs puts
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	178 #else
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	179 #define dprintf
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	180 #define dputs
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	181 #endif
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	182
402 de2c085ce174 Assert z80 interrupt longer so that they are not missed when they should not be Mike Pavone <pavone@retrodev.com> parents: 398 diff changeset	183 #define Z80_VINT_DURATION 128
de2c085ce174 Assert z80 interrupt longer so that they are not missed when they should not be Mike Pavone <pavone@retrodev.com> parents: 398 diff changeset	184
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	185 void z80_next_int_pulse(z80_context * z_context)
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	186 {
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 680 559 diff changeset	187 genesis_context * gen = z_context->system;
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	188 z_context->int_pulse_start = vdp_next_vint_z80(gen->vdp);
670 f4f3e74b0ce6 Restore Z80 interrupt pulse duration and make a small improvement to debug print output Michael Pavone <pavone@retrodev.com> parents: 669 diff changeset	189 z_context->int_pulse_end = z_context->int_pulse_start + Z80_VINT_DURATION * MCLKS_PER_Z80;
682 7ed1dbb48f61 Merge Michael Pavone <pavone@retrodev.com> parents: 680 559 diff changeset	190 }
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	191
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	192 void sync_z80(z80_context * z_context, uint32_t mclks)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	193 {
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	194 #ifndef NO_Z80
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	195 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	196 z80_run(z_context, mclks);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	197 } else
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	198 #endif
a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	199 {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	200 z_context->current_cycle = mclks;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	201 }
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	202 }
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	203
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	204 void sync_sound(genesis_context * gen, uint32_t target)
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	205 {
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	206 //printf("YM \| Cycle: %d, bpos: %d, PSG \| Cycle: %d, bpos: %d\n", gen->ym->current_cycle, gen->ym->buffer_pos, gen->psg->cycles, gen->psg->buffer_pos * 2);
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	207 while (target > gen->psg->cycles && target - gen->psg->cycles > MAX_SOUND_CYCLES) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	208 uint32_t cur_target = gen->psg->cycles + MAX_SOUND_CYCLES;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	209 //printf("Running PSG to cycle %d\n", cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	210 psg_run(gen->psg, cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	211 //printf("Running YM-2612 to cycle %d\n", cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	212 ym_run(gen->ym, cur_target);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	213 }
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	214 psg_run(gen->psg, target);
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	215 ym_run(gen->ym, target);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	216
380 1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	217 //printf("Target: %d, YM bufferpos: %d, PSG bufferpos: %d\n", target, gen->ym->buffer_pos, gen->psg->buffer_pos * 2);
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	218 }
1c8d74f2ab0b Make the PSG and YM2612 use the master clock internal with an increment based on clock divider so that they stay perflectly in sync. Run both the PSG and YM2612 whenver one of them needs to be run. Mike Pavone <pavone@retrodev.com> parents: 374 diff changeset	219
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	220 uint32_t last_frame_num;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	221 m68k_context * sync_components(m68k_context * context, uint32_t address)
6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	222 {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	223 genesis_context * gen = context->system;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	224 vdp_context * v_context = gen->vdp;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	225 z80_context * z_context = gen->z80;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	226 uint32_t mclks = context->current_cycle;
268 6c2d7e003a55 Sync Z80 on writes to busreq/reset ports. NULL out extra_pc on z80 reset Mike Pavone <pavone@retrodev.com> parents: 266 diff changeset	227 sync_z80(z_context, mclks);
695 e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	228 sync_sound(gen, mclks);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	229 vdp_run_context(v_context, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	230 if (v_context->frame != last_frame_num) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	231 //printf("reached frame end %d \| MCLK Cycles: %d, Target: %d, VDP cycles: %d, vcounter: %d, hslot: %d\n", last_frame_num, mclks, gen->frame_end, v_context->cycles, v_context->vcounter, v_context->hslot);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	232 last_frame_num = v_context->frame;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	233
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	234 if (!headless) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	235 break_on_sync \|= wait_render_frame(v_context, frame_limit);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	236 } else if(exit_after){
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	237 --exit_after;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	238 if (!exit_after) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	239 exit(0);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	240 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	241 }
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	242
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	243 vdp_adjust_cycles(v_context, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	244 io_adjust_cycles(gen->ports, context->current_cycle, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	245 io_adjust_cycles(gen->ports+1, context->current_cycle, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	246 io_adjust_cycles(gen->ports+2, context->current_cycle, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	247 context->current_cycle -= mclks;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	248 z80_adjust_cycles(z_context, mclks);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	249 gen->ym->current_cycle -= mclks;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	250 gen->psg->cycles -= mclks;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	251 if (gen->ym->write_cycle != CYCLE_NEVER) {
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	252 gen->ym->write_cycle = gen->ym->write_cycle >= mclks ? gen->ym->write_cycle - mclks : 0;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	253 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	254 }
700 72ab94527a8a Tiny cleanup Michael Pavone <pavone@retrodev.com> parents: 697 diff changeset	255 gen->frame_end = vdp_cycles_to_frame_end(v_context);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	256 context->sync_cycle = gen->frame_end;
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	257 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	258 if (context->int_ack) {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	259 //printf("acknowledging %d @ %d:%d, vcounter: %d, hslot: %d\n", context->int_ack, context->current_cycle, v_context->cycles, v_context->vcounter, v_context->hslot);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	260 vdp_int_ack(v_context, context->int_ack);
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	261 context->int_ack = 0;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 290 diff changeset	262 }
721 20be7d01e312 Better handling of savestate and debug break events with "uncooperative" games/demos Michael Pavone <pavone@retrodev.com> parents: 719 diff changeset	263 if (!address && (break_on_sync \|\| save_state)) {
20be7d01e312 Better handling of savestate and debug break events with "uncooperative" games/demos Michael Pavone <pavone@retrodev.com> parents: 719 diff changeset	264 context->sync_cycle = context->current_cycle + 1;
20be7d01e312 Better handling of savestate and debug break events with "uncooperative" games/demos Michael Pavone <pavone@retrodev.com> parents: 719 diff changeset	265 }
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	266 adjust_int_cycle(context, v_context);
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	267 if (address) {
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	268 if (break_on_sync) {
695 e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	269 break_on_sync = 0;
e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	270 debugger(context, address);
e1345921e481 Indentation fixup Michael Pavone <pavone@retrodev.com> parents: 693 diff changeset	271 }
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	272 if (save_state && (z_context->pc \|\| (!z_context->reset && !z_context->busreq))) {
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	273 save_state = 0;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	274 //advance Z80 core to the start of an instruction
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	275 while (!z_context->pc)
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	276 {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	277 sync_z80(z_context, z_context->current_cycle + MCLKS_PER_Z80);
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	278 }
b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	279 save_gst(gen, "savestate.gst", address);
721 20be7d01e312 Better handling of savestate and debug break events with "uncooperative" games/demos Michael Pavone <pavone@retrodev.com> parents: 719 diff changeset	280 puts("Saved state to savestate.gst");
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	281 } else if(save_state) {
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	282 context->sync_cycle = context->current_cycle + 1;
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	283 }
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	284 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	285 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	286 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	287
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	288 m68k_context * vdp_port_write(uint32_t vdp_port, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	289 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	290 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	291 printf("machine freeze due to write to address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	292 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	293 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	294 vdp_port &= 0x1F;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	295 //printf("vdp_port write: %X, value: %X, cycle: %d\n", vdp_port, value, context->current_cycle);
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	296 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	297 vdp_context * v_context = context->video_context;
508 b976c6d6e5fb Initial attempt at emulating extended bank area access delays when 68K bus is busy with VDP stuff. Also emulate the extra delay on the second access of a word-wide read to the bank area. Needs work as it seems to break stuff. Michael Pavone <pavone@retrodev.com> parents: 505 diff changeset	298 genesis_context * gen = context->system;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	299 if (vdp_port < 0x10) {
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	300 int blocked;
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	301 uint32_t before_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	302 if (vdp_port < 4) {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	303
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	304 while (vdp_data_port_write(v_context, value) < 0) {
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	305 while(v_context->flags & FLAG_DMA_RUN) {
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	306 vdp_run_dma_done(v_context, gen->frame_end);
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	307 if (v_context->cycles >= gen->frame_end) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	308 context->current_cycle = v_context->cycles;
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	309 gen->bus_busy = 1;
534 c641006da28e Properly sync hardware when frame end is reached during DMA Mike Pavone <pavone@retrodev.com> parents: 531 diff changeset	310 sync_components(context, 0);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	311 gen->bus_busy = 0;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	312 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	313 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	314 //context->current_cycle = v_context->cycles;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	315 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	316 } else if(vdp_port < 8) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	317 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	318 if (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	319 while (blocked) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	320 while(v_context->flags & FLAG_DMA_RUN) {
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	321 vdp_run_dma_done(v_context, gen->frame_end);
0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	322 if (v_context->cycles >= gen->frame_end) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	323 context->current_cycle = v_context->cycles;
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	324 gen->bus_busy = 1;
534 c641006da28e Properly sync hardware when frame end is reached during DMA Mike Pavone <pavone@retrodev.com> parents: 531 diff changeset	325 sync_components(context, 0);
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	326 gen->bus_busy = 0;
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	327 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	328 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	329 if (blocked < 0) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	330 blocked = vdp_control_port_write(v_context, value);
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	331 } else {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	332 blocked = 0;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	333 }
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 144 diff changeset	334 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	335 } else {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	336 context->sync_cycle = gen->frame_end = vdp_cycles_to_frame_end(v_context);
7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 696 diff changeset	337 //printf("Set sync cycle to: %d @ %d, vcounter: %d, hslot: %d\n", context->sync_cycle, context->current_cycle, v_context->vcounter, v_context->hslot);
186 02e25abe2dcd Cleanup VINT code and fix bug in which VINT cycle would be set incorrectly after a VDP control port write Mike Pavone <pavone@retrodev.com> parents: 185 diff changeset	338 adjust_int_cycle(context, v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	339 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	340 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	341 printf("Illegal write to HV Counter port %X\n", vdp_port);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	342 exit(1);
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	343 }
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	344 if (v_context->cycles != before_cycle) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	345 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for write\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	346 context->current_cycle = v_context->cycles;
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	347 //Lock the Z80 out of the bus until the VDP access is complete
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	348 gen->bus_busy = 1;
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	349 sync_z80(gen->z80, v_context->cycles);
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	350 gen->bus_busy = 0;
345 29d2ca563499 Don't sync the 68K clock to the VDP clock unless the 68K had to wait for the VDP. This unfortunately breaks the direct color DMA demos, but should be more correct overall. Mike Pavone <pavone@retrodev.com> parents: 344 diff changeset	351 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	352 } else if (vdp_port < 0x18) {
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	353 psg_write(gen->psg, value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	354 } else {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	355 //TODO: Implement undocumented test register(s)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	356 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	357 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	358 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	359
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	360 m68k_context * vdp_port_write_b(uint32_t vdp_port, m68k_context * context, uint8_t value)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	361 {
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	362 return vdp_port_write(vdp_port, context, vdp_port < 0x10 ? value \| value << 8 : ((vdp_port & 1) ? value : 0));
fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	363 }
fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	364
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	365 void * z80_vdp_port_write(uint32_t vdp_port, void * vcontext, uint8_t value)
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	366 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	367 z80_context * context = vcontext;
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	368 genesis_context * gen = context->system;
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	369 vdp_port &= 0xFF;
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	370 if (vdp_port & 0xE0) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	371 printf("machine freeze due to write to Z80 address %X\n", 0x7F00 \| vdp_port);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	372 exit(1);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	373 }
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	374 if (vdp_port < 0x10) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	375 //These probably won't currently interact well with the 68K accessing the VDP
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	376 vdp_run_context(gen->vdp, context->current_cycle);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	377 if (vdp_port < 4) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	378 vdp_data_port_write(gen->vdp, value << 8 \| value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	379 } else if (vdp_port < 8) {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	380 vdp_control_port_write(gen->vdp, value << 8 \| value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	381 } else {
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	382 printf("Illegal write to HV Counter port %X\n", vdp_port);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	383 exit(1);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	384 }
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	385 } else if (vdp_port < 0x18) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	386 sync_sound(gen, context->current_cycle);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	387 psg_write(gen->psg, value);
9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	388 } else {
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	389 vdp_test_port_write(gen->vdp, value);
358 9498cfa7f7c8 Make Z80 writes to VDP/PSG not potentially crash the emulator Mike Pavone <pavone@retrodev.com> parents: 357 diff changeset	390 }
357 fa7ea48be9a9 Allow VDP/PSG writes from Z80 Mike Pavone <pavone@retrodev.com> parents: 356 diff changeset	391 return context;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	392 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	393
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	394 uint16_t vdp_port_read(uint32_t vdp_port, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	395 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	396 if (vdp_port & 0x2700E0) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	397 printf("machine freeze due to read from address %X\n", 0xC00000 \| vdp_port);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	398 exit(1);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	399 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	400 vdp_port &= 0x1F;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	401 uint16_t value;
198 209a37eed3e7 Add support for breaking into the debugger while game is running Mike Pavone <pavone@retrodev.com> parents: 197 diff changeset	402 sync_components(context, 0);
263 2989ed7b8608 Add a second context pointer to m68k_context so that try_fifo_write can still have easy access to the VDP. Handle writes to Z80 code addresses from the 68K. Mike Pavone <pavone@retrodev.com> parents: 260 diff changeset	403 vdp_context * v_context = context->video_context;
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	404 uint32_t before_cycle = v_context->cycles;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	405 if (vdp_port < 0x10) {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	406 if (vdp_port < 4) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	407 value = vdp_data_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	408 } else if(vdp_port < 8) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	409 value = vdp_control_port_read(v_context);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	410 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	411 value = vdp_hv_counter_read(v_context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	412 //printf("HV Counter: %X at cycle %d\n", value, v_context->cycles);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	413 }
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	414 } else if (vdp_port < 0x18){
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	415 printf("Illegal read from PSG port %X\n", vdp_port);
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	416 exit(1);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	417 } else {
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	418 value = vdp_test_port_read(v_context);
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	419 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 469 diff changeset	420 if (v_context->cycles != before_cycle) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	421 //printf("68K paused for %d (%d) cycles at cycle %d (%d) for read\n", v_context->cycles - context->current_cycle, v_context->cycles - before_cycle, context->current_cycle, before_cycle);
30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	422 context->current_cycle = v_context->cycles;
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	423 //Lock the Z80 out of the bus until the VDP access is complete
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	424 genesis_context *gen = context->system;
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	425 gen->bus_busy = 1;
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	426 sync_z80(gen->z80, v_context->cycles);
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 679 diff changeset	427 gen->bus_busy = 0;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	428 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	429 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	430 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	431
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	432 uint8_t vdp_port_read_b(uint32_t vdp_port, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	433 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	434 uint16_t value = vdp_port_read(vdp_port, context);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	435 if (vdp_port & 1) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	436 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	437 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	438 return value >> 8;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	439 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	440 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	441
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	442 uint8_t z80_vdp_port_read(uint32_t vdp_port, void * vcontext)
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	443 {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	444 z80_context * context = vcontext;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	445 if (vdp_port & 0xE0) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	446 printf("machine freeze due to read from Z80 address %X\n", 0x7F00 \| vdp_port);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	447 exit(1);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	448 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	449 genesis_context * gen = context->system;
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	450 //VDP access goes over the 68K bus like a bank area access
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	451 //typical delay from bus arbitration
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	452 context->current_cycle += 3 * MCLKS_PER_Z80;
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	453 //TODO: add cycle for an access right after a previous one
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	454 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	455 // Needs a new logic analyzer capture to get the actual delay on the 68K side
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	456 gen->m68k->current_cycle += 8 * MCLKS_PER_68K;
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	457
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	458
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	459 vdp_port &= 0x1F;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	460 uint16_t ret;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	461 if (vdp_port < 0x10) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	462 //These probably won't currently interact well with the 68K accessing the VDP
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	463 vdp_run_context(gen->vdp, context->current_cycle);
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	464 if (vdp_port < 4) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	465 ret = vdp_data_port_read(gen->vdp);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	466 } else if (vdp_port < 8) {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	467 ret = vdp_control_port_read(gen->vdp);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	468 } else {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	469 printf("Illegal write to HV Counter port %X\n", vdp_port);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	470 exit(1);
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	471 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	472 } else {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	473 //TODO: Figure out the correct value today
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	474 ret = 0xFFFF;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	475 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	476 return vdp_port & 1 ? ret : ret >> 8;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	477 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	478
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	479 uint32_t zram_counter = 0;
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	480
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	481 m68k_context * io_write(uint32_t location, m68k_context * context, uint8_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	482 {
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	483 genesis_context * gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	484 if (location < 0x10000) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	485 if (!z80_enabled \|\| z80_get_busack(gen->z80, context->current_cycle)) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	486 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	487 if (location < 0x4000) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	488 z80_ram[location & 0x1FFF] = value;
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	489 #ifndef NO_Z80
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	490 z80_handle_code_write(location & 0x1FFF, gen->z80);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	491 #endif
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	492 } else if (location < 0x6000) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	493 sync_sound(gen, context->current_cycle);
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	494 if (location & 1) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	495 ym_data_write(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	496 } else if(location & 2) {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	497 ym_address_write_part2(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	498 } else {
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	499 ym_address_write_part1(gen->ym, value);
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	500 }
405 042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	501 } else if (location == 0x6000) {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	502 gen->z80->bank_reg = (gen->z80->bank_reg >> 1 \| value << 8) & 0x1FF;
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	503 if (gen->z80->bank_reg < 0x80) {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	504 gen->z80->mem_pointers[1] = (gen->z80->bank_reg << 15) + ((char *)gen->z80->mem_pointers[2]);
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	505 } else {
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	506 gen->z80->mem_pointers[1] = NULL;
042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	507 }
395 0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	508 } else {
0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	509 printf("68K write to unhandled Z80 address %X\n", location);
0b5f93358a93 Add debugger command for saving Z80 RAM to a file Mike Pavone <pavone@retrodev.com> parents: 392 diff changeset	510 exit(1);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	511 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	512 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	513 } else {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	514 location &= 0x1FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	515 if (location < 0x100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	516 switch(location/2)
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	517 {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	518 case 0x1:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	519 io_data_write(gen->ports, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	520 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	521 case 0x2:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	522 io_data_write(gen->ports+1, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	523 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	524 case 0x3:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	525 io_data_write(gen->ports+2, value, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	526 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	527 case 0x4:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	528 gen->ports[0].control = value;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	529 break;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	530 case 0x5:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	531 gen->ports[1].control = value;
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	532 break;
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	533 case 0x6:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	534 gen->ports[2].control = value;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	535 break;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	536 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	537 } else {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	538 if (location == 0x1100) {
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	539 if (value & 1) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	540 dputs("bus requesting Z80");
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	541 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	542 z80_assert_busreq(gen->z80, context->current_cycle);
677 687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	543 } else {
687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	544 gen->z80->busack = 1;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	545 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	546 } else {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	547 if (gen->z80->busreq) {
271 969ee17471c5 Protect debug prints for busreq/reset regs with appropriate macros Mike Pavone <pavone@retrodev.com> parents: 268 diff changeset	548 dputs("releasing z80 bus");
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	549 #ifdef DO_DEBUG_PRINT
279 6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	550 char fname[20];
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	551 sprintf(fname, "zram-%d", zram_counter++);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	552 FILE * f = fopen(fname, "wb");
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	553 fwrite(z80_ram, 1, sizeof(z80_ram), f);
6be6056735a9 Fix native address lookup in bannked memory area Mike Pavone <pavone@retrodev.com> parents: 276 diff changeset	554 fclose(f);
280 9ee64039ddeb Fix bank register update Mike Pavone <pavone@retrodev.com> parents: 279 diff changeset	555 #endif
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	556 }
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	557 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	558 z80_clear_busreq(gen->z80, context->current_cycle);
677 687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	559 } else {
687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	560 gen->z80->busack = 0;
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	561 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	562 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	563 } else if (location == 0x1200) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	564 sync_z80(gen->z80, context->current_cycle);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	565 if (value & 1) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	566 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	567 z80_clear_reset(gen->z80, context->current_cycle);
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	568 } else {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	569 gen->z80->reset = 0;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	570 }
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	571 } else {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	572 if (z80_enabled) {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	573 z80_assert_reset(gen->z80, context->current_cycle);
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	574 } else {
5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	575 gen->z80->reset = 1;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	576 }
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	577 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	578 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	579 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	580 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	581 return context;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	582 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	583
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	584 m68k_context * io_write_w(uint32_t location, m68k_context * context, uint16_t value)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	585 {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	586 if (location < 0x10000 \|\| (location & 0x1FFF) >= 0x100) {
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	587 return io_write(location, context, value >> 8);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	588 } else {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	589 return io_write(location, context, value);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	590 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	591 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	592
130 0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	593 #define USA 0x80
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	594 #define JAP 0x00
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	595 #define EUR 0xC0
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	596 #define NO_DISK 0x20
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	597 uint8_t version_reg = NO_DISK \| USA;
0bdbffa9fe90 Make version register return correct value for USA Mike Pavone <pavone@retrodev.com> parents: 115 diff changeset	598
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	599 uint8_t io_read(uint32_t location, m68k_context * context)
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	600 {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	601 uint8_t value;
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	602 genesis_context *gen = context->system;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	603 if (location < 0x10000) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	604 if (!z80_enabled \|\| z80_get_busack(gen->z80, context->current_cycle)) {
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	605 location &= 0x7FFF;
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	606 if (location < 0x4000) {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	607 value = z80_ram[location & 0x1FFF];
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	608 } else if (location < 0x6000) {
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	609 sync_sound(gen, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	610 value = ym_read_status(gen->ym);
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	611 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	612 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	613 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	614 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	615 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	616 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	617 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	618 location &= 0x1FFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	619 if (location < 0x100) {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	620 switch(location/2)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	621 {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	622 case 0x0:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	623 //version bits should be 0 for now since we're not emulating TMSS
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	624 value = version_reg;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	625 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	626 case 0x1:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	627 value = io_data_read(gen->ports, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	628 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	629 case 0x2:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	630 value = io_data_read(gen->ports+1, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	631 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	632 case 0x3:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	633 value = io_data_read(gen->ports+2, context->current_cycle);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	634 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	635 case 0x4:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	636 value = gen->ports[0].control;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	637 break;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	638 case 0x5:
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	639 value = gen->ports[1].control;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	640 break;
421 d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	641 case 0x6:
d0cacb4ade0b Move IO code to a separate file and do a tiny bit of refactoring Mike Pavone <pavone@retrodev.com> parents: 418 diff changeset	642 value = gen->ports[2].control;
405 042c4ba4a838 Implement writes from 68K to Z80 bank register and make reads from port c control register return 0 again Mike Pavone <pavone@retrodev.com> parents: 404 diff changeset	643 break;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	644 default:
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	645 value = 0xFF;
153 42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	646 }
42c031184e8a Implement access to Z80 RAM Mike Pavone <pavone@retrodev.com> parents: 149 diff changeset	647 } else {
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	648 if (location == 0x1100) {
677 687c1dd3bcb9 Fake busack when Z80 is disabled Michael Pavone <pavone@retrodev.com> parents: 672 diff changeset	649 value = z80_enabled ? !z80_get_busack(gen->z80, context->current_cycle) : !gen->z80->busack;
753 cee1275f5d08 Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values Michael Pavone <pavone@retrodev.com> parents: 752 diff changeset	650 //TODO: actual pre-fetch emulation
cee1275f5d08 Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values Michael Pavone <pavone@retrodev.com> parents: 752 diff changeset	651 value \|= 0x4E;
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	652 dprintf("Byte read of BUSREQ returned %d @ %d (reset: %d)\n", value, context->current_cycle, gen->z80->reset);
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	653 } else if (location == 0x1200) {
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	654 value = !gen->z80->reset;
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	655 } else {
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	656 value = 0xFF;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	657 printf("Byte read of unknown IO location: %X\n", location);
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	658 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	659 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	660 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	661 return value;
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	662 }
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	663
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	664 uint16_t io_read_w(uint32_t location, m68k_context * context)
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	665 {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	666 uint16_t value = io_read(location, context);
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	667 if (location < 0x10000 \|\| (location & 0x1FFF) < 0x100) {
88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	668 value = value \| (value << 8);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	669 } else {
404 88fa2ad53e64 Minor refactor of io_read functions to avoid duplication of logic between byte and word versions Mike Pavone <pavone@retrodev.com> parents: 402 diff changeset	670 value <<= 8;
753 cee1275f5d08 Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values Michael Pavone <pavone@retrodev.com> parents: 752 diff changeset	671 //TODO: actual pre-fetch emulation
cee1275f5d08 Lame placeholder support for floating bus bits of IO hardware. Needs to be replaced with prefetch based values Michael Pavone <pavone@retrodev.com> parents: 752 diff changeset	672 value \|= 0x73;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	673 }
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	674 return value;
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	675 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	676
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	677 void * z80_write_ym(uint32_t location, void * vcontext, uint8_t value)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	678 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	679 z80_context * context = vcontext;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	680 genesis_context * gen = context->system;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	681 sync_sound(gen, context->current_cycle);
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	682 if (location & 1) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	683 ym_data_write(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	684 } else if (location & 2) {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	685 ym_address_write_part2(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	686 } else {
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	687 ym_address_write_part1(gen->ym, value);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	688 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	689 return context;
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	690 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	691
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	692 uint8_t z80_read_ym(uint32_t location, void * vcontext)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	693 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	694 z80_context * context = vcontext;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	695 genesis_context * gen = context->system;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	696 sync_sound(gen, context->current_cycle);
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	697 return ym_read_status(gen->ym);
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	698 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	699
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	700 uint8_t z80_read_bank(uint32_t location, void * vcontext)
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	701 {
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	702 z80_context * context = vcontext;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	703 genesis_context *gen = context->system;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	704 if (gen->bus_busy) {
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	705 context->current_cycle = context->sync_cycle;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	706 }
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	707 //typical delay from bus arbitration
671 8ad39a2b0bce Fix bank area access delay for master clock change Michael Pavone <pavone@retrodev.com> parents: 670 diff changeset	708 context->current_cycle += 3 * MCLKS_PER_Z80;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	709 //TODO: add cycle for an access right after a previous one
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	710 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	711 // Needs a new logic analyzer capture to get the actual delay on the 68K side
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	712 gen->m68k->current_cycle += 8 * MCLKS_PER_68K;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	713
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	714 location &= 0x7FFF;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	715 if (context->mem_pointers[1]) {
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	716 return context->mem_pointers[1][location ^ 1];
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	717 }
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	718 uint32_t address = context->bank_reg << 15 \| location;
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	719 if (address >= 0xC00000 && address < 0xE00000) {
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	720 return z80_vdp_port_read(location & 0xFF, context);
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	721 } else {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	722 fprintf(stderr, "Unhandled read by Z80 from address %X through banked memory area (%X)\n", address, context->bank_reg << 15);
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	723 }
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	724 return 0;
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	725 }
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	726
4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	727 void z80_write_bank(uint32_t location, void vcontext, uint8_t value)
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	728 {
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	729 z80_context * context = vcontext;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	730 genesis_context *gen = context->system;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	731 if (gen->bus_busy) {
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	732 context->current_cycle = context->sync_cycle;
18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	733 }
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	734 //typical delay from bus arbitration
671 8ad39a2b0bce Fix bank area access delay for master clock change Michael Pavone <pavone@retrodev.com> parents: 670 diff changeset	735 context->current_cycle += 3 * MCLKS_PER_Z80;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	736 //TODO: add cycle for an access right after a previous one
736 535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	737 //TODO: Below cycle time is an estimate based on the time between 68K !BG goes low and Z80 !MREQ goes high
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	738 // Needs a new logic analyzer capture to get the actual delay on the 68K side
535e97bad27f Implement cycles being stolen from 68K when the Z80 accesses the bank area or VDP/PSG. Small fix to code that tries to get system into a consistent state for a savestate Michael Pavone <pavone@retrodev.com> parents: 721 diff changeset	739 gen->m68k->current_cycle += 8 * MCLKS_PER_68K;
672 18ef3b61e70b Restore emulation of Z80 being locked out of the 68K bus during DMA and the like Michael Pavone <pavone@retrodev.com> parents: 671 diff changeset	740
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	741 location &= 0x7FFF;
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	742 uint32_t address = context->bank_reg << 15 \| location;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	743 if (address >= 0xE00000) {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	744 address &= 0xFFFF;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	745 ((uint8_t *)ram)[address ^ 1] = value;
616 649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	746 } else if (address >= 0xC00000) {
649db9397fa1 Add support for Z80 access to VDP via bank area Michael Pavone <pavone@retrodev.com> parents: 606 diff changeset	747 z80_vdp_port_write(location & 0xFF, context, value);
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	748 } else {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	749 fprintf(stderr, "Unhandled write by Z80 to address %X through banked memory area\n", address);
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	750 }
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	751 return context;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	752 }
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	753
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	754 void z80_write_bank_reg(uint32_t location, void vcontext, uint8_t value)
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	755 {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	756 z80_context * context = vcontext;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	757
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	758 context->bank_reg = (context->bank_reg >> 1 \| value << 8) & 0x1FF;
777 79b10b421d3c Support large flat-mapped ROMs like Bad Apple or that Mortal Kombat hack Michael Pavone <pavone@retrodev.com> parents: 776 diff changeset	759 if (context->bank_reg < 0x100) {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	760 genesis_context *gen = context->system;
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	761 context->mem_pointers[1] = get_native_pointer(context->bank_reg << 15, (void **)gen->m68k->mem_pointers, &gen->m68k->options->gen);
604 39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	762 } else {
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	763 context->mem_pointers[1] = NULL;
39d7d463ed5b Get Z80 banked access sort of working again Michael Pavone <pavone@retrodev.com> parents: 602 diff changeset	764 }
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	765
592 4ff7bbb3943b Get rest of emulator compiling again with Z80 core enabled Michael Pavone <pavone@retrodev.com> parents: 590 diff changeset	766 return context;
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	767 }
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	768
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	769 void set_speed_percent(genesis_context * context, uint32_t percent)
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	770 {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	771 uint32_t old_clock = context->master_clock;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	772 context->master_clock = ((uint64_t)context->normal_clock * (uint64_t)percent) / 100;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	773 while (context->ym->current_cycle != context->psg->cycles) {
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	774 sync_sound(context, context->psg->cycles + MCLKS_PER_PSG);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	775 }
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	776 ym_adjust_master_clock(context->ym, context->master_clock);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	777 psg_adjust_master_clock(context->psg, context->master_clock);
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	778 }
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	779
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	780 const memmap_chunk base_map[] = {
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	781 {0xE00000, 0x1000000, 0xFFFF, 0, MMAP_READ \| MMAP_WRITE \| MMAP_CODE, ram,
343 467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	782 NULL, NULL, NULL, NULL},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	783 {0xC00000, 0xE00000, 0x1FFFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	784 (read_16_fun)vdp_port_read, (write_16_fun)vdp_port_write,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	785 (read_8_fun)vdp_port_read_b, (write_8_fun)vdp_port_write_b},
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	786 {0xA00000, 0xA12000, 0x1FFFF, 0, 0, NULL,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	787 (read_16_fun)io_read_w, (write_16_fun)io_write_w,
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	788 (read_8_fun)io_read, (write_8_fun)io_write}
467bfa17004a Mostly working runtime generation of memory map read/write functions Mike Pavone <pavone@retrodev.com> parents: 342 diff changeset	789 };
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	790
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	791 char * save_filename;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	792 genesis_context * genesis;
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	793 void persist_save()
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	794 {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	795 FILE * f = fopen(save_filename, "wb");
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	796 if (!f) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	797 fprintf(stderr, "Failed to open %s file %s for writing\n", genesis->save_type == SAVE_I2C ? "EEPROM" : "SRAM", save_filename);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	798 return;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	799 }
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	800 fwrite(genesis->save_storage, 1, genesis->save_size, f);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	801 fclose(f);
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	802 printf("Saved %s to %s\n", genesis->save_type == SAVE_I2C ? "EEPROM" : "SRAM", save_filename);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	803 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	804
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	805 void init_run_cpu(genesis_context * gen, rom_info rom, FILE address_log, char * statefile, uint8_t * debugger)
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	806 {
569 9b7fcf748be0 Rename x86_68k_options and m68k_to_x86.h to m68k_options and m68k_core.h respectively Michael Pavone <pavone@retrodev.com> parents: 565 diff changeset	807 m68k_options opts;
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	808
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	809 gen->save_type = rom->save_type;
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	810 if (gen->save_type != SAVE_NONE) {
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	811 gen->save_ram_mask = rom->save_mask;
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	812 gen->save_size = rom->save_size;
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	813 gen->save_storage = rom->save_buffer;
769 4638b88bc72d Initial work on I2C EEPROM implementation Michael Pavone <pavone@retrodev.com> parents: 767 diff changeset	814 gen->eeprom_map = rom->eeprom_map;
4638b88bc72d Initial work on I2C EEPROM implementation Michael Pavone <pavone@retrodev.com> parents: 767 diff changeset	815 gen->num_eeprom = rom->num_eeprom;
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	816 FILE * f = fopen(save_filename, "rb");
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	817 if (f) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	818 uint32_t read = fread(gen->save_storage, 1, rom->save_size, f);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	819 fclose(f);
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	820 if (read > 0) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	821 printf("Loaded %s from %s\n", rom->save_type == SAVE_I2C ? "EEPROM" : "SRAM", save_filename);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	822 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	823 }
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	824 atexit(persist_save);
769 4638b88bc72d Initial work on I2C EEPROM implementation Michael Pavone <pavone@retrodev.com> parents: 767 diff changeset	825 if (gen->save_type == SAVE_I2C) {
770 a3b90f746dcf Broken EEPROM support Michael Pavone <pavone@retrodev.com> parents: 769 diff changeset	826 eeprom_init(&gen->eeprom, gen->save_storage, gen->save_size);
769 4638b88bc72d Initial work on I2C EEPROM implementation Michael Pavone <pavone@retrodev.com> parents: 767 diff changeset	827 }
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	828 } else {
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	829 gen->save_storage = NULL;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	830 }
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	831
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	832 init_m68k_opts(&opts, rom->map, rom->map_chunks, MCLKS_PER_68K);
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	833 opts.address_log = address_log;
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	834 m68k_context *context = init_68k_context(&opts);
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	835 gen->m68k = context;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	836
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	837 context->video_context = gen->vdp;
fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	838 context->system = gen;
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	839 for (int i = 0; i < rom->map_chunks; i++)
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	840 {
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	841 if (rom->map[i].flags & MMAP_PTR_IDX) {
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	842 context->mem_pointers[rom->map[i].ptr_index] = rom->map[i].buffer;
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	843 }
cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	844 }
752 296ddfcf0d43 Minor cleanup in init_run_cpu Michael Pavone <pavone@retrodev.com> parents: 736 diff changeset	845
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	846 if (statefile) {
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	847 uint32_t pc = load_gst(gen, statefile);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	848 if (!pc) {
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	849 fprintf(stderr, "Failed to load save state %s\n", statefile);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	850 exit(1);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	851 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	852 printf("Loaded %s\n", statefile);
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	853 if (debugger) {
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	854 insert_breakpoint(context, pc, debugger);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	855 }
451 b7c3b2d22858 Added support for saving savestates. Added gst savestate format test harness Mike Pavone <pavone@retrodev.com> parents: 447 diff changeset	856 adjust_int_cycle(gen->m68k, gen->vdp);
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	857 start_68k_context(context, pc);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	858 } else {
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	859 if (debugger) {
752 296ddfcf0d43 Minor cleanup in init_run_cpu Michael Pavone <pavone@retrodev.com> parents: 736 diff changeset	860 uint32_t address = cart[2] << 16 \| cart[3];
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	861 insert_breakpoint(context, address, debugger);
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	862 }
690 fc04781f4d28 Removed hardcoded assumptions in M68K core about which parts of the memory map are RAM Michael Pavone <pavone@retrodev.com> parents: 683 diff changeset	863 m68k_reset(context);
211 464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	864 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	865 }
464513050c85 Small bit of cleanup Mike Pavone <pavone@retrodev.com> parents: 198 diff changeset	866
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	867 char *title;
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	868
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	869 void update_title(char *rom_name)
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	870 {
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	871 if (title) {
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	872 free(title);
bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	873 title = NULL;
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	874 }
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	875 title = alloc_concat(rom_name, " - BlastEm");
340 58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	876 }
58a085cfc6bd Set window title based on ROM header name Mike Pavone <pavone@retrodev.com> parents: 338 diff changeset	877
765 dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	878 void set_region(rom_info *info, uint8_t region)
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	879 {
765 dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	880 if (!region) {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	881 char * def_region = tern_find_ptr(config, "default_region");
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	882 if (def_region && (!info->regions \|\| (info->regions & translate_region_char(toupper(*def_region))))) {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	883 region = translate_region_char(toupper(*def_region));
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	884 } else {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	885 region = info->regions;
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	886 }
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	887 }
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	888 if (region & REGION_E) {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	889 version_reg = NO_DISK \| EUR;
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	890 } else if (region & REGION_J) {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	891 version_reg = NO_DISK \| JAP;
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	892 } else {
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	893 version_reg = NO_DISK \| USA;
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	894 }
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	895 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	896
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	897 #ifndef NO_Z80
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	898 const memmap_chunk z80_map[] = {
660 e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	899 { 0x0000, 0x4000, 0x1FFF, 0, MMAP_READ \| MMAP_WRITE \| MMAP_CODE, z80_ram, NULL, NULL, NULL, NULL },
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	900 { 0x8000, 0x10000, 0x7FFF, 0, 0, NULL, NULL, NULL, z80_read_bank, z80_write_bank},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	901 { 0x4000, 0x6000, 0x0003, 0, 0, NULL, NULL, NULL, z80_read_ym, z80_write_ym},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	902 { 0x6000, 0x6100, 0xFFFF, 0, 0, NULL, NULL, NULL, NULL, z80_write_bank_reg},
e7cae6d9aaa6 Add the 3 cycle delay back in to Z80 bank area access Michael Pavone <pavone@retrodev.com> parents: 659 diff changeset	903 { 0x7F00, 0x8000, 0x00FF, 0, 0, NULL, NULL, NULL, z80_vdp_port_read, z80_vdp_port_write}
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	904 };
ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	905 #endif
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	906
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	907 int main(int argc, char ** argv)
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	908 {
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	909 if (argc < 2) {
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	910 fputs("Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n", stderr);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	911 return 1;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	912 }
496 6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	913 set_exe_str(argv[0]);
6fc71114d145 Extract function to determine executable directory from load_config so it can be used elsewhere Mike Pavone <pavone@retrodev.com> parents: 488 diff changeset	914 config = load_config();
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	915 int width = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	916 int height = -1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	917 int debug = 0;
407 c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	918 int ym_log = 0;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	919 int loaded = 0;
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	920 uint8_t force_version = 0;
5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	921 char * romfname = NULL;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	922 FILE *address_log = NULL;
425 8b3ae850d1c4 Forgot to null initialize the statfile pointer Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	923 char * statefile = NULL;
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	924 int rom_size;
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	925 uint8_t * debuggerfun = NULL;
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	926 uint8_t fullscreen = 0, use_gl = 1;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	927 for (int i = 1; i < argc; i++) {
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	928 if (argv[i][0] == '-') {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	929 switch(argv[i][1]) {
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	930 case 'b':
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	931 i++;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	932 if (i >= argc) {
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	933 fputs("-b must be followed by a frame count\n", stderr);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	934 return 1;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	935 }
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	936 headless = 1;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	937 exit_after = atoi(argv[i]);
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 501 diff changeset	938 break;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	939 case 'd':
515 1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	940 debuggerfun = (uint8_t *)debugger;
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	941 break;
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	942 case 'D':
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	943 gdb_remote_init();
1495179d6737 Initial GDB remote debugging support. Lacks some features, but breakpoints and basic inspection of registers and memory work. Mike Pavone <pavone@retrodev.com> parents: 510 diff changeset	944 debuggerfun = (uint8_t *)gdb_debug_enter;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	945 break;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	946 case 'f':
444 cc754a309ead Add fullscreen support and add a keybinding for exiting the emulator Mike Pavone <pavone@retrodev.com> parents: 434 diff changeset	947 fullscreen = 1;
338 5c34a9c39394 Re-enable frame limit, but add a command line flag to disable it Mike Pavone <pavone@retrodev.com> parents: 336 diff changeset	948 break;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	949 case 'g':
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	950 use_gl = 0;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	951 break;
197 7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	952 case 'l':
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	953 address_log = fopen("address.log", "w");
7c227a8ec53d Add instruction address logging to translator and support for reading an address log to the disassembler Mike Pavone <pavone@retrodev.com> parents: 195 diff changeset	954 break;
464 226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	955 case 'v':
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	956 printf("blastem %s\n", BLASTEM_VERSION);
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	957 return 0;
226ed16b1fb6 Added version flag Mike Pavone <pavone@retrodev.com> parents: 463 diff changeset	958 break;
265 c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	959 case 'n':
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	960 z80_enabled = 0;
c6d12878ea93 Add -n flag for disabling the Z80 core Mike Pavone <pavone@retrodev.com> parents: 264 diff changeset	961 break;
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	962 case 'r':
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	963 i++;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	964 if (i >= argc) {
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	965 fputs("-r must be followed by region (J, U or E)\n", stderr);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	966 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	967 }
765 dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	968 force_version = translate_region_char(toupper(argv[i][0]));
dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	969 if (!force_version) {
341 6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	970 fprintf(stderr, "'%c' is not a valid region character for the -r option\n", argv[i][0]);
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	971 return 1;
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	972 }
6ad8e36de685 Support regions other than USA Mike Pavone <pavone@retrodev.com> parents: 340 diff changeset	973 break;
424 7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	974 case 's':
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	975 i++;
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	976 if (i >= argc) {
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	977 fputs("-s must be followed by a savestate filename\n", stderr);
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	978 return 1;
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	979 }
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	980 statefile = argv[i];
7e8e179116af Add support for loading GST format savestates Mike Pavone <pavone@retrodev.com> parents: 422 diff changeset	981 break;
407 c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	982 case 'y':
c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	983 ym_log = 1;
c3abc4ada43d Add support for logging YM2612 channels to WAVE files Mike Pavone <pavone@retrodev.com> parents: 405 diff changeset	984 break;
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	985 case 'h':
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	986 puts(
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	987 "Usage: blastem [OPTIONS] ROMFILE [WIDTH] [HEIGHT]\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	988 "Options:\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	989 " -h Print this help text\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	990 " -r (J\|U\|E) Force region to Japan, US or Europe respectively\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	991 " -f Start in fullscreen mode\n"
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	992 " -g Disable OpenGL rendering\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	993 " -s FILE Load a GST format savestate from FILE\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	994 " -d Enter debugger on startup\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	995 " -n Disable Z80\n"
501 e1355aa80f4d Use OpenGL by default. Add OpenGL switch to help text Mike Pavone <pavone@retrodev.com> parents: 496 diff changeset	996 " -v Display version number and exit\n"
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	997 " -l Log 68K code addresses (useful for assemblers)\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	998 " -y Log individual YM-2612 channels to WAVE files\n"
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	999 );
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1000 return 0;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1001 default:
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1002 fprintf(stderr, "Unrecognized switch %s\n", argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1003 return 1;
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1004 }
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1005 } else if (!loaded) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1006 if (!(rom_size = load_rom(argv[i]))) {
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1007 fprintf(stderr, "Failed to open %s for reading\n", argv[i]);
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1008 return 1;
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1009 }
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1010 romfname = argv[i];
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1011 loaded = 1;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1012 } else if (width < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1013 width = atoi(argv[i]);
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1014 } else if (height < 0) {
ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1015 height = atoi(argv[i]);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1016 }
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1017 }
463 a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1018 if (!loaded) {
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1019 fputs("You must specify a ROM filename!\n", stderr);
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1020 return 1;
a1d298119153 Added -h help text option Mike Pavone <pavone@retrodev.com> parents: 458 diff changeset	1021 }
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	1022 tern_node *rom_db = load_rom_db();
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1023 rom_info info = configure_rom(rom_db, cart, rom_size, base_map, sizeof(base_map)/sizeof(base_map[0]));
776 cbf97d335444 Full support for Sega mapper when it comes to data. Code in remapped sections may not work reliably. SSF2 now works. Michael Pavone <pavone@retrodev.com> parents: 774 diff changeset	1024 byteswap_rom(rom_size);
765 dc54387ee1cd Allow regions to be set in ROM DB. Prefer default region if it is one of the valid regions for the ROM. Michael Pavone <pavone@retrodev.com> parents: 764 diff changeset	1025 set_region(&info, force_version);
764 bb60259e8edf Initial work on ROM database Michael Pavone <pavone@retrodev.com> parents: 753 diff changeset	1026 update_title(info.name);
433 ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1027 int def_width = 0;
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	1028 char *config_width = tern_find_path(config, "video\0width\0").ptrval;
433 ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1029 if (config_width) {
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1030 def_width = atoi(config_width);
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1031 }
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1032 if (!def_width) {
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1033 def_width = 640;
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1034 }
ed4d0017c041 Read default render width from config file Mike Pavone <pavone@retrodev.com> parents: 430 diff changeset	1035 width = width < 320 ? def_width : width;
184 ebcbdd1c4cc8 Fix a bunch of bugs in the CPU core, add a 68K debugger Mike Pavone <pavone@retrodev.com> parents: 166 diff changeset	1036 height = height < 240 ? (width/320) * 240 : height;
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1037 uint32_t fps = 60;
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1038 if (version_reg & 0x40) {
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1039 fps = 50;
15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1040 }
15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1041 if (!headless) {
719 019d27995e32 Upgrade to SDL 2.0 and drop support for the non-OpenGL render path Michael Pavone <pavone@retrodev.com> parents: 718 diff changeset	1042 render_init(width, height, title, fps, fullscreen);
342 13f994c88c34 Get frame time correct and frame rate sort of correct for EUR region Mike Pavone <pavone@retrodev.com> parents: 341 diff changeset	1043 }
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1044 vdp_context v_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1045 genesis_context gen;
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1046 memset(&gen, 0, sizeof(gen));
3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1047 gen.master_clock = gen.normal_clock = fps == 60 ? MCLKS_NTSC : MCLKS_PAL;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1048
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1049 init_vdp_context(&v_context, version_reg & 0x40);
696 0b2242bbc84a Added config option to allow specifying a max sync cycle smaller than the end of frame Michael Pavone <pavone@retrodev.com> parents: 695 diff changeset	1050 gen.frame_end = vdp_cycles_to_frame_end(&v_context);
766 1b2f8280ba81 WIP changes to support reading cart memory map from ROM DB Michael Pavone <pavone@retrodev.com> parents: 765 diff changeset	1051 char * config_cycles = tern_find_path(config, "clocks\0max_cycles\0").ptrval;
785 0e5f14d9a579 Prep for 0.3.0 release Michael Pavone <pavone@retrodev.com> parents: 778 diff changeset	1052 gen.max_cycles = config_cycles ? atoi(config_cycles) : DEFAULT_SYNC_INTERVAL;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1053
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1054 ym2612_context y_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1055 ym_init(&y_context, render_sample_rate(), gen.master_clock, MCLKS_PER_YM, render_audio_buffer(), ym_log ? YM_OPT_WAVE_LOG : 0);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1056
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1057 psg_context p_context;
483 3e1573fa22cf Implement turbo/slow motion feature that overclocks or underclocks the entire system at the push of a button Mike Pavone <pavone@retrodev.com> parents: 482 diff changeset	1058 psg_init(&p_context, render_sample_rate(), gen.master_clock, MCLKS_PER_PSG, render_audio_buffer());
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1059
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1060 z80_context z_context;
565 9324f721efa6 Add a separate flag/define for disabling the Z80 at compile time to ease refactoring Michael Pavone <pavone@retrodev.com> parents: 558 diff changeset	1061 #ifndef NO_Z80
590 ea80559c67cb WIP effort to update z80 core for code gen changes Michael Pavone <pavone@retrodev.com> parents: 570 diff changeset	1062 z80_options z_opts;
667 30ccf56842d6 All cycle counters are now based off the master clock. This seems to have messed up Z80 interrupt timing (music in Sonic 2 is too slow for instance), but things are generally working Michael Pavone <pavone@retrodev.com> parents: 661 diff changeset	1063 init_z80_opts(&z_opts, z80_map, 5, MCLKS_PER_Z80);
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1064 init_z80_context(&z_context, &z_opts);
668 5439ae7946ca Made the Z80 core more contained by refactoring some code in blastem.c into z80_to_x86.c Michael Pavone <pavone@retrodev.com> parents: 667 diff changeset	1065 z80_assert_reset(&z_context, 0);
548 a3afee2271ce Initial work on the x86-32 target Michael Pavone <pavone@retrodev.com> parents: 534 diff changeset	1066 #endif
290 171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1067
171f97e70d85 Implement writes from Z80 to YM-2612 Mike Pavone <pavone@retrodev.com> parents: 289 diff changeset	1068 z_context.system = &gen;
260 625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1069 z_context.mem_pointers[0] = z80_ram;
625f8e4d5fd2 Initial stab at integartiong Z80 core Mike Pavone <pavone@retrodev.com> parents: 215 diff changeset	1070 z_context.mem_pointers[1] = z_context.mem_pointers[2] = (uint8_t *)cart;
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1071
288 a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1072 gen.z80 = &z_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1073 gen.vdp = &v_context;
a8ee7934a1f8 Add a YM2612 stub implementation with just timers and status registers so that games that depend on it can run. Mike Pavone <pavone@retrodev.com> parents: 280 diff changeset	1074 gen.ym = &y_context;
354 15dd6418fe67 Initial PSG support. Mostly works, noise channel is borked though. Mike Pavone <pavone@retrodev.com> parents: 351 diff changeset	1075 gen.psg = &p_context;
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1076 genesis = &gen;
693 318ebe078315 Fix missing call to setup_io_devices Michael Pavone <pavone@retrodev.com> parents: 690 diff changeset	1077 setup_io_devices(config, gen.ports);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1078
469 5f3344d0d42f Fix argument handling so that the rom filename does not need to be specified first Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	1079 int fname_size = strlen(romfname);
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1080 char * ext = info.save_type == SAVE_I2C ? "eeprom" : "sram";
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1081 save_filename = malloc(fname_size+strlen(ext) + 2);
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1082 memcpy(save_filename, romfname, fname_size);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1083 int i;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1084 for (i = fname_size-1; fname_size >= 0; --i) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1085 if (save_filename[i] == '.') {
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1086 strcpy(save_filename + i + 1, ext);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1087 break;
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1088 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1089 }
2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1090 if (i < 0) {
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1091 save_filename[fname_size] = '.';
ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1092 strcpy(save_filename + fname_size + 1, ext);
351 2f264d2a60c2 Support for SRAM with SEGA mapper. Half-finished support for SRAM without SEGA mapper. Mike Pavone <pavone@retrodev.com> parents: 346 diff changeset	1093 }
645 d77c79cec800 Initial support for configurable IO, custom IO and sega transfer board emulation Michael Pavone <pavone@retrodev.com> parents: 628 diff changeset	1094 set_keybindings(gen.ports);
488 32f053ad9b02 Basic OpenGL rendering is working Mike Pavone <pavone@retrodev.com> parents: 487 diff changeset	1095
767 ea525f600b1d SRAM detection from ROM header is no working correctly again Michael Pavone <pavone@retrodev.com> parents: 766 diff changeset	1096 init_run_cpu(&gen, &info, address_log, statefile, debuggerfun);
88 c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1097 return 0;
c339559f1d4f Forgot to add blastem main file earlier Mike Pavone <pavone@retrodev.com> parents: diff changeset	1098 }

Mercurial > repos > blastem

annotate blastem.c @ 785:0e5f14d9a579