Mercurial > repos > blastem
annotate vdp.c @ 1428:2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
author | Michael Pavone <pavone@retrodev.com> |
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date | Wed, 09 Aug 2017 23:26:51 -0700 |
parents | 4e5797b3935a |
children | 030b40139de9 |
rev | line source |
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467
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1 /* |
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2 Copyright 2013 Michael Pavone |
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3 This file is part of BlastEm. |
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text. |
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5 */ |
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6 #include "vdp.h" |
75 | 7 #include "blastem.h" |
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8 #include "genesis.h" |
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9 #include <stdlib.h> |
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10 #include <string.h> |
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11 #include "render.h" |
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12 #include "util.h" |
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13 |
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Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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14 #define NTSC_INACTIVE_START 224 |
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15 #define PAL_INACTIVE_START 240 |
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16 #define MODE4_INACTIVE_START 192 |
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17 #define BUF_BIT_PRIORITY 0x40 |
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18 #define MAP_BIT_PRIORITY 0x8000 |
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19 #define MAP_BIT_H_FLIP 0x800 |
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20 #define MAP_BIT_V_FLIP 0x1000 |
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21 |
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Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
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22 #define SCROLL_BUFFER_SIZE 32 |
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23 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1) |
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24 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2) |
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25 |
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26 #define MCLKS_SLOT_H40 16 |
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27 #define MCLKS_SLOT_H32 20 |
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28 #define VINT_SLOT_H40 0 //21 slots before HSYNC, 16 during, 10 after |
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29 #define VINT_SLOT_H32 0 //old value was 23, but recent tests suggest the actual value is close to the H40 one |
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30 #define VINT_SLOT_MODE4 4 |
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31 #define HSYNC_SLOT_H40 230 |
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32 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17) |
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33 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results |
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34 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results |
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35 #define HBLANK_START_H32 233 //should be 147 according to Nemesis which is very different from my test ROM result |
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36 #define HBLANK_END_H32 0 //should be 5 according to Nemesis, but 0 seems to fit better with my test ROM results |
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37 #define LINE_CHANGE_H40 165 |
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38 #define LINE_CHANGE_H32 133 |
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39 #define LINE_CHANGE_MODE4 249 |
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40 #define VBLANK_START_H40 (LINE_CHANGE_H40+2) |
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41 #define VBLANK_START_H32 (LINE_CHANGE_H32+2) |
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42 #define FIFO_LATENCY 3 |
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43 |
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44 #define BORDER_TOP_V24 27 |
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45 #define BORDER_TOP_V28 11 |
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46 #define BORDER_TOP_V24_PAL 54 |
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47 #define BORDER_TOP_V28_PAL 38 |
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48 #define BORDER_TOP_V30_PAL 30 |
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49 |
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50 #define BORDER_BOT_V24 24 |
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51 #define BORDER_BOT_V28 8 |
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52 #define BORDER_BOT_V24_PAL 48 |
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53 #define BORDER_BOT_V28_PAL 32 |
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54 #define BORDER_BOT_V30_PAL 24 |
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55 |
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56 #define INVALID_LINE 0x200 |
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57 |
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58 enum { |
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59 INACTIVE = 0, |
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60 PREPARING, //used for line 0x1FF |
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61 ACTIVE |
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62 }; |
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63 |
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64 static int32_t color_map[1 << 12]; |
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65 static uint16_t mode4_address_map[0x4000]; |
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66 static uint32_t planar_to_chunky[256]; |
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67 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255}; |
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68 |
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69 static uint8_t debug_base[][3] = { |
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70 {127, 127, 127}, //BG |
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71 {0, 0, 127}, //A |
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72 {127, 0, 0}, //Window |
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73 {0, 127, 0}, //B |
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74 {127, 0, 127} //Sprites |
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75 }; |
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76 |
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77 static void update_video_params(vdp_context *context) |
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78 { |
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79 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
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80 if (context->regs[REG_MODE_2] & BIT_PAL) { |
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81 if (context->flags2 & FLAG2_REGION_PAL) { |
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82 context->inactive_start = PAL_INACTIVE_START; |
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83 context->border_top = BORDER_TOP_V30_PAL; |
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84 context->border_bot = BORDER_BOT_V30_PAL; |
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85 } else { |
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86 //the behavior here is rather weird and needs more investigation |
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87 context->inactive_start = 0xF0; |
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88 context->border_top = 1; |
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89 context->border_bot = 3; |
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90 } |
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91 } else { |
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92 context->inactive_start = NTSC_INACTIVE_START; |
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93 if (context->flags2 & FLAG2_REGION_PAL) { |
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94 context->border_top = BORDER_TOP_V28_PAL; |
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95 context->border_bot = BORDER_BOT_V28_PAL; |
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96 } else { |
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97 context->border_top = BORDER_TOP_V28; |
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98 context->border_bot = BORDER_TOP_V28; |
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99 } |
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100 } |
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101 if (context->regs[REG_MODE_4] & BIT_H40) { |
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102 context->max_sprites_frame = MAX_SPRITES_FRAME; |
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103 context->max_sprites_line = MAX_SPRITES_LINE; |
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Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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104 } else { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
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105 context->max_sprites_frame = MAX_SPRITES_FRAME_H32; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
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106 context->max_sprites_line = MAX_SPRITES_LINE_H32; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
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107 } |
1325
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Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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108 if (context->state == INACTIVE) { |
58bfbed6cdb5
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109 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active |
58bfbed6cdb5
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110 if (context->vcounter < context->inactive_start) { |
58bfbed6cdb5
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111 context->state = ACTIVE; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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112 } else if (context->vcounter == 0x1FF) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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113 context->state = PREPARING; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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114 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
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115 } |
1167
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116 } else { |
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117 context->inactive_start = MODE4_INACTIVE_START; |
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118 if (context->flags2 & FLAG2_REGION_PAL) { |
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119 context->border_top = BORDER_TOP_V24_PAL; |
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120 context->border_bot = BORDER_BOT_V24_PAL; |
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121 } else { |
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122 context->border_top = BORDER_TOP_V24; |
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123 context->border_bot = BORDER_BOT_V24; |
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124 } |
1325
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125 if (!(context->regs[REG_MODE_1] & BIT_MODE_4)){ |
58bfbed6cdb5
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126 context->state = INACTIVE; |
58bfbed6cdb5
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127 } else if (context->state == INACTIVE) { |
58bfbed6cdb5
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128 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active |
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129 if (context->vcounter < context->inactive_start) { |
58bfbed6cdb5
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130 context->state = ACTIVE; |
58bfbed6cdb5
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131 } |
58bfbed6cdb5
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132 else if (context->vcounter == 0x1FF) { |
58bfbed6cdb5
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133 context->state = PREPARING; |
58bfbed6cdb5
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134 } |
58bfbed6cdb5
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135 } |
1167
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136 } |
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137 } |
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138 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
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139 static uint8_t color_map_init_done; |
426
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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140 |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
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622
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141 void init_vdp_context(vdp_context * context, uint8_t region_pal) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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142 { |
58
a6a19c45d358
Properly zero-init all VDP buffers. Comment out some debug printfs.
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diff
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143 memset(context, 0, sizeof(*context)); |
20
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Mostly broken VDP core and savestate viewer
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144 context->vdpmem = malloc(VRAM_SIZE); |
58
a6a19c45d358
Properly zero-init all VDP buffers. Comment out some debug printfs.
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diff
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145 memset(context->vdpmem, 0, VRAM_SIZE); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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diff
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146 /* |
488
32f053ad9b02
Basic OpenGL rendering is working
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481
diff
changeset
|
147 */ |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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148 if (headless) { |
1168 | 149 context->output = malloc(LINEBUF_SIZE * sizeof(uint32_t)); |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
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150 context->output_pitch = 0; |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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151 } else { |
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152 context->fb = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch); |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
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diff
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153 } |
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
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38
diff
changeset
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154 context->linebuf = malloc(LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
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43
diff
changeset
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155 memset(context->linebuf, 0, LINEBUF_SIZE + SCROLL_BUFFER_SIZE*2); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
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parents:
diff
changeset
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156 context->tmp_buf_a = context->linebuf + LINEBUF_SIZE; |
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
157 context->tmp_buf_b = context->tmp_buf_a + SCROLL_BUFFER_SIZE; |
26
a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
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parents:
25
diff
changeset
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158 context->sprite_draws = MAX_DRAWS; |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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parents:
470
diff
changeset
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159 context->fifo_write = 0; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
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parents:
470
diff
changeset
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160 context->fifo_read = -1; |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
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161 context->regs[REG_HINT] = context->hint_counter = 0xFF; |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
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parents:
503
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changeset
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162 |
426
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
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163 if (!color_map_init_done) { |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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164 uint8_t b,g,r; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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165 for (uint16_t color = 0; color < (1 << 12); color++) { |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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166 if (color & FBUF_SHADOW) { |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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167 b = levels[(color >> 9) & 0x7]; |
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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168 g = levels[(color >> 5) & 0x7]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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169 r = levels[(color >> 1) & 0x7]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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170 } else if(color & FBUF_HILIGHT) { |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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171 b = levels[((color >> 9) & 0x7) + 7]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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172 g = levels[((color >> 5) & 0x7) + 7]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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changeset
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173 r = levels[((color >> 1) & 0x7) + 7]; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
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174 } else if(color & FBUF_MODE4) { |
1127
cb4771f4543a
Fix Mode 4 color mapping
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parents:
1125
diff
changeset
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175 b = levels[(color >> 4 & 0xC) | (color >> 6 & 0x2)]; |
1125
fba485949723
Brighten up Mode 4 colors
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1124
diff
changeset
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176 g = levels[(color >> 2 & 0x8) | (color >> 1 & 0x4) | (color >> 4 & 0x2)]; |
fba485949723
Brighten up Mode 4 colors
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177 r = levels[(color << 1 & 0xC) | (color >> 1 & 0x2)]; |
426
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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178 } else { |
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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179 b = levels[(color >> 8) & 0xE]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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180 g = levels[(color >> 4) & 0xE]; |
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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181 r = levels[color & 0xE]; |
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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182 } |
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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diff
changeset
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183 color_map[color] = render_map_color(r, g, b); |
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Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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parents:
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diff
changeset
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184 } |
1120
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Somewhat broken implementation of Mode 4
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185 for (uint16_t mode4_addr = 0; mode4_addr < 0x4000; mode4_addr++) |
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Somewhat broken implementation of Mode 4
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186 { |
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Somewhat broken implementation of Mode 4
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187 uint16_t mode5_addr = mode4_addr & 0x3DFD; |
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Somewhat broken implementation of Mode 4
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188 mode5_addr |= mode4_addr << 8 & 0x200; |
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189 mode5_addr |= mode4_addr >> 8 & 2; |
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Somewhat broken implementation of Mode 4
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190 mode4_address_map[mode4_addr] = mode5_addr; |
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Somewhat broken implementation of Mode 4
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191 } |
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Somewhat broken implementation of Mode 4
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192 for (uint32_t planar = 0; planar < 256; planar++) |
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Somewhat broken implementation of Mode 4
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193 { |
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Somewhat broken implementation of Mode 4
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194 uint32_t chunky = 0; |
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Somewhat broken implementation of Mode 4
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195 for (int bit = 7; bit >= 0; bit--) |
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Somewhat broken implementation of Mode 4
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196 { |
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197 chunky = chunky << 4; |
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198 chunky |= planar >> bit & 1; |
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199 } |
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200 planar_to_chunky[planar] = chunky; |
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201 } |
426
add9e2f5c0e3
Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
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202 color_map_init_done = 1; |
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203 } |
437
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204 for (uint8_t color = 0; color < (1 << (3 + 1 + 1 + 1)); color++) |
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205 { |
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206 uint8_t src = color & DBG_SRC_MASK; |
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207 if (src > DBG_SRC_S) { |
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208 context->debugcolors[color] = 0; |
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209 } else { |
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210 uint8_t r,g,b; |
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211 b = debug_base[src][0]; |
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212 g = debug_base[src][1]; |
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213 r = debug_base[src][2]; |
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214 if (color & DBG_PRIORITY) |
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215 { |
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216 if (b) { |
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217 b += 48; |
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218 } |
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219 if (g) { |
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220 g += 48; |
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221 } |
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222 if (r) { |
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223 r += 48; |
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224 } |
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225 } |
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226 if (color & DBG_SHADOW) { |
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227 b /= 2; |
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228 g /= 2; |
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229 r /=2 ; |
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230 } |
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231 if (color & DBG_HILIGHT) { |
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232 if (b) { |
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233 b += 72; |
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234 } |
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235 if (g) { |
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236 g += 72; |
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237 } |
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238 if (r) { |
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239 r += 72; |
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240 } |
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241 } |
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242 context->debugcolors[color] = render_map_color(r, g, b); |
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243 } |
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244 } |
623
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Fix most of the breakage caused by the vcounter/hcounter changes
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245 if (region_pal) { |
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246 context->flags2 |= FLAG2_REGION_PAL; |
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247 } |
1167
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Initial work on emulating top and bottom border area
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248 update_video_params(context); |
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249 if (!headless) { |
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250 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * context->border_top); |
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251 } |
20
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252 } |
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253 |
884
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Selecting a second game from the menu now works
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254 void vdp_free(vdp_context *context) |
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255 { |
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256 free(context->vdpmem); |
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257 free(context->linebuf); |
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258 free(context); |
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259 } |
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260 |
1102
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261 static int is_refresh(vdp_context * context, uint32_t slot) |
460
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262 { |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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621
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|
263 if (context->regs[REG_MODE_4] & BIT_H40) { |
b76d2a628ab9
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264 return slot == 250 || slot == 26 || slot == 59 || slot == 90 || slot == 122 || slot == 154; |
460
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|
265 } else { |
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266 //TODO: Figure out which slots are refresh when display is off in 32-cell mode |
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267 //These numbers are guesses based on H40 numbers |
622
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Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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|
268 return slot == 243 || slot == 19 || slot == 51 || slot == 83 || slot == 115; |
460
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|
269 //The numbers below are the refresh slots during active display |
622
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Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
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|
270 //return (slot == 29 || slot == 61 || slot == 93 || slot == 125); |
460
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diff
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|
271 } |
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diff
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|
272 } |
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|
273 |
1151
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Fix some issues with VDP interface in Mode 4/PBC mode
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1150
diff
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|
274 static void increment_address(vdp_context *context) |
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|
275 { |
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|
276 context->address += context->regs[REG_AUTOINC]; |
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|
277 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) { |
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diff
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|
278 context->address++; |
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|
279 } |
681e8a13b261
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diff
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|
280 } |
681e8a13b261
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diff
changeset
|
281 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
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1077
diff
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|
282 static void render_sprite_cells(vdp_context * context) |
20
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parents:
diff
changeset
|
283 { |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
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1338
diff
changeset
|
284 sprite_draw * d = context->sprite_draw_list + context->cur_slot; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
285 context->serial_address = d->address; |
21
72ce60cb1711
Sprites somewhat less broken
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parents:
20
diff
changeset
|
286 if (context->cur_slot >= context->sprite_draws) { |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
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parents:
438
diff
changeset
|
287 |
20
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diff
changeset
|
288 uint16_t dir; |
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parents:
diff
changeset
|
289 int16_t x; |
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diff
changeset
|
290 if (d->h_flip) { |
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diff
changeset
|
291 x = d->x_pos + 7; |
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diff
changeset
|
292 dir = -1; |
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diff
changeset
|
293 } else { |
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diff
changeset
|
294 x = d->x_pos; |
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diff
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|
295 dir = 1; |
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diff
changeset
|
296 } |
27
aa1c47fab3f1
Fix sprite transparency for overlapping sprites
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26
diff
changeset
|
297 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x); |
26
a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents:
25
diff
changeset
|
298 context->cur_slot--; |
143
e5487ef04619
Fix infinite loop bug in sprite rendering
Mike Pavone <pavone@retrodev.com>
parents:
142
diff
changeset
|
299 for (uint16_t address = d->address; address != ((d->address+4) & 0xFFFF); address++) { |
1029
4263dc9cf86d
Fix implementation of sprite collision flag. Old implementation did not make sense.
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1019
diff
changeset
|
300 if (x >= 0 && x < 320) { |
4263dc9cf86d
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1019
diff
changeset
|
301 if (!(context->linebuf[x] & 0xF)) { |
4263dc9cf86d
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1019
diff
changeset
|
302 context->linebuf[x] = (context->vdpmem[address] >> 4) | d->pal_priority; |
4263dc9cf86d
Fix implementation of sprite collision flag. Old implementation did not make sense.
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1019
diff
changeset
|
303 } else if (context->vdpmem[address] >> 4) { |
494
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
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481
diff
changeset
|
304 context->flags2 |= FLAG2_SPRITE_COLLIDE; |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
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parents:
481
diff
changeset
|
305 } |
20
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parents:
diff
changeset
|
306 } |
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diff
changeset
|
307 x += dir; |
1029
4263dc9cf86d
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1019
diff
changeset
|
308 if (x >= 0 && x < 320) { |
4263dc9cf86d
Fix implementation of sprite collision flag. Old implementation did not make sense.
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diff
changeset
|
309 if (!(context->linebuf[x] & 0xF)) { |
4263dc9cf86d
Fix implementation of sprite collision flag. Old implementation did not make sense.
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1019
diff
changeset
|
310 context->linebuf[x] = (context->vdpmem[address] & 0xF) | d->pal_priority; |
4263dc9cf86d
Fix implementation of sprite collision flag. Old implementation did not make sense.
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diff
changeset
|
311 } else if (context->vdpmem[address] & 0xF) { |
494
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
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parents:
481
diff
changeset
|
312 context->flags2 |= FLAG2_SPRITE_COLLIDE; |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
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parents:
481
diff
changeset
|
313 } |
20
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parents:
diff
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|
314 } |
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315 x += dir; |
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316 } |
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Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
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317 } else { |
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318 context->cur_slot--; |
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319 } |
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320 } |
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321 |
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322 static void fetch_sprite_cells_mode4(vdp_context * context) |
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323 { |
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324 if (context->sprite_index >= context->sprite_draws) { |
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325 sprite_draw * d = context->sprite_draw_list + context->sprite_index; |
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326 uint32_t address = mode4_address_map[d->address & 0x3FFF]; |
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327 context->fetch_tmp[0] = context->vdpmem[address]; |
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328 context->fetch_tmp[1] = context->vdpmem[address + 1]; |
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329 } |
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330 } |
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331 |
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332 static void render_sprite_cells_mode4(vdp_context * context) |
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333 { |
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334 if (context->sprite_index >= context->sprite_draws) { |
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335 sprite_draw * d = context->sprite_draw_list + context->sprite_index; |
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336 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1; |
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337 pixels |= planar_to_chunky[context->fetch_tmp[1]]; |
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338 uint32_t address = mode4_address_map[(d->address + 2) & 0x3FFF]; |
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339 pixels |= planar_to_chunky[context->vdpmem[address]] << 3; |
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340 pixels |= planar_to_chunky[context->vdpmem[address + 1]] << 2; |
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341 int x = d->x_pos & 0xFF; |
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342 for (int i = 28; i >= 0; i -= 4, x++) |
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343 { |
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344 if (context->linebuf[x] && (pixels >> i & 0xF)) { |
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345 if ( |
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346 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8) |
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347 || ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256) |
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348 ) { |
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349 context->flags2 |= FLAG2_SPRITE_COLLIDE; |
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350 } |
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351 } else { |
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352 context->linebuf[x] = pixels >> i & 0xF; |
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353 } |
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354 } |
1135
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355 context->sprite_index--; |
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356 } |
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357 } |
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358 |
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359 static uint32_t mode5_sat_address(vdp_context *context) |
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360 { |
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361 uint32_t addr = context->regs[REG_SAT] << 9; |
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362 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) { |
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363 addr &= 0xFFFF; |
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364 } |
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365 if (context->regs[REG_MODE_4] & BIT_H40) { |
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366 addr &= 0x1FC00; |
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367 } |
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368 return addr; |
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|
369 } |
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370 |
322
8e2fa485c0f2
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318
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|
371 void vdp_print_sprite_table(vdp_context * context) |
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|
372 { |
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373 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
1320
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|
374 uint16_t sat_address = mode5_sat_address(context); |
1149
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375 uint16_t current_index = 0; |
6b0da6021544
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376 uint8_t count = 0; |
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377 do { |
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Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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378 uint16_t address = current_index * 8 + sat_address; |
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Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
379 uint16_t cache_address = current_index * 4; |
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Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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380 uint8_t height = ((context->sat_cache[cache_address+2] & 0x3) + 1) * 8; |
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Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
381 uint8_t width = (((context->sat_cache[cache_address+2] >> 2) & 0x3) + 1) * 8; |
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Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
382 int16_t y = ((context->sat_cache[cache_address] & 0x3) << 8 | context->sat_cache[cache_address+1]) & 0x1FF; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
383 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 | context->vdpmem[address + 7]) & 0x1FF; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
384 uint16_t link = context->sat_cache[cache_address+3] & 0x7F; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
385 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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1138
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|
386 uint8_t pri = context->vdpmem[address + 4] >> 7; |
6b0da6021544
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|
387 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
388 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
389 current_index = link; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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390 count++; |
6b0da6021544
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|
391 } while (current_index != 0 && count < 80); |
6b0da6021544
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|
392 } else { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
393 uint16_t sat_address = (context->regs[REG_SAT] & 0x7E) << 7; |
6b0da6021544
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|
394 for (int i = 0; i < 64; i++) |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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diff
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|
395 { |
1161
c2210d586950
A bunch of Mode 4 fixes
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1160
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changeset
|
396 uint8_t y = context->vdpmem[mode4_address_map[sat_address + (i ^ 1)]]; |
c2210d586950
A bunch of Mode 4 fixes
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1160
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changeset
|
397 if (y == 0xD0) { |
1149
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|
398 break; |
6b0da6021544
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diff
changeset
|
399 } |
1161
c2210d586950
A bunch of Mode 4 fixes
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1160
diff
changeset
|
400 uint8_t x = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2 + 1]]; |
c2210d586950
A bunch of Mode 4 fixes
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1160
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changeset
|
401 uint16_t tile_address = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2]] * 32 |
1149
6b0da6021544
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|
402 + (context->regs[REG_STILE_BASE] << 11 & 0x2000); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
403 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
404 tile_address &= ~32; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
405 } |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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1138
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changeset
|
406 printf("Sprite %d: X=%d, Y=%d, Pat=%X\n", i, x, y, tile_address); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
407 } |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
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|
408 } |
322
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents:
318
diff
changeset
|
409 } |
8e2fa485c0f2
Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents:
318
diff
changeset
|
410 |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
411 #define VRAM_READ 0 //0000 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
412 #define VRAM_WRITE 1 //0001 |
ce4046476abc
Add description of cd register value to vr debugger command
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parents:
699
diff
changeset
|
413 //2 would trigger register write 0010 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
414 #define CRAM_WRITE 3 //0011 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
415 #define VSRAM_READ 4 //0100 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
416 #define VSRAM_WRITE 5//0101 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
417 //6 would trigger regsiter write 0110 |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
418 //7 is a mystery //0111 |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
419 #define CRAM_READ 8 //1000 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
420 //9 is also a mystery //1001 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
421 //A would trigger register write 1010 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
422 //B is a mystery 1011 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
423 #define VRAM_READ8 0xC //1100 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
424 //D is a mystery 1101 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
425 //E would trigger register write 1110 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
426 //F is a mystery 1111 |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
427 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
428 //Possible theory on how bits work |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
429 //CD0 = Read/Write flag |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
430 //CD2,(CD1|CD3) = RAM type |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
431 // 00 = VRAM |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
432 // 01 = CRAM |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
433 // 10 = VSRAM |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
434 // 11 = VRAM8 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
435 //Would result in |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
436 // 7 = VRAM8 write |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
437 // 9 = CRAM write alias |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
438 // B = CRAM write alias |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
439 // D = VRAM8 write alias |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
440 // F = VRAM8 write alais |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
441 |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
442 #define DMA_START 0x20 |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
443 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
444 static const char * cd_name(uint8_t cd) |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
445 { |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
446 switch (cd & 0xF) |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
447 { |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
448 case VRAM_READ: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
449 return "VRAM read"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
450 case VRAM_WRITE: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
451 return "VRAM write"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
452 case CRAM_WRITE: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
453 return "CRAM write"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
454 case VSRAM_READ: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
455 return "VSRAM read"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
456 case VSRAM_WRITE: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
457 return "VSRAM write"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
458 case VRAM_READ8: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
459 return "VRAM read (undocumented 8-bit mode)"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
460 default: |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
461 return "invalid"; |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
462 } |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
463 } |
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
464 |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
465 void vdp_print_reg_explain(vdp_context * context) |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
466 { |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
467 char * hscroll[] = {"full", "7-line", "cell", "line"}; |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
468 printf("**Mode Group**\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
469 "00: %.2X | H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n" |
1331
9bba5ff5beb8
Add 128K VRAM bit to VDP register print in debugger
Michael Pavone <pavone@retrodev.com>
parents:
1325
diff
changeset
|
470 "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d, %dK VRAM\n" |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
471 "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
472 "0C: %.2X | Width: %d, Shadow/Highlight: %s\n", |
757
483f7e7926a6
More clang warning cleanup
Michael Pavone <pavone@retrodev.com>
parents:
748
diff
changeset
|
473 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0, |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
474 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled", |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
475 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled", |
1331
9bba5ff5beb8
Add 128K VRAM bit to VDP register print in debugger
Michael Pavone <pavone@retrodev.com>
parents:
1325
diff
changeset
|
476 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, context->regs[REG_MODE_1] & BIT_128K_VRAM ? 128 : 64, |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
477 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full", |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
478 hscroll[context->regs[REG_MODE_3] & 0x3], |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
479 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled"); |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
480 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
481 printf("\n**Table Group**\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
482 "02: %.2X | Scroll A Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
483 "03: %.2X | Window Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
484 "04: %.2X | Scroll B Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
485 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
486 "0D: %.2X | HScroll Data Table: $%.4X\n", |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
487 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
488 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
489 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13, |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
490 context->regs[REG_SAT], mode5_sat_address(context), |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
491 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
492 } else { |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
493 printf("\n**Table Group**\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
494 "02: %.2X | Background Name Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
495 "05: %.2X | Sprite Attribute Table: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
496 "06: %.2X | Sprite Tile Base: $%.4X\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
497 "08: %.2X | Background X Scroll: %d\n" |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
498 "09: %.2X | Background Y Scroll: %d\n", |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
499 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0xE) << 10, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
500 context->regs[REG_SAT], (context->regs[REG_SAT] & 0x7E) << 7, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
501 context->regs[REG_STILE_BASE], (context->regs[REG_STILE_BASE] & 2) << 11, |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
502 context->regs[REG_X_SCROLL], context->regs[REG_X_SCROLL], |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
503 context->regs[REG_Y_SCROLL], context->regs[REG_Y_SCROLL]); |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
504 |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
505 } |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
506 char * sizes[] = {"32", "64", "invalid", "128"}; |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
507 printf("\n**Misc Group**\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
508 "07: %.2X | Backdrop Color: $%X\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
509 "0A: %.2X | H-Int Counter: %u\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
510 "0F: %.2X | Auto-increment: $%X\n" |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
511 "10: %.2X | Scroll A/B Size: %sx%s\n", |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
512 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR], |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
513 context->regs[REG_HINT], context->regs[REG_HINT], |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
514 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC], |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
515 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]); |
621
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
516 char * src_types[] = {"68K", "68K", "Copy", "Fill"}; |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
517 printf("\n**DMA Group**\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
518 "13: %.2X |\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
519 "14: %.2X | DMA Length: $%.4X words\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
520 "15: %.2X |\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
521 "16: %.2X |\n" |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
522 "17: %.2X | DMA Source Address: $%.6X, Type: %s\n", |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
523 context->regs[REG_DMALEN_L], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
524 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
525 context->regs[REG_DMASRC_L], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
526 context->regs[REG_DMASRC_M], |
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
527 context->regs[REG_DMASRC_H], |
629
9089951a1994
Small fix to display of DMA source address in vr debug command
Michael Pavone <pavone@retrodev.com>
parents:
624
diff
changeset
|
528 context->regs[REG_DMASRC_H] << 17 | context->regs[REG_DMASRC_M] << 9 | context->regs[REG_DMASRC_L] << 1, |
621
5196333b37a6
Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents:
515
diff
changeset
|
529 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]); |
438
b3cee2fe690b
Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents:
437
diff
changeset
|
530 printf("\n**Internal Group**\n" |
b3cee2fe690b
Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents:
437
diff
changeset
|
531 "Address: %X\n" |
705
ce4046476abc
Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents:
699
diff
changeset
|
532 "CD: %X - %s\n" |
647
5d58dcd94733
Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents:
629
diff
changeset
|
533 "Pending: %s\n" |
5d58dcd94733
Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents:
629
diff
changeset
|
534 "VCounter: %d\n" |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
535 "HCounter: %d\n" |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
536 "VINT Pending: %s\n" |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
537 "HINT Pending: %s\n" |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
538 "Status: %X\n", |
1150
322d28e6f13c
Display both byte and word pending values to better reflect VDP pending state in PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1149
diff
changeset
|
539 context->address, context->cd, cd_name(context->cd), |
322d28e6f13c
Display both byte and word pending values to better reflect VDP pending state in PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1149
diff
changeset
|
540 (context->flags & FLAG_PENDING) ? "word" : (context->flags2 & FLAG2_BYTE_PENDING) ? "byte" : "none", |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
541 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false", |
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
542 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_control_port_read(context)); |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
543 |
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
544 //TODO: Window Group, DMA Group |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
545 } |
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
546 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
547 static uint8_t is_active(vdp_context *context) |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
548 { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
549 return context->state != INACTIVE && (context->regs[REG_MODE_2] & BIT_DISP_EN) != 0; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
550 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
551 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
552 static void scan_sprite_table(uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
553 { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
554 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) { |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
555 line += 1; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
556 uint16_t ymask, ymin; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
557 uint8_t height_mult; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
558 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
559 line *= 2; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
560 if (context->flags2 & FLAG2_EVEN_FIELD) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
561 line++; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
562 } |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
563 ymask = 0x3FF; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
564 ymin = 256; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
565 height_mult = 16; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
566 } else { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
567 ymask = 0x1FF; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
568 ymin = 128; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
569 height_mult = 8; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
570 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
571 context->sprite_index &= 0x7F; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
572 //TODO: Implement squirelly behavior documented by Kabuto |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
573 if (context->sprite_index >= context->max_sprites_frame) { |
38
898e3d035f42
Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents:
37
diff
changeset
|
574 context->sprite_index = 0; |
898e3d035f42
Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents:
37
diff
changeset
|
575 return; |
898e3d035f42
Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents:
37
diff
changeset
|
576 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
577 uint16_t address = context->sprite_index * 4; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
578 line += ymin; |
1346
f7ca42e020fd
Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1344
diff
changeset
|
579 line &= ymask; |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
580 uint16_t y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
581 uint8_t height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult; |
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
582 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
583 if (y <= line && line < (y + height)) { |
27
aa1c47fab3f1
Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents:
26
diff
changeset
|
584 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
585 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2]; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
586 context->sprite_info_list[context->slot_counter++].index = context->sprite_index; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
587 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
588 context->sprite_index = context->sat_cache[address+3] & 0x7F; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
589 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
590 { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
591 //TODO: Implement squirelly behavior documented by Kabuto |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
592 if (context->sprite_index >= context->max_sprites_frame) { |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
593 context->sprite_index = 0; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
594 return; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
595 } |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
596 address = context->sprite_index * 4; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
597 y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
598 height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult; |
323
8c01b4154480
Properly mask sprite X and Y coordinates
Mike Pavone <pavone@retrodev.com>
parents:
322
diff
changeset
|
599 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height); |
21
72ce60cb1711
Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents:
20
diff
changeset
|
600 if (y <= line && line < (y + height)) { |
27
aa1c47fab3f1
Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents:
26
diff
changeset
|
601 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line); |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
602 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2]; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
603 context->sprite_info_list[context->slot_counter++].index = context->sprite_index; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
604 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
605 context->sprite_index = context->sat_cache[address+3] & 0x7F; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
606 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
607 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
608 //TODO: Seems like the overflow flag should be set here if we run out of sprite info slots without hitting the end of the list |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
609 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
610 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
611 static void scan_sprite_table_mode4(vdp_context * context) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
612 { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
613 if (context->sprite_index < MAX_SPRITES_FRAME_H32) { |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
614 uint32_t line = context->vcounter; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
615 line &= 0xFF; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
616 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
617 uint32_t sat_address = mode4_address_map[(context->regs[REG_SAT] << 7 & 0x3F00) + context->sprite_index]; |
1138
25268334a24c
Fix Mode 4 sprite table Y scan to account for VRAM byte swapping
Michael Pavone <pavone@retrodev.com>
parents:
1137
diff
changeset
|
618 uint32_t y = context->vdpmem[sat_address+1]; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
619 uint32_t size = (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) ? 16 : 8; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
620 |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
621 if (y == 0xd0) { |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
622 context->sprite_index = MAX_SPRITES_FRAME_H32; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
623 return; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
624 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
625 if (y <= line && line < (y + size)) { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
626 if (!context->slot_counter) { |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
627 context->sprite_index = MAX_SPRITES_FRAME_H32; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
628 context->flags |= FLAG_DOT_OFLOW; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
629 return; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
630 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
631 context->sprite_info_list[--(context->slot_counter)].size = size; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
632 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
633 context->sprite_info_list[context->slot_counter].y = y; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
634 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
635 context->sprite_index++; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
636 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
637 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
638 if (context->sprite_index < MAX_SPRITES_FRAME_H32) { |
1138
25268334a24c
Fix Mode 4 sprite table Y scan to account for VRAM byte swapping
Michael Pavone <pavone@retrodev.com>
parents:
1137
diff
changeset
|
639 y = context->vdpmem[sat_address]; |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
640 if (y == 0xd0) { |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
641 context->sprite_index = MAX_SPRITES_FRAME_H32; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
642 return; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
643 } else { |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
644 if (y <= line && line < (y + size)) { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
645 if (!context->slot_counter) { |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
646 context->sprite_index = MAX_SPRITES_FRAME_H32; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
647 context->flags |= FLAG_DOT_OFLOW; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
648 return; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
649 } |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
650 context->sprite_info_list[--(context->slot_counter)].size = size; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
651 context->sprite_info_list[context->slot_counter].index = context->sprite_index; |
1358
3716b90d3470
Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents:
1357
diff
changeset
|
652 context->sprite_info_list[context->slot_counter].y = y; |
1122
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
653 } |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
654 context->sprite_index++; |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
655 } |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
656 } |
d4bef26d0977
Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents:
1121
diff
changeset
|
657 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
658 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
659 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
660 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
661 static void read_sprite_x(uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
662 { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
663 if (context->cur_slot == context->max_sprites_line) { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
664 context->cur_slot = 0; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
665 } |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
666 if (context->cur_slot < context->slot_counter) { |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
667 if (context->sprite_draws) { |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
668 line += 1; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
669 //in tiles |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
670 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
671 //in pixels |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
672 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
673 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
674 line *= 2; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
675 if (context->flags2 & FLAG2_EVEN_FIELD) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
676 line++; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
677 } |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
678 height *= 2; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
679 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
680 uint16_t ymask, ymin; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
681 if (context->double_res) { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
682 ymask = 0x3FF; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
683 ymin = 256; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
684 } else { |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
685 ymask = 0x1FF; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
686 ymin = 128; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
687 } |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
688 uint16_t att_addr = mode5_sat_address(context) + context->sprite_info_list[context->cur_slot].index * 8 + 4; |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
689 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1]; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
690 uint8_t pal_priority = (tileinfo >> 9) & 0x70; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
691 uint8_t row; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
692 uint16_t cache_addr = context->sprite_info_list[context->cur_slot].index * 4; |
1346
f7ca42e020fd
Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1344
diff
changeset
|
693 line = (line + ymin) & ymask; |
1338
3706b683cd48
Fix sprite rendering for negative line. Fixes remaining visual glitch in the Titancade scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1337
diff
changeset
|
694 int16_t y = ((context->sat_cache[cache_addr] << 8 | context->sat_cache[cache_addr+1]) & ymask)/* - ymin*/; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
695 if (tileinfo & MAP_BIT_V_FLIP) { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
696 row = (y + height - 1) - line; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
697 } else { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
698 row = line-y; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
699 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
700 row &= ymask >> 4; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
701 uint16_t address; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
702 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
703 address = ((tileinfo & 0x3FF) << 6) + row * 4; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
704 } else { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
705 address = ((tileinfo & 0x7FF) << 5) + row * 4; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
706 } |
323
8c01b4154480
Properly mask sprite X and Y coordinates
Mike Pavone <pavone@retrodev.com>
parents:
322
diff
changeset
|
707 int16_t x = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 | context->vdpmem[att_addr + 3]) & 0x1FF; |
36
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
708 if (x) { |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
709 context->flags |= FLAG_CAN_MASK; |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
710 } else if(context->flags & (FLAG_CAN_MASK | FLAG_DOT_OFLOW)) { |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
711 context->flags |= FLAG_MASKED; |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
712 } |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
713 |
36
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
714 context->flags &= ~FLAG_DOT_OFLOW; |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
715 int16_t i; |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
716 if (context->flags & FLAG_MASKED) { |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
717 for (i=0; i < width && context->sprite_draws; i++) { |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
718 --context->sprite_draws; |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
719 context->sprite_draw_list[context->sprite_draws].x_pos = -128; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
720 context->sprite_draw_list[context->sprite_draws].address = address + i * height * 4; |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
721 } |
36
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
722 } else { |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
723 x -= 128; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
724 int16_t base_x = x; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
725 int16_t dir; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
726 if (tileinfo & MAP_BIT_H_FLIP) { |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
727 x += (width-1) * 8; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
728 dir = -8; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
729 } else { |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
730 dir = 8; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
731 } |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
732 //printf("Sprite %d | x: %d, y: %d, width: %d, height: %d, pal_priority: %X, row: %d, tile addr: %X\n", context->sprite_info_list[context->cur_slot].index, x, context->sprite_info_list[context->cur_slot].y, width, height, pal_priority, row, address); |
35
233c7737c152
Small fix to overflow flag
Mike Pavone <pavone@retrodev.com>
parents:
34
diff
changeset
|
733 for (i=0; i < width && context->sprite_draws; i++, x += dir) { |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
734 --context->sprite_draws; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
735 context->sprite_draw_list[context->sprite_draws].address = address + i * height * 4; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
736 context->sprite_draw_list[context->sprite_draws].x_pos = x; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
737 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
738 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0; |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
739 } |
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
740 } |
1000
1a797fcbb35f
Added TODO for hardware checking
Michael Pavone <pavone@retrodev.com>
parents:
999
diff
changeset
|
741 //Used to be i < width |
1a797fcbb35f
Added TODO for hardware checking
Michael Pavone <pavone@retrodev.com>
parents:
999
diff
changeset
|
742 //TODO: Confirm this is the right condition on hardware |
1a797fcbb35f
Added TODO for hardware checking
Michael Pavone <pavone@retrodev.com>
parents:
999
diff
changeset
|
743 if (!context->sprite_draws) { |
36
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
744 context->flags |= FLAG_DOT_OFLOW; |
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
745 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
746 } else { |
34
0e7df84158b1
Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents:
32
diff
changeset
|
747 context->flags |= FLAG_DOT_OFLOW; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
748 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
749 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
750 context->cur_slot++; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
751 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
752 |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
753 static void read_sprite_x_mode4(vdp_context * context) |
427
2802318c14e1
Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents:
426
diff
changeset
|
754 { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
755 if (context->cur_slot >= context->slot_counter) { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
756 uint32_t address = (context->regs[REG_SAT] << 7 & 0x3F00) + 0x80 + context->sprite_info_list[context->cur_slot].index * 2; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
757 address = mode4_address_map[address]; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
758 --context->sprite_draws; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
759 uint32_t tile_address = context->vdpmem[address] * 32 + (context->regs[REG_STILE_BASE] << 11 & 0x2000); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
760 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) { |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
761 tile_address &= ~32; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
762 } |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
763 tile_address += (context->vcounter - context->sprite_info_list[context->cur_slot].y)* 4; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
764 context->sprite_draw_list[context->sprite_draws].x_pos = context->vdpmem[address + 1]; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
765 context->sprite_draw_list[context->sprite_draws].address = tile_address; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
766 context->cur_slot--; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
767 } |
427
2802318c14e1
Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents:
426
diff
changeset
|
768 } |
2802318c14e1
Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents:
426
diff
changeset
|
769 |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
770 #define CRAM_BITS 0xEEE |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
771 #define VSRAM_BITS 0x7FF |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
772 #define VSRAM_DIRTY_BITS 0xF800 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
773 |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
774 //rough estimate of slot number at which border display starts |
1270
687d3969416b
Adjust correspondance between slot number and actual video output to better match video signal measurements and analysis of Outrunners behavior on hardware. Partially fixes ticket:13
Michael Pavone <pavone@retrodev.com>
parents:
1269
diff
changeset
|
775 #define BG_START_SLOT 6 |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
776 |
1428
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
777 void write_cram_internal(vdp_context * context, uint16_t addr, uint16_t value) |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
778 { |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
779 context->cram[addr] = value; |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
780 context->colors[addr] = color_map[value & CRAM_BITS]; |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
781 context->colors[addr + CRAM_SIZE] = color_map[(value & CRAM_BITS) | FBUF_SHADOW]; |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
782 context->colors[addr + CRAM_SIZE*2] = color_map[(value & CRAM_BITS) | FBUF_HILIGHT]; |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
783 context->colors[addr + CRAM_SIZE*3] = color_map[(value & CRAM_BITS) | FBUF_MODE4]; |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
784 } |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
785 |
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
786 static void write_cram(vdp_context * context, uint16_t address, uint16_t value) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
787 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
788 uint16_t addr; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
789 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
790 addr = (address/2) & (CRAM_SIZE-1); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
791 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
792 addr = address & 0x1F; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
793 value = (value << 1 & 0xE) | (value << 2 & 0xE0) | (value & 0xE00); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
794 } |
1428
2540c05520f2
New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents:
1427
diff
changeset
|
795 write_cram_internal(context, addr, value); |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
796 |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
797 if (context->hslot >= BG_START_SLOT && ( |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
798 context->vcounter < context->inactive_start + context->border_bot |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
799 || context->vcounter > 0x200 - context->border_top |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
800 )) { |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
801 uint8_t bg_end_slot = BG_START_SLOT + (context->regs[REG_MODE_4] & BIT_H40) ? LINEBUF_SIZE/2 : (256+HORIZ_BORDER)/2; |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
802 if (context->hslot < bg_end_slot) { |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
803 uint32_t color = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->colors[addr] : context->colors[addr + CRAM_SIZE*3]; |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
804 context->output[(context->hslot - BG_START_SLOT)*2 + 1] = color; |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
805 } |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
806 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
807 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
808 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
809 static void vdp_advance_dma(vdp_context * context) |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
810 { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
811 context->regs[REG_DMASRC_L] += 1; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
812 if (!context->regs[REG_DMASRC_L]) { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
813 context->regs[REG_DMASRC_M] += 1; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
814 } |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
815 context->address += context->regs[REG_AUTOINC]; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
816 uint16_t dma_len = ((context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]) - 1; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
817 context->regs[REG_DMALEN_H] = dma_len >> 8; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
818 context->regs[REG_DMALEN_L] = dma_len; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
819 if (!dma_len) { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
820 context->flags &= ~FLAG_DMA_RUN; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
821 context->cd &= 0xF; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
822 } |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
823 } |
1019
e34334e6c682
Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running
Michael Pavone <pavone@retrodev.com>
parents:
1001
diff
changeset
|
824 |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
825 static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value) |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
826 { |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
827 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
828 if (!(address & 4)) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
829 uint32_t sat_address = mode5_sat_address(context); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
830 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
831 uint16_t cache_address = address - sat_address; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
832 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
833 context->sat_cache[cache_address] = value >> 8; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
834 context->sat_cache[cache_address^1] = value; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
835 } |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
836 } |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
837 } |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
838 } |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
839 |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
840 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value) |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
841 { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
842 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
843 if (!(address & 4)) { |
1320
df3d690cb2c3
SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1319
diff
changeset
|
844 uint32_t sat_address = mode5_sat_address(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
845 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
846 uint16_t cache_address = address - sat_address; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
847 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
848 context->sat_cache[cache_address] = value; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
849 } |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
850 } |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
851 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
852 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
853 |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
854 static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value) |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
855 { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
856 address = (address & 0x3FC) | (address >> 1 & 0xFC01) | (address >> 9 & 0x2); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
857 address ^= 1; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
858 //TODO: Support an option to actually have 128KB of VRAM |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
859 context->vdpmem[address] = value; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
860 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
861 |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
862 static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value) |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
863 { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
864 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
865 address &= 0xFFFF; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
866 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
867 address = mode4_address_map[address & 0x3FFF]; |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
868 } |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
869 context->vdpmem[address] = value; |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
870 } |
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
871 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
872 static void external_slot(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
873 { |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
874 if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80 && context->fifo_read < 0) { |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
875 context->fifo_read = (context->fifo_write-1) & (FIFO_SIZE-1); |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
876 fifo_entry * cur = context->fifo + context->fifo_read; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
877 cur->cycle = context->cycles; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
878 cur->address = context->address; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
879 cur->partial = 2; |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
880 vdp_advance_dma(context); |
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
881 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
882 fifo_entry * start = context->fifo + context->fifo_read; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
883 if (context->fifo_read >= 0 && start->cycle <= context->cycles) { |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
884 switch (start->cd & 0xF) |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
885 { |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
886 case VRAM_WRITE: |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
887 if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM|BIT_MODE_5)) == (BIT_128K_VRAM|BIT_MODE_5)) { |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
888 vdp_check_update_sat(context, start->address, start->value); |
1319
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
889 write_vram_word(context, start->address, start->value); |
b6796d63977f
Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents:
1318
diff
changeset
|
890 } else if (start->partial) { |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
891 //printf("VRAM Write: %X to %X at %d (line %d, slot %d)\n", start->value, start->address ^ 1, context->cycles, context->cycles/MCLKS_LINE, (context->cycles%MCLKS_LINE)/16); |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
892 uint8_t byte = start->partial == 2 ? start->value >> 8 : start->value; |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
893 if (start->partial > 1) { |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
894 vdp_check_update_sat_byte(context, start->address ^ 1, byte); |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
895 } |
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
896 write_vram_byte(context, start->address ^ 1, byte); |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
897 } else { |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
898 //printf("VRAM Write High: %X to %X at %d (line %d, slot %d)\n", start->value >> 8, start->address, context->cycles, context->cycles/MCLKS_LINE, (context->cycles%MCLKS_LINE)/16); |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
899 vdp_check_update_sat(context, start->address, start->value); |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
900 write_vram_byte(context, start->address, start->value >> 8); |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
901 start->partial = 1; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
902 //skip auto-increment and removal of entry from fifo |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
903 return; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
904 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
905 break; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
906 case CRAM_WRITE: { |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
907 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1)); |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
908 if (start->partial == 3) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
909 uint16_t val; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
910 if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
911 val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) | start->value << 8; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
912 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
913 uint16_t address = (context->regs[REG_MODE_2] & BIT_MODE_5) ? start->address >> 1 & (CRAM_SIZE-1) : start->address & 0x1F; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
914 val = (context->cram[address] & 0xFF00) | start->value; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
915 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
916 write_cram(context, start->address, val); |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
917 } else { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
918 write_cram(context, start->address, start->partial == 2 ? context->fifo[context->fifo_write].value : start->value); |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
919 } |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
920 break; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
921 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
922 case VSRAM_WRITE: |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
923 if (((start->address/2) & 63) < VSRAM_SIZE) { |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
924 //printf("VSRAM Write: %X to %X @ vcounter: %d, hslot: %d, cycle: %d\n", start->value, context->address, context->vcounter, context->hslot, context->cycles); |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
925 if (start->partial == 3) { |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
926 if (start->address & 1) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
927 context->vsram[(start->address/2) & 63] &= 0xFF; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
928 context->vsram[(start->address/2) & 63] |= start->value << 8; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
929 } else { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
930 context->vsram[(start->address/2) & 63] &= 0xFF00; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
931 context->vsram[(start->address/2) & 63] |= start->value; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
932 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
933 } else { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
934 context->vsram[(start->address/2) & 63] = start->partial == 2 ? context->fifo[context->fifo_write].value : start->value; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
935 } |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
936 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
937 |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
938 break; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
939 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
940 context->fifo_read = (context->fifo_read+1) & (FIFO_SIZE-1); |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
941 if (context->fifo_read == context->fifo_write) { |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
942 if ((context->cd & 0x20) && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80) { |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
943 context->flags |= FLAG_DMA_RUN; |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
944 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
945 context->fifo_read = -1; |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
946 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
947 } else if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & 0xC0) == 0xC0) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
948 if (context->flags & FLAG_READ_FETCHED) { |
998
bf63cbf1d7bb
Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents:
995
diff
changeset
|
949 write_vram_byte(context, context->address ^ 1, context->prefetch); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
950 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
951 //Update DMA state |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
952 vdp_advance_dma(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
953 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
954 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
955 } else { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
956 context->prefetch = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L] ^ 1]; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
957 |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
958 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
959 } |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
960 } else if (!(context->cd & 1) && !(context->flags & (FLAG_READ_FETCHED|FLAG_PENDING))) { |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
961 switch(context->cd & 0xF) |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
962 { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
963 case VRAM_READ: |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
964 if (context->flags2 & FLAG2_READ_PENDING) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
965 context->prefetch |= context->vdpmem[context->address | 1]; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
966 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
967 context->flags2 &= ~FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
968 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
969 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
970 } else { |
1318
bfdd450e7dea
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents:
1315
diff
changeset
|
971 //TODO: 128K VRAM Mode |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
972 context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
973 context->flags2 |= FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
974 } |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
975 break; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
976 case VRAM_READ8: { |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
977 uint32_t address = context->address ^ 1; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
978 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) { |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
979 address = mode4_address_map[address & 0x3FFF]; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
980 } |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
981 context->prefetch = context->vdpmem[address]; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
982 context->prefetch |= context->fifo[context->fifo_write].value & 0xFF00; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
983 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
984 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
985 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
986 break; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
987 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
988 case CRAM_READ: |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
989 context->prefetch = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
990 context->prefetch |= context->fifo[context->fifo_write].value & ~CRAM_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
991 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
992 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
993 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
994 break; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
995 case VSRAM_READ: { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
996 uint16_t address = (context->address /2) & 63; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
997 if (address >= VSRAM_SIZE) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
998 address = 0; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
999 } |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1000 context->prefetch = context->vsram[address] & VSRAM_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1001 context->prefetch |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1002 context->flags |= FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1003 //Should this happen after the prefetch or after the read? |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
1004 increment_address(context); |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1005 break; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1006 } |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
1007 } |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1008 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1009 } |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1010 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1011 static void run_dma_src(vdp_context * context, int32_t slot) |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1012 { |
75 | 1013 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode |
1014 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations | |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
1015 if (context->fifo_write == context->fifo_read) { |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1016 return; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1017 } |
478
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1018 fifo_entry * cur = NULL; |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
1019 if (!(context->regs[REG_DMASRC_H] & 0x80)) |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
1020 { |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
1021 //68K -> VDP |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
1022 if (slot == -1 || !is_refresh(context, slot-1)) { |
478
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1023 cur = context->fifo + context->fifo_write; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
1024 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
478
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1025 cur->address = context->address; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1026 cur->value = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1027 cur->cd = context->cd; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1028 cur->partial = 0; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1029 if (context->fifo_read < 0) { |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1030 context->fifo_read = context->fifo_write; |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1031 } |
2e4a4188cfb0
Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents:
477
diff
changeset
|
1032 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); |
984
bd4d698d995b
FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents:
983
diff
changeset
|
1033 vdp_advance_dma(context); |
75 | 1034 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1035 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1036 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1037 |
40 | 1038 #define WINDOW_RIGHT 0x80 |
1039 #define WINDOW_DOWN 0x80 | |
1040 | |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1041 static void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1042 { |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1043 uint16_t window_line_shift, v_offset_mask, vscroll_shift; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1044 if (context->double_res) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1045 line *= 2; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
1046 if (context->flags2 & FLAG2_EVEN_FIELD) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1047 line++; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1048 } |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1049 window_line_shift = 4; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1050 v_offset_mask = 0xF; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1051 vscroll_shift = 4; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1052 } else { |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1053 window_line_shift = 3; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1054 v_offset_mask = 0x7; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1055 vscroll_shift = 3; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1056 } |
1344
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1057 //TODO: Further research on vscroll latch behavior and the "first column bug" |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1058 if (context->regs[REG_MODE_3] & BIT_VSCROLL) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1059 if (!column) { |
1344
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1060 if (context->regs[REG_MODE_4] & BIT_H40) { |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1061 //Based on observed behavior documented by Eke-Eke, I'm guessing the VDP |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1062 //ends up fetching the last value on the VSRAM bus in the H40 case |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1063 //getting the last latched value should be close enough for now |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1064 if (!vsram_off) { |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1065 context->vscroll_latch[0] = context->vscroll_latch[1]; |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1066 } |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1067 } else { |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1068 //supposedly it's always forced to 0 in the H32 case |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1069 context->vscroll_latch[0] = context->vscroll_latch[1] = 0; |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1070 } |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1071 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
1072 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off]; |
1344
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1073 } |
6372de4da179
Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents:
1343
diff
changeset
|
1074 } |
40 | 1075 if (!vsram_off) { |
1076 uint16_t left_col, right_col; | |
1077 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) { | |
920
e64168bb2b25
Fix calculation of window start column when it's on the right side. This removes graphical glitches in Afterburner 2, Fireshark and Dungeons and Dragons: Warriors of the Eternal Sun and probably others
Michael Pavone <pavone@retrodev.com>
parents:
884
diff
changeset
|
1078 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2 + 2; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1079 right_col = 42; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1080 } else { |
40 | 1081 left_col = 0; |
1082 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2; | |
1083 if (right_col) { | |
1084 right_col += 2; | |
1085 } | |
1086 } | |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1087 uint16_t top_line, bottom_line; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1088 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) { |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1089 top_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1090 bottom_line = context->double_res ? 481 : 241; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1091 } else { |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1092 top_line = 0; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1093 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1094 } |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1095 if ((column >= left_col && column < right_col) || (line >= top_line && line < bottom_line)) { |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1096 uint16_t address = context->regs[REG_WINDOW] << 10; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1097 uint16_t line_offset, offset, mask; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
1098 if (context->regs[REG_MODE_4] & BIT_H40) { |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1099 address &= 0xF000; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1100 line_offset = (((line) >> vscroll_shift) * 64 * 2) & 0xFFF; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1101 mask = 0x7F; |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
1102 |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1103 } else { |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1104 address &= 0xF800; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1105 line_offset = (((line) >> vscroll_shift) * 32 * 2) & 0xFFF; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1106 mask = 0x3F; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1107 } |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1108 if (context->double_res) { |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1109 mask <<= 1; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1110 mask |= 1; |
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1111 } |
42
6653e67a6811
Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents:
41
diff
changeset
|
1112 offset = address + line_offset + (((column - 2) * 2) & mask); |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1113 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
1114 //printf("Window | top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]); |
42
6653e67a6811
Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents:
41
diff
changeset
|
1115 offset = address + line_offset + (((column - 1) * 2) & mask); |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1116 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
417
acdd6c5240fe
Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
415
diff
changeset
|
1117 context->v_offset = (line) & v_offset_mask; |
41
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1118 context->flags |= FLAG_WINDOW; |
e591004487bc
More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents:
40
diff
changeset
|
1119 return; |
40 | 1120 } |
1121 context->flags &= ~FLAG_WINDOW; | |
1122 } | |
1290
aa1a8eb5bb2b
Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents:
1289
diff
changeset
|
1123 //TODO: Verify behavior for 0x20 case |
aa1a8eb5bb2b
Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents:
1289
diff
changeset
|
1124 uint16_t vscroll = 0xFF | (context->regs[REG_SCROLL] & 0x30) << 4; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1125 if (context->double_res) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1126 vscroll <<= 1; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
1127 vscroll |= 1; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1128 } |
710
4cd8823f79e3
First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
Michael Pavone <pavone@retrodev.com>
parents:
708
diff
changeset
|
1129 vscroll &= context->vscroll_latch[vsram_off] + line; |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1130 context->v_offset = vscroll & v_offset_mask; |
26
a7c2b92d8056
Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents:
25
diff
changeset
|
1131 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset); |
414
51ee0f117365
Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents:
413
diff
changeset
|
1132 vscroll >>= vscroll_shift; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1133 uint16_t hscroll_mask; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1134 uint16_t v_mul; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1135 switch(context->regs[REG_SCROLL] & 0x3) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1136 { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1137 case 0: |
108
1a551a85cb06
Fix horizontal mask values for scroll plane map address calculation
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
1138 hscroll_mask = 0x1F; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1139 v_mul = 64; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1140 break; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1141 case 0x1: |
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
1142 hscroll_mask = 0x3F; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1143 v_mul = 128; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1144 break; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1145 case 0x2: |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1146 //TODO: Verify this behavior |
1334
7757d605e365
Adjust how the invalid size is handled for the horizontal dimmension of a plane. Fixes some garbage on the spinning cube scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1333
diff
changeset
|
1147 hscroll_mask = 0x1F; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1148 v_mul = 0; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1149 break; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1150 case 0x3: |
108
1a551a85cb06
Fix horizontal mask values for scroll plane map address calculation
Mike Pavone <pavone@retrodev.com>
parents:
87
diff
changeset
|
1151 hscroll_mask = 0x7F; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1152 v_mul = 256; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1153 break; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1154 } |
28 | 1155 uint16_t hscroll, offset; |
1156 for (int i = 0; i < 2; i++) { | |
39
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
1157 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask; |
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
1158 offset = address + ((vscroll * v_mul + hscroll*2) & 0x1FFF); |
3c69319269ef
Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents:
38
diff
changeset
|
1159 //printf("%s | line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset); |
28 | 1160 uint16_t col_val = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1]; |
1161 if (i) { | |
1162 context->col_2 = col_val; | |
1163 } else { | |
1164 context->col_1 = col_val; | |
1165 } | |
1166 } | |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1167 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1168 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1169 static void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1170 { |
25
4d0c20ad815a
Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents:
24
diff
changeset
|
1171 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1172 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1173 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1174 static void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1175 { |
25
4d0c20ad815a
Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents:
24
diff
changeset
|
1176 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1177 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1178 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1179 static void read_map_mode4(uint16_t column, uint32_t line, vdp_context * context) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1180 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1181 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1182 //add row |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1183 uint32_t vscroll = line; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1184 if (column < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1185 vscroll += context->regs[REG_Y_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1186 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1187 if (vscroll > 223) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1188 vscroll -= 224; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1189 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1190 address += (vscroll >> 3) * 2 * 32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1191 //add column |
1136
52f25c41abdd
Fix horizontal scrolling in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1135
diff
changeset
|
1192 address += ((column - (context->hscroll_a >> 3)) & 31) * 2; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1193 //adjust for weird VRAM mapping in Mode 4 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1194 address = mode4_address_map[address]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1195 context->col_1 = (context->vdpmem[address] << 8) | context->vdpmem[address+1]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1196 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1197 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1198 static void render_map(uint16_t col, uint8_t * tmp_buf, uint8_t offset, vdp_context * context) |
20
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diff
changeset
|
1199 { |
413
36fbbced25c2
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parents:
337
diff
changeset
|
1200 uint16_t address; |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1201 uint16_t vflip_base; |
413
36fbbced25c2
Initial work on interlace
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parents:
337
diff
changeset
|
1202 if (context->double_res) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
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337
diff
changeset
|
1203 address = ((col & 0x3FF) << 6); |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
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parents:
1029
diff
changeset
|
1204 vflip_base = 60; |
413
36fbbced25c2
Initial work on interlace
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parents:
337
diff
changeset
|
1205 } else { |
36fbbced25c2
Initial work on interlace
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parents:
337
diff
changeset
|
1206 address = ((col & 0x7FF) << 5); |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1207 vflip_base = 28; |
413
36fbbced25c2
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parents:
337
diff
changeset
|
1208 } |
20
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diff
changeset
|
1209 if (col & MAP_BIT_V_FLIP) { |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1210 address += vflip_base - 4 * context->v_offset; |
20
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parents:
diff
changeset
|
1211 } else { |
1032
679137a0e78e
Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents:
1029
diff
changeset
|
1212 address += 4 * context->v_offset; |
20
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parents:
diff
changeset
|
1213 } |
f664eeb55cb4
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parents:
diff
changeset
|
1214 uint16_t pal_priority = (col >> 9) & 0x70; |
f664eeb55cb4
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parents:
diff
changeset
|
1215 int32_t dir; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1216 if (col & MAP_BIT_H_FLIP) { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1217 offset += 7; |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1218 offset &= SCROLL_BUFFER_MASK; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1219 dir = -1; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1220 } else { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1221 dir = 1; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1222 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1223 for (uint32_t i=0; i < 4; i++, address++) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1224 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1225 tmp_buf[offset] = pal_priority | (context->vdpmem[address] >> 4); |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1226 offset += dir; |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1227 offset &= SCROLL_BUFFER_MASK; |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1228 tmp_buf[offset] = pal_priority | (context->vdpmem[address] & 0xF); |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1229 offset += dir; |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1230 offset &= SCROLL_BUFFER_MASK; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1231 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1232 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1233 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1234 static void render_map_1(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1235 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1236 render_map(context->col_1, context->tmp_buf_a, context->buf_a_off, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1237 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1238 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1239 static void render_map_2(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1240 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1241 render_map(context->col_2, context->tmp_buf_a, context->buf_a_off+8, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1242 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1243 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1244 static void render_map_3(vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1245 { |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1246 render_map(context->col_1, context->tmp_buf_b, context->buf_b_off, context); |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1247 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1248 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1249 static void fetch_map_mode4(uint16_t col, uint32_t line, vdp_context *context) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1250 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1251 //calculate pixel row to fetch |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1252 uint32_t vscroll = line; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1253 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1254 vscroll += context->regs[REG_Y_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1255 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1256 if (vscroll > 223) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1257 vscroll -= 224; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1258 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1259 vscroll &= 7; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1260 if (context->col_1 & 0x400) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1261 vscroll = 7 - vscroll; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1262 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1263 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1264 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1265 context->fetch_tmp[0] = context->vdpmem[address]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1266 context->fetch_tmp[1] = context->vdpmem[address+1]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1267 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1268 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1269 static void render_map_output(uint32_t line, int32_t col, vdp_context * context) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1270 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1271 uint32_t *dst; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1272 uint8_t output_disabled = (context->test_port & TEST_BIT_DISABLE) != 0; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1273 uint8_t test_layer = context->test_port >> 7 & 3; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
1274 if (context->state == PREPARING && !test_layer) { |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1275 if (col) { |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1276 col -= 2; |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1277 dst = context->output + BORDER_LEFT + col * 8; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1278 } else { |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1279 dst = context->output; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1280 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1281 for (int i = 0; i < BORDER_LEFT; i++, dst++) |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1282 { |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1283 *dst = bg_color; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1284 } |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1285 context->done_output = dst; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1286 return; |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1287 } |
1170
9170fc4d9835
Don't adjust cycles every frame. Only when we start getting close to UINT_MAX. Don't adjust all the way down to zero when we do adjust. Shouldn't fix anything, but may make debugging current issues easier.
Michael Pavone <pavone@retrodev.com>
parents:
1169
diff
changeset
|
1288 uint32_t color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1289 for (int i = 0; i < 16; i++) |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1290 { |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1291 *(dst++) = color; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1292 } |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1293 context->done_output = dst; |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1294 return; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1295 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1296 line &= 0xFF; |
1180
e2b81a0f8fd8
Undo poorly thought out minor optimization that screwed up rendering
Michael Pavone <pavone@retrodev.com>
parents:
1179
diff
changeset
|
1297 render_map(context->col_2, context->tmp_buf_b, context->buf_b_off+8, context); |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1298 uint8_t *sprite_buf, *plane_a, *plane_b; |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1299 int plane_a_off, plane_b_off; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1300 if (col) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1301 { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1302 col-=2; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1303 dst = context->output + BORDER_LEFT + col * 8; |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1304 if (context->debug < 2) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1305 sprite_buf = context->linebuf + col * 8; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1306 uint8_t a_src, src; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1307 if (context->flags & FLAG_WINDOW) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1308 plane_a_off = context->buf_a_off; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1309 a_src = DBG_SRC_W; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1310 } else { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1311 plane_a_off = context->buf_a_off - (context->hscroll_a & 0xF); |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1312 a_src = DBG_SRC_A; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1313 } |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1314 plane_b_off = context->buf_b_off - (context->hscroll_b & 0xF); |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1315 //printf("A | tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7)); |
450
3758bcdae5de
Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents:
438
diff
changeset
|
1316 |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1317 if (context->regs[REG_MODE_4] & BIT_HILIGHT) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1318 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1319 plane_a = context->tmp_buf_a + (plane_a_off & SCROLL_BUFFER_MASK); |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1320 plane_b = context->tmp_buf_b + (plane_b_off & SCROLL_BUFFER_MASK); |
748
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1321 uint8_t pixel = context->regs[REG_BG_COLOR]; |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1322 uint32_t *colors = context->colors; |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1323 src = DBG_SRC_BG; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1324 if (*plane_b & 0xF) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1325 pixel = *plane_b; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1326 src = DBG_SRC_B; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1327 } |
748
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1328 uint8_t intensity = *plane_b & BUF_BIT_PRIORITY; |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1329 if (*plane_a & 0xF && (*plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1330 pixel = *plane_a; |
1315
810ae0287d66
Fix minor bug that displayed window plane as if it were plane A In plane debug view
Michael Pavone <pavone@retrodev.com>
parents:
1299
diff
changeset
|
1331 src = a_src; |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1332 } |
748
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1333 intensity |= *plane_a & BUF_BIT_PRIORITY; |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1334 if (*sprite_buf & 0xF && (*sprite_buf & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1335 if ((*sprite_buf & 0x3F) == 0x3E) { |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1336 intensity += BUF_BIT_PRIORITY; |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1337 } else if ((*sprite_buf & 0x3F) == 0x3F) { |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1338 intensity = 0; |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1339 } else { |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1340 pixel = *sprite_buf; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1341 src = DBG_SRC_S; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1342 if ((pixel & 0xF) == 0xE) { |
748
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1343 intensity = BUF_BIT_PRIORITY; |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1344 } else { |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1345 intensity |= pixel & BUF_BIT_PRIORITY; |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1346 } |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1347 } |
748
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1348 } |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1349 if (output_disabled) { |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1350 pixel = 0x3F; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1351 } |
748
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1352 if (!intensity) { |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
1353 src |= DBG_SHADOW; |
748
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1354 colors += CRAM_SIZE; |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1355 } else if (intensity == BUF_BIT_PRIORITY*2) { |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1356 src |= DBG_HILIGHT; |
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1357 colors += CRAM_SIZE*2; |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1358 } |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1359 //TODO: Verify how test register stuff interacts with shadow/highlight |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1360 //TODO: Simulate CRAM corruption from bus fight |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1361 switch (test_layer) |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1362 { |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1363 case 1: |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1364 pixel &= *sprite_buf; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1365 if (output_disabled && pixel) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1366 src = DBG_SRC_S; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1367 } |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1368 break; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1369 case 2: |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1370 pixel &= *plane_a; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1371 if (output_disabled && pixel) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1372 src = DBG_SRC_A; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1373 } |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1374 break; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1375 case 3: |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1376 pixel &= *plane_b; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1377 if (output_disabled && pixel) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1378 src = DBG_SRC_B; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1379 } |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1380 break; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1381 } |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
822
diff
changeset
|
1382 |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1383 uint32_t outpixel; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1384 if (context->debug) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1385 outpixel = context->debugcolors[src]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1386 } else { |
748
45b62d237b7b
Fixed shadow/highlight mode
Michael Pavone <pavone@retrodev.com>
parents:
724
diff
changeset
|
1387 outpixel = colors[pixel & 0x3F]; |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1388 } |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1389 *(dst++) = outpixel; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1390 } |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1391 } else { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1392 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1393 plane_a = context->tmp_buf_a + (plane_a_off & SCROLL_BUFFER_MASK); |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1394 plane_b = context->tmp_buf_b + (plane_b_off & SCROLL_BUFFER_MASK); |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1395 uint8_t pixel = context->regs[REG_BG_COLOR]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1396 src = DBG_SRC_BG; |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1397 if (output_disabled) { |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1398 pixel = 0x3F; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1399 } else { |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1400 if (*plane_b & 0xF) { |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1401 pixel = *plane_b; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1402 src = DBG_SRC_B; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1403 } |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1404 if (*plane_a & 0xF && (*plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1405 pixel = *plane_a; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1406 src = a_src; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1407 } |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1408 if (*sprite_buf & 0xF && (*sprite_buf & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) { |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1409 pixel = *sprite_buf; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1410 src = DBG_SRC_S; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1411 } |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1412 } |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1413 //TODO: Simulate CRAM corruption from bus fight |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1414 switch (test_layer) |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1415 { |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1416 case 1: |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1417 pixel &= *sprite_buf; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1418 if (output_disabled && pixel) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1419 src = DBG_SRC_S; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1420 } |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1421 break; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1422 case 2: |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1423 pixel &= *plane_a; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1424 if (output_disabled && pixel) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1425 src = DBG_SRC_A; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1426 } |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1427 break; |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1428 case 3: |
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1429 pixel &= *plane_b; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1430 if (output_disabled && pixel) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1431 src = DBG_SRC_B; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1432 } |
1322
b1423d432c0e
Initial stab at implementing the output disable/layer selection bits of the VDP test register
Michael Pavone <pavone@retrodev.com>
parents:
1321
diff
changeset
|
1433 break; |
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
1434 } |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1435 uint32_t outpixel; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1436 if (context->debug) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1437 outpixel = context->debugcolors[src]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1438 } else { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1439 outpixel = context->colors[pixel & 0x3F]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1440 } |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1441 *(dst++) = outpixel; |
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
1442 } |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1443 } |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1444 } else if (context->debug == 2) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1445 if (col < 32) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1446 *(dst++) = context->colors[col * 2]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1447 *(dst++) = context->colors[col * 2]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1448 *(dst++) = context->colors[col * 2]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1449 *(dst++) = context->colors[col * 2]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1450 *(dst++) = context->colors[col * 2 + 1]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1451 *(dst++) = context->colors[col * 2 + 1]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1452 *(dst++) = context->colors[col * 2 + 1]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1453 *(dst++) = context->colors[col * 2 + 1]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1454 *(dst++) = context->colors[col * 2 + 2]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1455 *(dst++) = context->colors[col * 2 + 2]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1456 *(dst++) = context->colors[col * 2 + 2]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1457 *(dst++) = context->colors[col * 2 + 2]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1458 *(dst++) = context->colors[col * 2 + 3]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1459 *(dst++) = context->colors[col * 2 + 3]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1460 *(dst++) = context->colors[col * 2 + 3]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1461 *(dst++) = context->colors[col * 2 + 3]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1462 } else if (col == 32 || line >= 192) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1463 for (int32_t i = 0; i < 16; i ++) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1464 *(dst++) = 0; |
437
afbea09d7fb4
Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents:
436
diff
changeset
|
1465 } |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1466 } else { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1467 for (int32_t i = 0; i < 16; i ++) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1468 *(dst++) = context->colors[line / 3 + (col - 34) * 0x20]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1469 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1470 } |
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
1471 } else { |
771
0565b2c1a034
Add ability to change start address for VRAM viewer. Fix handling of DMA enable flag when it comes to DMA fills. This fixes a bug in James Pond 3
Michael Pavone <pavone@retrodev.com>
parents:
757
diff
changeset
|
1472 uint32_t base = (context->debug - 3) * 0x200; |
0565b2c1a034
Add ability to change start address for VRAM viewer. Fix handling of DMA enable flag when it comes to DMA fills. This fixes a bug in James Pond 3
Michael Pavone <pavone@retrodev.com>
parents:
757
diff
changeset
|
1473 uint32_t cell = base + (line / 8) * (context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32) + col; |
0565b2c1a034
Add ability to change start address for VRAM viewer. Fix handling of DMA enable flag when it comes to DMA fills. This fixes a bug in James Pond 3
Michael Pavone <pavone@retrodev.com>
parents:
757
diff
changeset
|
1474 uint32_t address = (cell * 32 + (line % 8) * 4) & 0xFFFF; |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1475 for (int32_t i = 0; i < 4; i ++) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1476 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1477 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1478 address++; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1479 } |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1480 cell++; |
771
0565b2c1a034
Add ability to change start address for VRAM viewer. Fix handling of DMA enable flag when it comes to DMA fills. This fixes a bug in James Pond 3
Michael Pavone <pavone@retrodev.com>
parents:
757
diff
changeset
|
1481 address = (cell * 32 + (line % 8) * 4) & 0xFFFF; |
722
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1482 for (int32_t i = 0; i < 4; i ++) { |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1483 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] >> 4)]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1484 *(dst++) = context->colors[(context->debug_pal << 4) | (context->vdpmem[address] & 0xF)]; |
8f5339961903
Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents:
720
diff
changeset
|
1485 address++; |
230
d3266cee02c9
Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents:
191
diff
changeset
|
1486 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1487 } |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1488 } else { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1489 dst = context->output; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1490 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1491 if (output_disabled) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1492 pixel = 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1493 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1494 uint32_t bg_color = context->colors[pixel]; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1495 if (test_layer) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1496 switch(test_layer) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1497 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1498 case 1: |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
1499 bg_color = context->colors[0]; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1500 for (int i = 0; i < BORDER_LEFT; i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1501 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1502 *dst = bg_color; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1503 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1504 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1505 case 2: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1506 //plane A |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1507 //TODO: Deal with Window layer |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1508 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1509 i = 0; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1510 uint8_t buf_off = context->buf_a_off - (context->hscroll_a & 0xF) + (16 - BORDER_LEFT); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1511 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1512 for (; i < BORDER_LEFT; buf_off++, i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1513 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1514 *dst = context->colors[context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK]]; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1515 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1516 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1517 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1518 case 3: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1519 //plane B |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1520 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1521 i = 0; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1522 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF) + (16 - BORDER_LEFT); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1523 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1524 for (; i < BORDER_LEFT; buf_off++, i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1525 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1526 *dst = context->colors[context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK]]; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1527 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1528 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1529 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1530 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1531 } else { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1532 for (int i = 0; i < BORDER_LEFT; i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1533 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1534 *dst = bg_color; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1535 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1536 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1537 } |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
1538 context->done_output = dst; |
436
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1539 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
e341fd5aa996
Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents:
427
diff
changeset
|
1540 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1541 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1542 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1543 static void render_map_mode4(uint32_t line, int32_t col, vdp_context * context) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1544 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1545 uint32_t vscroll = line; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1546 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1547 vscroll += context->regs[REG_Y_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1548 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1549 if (vscroll > 223) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1550 vscroll -= 224; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1551 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1552 vscroll &= 7; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1553 if (context->col_1 & 0x400) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1554 //vflip |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1555 vscroll = 7 - vscroll; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1556 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1557 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1558 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1559 pixels |= planar_to_chunky[context->fetch_tmp[1]]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1560 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1561 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4 + 2]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1562 pixels |= planar_to_chunky[context->vdpmem[address]] << 3; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1563 pixels |= planar_to_chunky[context->vdpmem[address+1]] << 2; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1564 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1565 int i, i_inc, i_limit; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1566 if (context->col_1 & 0x200) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1567 //hflip |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1568 i = 0; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1569 i_inc = 4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1570 i_limit = 32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1571 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1572 i = 28; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1573 i_inc = -4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1574 i_limit = -4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1575 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1576 uint8_t pal_priority = (context->col_1 >> 7 & 0x10) | (context->col_1 >> 6 & 0x40); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1577 for (uint8_t *dst = context->tmp_buf_a + context->buf_a_off; i != i_limit; i += i_inc, dst++) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1578 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1579 *dst = (pixels >> i & 0xF) | pal_priority; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1580 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1581 context->buf_a_off = (context->buf_a_off + 8) & 15; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1582 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1583 uint8_t bgcolor = 0x10 | (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3; |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1584 uint32_t *dst = context->output + col * 8 + BORDER_LEFT; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1585 if (context->state == PREPARING) { |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1586 for (int i = 0; i < 16; i++) |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1587 { |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1588 *(dst++) = context->colors[bgcolor]; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1589 } |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1590 context->done_output = dst; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1591 return; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1592 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1593 if (context->debug < 2) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1594 if (col || !(context->regs[REG_MODE_1] & BIT_COL0_MASK)) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1595 uint8_t *sprite_src = context->linebuf + col * 8; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1596 if (context->regs[REG_MODE_1] & BIT_SPRITE_8PX) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1597 sprite_src += 8; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1598 } |
1121
1913f9c28003
Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents:
1120
diff
changeset
|
1599 for (int i = 0; i < 8; i++, sprite_src++) |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1600 { |
1121
1913f9c28003
Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents:
1120
diff
changeset
|
1601 uint8_t *bg_src = context->tmp_buf_a + ((8 + i + col * 8 - (context->hscroll_a & 0x7)) & 15); |
1132
fd3b8ac57aca
Fix rendering of BG color index 0 in Mode 4. Only transparent with respect to sprites and not the backdrop like in Mode 5
Michael Pavone <pavone@retrodev.com>
parents:
1127
diff
changeset
|
1602 if ((*bg_src & 0x4F) > 0x40 || !*sprite_src) { |
fd3b8ac57aca
Fix rendering of BG color index 0 in Mode 4. Only transparent with respect to sprites and not the backdrop like in Mode 5
Michael Pavone <pavone@retrodev.com>
parents:
1127
diff
changeset
|
1603 //background plane has priority and is opaque or sprite layer is transparent |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1604 if (context->debug) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1605 *(dst++) = context->debugcolors[DBG_SRC_A]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1606 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1607 *(dst++) = context->colors[(*bg_src & 0x1F) + CRAM_SIZE*3]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1608 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1609 } else { |
1132
fd3b8ac57aca
Fix rendering of BG color index 0 in Mode 4. Only transparent with respect to sprites and not the backdrop like in Mode 5
Michael Pavone <pavone@retrodev.com>
parents:
1127
diff
changeset
|
1610 //sprite layer is opaque and not covered by high priority BG pixels |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1611 if (context->debug) { |
1132
fd3b8ac57aca
Fix rendering of BG color index 0 in Mode 4. Only transparent with respect to sprites and not the backdrop like in Mode 5
Michael Pavone <pavone@retrodev.com>
parents:
1127
diff
changeset
|
1612 *(dst++) = context->debugcolors[DBG_SRC_S]; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1613 } else { |
1132
fd3b8ac57aca
Fix rendering of BG color index 0 in Mode 4. Only transparent with respect to sprites and not the backdrop like in Mode 5
Michael Pavone <pavone@retrodev.com>
parents:
1127
diff
changeset
|
1614 *(dst++) = context->colors[*sprite_src | 0x10 + CRAM_SIZE*3]; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1615 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1616 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1617 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1618 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1619 for (int i = 0; i < 8; i++) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1620 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1621 *(dst++) = context->colors[bgcolor]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1622 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1623 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1624 } else if (context->debug == 2) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1625 for (int i = 0; i < 8; i++) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1626 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1627 *(dst++) = context->colors[CRAM_SIZE*3 + col]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1628 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1629 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1630 uint32_t cell = (line / 8) * 32 + col; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1631 uint32_t address = cell * 32 + (line % 8) * 4; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1632 uint32_t m4_address = mode4_address_map[address & 0x3FFF]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1633 uint32_t pixel = planar_to_chunky[context->vdpmem[m4_address]] << 1; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1634 pixel |= planar_to_chunky[context->vdpmem[m4_address + 1]]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1635 m4_address = mode4_address_map[(address + 2) & 0x3FFF]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1636 pixel |= planar_to_chunky[context->vdpmem[m4_address]] << 3; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1637 pixel |= planar_to_chunky[context->vdpmem[m4_address + 1]] << 2; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1638 if (context->debug_pal < 2) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1639 for (int i = 28; i >= 0; i -= 4) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1640 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1641 *(dst++) = context->colors[CRAM_SIZE*3 | (context->debug_pal << 4) | (pixel >> i & 0xF)]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1642 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1643 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1644 for (int i = 28; i >= 0; i -= 4) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1645 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1646 uint8_t value = (pixel >> i & 0xF) * 17; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1647 if (context->debug_pal == 3) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1648 value = 255 - value; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1649 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1650 *(dst++) = render_map_color(value, value, value); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1651 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1652 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1653 } |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1654 context->done_output = dst; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1655 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1656 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1657 static uint32_t const h40_hsync_cycles[] = {19, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 19}; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1658 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
1659 static void vdp_advance_line(vdp_context *context) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1660 { |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1661 #ifdef TIMING_DEBUG |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1662 static uint32_t last_line = 0xFFFFFFFF; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1663 if (last_line != 0xFFFFFFFF) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1664 uint32_t diff = context->cycles - last_line; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1665 if (diff != MCLKS_LINE) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1666 printf("Line %d took %d cycles\n", context->vcounter, diff); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1667 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1668 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1669 last_line = context->cycles; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1670 #endif |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1671 context->vcounter++; |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1672 |
1156
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1673 uint8_t is_mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1674 if (is_mode_5) { |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1675 if (context->flags2 & FLAG2_REGION_PAL) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1676 if (context->regs[REG_MODE_2] & BIT_PAL) { |
1156
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1677 if (context->vcounter == 0x10B) { |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1678 context->vcounter = 0x1D2; |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1679 } |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1680 } else if (context->vcounter == 0x103){ |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1681 context->vcounter = 0x1CA; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1682 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1683 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1684 if (context->regs[REG_MODE_2] & BIT_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1685 if (context->vcounter == 0x100) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1686 context->vcounter = 0x1FA; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1687 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1688 } else if (context->vcounter == 0xEB) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1689 context->vcounter = 0x1E5; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1690 } |
1299
da1ffc4026c4
Fix latching of V32 mode bit
Michael Pavone <pavone@retrodev.com>
parents:
1290
diff
changeset
|
1691 } |
1156
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1692 } else if (context->vcounter == 0xDB) { |
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
1693 context->vcounter = 0x1D5; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1694 } |
1273
6dedaa645843
Fix graphical corruption and sprite flickering introduced into some games by the last change for horizontal border support
Michael Pavone <pavone@retrodev.com>
parents:
1272
diff
changeset
|
1695 context->vcounter &= 0x1FF; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1696 if (context->state == PREPARING) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1697 context->state = ACTIVE; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1698 } |
1377
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
1699 if (context->vcounter == 0x1FF) { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
1700 context->flags2 &= ~FLAG2_PAUSE; |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
1701 } |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1702 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1703 if (context->state != ACTIVE) { |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1704 context->hint_counter = context->regs[REG_HINT]; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1705 } else if (context->hint_counter) { |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1706 context->hint_counter--; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1707 } else { |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1708 context->flags2 |= FLAG2_HINT_PENDING; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1709 context->pending_hint_start = context->cycles; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1710 context->hint_counter = context->regs[REG_HINT]; |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1711 } |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1712 } |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1713 |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1714 static void advance_output_line(vdp_context *context) |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1715 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1716 if (headless) { |
1168 | 1717 if (context->vcounter == context->inactive_start) { |
1718 context->frame++; | |
1719 } | |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1720 context->vcounter &= 0x1FF; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1721 } else { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1722 uint16_t lines_max = (context->flags2 & FLAG2_REGION_PAL) |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1723 ? 240 + BORDER_TOP_V30_PAL + BORDER_BOT_V30_PAL |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1724 : 224 + BORDER_TOP_V28 + BORDER_BOT_V28; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1725 |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1726 if (context->output_lines == lines_max) { |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
1727 render_framebuffer_updated(context->flags2 & FLAG2_EVEN_FIELD ? FRAMEBUFFER_EVEN: FRAMEBUFFER_ODD, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER)); |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
1728 if (context->double_res) { |
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
1729 context->flags2 ^= FLAG2_EVEN_FIELD; |
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
1730 } |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1731 context->fb = render_get_framebuffer(context->flags2 & FLAG2_EVEN_FIELD ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD, &context->output_pitch); |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1732 context->h40_lines = 0; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1733 context->frame++; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1734 context->output_lines = 0; |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1735 } |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1736 uint32_t output_line = context->vcounter; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1737 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) { |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1738 //vcounter increment occurs much later in Mode 4 |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1739 output_line++; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1740 } |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1741 if (output_line < context->inactive_start + context->border_bot && context->output_lines > 0) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1742 output_line = context->output_lines++;//context->border_top + context->vcounter; |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
1743 } else if (output_line >= 0x200 - context->border_top) { |
1385
1eded4f19910
Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time
Michael Pavone <pavone@retrodev.com>
parents:
1380
diff
changeset
|
1744 if (output_line == 0x200 - context->border_top) { |
1eded4f19910
Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time
Michael Pavone <pavone@retrodev.com>
parents:
1380
diff
changeset
|
1745 //We're at the top of the display, force context->output_lines to be zero to avoid |
1eded4f19910
Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time
Michael Pavone <pavone@retrodev.com>
parents:
1380
diff
changeset
|
1746 //potential screen rolling if the mode is changed at an inopportune time |
1eded4f19910
Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time
Michael Pavone <pavone@retrodev.com>
parents:
1380
diff
changeset
|
1747 context->output_lines = 0; |
1eded4f19910
Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time
Michael Pavone <pavone@retrodev.com>
parents:
1380
diff
changeset
|
1748 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1749 output_line = context->output_lines++;//context->vcounter - (0x200 - context->border_top); |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1750 } else { |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1751 output_line = INVALID_LINE; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
1752 } |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1753 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * output_line); |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
1754 context->done_output = context->output; |
1271
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
1755 #ifdef DEBUG_FB_FILL |
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
1756 for (int i = 0; i < LINEBUF_SIZE; i++) |
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
1757 { |
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
1758 context->output[i] = 0xFFFF00FF; |
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
1759 } |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1760 #endif |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1761 if (output_line != INVALID_LINE && (context->regs[REG_MODE_4] & BIT_H40)) { |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
1762 context->h40_lines++; |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
1763 } |
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
1764 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1765 } |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1766 |
1401
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1767 void vdp_release_framebuffer(vdp_context *context) |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1768 { |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1769 render_framebuffer_updated(context->flags2 & FLAG2_EVEN_FIELD ? FRAMEBUFFER_EVEN: FRAMEBUFFER_ODD, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER)); |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1770 context->output = context->fb = NULL; |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1771 } |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1772 |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1773 void vdp_reacquire_framebuffer(vdp_context *context) |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1774 { |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1775 context->fb = render_get_framebuffer(context->flags2 & FLAG2_EVEN_FIELD ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD, &context->output_pitch); |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1776 uint16_t lines_max = (context->flags2 & FLAG2_REGION_PAL) |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1777 ? 240 + BORDER_TOP_V30_PAL + BORDER_BOT_V30_PAL |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1778 : 224 + BORDER_TOP_V28 + BORDER_BOT_V28; |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1779 if (context->output_lines <= lines_max && context->output_lines > 0) { |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1780 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * (context->output_lines - 1)); |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1781 } else { |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1782 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * INVALID_LINE); |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1783 } |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1784 } |
b56c8c51ca5d
Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents:
1385
diff
changeset
|
1785 |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1786 static void render_border_garbage(vdp_context *context, uint32_t address, uint8_t *buf, uint8_t buf_off, uint16_t col) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1787 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1788 uint8_t base = col >> 9 & 0x30; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1789 for (int i = 0; i < 4; i++, address++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1790 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1791 uint8_t byte = context->vdpmem[address & 0xFFFF]; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1792 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte >> 4; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1793 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte & 0xF; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1794 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1795 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1796 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1797 static void draw_right_border(vdp_context *context) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1798 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1799 uint32_t *dst = context->output + BORDER_LEFT + ((context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1800 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1801 if ((context->test_port & TEST_BIT_DISABLE) != 0) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1802 pixel = 0x3F; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1803 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1804 uint32_t bg_color = context->colors[pixel]; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1805 uint8_t test_layer = context->test_port >> 7 & 3; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1806 if (test_layer) { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1807 switch(test_layer) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1808 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1809 case 1: |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
1810 bg_color = context->colors[0]; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1811 for (int i = 0; i < BORDER_RIGHT; i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1812 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1813 *dst = bg_color; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1814 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1815 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1816 case 2: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1817 //plane A |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1818 //TODO: Deal with Window layer |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1819 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1820 i = 0; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1821 uint8_t buf_off = context->buf_a_off - (context->hscroll_a & 0xF); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1822 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1823 for (; i < BORDER_RIGHT; buf_off++, i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1824 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1825 *dst = context->colors[context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK] & 0x3F]; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1826 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1827 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1828 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1829 case 3: { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1830 //plane B |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1831 int i; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1832 i = 0; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1833 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1834 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK); |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1835 for (; i < BORDER_RIGHT; buf_off++, i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1836 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1837 *dst = context->colors[context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK] & 0x3F]; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1838 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1839 break; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1840 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1841 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1842 } else { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1843 for (int i = 0; i < BORDER_RIGHT; i++, dst++) |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1844 { |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1845 *dst = bg_color; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1846 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1847 } |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
1848 context->done_output = dst; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1849 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1850 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK; |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1851 } |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1852 |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1853 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; } |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
1854 #define CHECK_LIMIT if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } context->hslot++; context->cycles += slot_cycles; CHECK_ONLY |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1855 |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1856 #define COLUMN_RENDER_BLOCK(column, startcyc) \ |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1857 case startcyc:\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1858 read_map_scroll_a(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1859 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
1860 case ((startcyc+1)&0xFF):\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1861 external_slot(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1862 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
1863 case ((startcyc+2)&0xFF):\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1864 render_map_1(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1865 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
1866 case ((startcyc+3)&0xFF):\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1867 render_map_2(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1868 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
1869 case ((startcyc+4)&0xFF):\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1870 read_map_scroll_b(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1871 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
1872 case ((startcyc+5)&0xFF):\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1873 read_sprite_x(context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1874 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
1875 case ((startcyc+6)&0xFF):\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1876 render_map_3(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1877 CHECK_LIMIT\ |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
1878 case ((startcyc+7)&0xFF):\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1879 render_map_output(context->vcounter, column, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1880 CHECK_LIMIT |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1881 |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1882 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \ |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1883 case startcyc:\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1884 read_map_scroll_a(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1885 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1886 case (startcyc+1):\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1887 /* refresh, no don't run dma src */\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1888 context->hslot++;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1889 context->cycles += slot_cycles;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1890 CHECK_ONLY\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1891 case (startcyc+2):\ |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1892 render_map_1(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1893 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1894 case (startcyc+3):\ |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1895 render_map_2(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1896 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1897 case (startcyc+4):\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1898 read_map_scroll_b(column, context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1899 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1900 case (startcyc+5):\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1901 read_sprite_x(context->vcounter, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1902 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1903 case (startcyc+6):\ |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1904 render_map_3(context);\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1905 CHECK_LIMIT\ |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
1906 case (startcyc+7):\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1907 render_map_output(context->vcounter, column, context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1908 CHECK_LIMIT |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1909 |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1910 #define COLUMN_RENDER_BLOCK_MODE4(column, startcyc) \ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1911 case startcyc:\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1912 read_map_mode4(column, context->vcounter, context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1913 CHECK_LIMIT\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1914 case ((startcyc+1)&0xFF):\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
1915 if (column & 3) {\ |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
1916 scan_sprite_table_mode4(context);\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1917 } else {\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1918 external_slot(context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1919 }\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1920 CHECK_LIMIT\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1921 case ((startcyc+2)&0xFF):\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1922 fetch_map_mode4(column, context->vcounter, context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1923 CHECK_LIMIT\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1924 case ((startcyc+3)&0xFF):\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1925 render_map_mode4(context->vcounter, column, context);\ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
1926 CHECK_LIMIT |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1927 |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1928 #define CHECK_LIMIT_HSYNC(slot) \ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1929 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1930 if (slot >= HSYNC_SLOT_H40 && slot < HSYNC_END_H40) {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1931 context->cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1932 } else {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1933 context->cycles += slot_cycles;\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1934 }\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1935 if (slot == 182) {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1936 context->hslot = 229;\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1937 } else {\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1938 context->hslot++;\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1939 }\ |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1940 CHECK_ONLY |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
822
diff
changeset
|
1941 |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1942 #define SPRITE_RENDER_H40(slot) \ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1943 case slot:\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1944 if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\ |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1945 advance_output_line(context);\ |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1946 }\ |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1947 if (slot == 168 || slot == 247 || slot == 248) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1948 render_border_garbage(\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1949 context,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1950 context->sprite_draw_list[context->cur_slot].address,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1951 context->tmp_buf_b,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1952 context->buf_b_off + (slot == 247 ? 0 : 8),\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1953 slot == 247 ? context->col_1 : context->col_2\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1954 );\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1955 if (slot == 248) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1956 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1957 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1958 }\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1959 } else if (slot == 243) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1960 render_border_garbage(\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1961 context,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1962 context->sprite_draw_list[context->cur_slot].address,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1963 context->tmp_buf_a,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1964 context->buf_a_off,\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1965 context->col_1\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1966 );\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1967 } else if (slot == 169) {\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1968 draw_right_border(context);\ |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
1969 }\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1970 render_sprite_cells( context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1971 scan_sprite_table(context->vcounter, context);\ |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
1972 CHECK_LIMIT_HSYNC(slot) |
884
252dfd29831d
Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents:
822
diff
changeset
|
1973 |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1974 //Note that the line advancement check will fail if BG_START_SLOT is > 6 |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1975 //as we're bumping up against the hcounter jump |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1976 #define SPRITE_RENDER_H32(slot) \ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1977 case slot:\ |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1978 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\ |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1979 advance_output_line(context);\ |
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
1980 }\ |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1981 if (slot == 136 || slot == 247 || slot == 248) {\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1982 render_border_garbage(\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1983 context,\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1984 context->sprite_draw_list[context->cur_slot].address,\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1985 context->tmp_buf_b,\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1986 context->buf_b_off + (slot == 247 ? 0 : 8),\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1987 slot == 247 ? context->col_1 : context->col_2\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1988 );\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1989 if (slot == 248) {\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1990 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1991 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1992 }\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1993 } else if (slot == 137) {\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1994 draw_right_border(context);\ |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
1995 }\ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1996 render_sprite_cells( context);\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1997 scan_sprite_table(context->vcounter, context);\ |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
1998 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \ |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
1999 if (slot == 147) {\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2000 context->hslot = 233;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2001 } else {\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2002 context->hslot++;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2003 }\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2004 context->cycles += slot_cycles;\ |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2005 CHECK_ONLY |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2006 |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2007 #define MODE4_CHECK_SLOT_LINE(slot) \ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2008 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \ |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2009 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2010 advance_output_line(context);\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2011 }\ |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2012 if ((slot) == 147) {\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2013 context->hslot = 233;\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2014 } else {\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2015 context->hslot++;\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2016 }\ |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2017 context->cycles += slot_cycles;\ |
1163
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2018 if ((slot+1) == LINE_CHANGE_MODE4) {\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2019 vdp_advance_line(context);\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2020 if (context->vcounter == 192) {\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2021 return;\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2022 }\ |
b251899f2b97
Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents:
1161
diff
changeset
|
2023 }\ |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2024 CHECK_ONLY |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2025 |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2026 #define CALC_SLOT(slot, increment) ((slot+increment) > 147 && (slot+increment) < 233 ? (slot+increment-148+233): (slot+increment)) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2027 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2028 #define SPRITE_RENDER_H32_MODE4(slot) \ |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2029 case slot:\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2030 read_sprite_x_mode4(context);\ |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2031 MODE4_CHECK_SLOT_LINE(slot)\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2032 case CALC_SLOT(slot, 1):\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2033 read_sprite_x_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2034 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot,1))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2035 case CALC_SLOT(slot, 2):\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2036 fetch_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2037 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 2))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2038 case CALC_SLOT(slot, 3):\ |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2039 if ((slot + 3) == 140) {\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2040 uint32_t *dst = context->output + BORDER_LEFT + 256 + 8;\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2041 uint32_t bgcolor = context->colors[0x10 | (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3];\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2042 for (int i = 0; i < BORDER_RIGHT-8; i++, dst++)\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2043 {\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2044 *dst = bgcolor;\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2045 }\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2046 context->done_output = dst;\ |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2047 }\ |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2048 render_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2049 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 3))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2050 case CALC_SLOT(slot, 4):\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2051 fetch_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2052 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 4))\ |
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2053 case CALC_SLOT(slot, 5):\ |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2054 render_sprite_cells_mode4(context);\ |
1161
c2210d586950
A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents:
1160
diff
changeset
|
2055 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 5)) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2056 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
2057 static void vdp_h40(vdp_context * context, uint32_t target_cycles) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2058 { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2059 uint16_t address; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2060 uint32_t mask; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2061 uint32_t const slot_cycles = MCLKS_SLOT_H40; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2062 switch(context->hslot) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2063 { |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2064 for (;;) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2065 { |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2066 case 165: |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2067 if (context->state == PREPARING) { |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2068 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2069 uint32_t *dst = context->output + (context->hslot - BG_START_SLOT) * 2; |
1368
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2070 if (dst >= context->done_output) { |
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2071 *dst = bg_color; |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2072 } |
1368
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2073 dst++; |
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2074 if (dst >= context->done_output) { |
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2075 *dst = bg_color; |
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2076 } |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2077 external_slot(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2078 } else { |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2079 render_sprite_cells(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2080 } |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2081 CHECK_LIMIT |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2082 case 166: |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2083 if (context->state == PREPARING) { |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2084 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2085 uint32_t *dst = context->output + (context->hslot - BG_START_SLOT) * 2; |
1368
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2086 if (dst >= context->done_output) { |
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2087 *dst = bg_color; |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2088 } |
1368
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2089 dst++; |
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2090 if (dst >= context->done_output) { |
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2091 *dst = bg_color; |
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2092 } |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2093 external_slot(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2094 } else { |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2095 render_sprite_cells(context); |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2096 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2097 if (context->vcounter == context->inactive_start) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2098 context->hslot++; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2099 context->cycles += slot_cycles; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2100 return; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2101 } |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2102 CHECK_LIMIT |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2103 //sprite attribute table scan starts |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2104 case 167: |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2105 if (context->state == PREPARING) { |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2106 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2107 uint32_t *dst = context->output + (context->hslot - BG_START_SLOT) * 2; |
1361
1679ea04c449
WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene
Michael Pavone <pavone@retrodev.com>
parents:
1358
diff
changeset
|
2108 for (int i = 0; i < LINEBUF_SIZE - 2 * (context->hslot - BG_START_SLOT); i++, dst++) |
1271
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
2109 { |
1361
1679ea04c449
WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene
Michael Pavone <pavone@retrodev.com>
parents:
1358
diff
changeset
|
2110 if (dst >= context->done_output) { |
1679ea04c449
WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene
Michael Pavone <pavone@retrodev.com>
parents:
1358
diff
changeset
|
2111 *dst = bg_color; |
1679ea04c449
WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene
Michael Pavone <pavone@retrodev.com>
parents:
1358
diff
changeset
|
2112 } |
1271
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
2113 } |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2114 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2115 context->sprite_index = 0x80; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2116 context->slot_counter = 0; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2117 render_border_garbage( |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2118 context, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2119 context->sprite_draw_list[context->cur_slot].address, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2120 context->tmp_buf_b, context->buf_b_off, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2121 context->col_1 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2122 ); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2123 render_sprite_cells(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2124 scan_sprite_table(context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2125 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2126 SPRITE_RENDER_H40(168) |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2127 SPRITE_RENDER_H40(169) |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2128 SPRITE_RENDER_H40(170) |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2129 SPRITE_RENDER_H40(171) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2130 SPRITE_RENDER_H40(172) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2131 SPRITE_RENDER_H40(173) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2132 SPRITE_RENDER_H40(174) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2133 SPRITE_RENDER_H40(175) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2134 SPRITE_RENDER_H40(176) |
1365
6dd2c3edd0b5
Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2
Michael Pavone <pavone@retrodev.com>
parents:
1362
diff
changeset
|
2135 SPRITE_RENDER_H40(177)//End of border? |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2136 SPRITE_RENDER_H40(178) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2137 SPRITE_RENDER_H40(179) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2138 SPRITE_RENDER_H40(180) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2139 SPRITE_RENDER_H40(181) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2140 SPRITE_RENDER_H40(182) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2141 SPRITE_RENDER_H40(229) |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2142 //!HSYNC asserted |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2143 SPRITE_RENDER_H40(230) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2144 SPRITE_RENDER_H40(231) |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2145 case 232: |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2146 external_slot(context); |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2147 CHECK_LIMIT_HSYNC(232) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2148 SPRITE_RENDER_H40(233) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2149 SPRITE_RENDER_H40(234) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2150 SPRITE_RENDER_H40(235) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2151 SPRITE_RENDER_H40(236) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2152 SPRITE_RENDER_H40(237) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2153 SPRITE_RENDER_H40(238) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2154 SPRITE_RENDER_H40(239) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2155 SPRITE_RENDER_H40(240) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2156 SPRITE_RENDER_H40(241) |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2157 SPRITE_RENDER_H40(242) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2158 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2159 case 244: |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2160 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2161 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2162 //See note in vdp_h32 for why this was moved out of read_map_scroll |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2163 context->vscroll_latch[0] = context->vsram[0]; |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2164 context->vscroll_latch[1] = context->vsram[1]; |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2165 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2166 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2167 mask = 0; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2168 if (context->regs[REG_MODE_3] & 0x2) { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2169 mask |= 0xF8; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2170 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2171 if (context->regs[REG_MODE_3] & 0x1) { |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2172 mask |= 0x7; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2173 } |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2174 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2175 address += (context->vcounter & mask) * 4; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2176 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2177 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2178 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b); |
924
1b86268a4cb3
Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents:
923
diff
changeset
|
2179 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2180 context->hslot++; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2181 context->cycles += h40_hsync_cycles[14]; |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2182 CHECK_ONLY //provides "garbage" for border when plane A selected |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2183 //!HSYNC high |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2184 SPRITE_RENDER_H40(245) |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2185 SPRITE_RENDER_H40(246) |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2186 SPRITE_RENDER_H40(247) //provides "garbage" for border when plane B selected |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2187 SPRITE_RENDER_H40(248) //provides "garbage" for border when plane B selected |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2188 case 249: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2189 read_map_scroll_a(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2190 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2191 SPRITE_RENDER_H40(250) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2192 case 251: |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2193 render_map_1(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2194 scan_sprite_table(context->vcounter, context);//Just a guess |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2195 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2196 case 252: |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2197 render_map_2(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2198 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2199 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2200 case 253: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2201 read_map_scroll_b(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2202 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2203 SPRITE_RENDER_H40(254) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2204 case 255: |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2205 render_map_3(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2206 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2207 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2208 case 0: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2209 render_map_output(context->vcounter, 0, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2210 scan_sprite_table(context->vcounter, context);//Just a guess |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2211 //seems like the sprite table scan fills a shift register |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2212 //values are FIFO, but unused slots precede used slots |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2213 //so we set cur_slot to slot_counter and let it wrap around to |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2214 //the beginning of the list |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2215 context->cur_slot = context->slot_counter; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2216 context->sprite_draws = MAX_DRAWS; |
36
04672c060062
Pass all sprite masking tests
Mike Pavone <pavone@retrodev.com>
parents:
35
diff
changeset
|
2217 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2218 CHECK_LIMIT |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2219 COLUMN_RENDER_BLOCK(2, 1) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2220 COLUMN_RENDER_BLOCK(4, 9) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2221 COLUMN_RENDER_BLOCK(6, 17) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2222 COLUMN_RENDER_BLOCK_REFRESH(8, 25) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2223 COLUMN_RENDER_BLOCK(10, 33) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2224 COLUMN_RENDER_BLOCK(12, 41) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2225 COLUMN_RENDER_BLOCK(14, 49) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2226 COLUMN_RENDER_BLOCK_REFRESH(16, 57) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2227 COLUMN_RENDER_BLOCK(18, 65) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2228 COLUMN_RENDER_BLOCK(20, 73) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2229 COLUMN_RENDER_BLOCK(22, 81) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2230 COLUMN_RENDER_BLOCK_REFRESH(24, 89) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2231 COLUMN_RENDER_BLOCK(26, 97) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2232 COLUMN_RENDER_BLOCK(28, 105) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2233 COLUMN_RENDER_BLOCK(30, 113) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2234 COLUMN_RENDER_BLOCK_REFRESH(32, 121) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2235 COLUMN_RENDER_BLOCK(34, 129) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2236 COLUMN_RENDER_BLOCK(36, 137) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2237 COLUMN_RENDER_BLOCK(38, 145) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2238 COLUMN_RENDER_BLOCK_REFRESH(40, 153) |
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2239 case 161: |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2240 external_slot(context); |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2241 CHECK_LIMIT |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2242 case 162: |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2243 external_slot(context); |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2244 CHECK_LIMIT |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2245 //sprite render to line buffer starts |
1157
d5dda22ae6b4
Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents:
1156
diff
changeset
|
2246 case 163: |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2247 context->cur_slot = MAX_DRAWS-1; |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2248 memset(context->linebuf, 0, LINEBUF_SIZE); |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2249 render_border_garbage( |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2250 context, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2251 context->sprite_draw_list[context->cur_slot].address, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2252 context->tmp_buf_a, context->buf_a_off, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2253 context->col_1 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2254 ); |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2255 render_sprite_cells(context); |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2256 CHECK_LIMIT |
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2257 case 164: |
1337
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2258 render_border_garbage( |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2259 context, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2260 context->sprite_draw_list[context->cur_slot].address, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2261 context->tmp_buf_a, context->buf_a_off + 8, |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2262 context->col_2 |
d092c15246a3
Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents:
1335
diff
changeset
|
2263 ); |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2264 render_sprite_cells(context); |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2265 if (context->flags & FLAG_DMA_RUN) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2266 run_dma_src(context, -1); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2267 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2268 context->hslot++; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2269 context->cycles += slot_cycles; |
922
913a6336ce20
Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents:
921
diff
changeset
|
2270 vdp_advance_line(context); |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2271 CHECK_ONLY |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2272 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2273 default: |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2274 context->hslot++; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2275 context->cycles += slot_cycles; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2276 return; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2277 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2278 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2279 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
2280 static void vdp_h32(vdp_context * context, uint32_t target_cycles) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2281 { |
37 | 2282 uint16_t address; |
2283 uint32_t mask; | |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2284 uint32_t const slot_cycles = MCLKS_SLOT_H32; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2285 switch(context->hslot) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2286 { |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2287 for (;;) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2288 { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2289 case 133: |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2290 if (context->state == PREPARING) { |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2291 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2292 uint32_t *dst = context->output + (context->hslot - BG_START_SLOT) * 2; |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2293 if (dst >= context->done_output) { |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2294 *dst = bg_color; |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2295 } |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2296 dst++; |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2297 if (dst >= context->done_output) { |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2298 *dst = bg_color; |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2299 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2300 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2301 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2302 render_sprite_cells(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2303 } |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2304 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2305 case 134: |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2306 if (context->state == PREPARING) { |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2307 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2308 uint32_t *dst = context->output + (context->hslot - BG_START_SLOT) * 2; |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2309 if (dst >= context->done_output) { |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2310 *dst = bg_color; |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2311 } |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2312 dst++; |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2313 if (dst >= context->done_output) { |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2314 *dst = bg_color; |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2315 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2316 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2317 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2318 render_sprite_cells(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2319 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2320 if (context->vcounter == context->inactive_start) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2321 context->hslot++; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2322 context->cycles += slot_cycles; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2323 return; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2324 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2325 CHECK_LIMIT |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2326 //sprite attribute table scan starts |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2327 case 135: |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2328 if (context->state == PREPARING) { |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2329 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2330 uint32_t *dst = context->output + (context->hslot - BG_START_SLOT) * 2; |
1271
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
2331 for (int i = 0; i < (256+HORIZ_BORDER) - 2 * (context->hslot - BG_START_SLOT); i++) |
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
2332 { |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2333 if (dst >= context->done_output) { |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2334 *(dst++) = bg_color; |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2335 } |
1271
c865ee5478bc
Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents:
1270
diff
changeset
|
2336 } |
1185
9de9d2c6ebe5
Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished.
Michael Pavone <pavone@retrodev.com>
parents:
1183
diff
changeset
|
2337 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2338 context->sprite_index = 0x80; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2339 context->slot_counter = 0; |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2340 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2341 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2342 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2343 context->tmp_buf_b, context->buf_b_off, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2344 context->col_1 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2345 ); |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2346 render_sprite_cells(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2347 scan_sprite_table(context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2348 CHECK_LIMIT |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2349 SPRITE_RENDER_H32(136) |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2350 SPRITE_RENDER_H32(137) |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2351 SPRITE_RENDER_H32(138) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2352 SPRITE_RENDER_H32(139) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2353 SPRITE_RENDER_H32(140) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2354 SPRITE_RENDER_H32(141) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2355 SPRITE_RENDER_H32(142) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2356 SPRITE_RENDER_H32(143) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2357 SPRITE_RENDER_H32(144) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2358 case 145: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2359 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2360 CHECK_LIMIT |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2361 SPRITE_RENDER_H32(146) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2362 SPRITE_RENDER_H32(147) |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2363 SPRITE_RENDER_H32(233) |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2364 SPRITE_RENDER_H32(234) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2365 SPRITE_RENDER_H32(235) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2366 //HSYNC start |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2367 SPRITE_RENDER_H32(236) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2368 SPRITE_RENDER_H32(237) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2369 SPRITE_RENDER_H32(238) |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2370 SPRITE_RENDER_H32(239) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2371 SPRITE_RENDER_H32(240) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2372 SPRITE_RENDER_H32(241) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2373 SPRITE_RENDER_H32(242) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2374 case 243: |
1422
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2375 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) { |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2376 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2377 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2378 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2379 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2380 //to confirm that one way or another |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2381 context->vscroll_latch[0] = context->vsram[0]; |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2382 context->vscroll_latch[1] = context->vsram[1]; |
2b34469e3f81
Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents:
1401
diff
changeset
|
2383 } |
37 | 2384 external_slot(context); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2385 //provides "garbage" for border when plane A selected |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2386 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2387 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2388 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2389 context->tmp_buf_a, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2390 context->buf_a_off, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2391 context->col_1 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2392 ); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2393 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2394 case 244: |
37 | 2395 address = (context->regs[REG_HSCROLL] & 0x3F) << 10; |
2396 mask = 0; | |
2397 if (context->regs[REG_MODE_3] & 0x2) { | |
2398 mask |= 0xF8; | |
2399 } | |
2400 if (context->regs[REG_MODE_3] & 0x1) { | |
2401 mask |= 0x7; | |
2402 } | |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2403 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2404 address += (context->vcounter & mask) * 4; |
37 | 2405 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1]; |
2406 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3]; | |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2407 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2408 CHECK_LIMIT //provides "garbage" for border when plane A selected |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2409 SPRITE_RENDER_H32(245) |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2410 SPRITE_RENDER_H32(246) |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2411 SPRITE_RENDER_H32(247) //provides "garbage" for border when plane B selected |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2412 SPRITE_RENDER_H32(248) //provides "garbage" for border when plane B selected |
37 | 2413 //!HSYNC high |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2414 case 249: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2415 read_map_scroll_a(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2416 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2417 SPRITE_RENDER_H32(250) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2418 case 251: |
37 | 2419 render_map_1(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2420 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2421 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2422 case 252: |
37 | 2423 render_map_2(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2424 scan_sprite_table(context->vcounter, context);//Just a guess |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2425 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2426 case 253: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2427 read_map_scroll_b(0, context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2428 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2429 case 254: |
37 | 2430 render_sprite_cells(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2431 scan_sprite_table(context->vcounter, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2432 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2433 case 255: |
37 | 2434 render_map_3(context); |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2435 scan_sprite_table(context->vcounter, context);//Just a guess |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2436 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2437 case 0: |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2438 render_map_output(context->vcounter, 0, context); |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2439 scan_sprite_table(context->vcounter, context);//Just a guess |
37 | 2440 //reverse context slot counter so it counts the number of sprite slots |
2441 //filled rather than the number of available slots | |
2442 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter; | |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2443 context->cur_slot = context->slot_counter; |
37 | 2444 context->sprite_draws = MAX_DRAWS_H32; |
2445 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED); | |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2446 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2447 COLUMN_RENDER_BLOCK(2, 1) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2448 COLUMN_RENDER_BLOCK(4, 9) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2449 COLUMN_RENDER_BLOCK(6, 17) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2450 COLUMN_RENDER_BLOCK_REFRESH(8, 25) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2451 COLUMN_RENDER_BLOCK(10, 33) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2452 COLUMN_RENDER_BLOCK(12, 41) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2453 COLUMN_RENDER_BLOCK(14, 49) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2454 COLUMN_RENDER_BLOCK_REFRESH(16, 57) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2455 COLUMN_RENDER_BLOCK(18, 65) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2456 COLUMN_RENDER_BLOCK(20, 73) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2457 COLUMN_RENDER_BLOCK(22, 81) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2458 COLUMN_RENDER_BLOCK_REFRESH(24, 89) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2459 COLUMN_RENDER_BLOCK(26, 97) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2460 COLUMN_RENDER_BLOCK(28, 105) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2461 COLUMN_RENDER_BLOCK(30, 113) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2462 COLUMN_RENDER_BLOCK_REFRESH(32, 121) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2463 case 129: |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2464 external_slot(context); |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2465 CHECK_LIMIT |
1269
ff8e29eeb1ec
Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1267
diff
changeset
|
2466 case 130: { |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2467 external_slot(context); |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2468 CHECK_LIMIT |
1269
ff8e29eeb1ec
Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents:
1267
diff
changeset
|
2469 } |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2470 //sprite render to line buffer starts |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2471 case 131: |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2472 context->cur_slot = MAX_DRAWS_H32-1; |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2473 memset(context->linebuf, 0, LINEBUF_SIZE); |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2474 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2475 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2476 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2477 context->tmp_buf_a, context->buf_a_off, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2478 context->col_1 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2479 ); |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2480 render_sprite_cells(context); |
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2481 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2482 case 132: |
1378
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2483 render_border_garbage( |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2484 context, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2485 context->sprite_draw_list[context->cur_slot].address, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2486 context->tmp_buf_a, context->buf_a_off + 8, |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2487 context->col_2 |
71c8b97eb962
Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents:
1377
diff
changeset
|
2488 ); |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2489 render_sprite_cells(context); |
1173
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
2490 if (context->flags & FLAG_DMA_RUN) { |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
2491 run_dma_src(context, -1); |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
2492 } |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
2493 context->hslot++; |
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
2494 context->cycles += slot_cycles; |
923
8e012ece95c1
Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents:
922
diff
changeset
|
2495 vdp_advance_line(context); |
1173
d0f67c59b756
Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1172
diff
changeset
|
2496 CHECK_ONLY |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2497 } |
822
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2498 default: |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2499 context->hslot++; |
ac65086c031e
Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents:
771
diff
changeset
|
2500 context->cycles += MCLKS_SLOT_H32; |
503
eee6be465c47
Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
499
diff
changeset
|
2501 } |
eee6be465c47
Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
499
diff
changeset
|
2502 } |
eee6be465c47
Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
499
diff
changeset
|
2503 |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2504 static void vdp_h32_mode4(vdp_context * context, uint32_t target_cycles) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2505 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2506 uint16_t address; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2507 uint32_t mask; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2508 uint32_t const slot_cycles = MCLKS_SLOT_H32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2509 switch(context->hslot) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2510 { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2511 for (;;) |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2512 { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2513 //sprite rendering starts |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2514 SPRITE_RENDER_H32_MODE4(137) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2515 SPRITE_RENDER_H32_MODE4(143) |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2516 case 234: |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2517 external_slot(context); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2518 CHECK_LIMIT |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2519 case 235: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2520 external_slot(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2521 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2522 //!HSYNC low |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2523 case 236: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2524 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2525 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2526 case 237: |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2527 external_slot(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2528 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2529 case 238: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2530 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2531 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2532 SPRITE_RENDER_H32_MODE4(239) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2533 SPRITE_RENDER_H32_MODE4(245) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2534 case 251: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2535 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2536 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2537 case 252: |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2538 external_slot(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2539 if (context->regs[REG_MODE_1] & BIT_HSCRL_LOCK && context->vcounter < 16) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2540 context->hscroll_a = 0; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2541 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2542 context->hscroll_a = context->regs[REG_X_SCROLL]; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2543 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2544 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2545 case 253: |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2546 context->sprite_index = 0; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2547 context->slot_counter = MAX_DRAWS_H32_MODE4; |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2548 scan_sprite_table_mode4(context); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2549 CHECK_LIMIT |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2550 case 254: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2551 scan_sprite_table_mode4(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2552 CHECK_LIMIT |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2553 case 255: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2554 scan_sprite_table_mode4(context); |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2555 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2556 case 0: { |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2557 scan_sprite_table_mode4(context); |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2558 uint32_t *dst = context->output;; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2559 uint32_t bgcolor = context->colors[0x10 | (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3]; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2560 for (int i = 0; i < BORDER_LEFT-8; i++, dst++) |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2561 { |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2562 *dst = bgcolor; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2563 } |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2564 context->done_output = dst; |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2565 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2566 } |
1135
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2567 case 1: |
8506b305e0e8
Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents:
1134
diff
changeset
|
2568 scan_sprite_table_mode4(context); |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2569 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2570 case 2: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2571 scan_sprite_table_mode4(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2572 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2573 case 3: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2574 scan_sprite_table_mode4(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2575 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2576 case 4: { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2577 scan_sprite_table_mode4(context); |
1121
1913f9c28003
Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents:
1120
diff
changeset
|
2578 context->buf_a_off = 8; |
1913f9c28003
Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents:
1120
diff
changeset
|
2579 memset(context->tmp_buf_a, 0, 8); |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2580 uint32_t *dst = context->output + BORDER_LEFT - 8; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2581 uint32_t bgcolor = context->colors[0x10 | (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3]; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2582 for (int i = 0; i < 8; i++, dst++) |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2583 { |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2584 *dst = bgcolor; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2585 } |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2586 context->done_output = dst; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2587 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2588 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2589 COLUMN_RENDER_BLOCK_MODE4(0, 5) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2590 COLUMN_RENDER_BLOCK_MODE4(1, 9) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2591 COLUMN_RENDER_BLOCK_MODE4(2, 13) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2592 COLUMN_RENDER_BLOCK_MODE4(3, 17) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2593 COLUMN_RENDER_BLOCK_MODE4(4, 21) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2594 COLUMN_RENDER_BLOCK_MODE4(5, 25) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2595 COLUMN_RENDER_BLOCK_MODE4(6, 29) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2596 COLUMN_RENDER_BLOCK_MODE4(7, 33) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2597 COLUMN_RENDER_BLOCK_MODE4(8, 37) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2598 COLUMN_RENDER_BLOCK_MODE4(9, 41) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2599 COLUMN_RENDER_BLOCK_MODE4(10, 45) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2600 COLUMN_RENDER_BLOCK_MODE4(11, 49) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2601 COLUMN_RENDER_BLOCK_MODE4(12, 53) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2602 COLUMN_RENDER_BLOCK_MODE4(13, 57) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2603 COLUMN_RENDER_BLOCK_MODE4(14, 61) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2604 COLUMN_RENDER_BLOCK_MODE4(15, 65) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2605 COLUMN_RENDER_BLOCK_MODE4(16, 69) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2606 COLUMN_RENDER_BLOCK_MODE4(17, 73) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2607 COLUMN_RENDER_BLOCK_MODE4(18, 77) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2608 COLUMN_RENDER_BLOCK_MODE4(19, 81) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2609 COLUMN_RENDER_BLOCK_MODE4(20, 85) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2610 COLUMN_RENDER_BLOCK_MODE4(21, 89) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2611 COLUMN_RENDER_BLOCK_MODE4(22, 93) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2612 COLUMN_RENDER_BLOCK_MODE4(23, 97) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2613 COLUMN_RENDER_BLOCK_MODE4(24, 101) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2614 COLUMN_RENDER_BLOCK_MODE4(25, 105) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2615 COLUMN_RENDER_BLOCK_MODE4(26, 109) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2616 COLUMN_RENDER_BLOCK_MODE4(27, 113) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2617 COLUMN_RENDER_BLOCK_MODE4(28, 117) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2618 COLUMN_RENDER_BLOCK_MODE4(29, 121) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2619 COLUMN_RENDER_BLOCK_MODE4(30, 125) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2620 COLUMN_RENDER_BLOCK_MODE4(31, 129) |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2621 case 133: |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2622 external_slot(context); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2623 CHECK_LIMIT |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2624 case 134: |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2625 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2626 CHECK_LIMIT |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2627 case 135: |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2628 external_slot(context); |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2629 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2630 case 136: { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2631 external_slot(context); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2632 //set things up for sprite rendering in the next slot |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2633 memset(context->linebuf, 0, LINEBUF_SIZE); |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2634 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
2635 context->sprite_draws = MAX_DRAWS_H32_MODE4; |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2636 uint32_t *dst = context->output + BORDER_LEFT + 256; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2637 uint32_t bgcolor = context->colors[0x10 | (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3]; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2638 for (int i = 0; i < 8; i++, dst++) |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2639 { |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2640 *dst = bgcolor; |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2641 } |
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2642 context->done_output = dst; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2643 CHECK_LIMIT |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2644 }} |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2645 default: |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2646 context->hslot++; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2647 context->cycles += MCLKS_SLOT_H32; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2648 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2649 } |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2650 |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2651 static void inactive_test_output(vdp_context *context, uint8_t is_h40, uint8_t test_layer) |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2652 { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2653 uint8_t max_slot = is_h40 ? 169 : 136; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2654 if (context->hslot > max_slot) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2655 return; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2656 } |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2657 uint32_t *dst = context->output + (context->hslot >> 3) * SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2658 int32_t len; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2659 uint32_t src_off; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2660 if (context->hslot) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2661 dst -= SCROLL_BUFFER_DRAW - BORDER_LEFT; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2662 src_off = 0; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2663 len = context->hslot == max_slot ? BORDER_RIGHT : SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2664 } else { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2665 src_off = SCROLL_BUFFER_DRAW - BORDER_LEFT; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2666 len = BORDER_LEFT; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2667 } |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2668 uint8_t *src; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2669 if (test_layer == 2) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2670 //plane A |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2671 src_off += context->buf_a_off + context->hscroll_a; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2672 src = context->tmp_buf_a; |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
2673 } else if (test_layer == 3){ |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2674 //plane B |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2675 src_off += context->buf_b_off + context->hscroll_b; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2676 src = context->tmp_buf_b; |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
2677 } else { |
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
2678 //sprite layer |
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
2679 for (; len >=0; len--, dst++, src_off++) |
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
2680 { |
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
2681 *dst = context->colors[0]; |
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
2682 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2683 } |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2684 for (; len >=0; len--, dst++, src_off++) |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2685 { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2686 *dst = context->colors[src[src_off & SCROLL_BUFFER_MASK] & 0x3F]; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2687 } |
1368
4c5a78555209
Fix small blank spot on line -2 in "ninja escape" border fade in OD2
Michael Pavone <pavone@retrodev.com>
parents:
1366
diff
changeset
|
2688 context->done_output = dst; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2689 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2690 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2691 } |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2692 |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2693 static void check_switch_inactive(vdp_context *context, uint8_t is_h40) |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2694 { |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2695 //technically the second hcounter check should be different for H40, but this is probably close enough for now |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2696 if (context->state == ACTIVE && context->vcounter == context->inactive_start && (context->hslot >= (is_h40 ? 167 : 135) || context->hslot < 133)) { |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2697 context->state = INACTIVE; |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2698 } |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2699 } |
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2700 |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2701 static void vdp_inactive(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
2702 { |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2703 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2704 uint8_t index_reset_value, max_draws, max_sprites; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2705 uint16_t vint_line, active_line; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2706 uint32_t bg_color; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2707 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2708 if (mode_5) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2709 if (is_h40) { |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2710 buf_clear_slot = 163; |
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2711 index_reset_slot = 167; |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
2712 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2713 max_draws = MAX_DRAWS-1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2714 max_sprites = MAX_SPRITES_LINE; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2715 index_reset_value = 0x80; |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
2716 vint_slot = VINT_SLOT_H40; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2717 line_change = LINE_CHANGE_H40; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2718 jump_start = 182; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2719 jump_dest = 229; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2720 } else { |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
2721 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2722 max_draws = MAX_DRAWS_H32-1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2723 max_sprites = MAX_SPRITES_LINE_H32; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2724 buf_clear_slot = 128; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2725 index_reset_slot = 132; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2726 index_reset_value = 0x80; |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
2727 vint_slot = VINT_SLOT_H32; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2728 line_change = LINE_CHANGE_H32; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2729 jump_start = 147; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2730 jump_dest = 233; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
2731 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2732 vint_line = context->inactive_start; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2733 active_line = 0x1FF; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
2734 } else { |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
2735 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2736 max_draws = MAX_DRAWS_H32_MODE4; |
1278
34d3cb05014d
Fix VDP buffer overrun that was causing sprite flickering in some games
Michael Pavone <pavone@retrodev.com>
parents:
1273
diff
changeset
|
2737 max_sprites = 8; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2738 buf_clear_slot = 136; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2739 index_reset_slot = 253; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2740 index_reset_value = 0; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2741 vint_line = context->inactive_start + 1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2742 vint_slot = VINT_SLOT_MODE4; |
1177
67e0462c30ce
Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents:
1175
diff
changeset
|
2743 line_change = LINE_CHANGE_MODE4; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2744 bg_color = render_map_color(0, 0, 0); |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2745 jump_start = 147; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2746 jump_dest = 233; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2747 if (context->regs[REG_MODE_1] & BIT_MODE_4) { |
1380
9a5352a2f57a
Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents:
1378
diff
changeset
|
2748 active_line = 0x1FF; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2749 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2750 //never active unless either mode 4 or mode 5 is turned on |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2751 active_line = 0x200; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2752 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
2753 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2754 uint32_t *dst = ( |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2755 context->vcounter < context->inactive_start + context->border_bot |
1342
4ea094d15cce
Fix border rendering so that the first and last line of display are consistently drawn
Michael Pavone <pavone@retrodev.com>
parents:
1339
diff
changeset
|
2756 || context->vcounter >= 0x200 - context->border_top |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2757 ) && context->hslot >= BG_START_SLOT && context->hslot < bg_end_slot |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2758 ? context->output + 2 * (context->hslot - BG_START_SLOT) |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2759 : NULL; |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2760 |
1342
4ea094d15cce
Fix border rendering so that the first and last line of display are consistently drawn
Michael Pavone <pavone@retrodev.com>
parents:
1339
diff
changeset
|
2761 if ( |
4ea094d15cce
Fix border rendering so that the first and last line of display are consistently drawn
Michael Pavone <pavone@retrodev.com>
parents:
1339
diff
changeset
|
2762 !dst && context->vcounter == context->inactive_start + context->border_bot |
4ea094d15cce
Fix border rendering so that the first and last line of display are consistently drawn
Michael Pavone <pavone@retrodev.com>
parents:
1339
diff
changeset
|
2763 && context->hslot >= line_change && context->hslot < bg_end_slot |
4ea094d15cce
Fix border rendering so that the first and last line of display are consistently drawn
Michael Pavone <pavone@retrodev.com>
parents:
1339
diff
changeset
|
2764 ) { |
4ea094d15cce
Fix border rendering so that the first and last line of display are consistently drawn
Michael Pavone <pavone@retrodev.com>
parents:
1339
diff
changeset
|
2765 dst = context->output + 2 * (context->hslot - BG_START_SLOT); |
4ea094d15cce
Fix border rendering so that the first and last line of display are consistently drawn
Michael Pavone <pavone@retrodev.com>
parents:
1339
diff
changeset
|
2766 } |
4ea094d15cce
Fix border rendering so that the first and last line of display are consistently drawn
Michael Pavone <pavone@retrodev.com>
parents:
1339
diff
changeset
|
2767 |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2768 uint8_t test_layer = context->test_port >> 7 & 3; |
1369
3e7a921718de
Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents:
1368
diff
changeset
|
2769 if (test_layer) { |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2770 dst = NULL; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2771 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2772 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2773 while(context->cycles < target_cycles) |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2774 { |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2775 check_switch_inactive(context, is_h40); |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2776 if (context->hslot == BG_START_SLOT && !test_layer && ( |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2777 context->vcounter < context->inactive_start + context->border_bot |
1342
4ea094d15cce
Fix border rendering so that the first and last line of display are consistently drawn
Michael Pavone <pavone@retrodev.com>
parents:
1339
diff
changeset
|
2778 || context->vcounter >= 0x200 - context->border_top |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2779 )) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2780 dst = context->output + (context->hslot - BG_START_SLOT) * 2; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2781 } else if (context->hslot == bg_end_slot) { |
1272
be509813b2f2
Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents:
1271
diff
changeset
|
2782 advance_output_line(context); |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2783 dst = NULL; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2784 } |
1339
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2785 //this will need some tweaking to properly interact with 128K mode, |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2786 //but this should be good enough for now |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2787 context->serial_address += 1024; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2788 if (test_layer) { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2789 switch (context->hslot & 7) |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2790 { |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2791 case 3: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2792 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off, context->col_1); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2793 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2794 case 4: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2795 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off+8, context->col_2); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2796 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2797 case 7: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2798 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off, context->col_1); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2799 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2800 case 0: |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2801 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off+8, context->col_2); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2802 inactive_test_output(context, is_h40, test_layer); |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2803 break; |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2804 } |
35e6a93b4586
Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1338
diff
changeset
|
2805 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2806 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2807 if (context->hslot == buf_clear_slot) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2808 if (mode_5) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2809 context->cur_slot = max_draws; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2810 } else { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2811 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2812 context->sprite_draws = MAX_DRAWS_H32_MODE4; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2813 } |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2814 memset(context->linebuf, 0, LINEBUF_SIZE); |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2815 } else if (context->hslot == index_reset_slot) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2816 context->sprite_index = index_reset_value; |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
2817 context->slot_counter = mode_5 ? 0 : max_sprites; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2818 } else if (context->vcounter == vint_line && context->hslot == vint_slot) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2819 context->flags2 |= FLAG2_VINT_PENDING; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2820 context->pending_vint_start = context->cycles; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2821 } |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2822 |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2823 if (dst) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2824 if (mode_5) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2825 bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F]; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2826 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2827 bg_color = context->colors[CRAM_SIZE * 3 + 0x10 + (context->regs[REG_BG_COLOR] & 0xF)]; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2828 } |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2829 if (dst >= context->done_output) { |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2830 *(dst++) = bg_color; |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2831 } else { |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2832 dst++; |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2833 } |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2834 if (dst >= context->done_output) { |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2835 *(dst++) = bg_color; |
1361
1679ea04c449
WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene
Michael Pavone <pavone@retrodev.com>
parents:
1358
diff
changeset
|
2836 context->done_output = dst; |
1343
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2837 } else { |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2838 dst++; |
033dda2d4598
Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents:
1342
diff
changeset
|
2839 } |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
2840 if (context->hslot == (bg_end_slot-1)) { |
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
2841 *(dst++) = bg_color; |
1361
1679ea04c449
WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene
Michael Pavone <pavone@retrodev.com>
parents:
1358
diff
changeset
|
2842 context->done_output = dst; |
1267
3772bb926be5
Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents:
1191
diff
changeset
|
2843 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2844 } |
1183
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
2845 |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
2846 if (!is_refresh(context, context->hslot)) { |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
2847 external_slot(context); |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
2848 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) { |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
2849 run_dma_src(context, context->hslot); |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
2850 } |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
2851 } |
8d8c71ebbbce
CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents:
1180
diff
changeset
|
2852 |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2853 if (is_h40) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2854 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2855 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40]; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2856 } else { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2857 context->cycles += MCLKS_SLOT_H40; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2858 } |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2859 } else { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2860 context->cycles += MCLKS_SLOT_H32; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2861 } |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2862 if (context->hslot == jump_start) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2863 context->hslot = jump_dest; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2864 } else { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2865 context->hslot++; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
2866 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2867 if (context->hslot == line_change) { |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2868 vdp_advance_line(context); |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2869 if (context->vcounter == active_line) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2870 context->state = PREPARING; |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2871 return; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2872 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
2873 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
2874 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
2875 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
2876 |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2877 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles) |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2878 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
2879 uint8_t is_h40 = context->regs[REG_MODE_4] & BIT_H40; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
2880 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2881 while(context->cycles < target_cycles) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2882 { |
1362
83bdd358f3a7
Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents:
1361
diff
changeset
|
2883 check_switch_inactive(context, is_h40); |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2884 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
2885 if (is_active(context)) { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2886 if (mode_5) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2887 if (is_h40) { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2888 vdp_h40(context, target_cycles); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2889 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2890 vdp_h32(context, target_cycles); |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2891 } |
330
57453d3d8be4
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
329
diff
changeset
|
2892 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
2893 vdp_h32_mode4(context, target_cycles); |
330
57453d3d8be4
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
329
diff
changeset
|
2894 } |
57453d3d8be4
Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents:
329
diff
changeset
|
2895 } else { |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
2896 vdp_inactive(context, target_cycles, is_h40, mode_5); |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
2897 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2898 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2899 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2900 |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2901 void vdp_run_context(vdp_context *context, uint32_t target_cycles) |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2902 { |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2903 //TODO: Deal with H40 hsync shenanigans |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2904 uint32_t slot_cyc = context->regs[REG_MODE_4] & BIT_H40 ? 15 : 19; |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2905 if (target_cycles < slot_cyc) { |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2906 //avoid overflow |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2907 return; |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2908 } |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2909 vdp_run_context_full(context, target_cycles - slot_cyc); |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2910 } |
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2911 |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2912 uint32_t vdp_run_to_vblank(vdp_context * context) |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2913 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
2914 uint32_t old_frame = context->frame; |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
2915 while (context->frame == old_frame) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2916 vdp_run_context_full(context, context->cycles + MCLKS_LINE); |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
2917 } |
20
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2918 return context->cycles; |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2919 } |
f664eeb55cb4
Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff
changeset
|
2920 |
75 | 2921 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles) |
2922 { | |
2923 for(;;) { | |
2924 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]; | |
2925 if (!dmalen) { | |
2926 dmalen = 0x10000; | |
2927 } | |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
2928 uint32_t min_dma_complete = dmalen * (context->regs[REG_MODE_4] & BIT_H40 ? 16 : 20); |
1321
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
2929 if ( |
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
2930 (context->regs[REG_DMASRC_H] & 0xC0) == 0xC0 |
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
2931 || (((context->cd & 0xF) == VRAM_WRITE) && !(context->regs[REG_MODE_2] & BIT_128K_VRAM))) { |
75 | 2932 //DMA copies take twice as long to complete since they require a read and a write |
2933 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word | |
1321
0849e9356bfe
Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1320
diff
changeset
|
2934 //unless 128KB mode is enabled |
75 | 2935 min_dma_complete *= 2; |
2936 } | |
2937 min_dma_complete += context->cycles; | |
2938 if (target_cycles < min_dma_complete) { | |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2939 vdp_run_context_full(context, target_cycles); |
75 | 2940 return; |
2941 } else { | |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
2942 vdp_run_context_full(context, min_dma_complete); |
75 | 2943 if (!(context->flags & FLAG_DMA_RUN)) { |
2944 return; | |
2945 } | |
2946 } | |
2947 } | |
2948 } | |
2949 | |
1154
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2950 static uint16_t get_ext_vcounter(vdp_context *context) |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2951 { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2952 uint16_t line= context->vcounter & 0xFF; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2953 if (context->double_res) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2954 line <<= 1; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2955 if (line & 0x100) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2956 line |= 1; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2957 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2958 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2959 return line << 8; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2960 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2961 |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2962 void vdp_latch_hv(vdp_context *context) |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2963 { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2964 context->hv_latch = context->hslot | get_ext_vcounter(context); |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2965 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2966 |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2967 uint16_t vdp_hv_counter_read(vdp_context * context) |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2968 { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2969 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2970 return context->hv_latch; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2971 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2972 uint16_t hv; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2973 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2974 hv = context->hslot; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2975 } else { |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2976 hv = context->hv_latch & 0xFF; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2977 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2978 hv |= get_ext_vcounter(context); |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2979 |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2980 return hv; |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2981 } |
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
2982 |
75 | 2983 int vdp_control_port_write(vdp_context * context, uint16_t value) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
2984 { |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
2985 //printf("control port write: %X at %d\n", value, context->cycles); |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
2986 if (context->flags & FLAG_DMA_RUN) { |
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
2987 return -1; |
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
2988 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
2989 if (context->flags & FLAG_PENDING) { |
1318
bfdd450e7dea
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents:
1315
diff
changeset
|
2990 context->address = (context->address & 0x3FFF) | (value << 14 & 0x1C000); |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
2991 //It seems like the DMA enable bit doesn't so much enable DMA so much |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
2992 //as it enables changing CD5 from control port writes |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
2993 uint8_t preserve = (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) ? 0x3 : 0x23; |
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
2994 context->cd = (context->cd & preserve) | ((value >> 2) & ~preserve & 0xFF); |
75 | 2995 context->flags &= ~FLAG_PENDING; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
2996 //Should these be taken care of here or after the first write? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
2997 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
2998 context->flags2 &= ~FLAG2_READ_PENDING; |
453
b491df8bdbc0
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents:
452
diff
changeset
|
2999 //printf("New Address: %X, New CD: %X\n", context->address, context->cd); |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3000 if (context->cd & 0x20) { |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3001 // |
75 | 3002 if((context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { |
3003 //DMA copy or 68K -> VDP, transfer starts immediately | |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3004 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot); |
1191
8dc50e50ced6
Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents:
1189
diff
changeset
|
3005 if (!(context->regs[REG_DMASRC_H] & 0x80)) { |
8dc50e50ced6
Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents:
1189
diff
changeset
|
3006 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]); |
1289
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3007 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately |
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3008 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test |
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3009 //only captures are from a direct color DMA demo which will generally start DMA at a very specific point in display so other values are plausible |
6ad59a62e656
Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents:
1285
diff
changeset
|
3010 //sticking with 3 slots for now until I can do some more captures |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3011 vdp_run_context_full(context, context->cycles + 12 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5)); |
1285
76e47254596b
Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents:
1278
diff
changeset
|
3012 context->flags |= FLAG_DMA_RUN; |
75 | 3013 return 1; |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3014 } else { |
1285
76e47254596b
Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents:
1278
diff
changeset
|
3015 context->flags |= FLAG_DMA_RUN; |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3016 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]); |
75 | 3017 } |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3018 } else { |
453
b491df8bdbc0
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents:
452
diff
changeset
|
3019 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd); |
75 | 3020 } |
63
a6dd5b7a971b
Add FPS counter to console output
Mike Pavone <pavone@retrodev.com>
parents:
58
diff
changeset
|
3021 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3022 } else { |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3023 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3024 context->address = (context->address &0xC000) | (value & 0x3FFF); |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3025 context->cd = (context->cd & 0x3C) | (value >> 14); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3026 if ((value & 0xC000) == 0x8000) { |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3027 //Register write |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3028 uint8_t reg = (value >> 8) & 0x1F; |
1123
d5412f76accc
Fix inactive start line for Mode 4 in vdp_next_hint. Fix an off by one error in the range of registers allowed to be written in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1122
diff
changeset
|
3029 if (reg < (mode_5 ? VDP_REGS : 0xB)) { |
453
b491df8bdbc0
Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents:
452
diff
changeset
|
3030 //printf("register %d set to %X\n", reg, value & 0xFF); |
480
0737953132ad
Implement HV counter latch
Mike Pavone <pavone@retrodev.com>
parents:
479
diff
changeset
|
3031 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) { |
1154
c83ec07ddbac
Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents:
1153
diff
changeset
|
3032 vdp_latch_hv(context); |
480
0737953132ad
Implement HV counter latch
Mike Pavone <pavone@retrodev.com>
parents:
479
diff
changeset
|
3033 } |
505
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
3034 if (reg == REG_BG_COLOR) { |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
3035 value &= 0x3F; |
b7b7a1cab44a
The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents:
503
diff
changeset
|
3036 } |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3037 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) { |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3038 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame); |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3039 }*/ |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3040 context->regs[reg] = value; |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3041 if (reg == REG_MODE_4) { |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3042 context->double_res = (value & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES); |
415
8c60c8c09a0f
Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode.
Mike Pavone <pavone@retrodev.com>
parents:
414
diff
changeset
|
3043 if (!context->double_res) { |
1106
cacbd3f18f03
Fix field flag handling bug introduced with VDP/render interface cleanup
Michael Pavone <pavone@retrodev.com>
parents:
1103
diff
changeset
|
3044 context->flags2 &= ~FLAG2_EVEN_FIELD; |
415
8c60c8c09a0f
Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode.
Mike Pavone <pavone@retrodev.com>
parents:
414
diff
changeset
|
3045 } |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3046 } |
1335
26e72126f9d1
Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents:
1334
diff
changeset
|
3047 if (reg == REG_MODE_1 || reg == REG_MODE_2 || reg == REG_MODE_4) { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3048 update_video_params(context); |
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3049 } |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3050 } |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3051 } else if (mode_5) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3052 context->flags |= FLAG_PENDING; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3053 //Should these be taken care of here or after the second write? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3054 //context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3055 //context->flags2 &= ~FLAG2_READ_PENDING; |
1120
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3056 } else { |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3057 context->flags &= ~FLAG_READ_FETCHED; |
e9369d6f0101
Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1117
diff
changeset
|
3058 context->flags2 &= ~FLAG2_READ_PENDING; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3059 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3060 } |
75 | 3061 return 0; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3062 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3063 |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3064 void vdp_control_port_write_pbc(vdp_context *context, uint8_t value) |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3065 { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3066 if (context->flags2 & FLAG2_BYTE_PENDING) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3067 uint16_t full_val = value << 8 | context->pending_byte; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3068 context->flags2 &= ~FLAG2_BYTE_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3069 //TODO: Deal with fact that Vbus->VDP DMA doesn't do anything in PBC mode |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3070 vdp_control_port_write(context, full_val); |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3071 if (context->cd == VRAM_READ) { |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3072 context->cd = VRAM_READ8; |
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3073 } |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3074 } else { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3075 context->pending_byte = value; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3076 context->flags2 |= FLAG2_BYTE_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3077 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3078 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3079 |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3080 int vdp_data_port_write(vdp_context * context, uint16_t value) |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3081 { |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3082 //printf("data port write: %X at %d\n", value, context->cycles); |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3083 if (context->flags & FLAG_DMA_RUN && (context->regs[REG_DMASRC_H] & 0xC0) != 0x80) { |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3084 return -1; |
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3085 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3086 if (context->flags & FLAG_PENDING) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3087 context->flags &= ~FLAG_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3088 //Should these be cleared here? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3089 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3090 context->flags2 &= ~FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3091 } |
109
004dd46e0a97
COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents:
108
diff
changeset
|
3092 /*if (context->fifo_cur == context->fifo_end) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3093 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
109
004dd46e0a97
COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents:
108
diff
changeset
|
3094 }*/ |
460
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3095 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80) { |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3096 context->flags &= ~FLAG_DMA_RUN; |
788ba843a731
Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3097 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3098 while (context->fifo_write == context->fifo_read) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3099 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3100 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3101 fifo_entry * cur = context->fifo + context->fifo_write; |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3102 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3103 cur->address = context->address; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3104 cur->value = value; |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3105 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3106 cur->cd = context->cd; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3107 } else { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3108 cur->cd = (context->cd & 2) | 1; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3109 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3110 cur->partial = 0; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3111 if (context->fifo_read < 0) { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3112 context->fifo_read = context->fifo_write; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3113 } |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3114 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3115 increment_address(context); |
149
139e5dcd6aa3
Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents:
143
diff
changeset
|
3116 return 0; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3117 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3118 |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3119 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value) |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3120 { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3121 if (context->flags & FLAG_PENDING) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3122 context->flags &= ~FLAG_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3123 //Should these be cleared here? |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3124 context->flags &= ~FLAG_READ_FETCHED; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3125 context->flags2 &= ~FLAG2_READ_PENDING; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3126 } |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3127 context->flags2 &= ~FLAG2_BYTE_PENDING; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3128 /*if (context->fifo_cur == context->fifo_end) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3129 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles); |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3130 }*/ |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3131 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & 0xC0) == 0x80) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3132 context->flags &= ~FLAG_DMA_RUN; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3133 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3134 while (context->fifo_write == context->fifo_read) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3135 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)); |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3136 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3137 fifo_entry * cur = context->fifo + context->fifo_write; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3138 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3139 cur->address = context->address; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3140 cur->value = value; |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3141 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3142 cur->cd = context->cd; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3143 } else { |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3144 cur->cd = (context->cd & 2) | 1; |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3145 } |
1333
69c25e1188e5
Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents:
1331
diff
changeset
|
3146 cur->partial = 3; |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3147 if (context->fifo_read < 0) { |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3148 context->fifo_read = context->fifo_write; |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3149 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3150 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1); |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3151 increment_address(context); |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3152 } |
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3153 |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3154 void vdp_test_port_write(vdp_context * context, uint16_t value) |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3155 { |
1318
bfdd450e7dea
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents:
1315
diff
changeset
|
3156 context->test_port = value; |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3157 } |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3158 |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3159 uint16_t vdp_control_port_read(vdp_context * context) |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3160 { |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3161 context->flags &= ~FLAG_PENDING; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3162 context->flags2 &= ~FLAG2_BYTE_PENDING; |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3163 //Bits 15-10 are not fixed like Charles MacDonald's doc suggests, but instead open bus values that reflect 68K prefetch |
1117
928a65750345
Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents:
1106
diff
changeset
|
3164 uint16_t value = context->system->get_open_bus_value(context->system) & 0xFC00; |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3165 if (context->fifo_read < 0) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3166 value |= 0x200; |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3167 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3168 if (context->fifo_read == context->fifo_write) { |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3169 value |= 0x100; |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3170 } |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3171 if (context->flags2 & FLAG2_VINT_PENDING) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3172 value |= 0x80; |
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3173 } |
494
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3174 if (context->flags & FLAG_DOT_OFLOW) { |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3175 value |= 0x40; |
1156
b519965f6394
Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents:
1155
diff
changeset
|
3176 context->flags &= ~FLAG_DOT_OFLOW; |
494
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3177 } |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3178 if (context->flags2 & FLAG2_SPRITE_COLLIDE) { |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3179 value |= 0x20; |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3180 context->flags2 &= ~FLAG2_SPRITE_COLLIDE; |
8ac0eb05642c
Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents:
481
diff
changeset
|
3181 } |
1077
1a66d5165ea7
Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents:
1076
diff
changeset
|
3182 if ((context->regs[REG_MODE_4] & BIT_INTERLACE) && !(context->flags2 & FLAG2_EVEN_FIELD)) { |
413
36fbbced25c2
Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents:
337
diff
changeset
|
3183 value |= 0x10; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3184 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3185 uint32_t slot = context->hslot; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3186 if (!is_active(context)) { |
318
789f2f5f2277
Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
3187 value |= 0x8; |
789f2f5f2277
Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
3188 } |
622
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3189 if (context->regs[REG_MODE_4] & BIT_H40) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3190 if (slot < HBLANK_END_H40 || slot > HBLANK_START_H40) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3191 value |= 0x4; |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3192 } |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3193 } else { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3194 if (slot < HBLANK_END_H32 || slot > HBLANK_START_H32) { |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3195 value |= 0x4; |
b76d2a628ab9
Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents:
621
diff
changeset
|
3196 } |
318
789f2f5f2277
Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents:
317
diff
changeset
|
3197 } |
983
14d2f3b0e45d
Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents:
981
diff
changeset
|
3198 if (context->cd & 0x20) { |
141
576f55711d8d
Fix DMA in progress flag in VDP status register
Mike Pavone <pavone@retrodev.com>
parents:
138
diff
changeset
|
3199 value |= 0x2; |
75 | 3200 } |
714
e29bc2918f69
Fix VDP status register PAL bit based on observations of the Titan Overdrive demo
Michael Pavone <pavone@retrodev.com>
parents:
711
diff
changeset
|
3201 if (context->flags2 & FLAG2_REGION_PAL) { |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3202 value |= 0x1; |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3203 } |
459
c49ecf575784
Revert change to VBLANK flag timing based on new direct color DMA test
Mike Pavone <pavone@retrodev.com>
parents:
454
diff
changeset
|
3204 //printf("status read at cycle %d returned %X\n", context->cycles, value); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3205 return value; |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3206 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3207 |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3208 uint16_t vdp_data_port_read(vdp_context * context) |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3209 { |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3210 if (context->flags & FLAG_PENDING) { |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3211 context->flags &= ~FLAG_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3212 //Should these be cleared here? |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3213 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3214 context->flags2 &= ~FLAG2_READ_PENDING; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3215 } |
138 | 3216 if (context->cd & 1) { |
991
f9ee6f746cb4
Properly emulate machine freeze when reading from VDP while configured for writes
Michael Pavone <pavone@retrodev.com>
parents:
984
diff
changeset
|
3217 warning("Read from VDP data port while writes are configured, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3218 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3219 while (!(context->flags & FLAG_READ_FETCHED)) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3220 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)); |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3221 } |
980
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3222 context->flags &= ~FLAG_READ_FETCHED; |
928442068afe
Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents:
953
diff
changeset
|
3223 return context->prefetch; |
54
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3224 } |
3b79cbcf6846
Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents:
43
diff
changeset
|
3225 |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3226 uint8_t vdp_data_port_read_pbc(vdp_context * context) |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3227 { |
1153
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3228 context->flags &= ~(FLAG_PENDING | FLAG_READ_FETCHED); |
2e3ad914bad3
BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1152
diff
changeset
|
3229 context->flags2 &= ~FLAG2_BYTE_PENDING; |
1151
681e8a13b261
Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents:
1150
diff
changeset
|
3230 |
1152
ddbb61be6119
Fix to pass a couple more tests in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents:
1151
diff
changeset
|
3231 context->cd = VRAM_READ8; |
1149
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3232 return context->prefetch; |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3233 } |
6b0da6021544
Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents:
1138
diff
changeset
|
3234 |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3235 uint16_t vdp_test_port_read(vdp_context * context) |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3236 { |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3237 //TODO: Find out what actually gets returned here |
1318
bfdd450e7dea
Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents:
1315
diff
changeset
|
3238 return context->test_port; |
470
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3239 } |
541c1ae8abf3
Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents:
467
diff
changeset
|
3240 |
65
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3241 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction) |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3242 { |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3243 context->cycles -= deduction; |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3244 if (context->pending_vint_start >= deduction) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3245 context->pending_vint_start -= deduction; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3246 } else { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3247 context->pending_vint_start = 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3248 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3249 if (context->pending_hint_start >= deduction) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3250 context->pending_hint_start -= deduction; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3251 } else { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3252 context->pending_hint_start = 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3253 } |
471
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3254 if (context->fifo_read >= 0) { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3255 int32_t idx = context->fifo_read; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3256 do { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3257 if (context->fifo[idx].cycle >= deduction) { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3258 context->fifo[idx].cycle -= deduction; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3259 } else { |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3260 context->fifo[idx].cycle = 0; |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3261 } |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3262 idx = (idx+1) & (FIFO_SIZE-1); |
f065769836e8
Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents:
470
diff
changeset
|
3263 } while(idx != context->fifo_write); |
65
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3264 } |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3265 } |
aef6302770c2
Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents:
63
diff
changeset
|
3266 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
3267 static uint32_t vdp_cycles_hslot_wrap_h40(vdp_context * context) |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3268 { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3269 if (context->hslot < 183) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3270 return MCLKS_LINE - context->hslot * MCLKS_SLOT_H40; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3271 } else if (context->hslot < HSYNC_END_H40) { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3272 uint32_t before_hsync = context->hslot < HSYNC_SLOT_H40 ? (HSYNC_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40 : 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3273 uint32_t hsync = 0; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3274 for (int i = context->hslot <= HSYNC_SLOT_H40 ? 0 : context->hslot - HSYNC_SLOT_H40; i < sizeof(h40_hsync_cycles)/sizeof(uint32_t); i++) |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3275 { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3276 hsync += h40_hsync_cycles[i]; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3277 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3278 uint32_t after_hsync = (256- HSYNC_END_H40) * MCLKS_SLOT_H40; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3279 return before_hsync + hsync + after_hsync; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3280 } else { |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3281 return (256-context->hslot) * MCLKS_SLOT_H40; |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3282 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3283 } |
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3284 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
3285 static uint32_t vdp_cycles_next_line(vdp_context * context) |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3286 { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3287 if (context->regs[REG_MODE_4] & BIT_H40) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3288 //TODO: Handle "illegal" Mode 4/H40 combo |
647
5d58dcd94733
Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents:
629
diff
changeset
|
3289 if (context->hslot < LINE_CHANGE_H40) { |
697
7f96bd1cb1be
Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents:
680
diff
changeset
|
3290 return (LINE_CHANGE_H40 - context->hslot) * MCLKS_SLOT_H40; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3291 } else { |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3292 return vdp_cycles_hslot_wrap_h40(context) + LINE_CHANGE_H40 * MCLKS_SLOT_H40; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3293 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3294 } else { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3295 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3296 if (context->hslot < LINE_CHANGE_H32) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3297 return (LINE_CHANGE_H32 - context->hslot) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3298 } else if (context->hslot < 148) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3299 return MCLKS_LINE - (context->hslot - LINE_CHANGE_H32) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3300 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3301 return (256-context->hslot + LINE_CHANGE_H32) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3302 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3303 } else { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3304 if (context->hslot < 148) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3305 return (148 - context->hslot + LINE_CHANGE_MODE4 - 233) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3306 } else if (context->hslot < LINE_CHANGE_MODE4) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3307 return (LINE_CHANGE_MODE4 - context->hslot) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3308 } else { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3309 return MCLKS_LINE - (context->hslot - LINE_CHANGE_MODE4) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3310 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3311 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3312 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3313 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3314 |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3315 static void get_jump_params(vdp_context *context, uint32_t *jump_start, uint32_t *jump_dst) |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3316 { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3317 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3318 if (context->flags2 & FLAG2_REGION_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3319 if (context->regs[REG_MODE_2] & BIT_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3320 *jump_start = 0x10B; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3321 *jump_dst = 0x1D2; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3322 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3323 *jump_start = 0x103; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3324 *jump_dst = 0x1CA; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3325 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3326 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3327 if (context->regs[REG_MODE_2] & BIT_PAL) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3328 *jump_start = 0x100; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3329 *jump_dst = 0x1FA; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3330 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3331 *jump_start = 0xEB; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3332 *jump_dst = 0x1E5; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3333 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3334 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3335 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3336 *jump_start = 0xDB; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3337 *jump_dst = 0x1D5; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3338 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3339 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3340 |
1102
c15896605bf2
Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents:
1077
diff
changeset
|
3341 static uint32_t vdp_cycles_to_line(vdp_context * context, uint32_t target) |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3342 { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3343 uint32_t jump_start, jump_dst; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3344 get_jump_params(context, &jump_start, &jump_dst); |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3345 uint32_t lines; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3346 if (context->vcounter < target) { |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3347 if (target < jump_start || context->vcounter > jump_start) { |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3348 lines = target - context->vcounter; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3349 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3350 lines = jump_start - context->vcounter + target - jump_dst; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3351 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3352 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3353 if (context->vcounter < jump_start) { |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3354 lines = jump_start - context->vcounter + 512 - jump_dst; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3355 } else { |
718
eaba6789f316
Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents:
717
diff
changeset
|
3356 lines = 512 - context->vcounter; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3357 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3358 if (target < jump_start) { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3359 lines += target; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3360 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3361 lines += jump_start + target - jump_dst; |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3362 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3363 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3364 return MCLKS_LINE * (lines - 1) + vdp_cycles_next_line(context); |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3365 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3366 |
680
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
3367 uint32_t vdp_cycles_to_frame_end(vdp_context * context) |
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
3368 { |
1167
e758ddbf0624
Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents:
1163
diff
changeset
|
3369 return context->cycles + vdp_cycles_to_line(context, context->inactive_start); |
680
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
3370 } |
4996369f1463
Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents:
678
diff
changeset
|
3371 |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3372 uint32_t vdp_next_hint(vdp_context * context) |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3373 { |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3374 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) { |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3375 return 0xFFFFFFFF; |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3376 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3377 if (context->flags2 & FLAG2_HINT_PENDING) { |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3378 return context->pending_hint_start; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3379 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3380 uint32_t hint_line; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3381 if (context->state != ACTIVE) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3382 hint_line = context->regs[REG_HINT]; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3383 if (hint_line > context->inactive_start) { |
724
2174f92c5f9b
Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents:
722
diff
changeset
|
3384 return 0xFFFFFFFF; |
2174f92c5f9b
Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents:
722
diff
changeset
|
3385 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3386 } else { |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3387 hint_line = context->vcounter + context->hint_counter + 1; |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3388 if (context->vcounter < context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3389 if (hint_line > context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3390 hint_line = context->regs[REG_HINT]; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3391 if (hint_line > context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3392 return 0xFFFFFFFF; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3393 } |
1366
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
3394 if (hint_line >= context->vcounter) { |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
3395 //Next interrupt is for a line in the next frame that |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
3396 //is higher than the line we're on now so just passing |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
3397 //that line number to vdp_cycles_to_line will yield the wrong |
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
3398 //result |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3399 return context->cycles + vdp_cycles_to_line(context, 0) + hint_line * MCLKS_LINE; |
1366
c74a2f31ae5f
Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents:
1365
diff
changeset
|
3400 } |
1325
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3401 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3402 } else { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3403 uint32_t jump_start, jump_dst; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3404 get_jump_params(context, &jump_start, &jump_dst); |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3405 if (hint_line >= jump_start && context->vcounter < jump_dst) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3406 hint_line = (hint_line + jump_dst - jump_start) & 0x1FF; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3407 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3408 if (hint_line < context->vcounter && hint_line > context->inactive_start) { |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3409 return 0xFFFFFFFF; |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3410 } |
58bfbed6cdb5
Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents:
1322
diff
changeset
|
3411 } |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3412 } |
1371
5b20840711c1
Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents:
1369
diff
changeset
|
3413 return context->cycles + vdp_cycles_to_line(context, hint_line); |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3414 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3415 |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3416 static uint32_t vdp_next_vint_real(vdp_context * context) |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3417 { |
327
1b00258b1f29
Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents:
323
diff
changeset
|
3418 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) { |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3419 return 0xFFFFFFFF; |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3420 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3421 if (context->flags2 & FLAG2_VINT_PENDING) { |
717
22dbdf50d33c
Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents:
714
diff
changeset
|
3422 return context->pending_vint_start; |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3423 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3424 |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3425 |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3426 return vdp_next_vint_z80(context); |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3427 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3428 |
1171
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3429 uint32_t vdp_next_vint(vdp_context *context) |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3430 { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3431 uint32_t ret = vdp_next_vint_real(context); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3432 #ifdef TIMING_DEBUG |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3433 static uint32_t last = 0xFFFFFFFF; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3434 if (last != ret) { |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3435 printf("vdp_next_vint is %d at frame %d, line %d, hslot %d\n", ret, context->frame, context->vcounter, context->hslot); |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3436 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3437 last = ret; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3438 #endif |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3439 return ret; |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3440 } |
43fa92976ff2
Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents:
1170
diff
changeset
|
3441 |
333 | 3442 uint32_t vdp_next_vint_z80(vdp_context * context) |
3443 { | |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3444 uint16_t vint_line = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->inactive_start : context->inactive_start + 1; |
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3445 if (context->vcounter == vint_line) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3446 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3447 if (context->regs[REG_MODE_4] & BIT_H40) { |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3448 if (context->hslot >= LINE_CHANGE_H40 || context->hslot <= VINT_SLOT_H40) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3449 uint32_t cycles = context->cycles; |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3450 if (context->hslot >= LINE_CHANGE_H40) { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3451 if (context->hslot < 183) { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3452 cycles += (183 - context->hslot) * MCLKS_SLOT_H40; |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3453 } |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3454 |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3455 if (context->hslot < HSYNC_SLOT_H40) { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3456 cycles += (HSYNC_SLOT_H40 - (context->hslot >= 229 ? context->hslot : 229)) * MCLKS_SLOT_H40; |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3457 } |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3458 for (int slot = context->hslot <= HSYNC_SLOT_H40 ? HSYNC_SLOT_H40 : context->hslot; slot < HSYNC_END_H40; slot++ ) |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3459 { |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3460 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40]; |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3461 } |
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3462 cycles += (256 - (context->hslot > HSYNC_END_H40 ? context->hslot : HSYNC_END_H40)) * MCLKS_SLOT_H40; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3463 } |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3464 |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3465 cycles += (VINT_SLOT_H40 - (context->hslot >= LINE_CHANGE_H40 ? 0 : context->hslot)) * MCLKS_SLOT_H40; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3466 return cycles; |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
3467 } |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3468 } else { |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3469 if (context->hslot >= LINE_CHANGE_H32 || context->hslot <= VINT_SLOT_H32) { |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3470 if (context->hslot <= VINT_SLOT_H32) { |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3471 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32; |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3472 } else if (context->hslot < 233) { |
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3473 return context->cycles + (VINT_SLOT_H32 + 256 - 233 + 148 - context->hslot) * MCLKS_SLOT_H32; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3474 } else { |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3475 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3476 } |
995
2bc27415565b
Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents:
991
diff
changeset
|
3477 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3478 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3479 } else { |
1177
67e0462c30ce
Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents:
1175
diff
changeset
|
3480 if (context->hslot >= LINE_CHANGE_MODE4) { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3481 return context->cycles + (VINT_SLOT_MODE4 + 256 - context->hslot) * MCLKS_SLOT_H32; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3482 } |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3483 if (context->hslot <= VINT_SLOT_MODE4) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3484 return context->cycles + (VINT_SLOT_MODE4 - context->hslot) * MCLKS_SLOT_H32; |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3485 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3486 } |
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3487 } |
1169
82d8b9324b10
Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents:
1168
diff
changeset
|
3488 int32_t cycles_to_vint = vdp_cycles_to_line(context, vint_line); |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3489 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3490 if (context->regs[REG_MODE_4] & BIT_H40) { |
1175
0e0386fa795c
Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1174
diff
changeset
|
3491 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3492 } else { |
1174
500d8deea802
Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents:
1173
diff
changeset
|
3493 cycles_to_vint += (VINT_SLOT_H32 + 256 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32; |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3494 } |
333 | 3495 } else { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3496 cycles_to_vint += (256 - LINE_CHANGE_MODE4 + VINT_SLOT_MODE4) * MCLKS_SLOT_H32; |
333 | 3497 } |
623
66cc60215e5c
Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents:
622
diff
changeset
|
3498 return context->cycles + cycles_to_vint; |
333 | 3499 } |
3500 | |
1377
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3501 uint32_t vdp_next_nmi(vdp_context *context) |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3502 { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3503 if (!(context->flags2 & FLAG2_PAUSE)) { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3504 return 0xFFFFFFFF; |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3505 } |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3506 return context->cycles + vdp_cycles_to_line(context, 0x1FF); |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3507 } |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3508 |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3509 void vdp_pbc_pause(vdp_context *context) |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3510 { |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3511 context->flags2 |= FLAG2_PAUSE; |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3512 } |
e587f16e7d3d
Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents:
1371
diff
changeset
|
3513 |
953
08346262990b
Remove the int number argument to vdp_int_ack since it is no longer used
Michael Pavone <pavone@retrodev.com>
parents:
952
diff
changeset
|
3514 void vdp_int_ack(vdp_context * context) |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3515 { |
1160
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3516 //CPU interrupt acknowledge is only used in Mode 5 |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3517 if (context->regs[REG_MODE_2] & BIT_MODE_5) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3518 //Apparently the VDP interrupt controller is not very smart |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3519 //Instead of paying attention to what interrupt is being acknowledged it just |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3520 //clears the pending flag for whatever interrupt it is currently asserted |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3521 //which may be different from the interrupt it was asserting when the 68k |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3522 //started the interrupt process. The window for this is narrow and depends |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3523 //on the latency between the int enable register write and the interrupt being |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3524 //asserted, but Fatal Rewind depends on this due to some buggy code |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3525 if ((context->flags2 & FLAG2_VINT_PENDING) && (context->regs[REG_MODE_2] & BIT_VINT_EN)) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3526 context->flags2 &= ~FLAG2_VINT_PENDING; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3527 } else if((context->flags2 & FLAG2_HINT_PENDING) && (context->regs[REG_MODE_1] & BIT_HINT_EN)) { |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3528 context->flags2 &= ~FLAG2_HINT_PENDING; |
5f119fe935e7
Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents:
1157
diff
changeset
|
3529 } |
317
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3530 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3531 } |
e5e8b48ad157
Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents:
291
diff
changeset
|
3532 |
1427
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3533 void vdp_serialize(vdp_context *context, serialize_buffer *buf) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3534 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3535 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3536 save_buffer8(buf, context->vdpmem, VRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3537 save_buffer16(buf, context->cram, CRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3538 save_buffer16(buf, context->vsram, VSRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3539 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3540 for (int i = 0; i <= REG_DMASRC_H; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3541 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3542 save_int8(buf, context->regs[i]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3543 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3544 save_int32(buf, context->address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3545 save_int32(buf, context->serial_address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3546 save_int8(buf, context->cd); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3547 uint8_t fifo_size; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3548 if (context->fifo_read < 0) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3549 fifo_size = 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3550 } else if (context->fifo_write > context->fifo_read) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3551 fifo_size = context->fifo_write - context->fifo_read; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3552 } else { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3553 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3554 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3555 save_int8(buf, fifo_size); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3556 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3557 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3558 fifo_entry *entry = context->fifo + cur; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3559 cur = (cur + 1) & (FIFO_SIZE - 1); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3560 save_int32(buf, entry->cycle); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3561 save_int32(buf, entry->address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3562 save_int16(buf, entry->value); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3563 save_int8(buf, entry->cd); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3564 save_int8(buf, entry->partial); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3565 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3566 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3567 save_int16(buf, context->flags2 << 8 | context->flags); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3568 save_int32(buf, context->frame); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3569 save_int16(buf, context->vcounter); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3570 save_int8(buf, context->hslot); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3571 save_int16(buf, context->hv_latch); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3572 save_int8(buf, context->state); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3573 save_int16(buf, context->hscroll_a); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3574 save_int16(buf, context->hscroll_b); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3575 save_int16(buf, context->vscroll_latch[0]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3576 save_int16(buf, context->vscroll_latch[1]); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3577 save_int16(buf, context->col_1); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3578 save_int16(buf, context->col_2); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3579 save_int16(buf, context->test_port); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3580 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3581 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3582 save_int8(buf, context->buf_a_off); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3583 save_int8(buf, context->buf_b_off); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3584 //FIXME: Sprite rendering state is currently a mess |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3585 save_int8(buf, context->sprite_index); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3586 save_int8(buf, context->sprite_draws); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3587 save_int8(buf, context->slot_counter); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3588 save_int8(buf, context->cur_slot); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3589 for (int i = 0; i < MAX_DRAWS; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3590 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3591 sprite_draw *draw = context->sprite_draw_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3592 save_int16(buf, draw->address); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3593 save_int16(buf, draw->x_pos); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3594 save_int8(buf, draw->pal_priority); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3595 save_int8(buf, draw->h_flip); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3596 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3597 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3598 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3599 sprite_info *info = context->sprite_info_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3600 save_int8(buf, info->size); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3601 save_int8(buf, info->index); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3602 save_int16(buf, info->y); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3603 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3604 save_buffer8(buf, context->linebuf, LINEBUF_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3605 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3606 save_int32(buf, context->cycles); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3607 save_int32(buf, context->pending_vint_start); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3608 save_int32(buf, context->pending_hint_start); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3609 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3610 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3611 void vdp_deserialize(deserialize_buffer *buf, void *vcontext) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3612 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3613 vdp_context *context = vcontext; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3614 uint8_t vramk = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3615 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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|
3616 if ((vramk * 1024) > VRAM_SIZE) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
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|
3617 buf->cur_pos += (vramk * 1024) - VRAM_SIZE; |
4e5797b3935a
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Michael Pavone <pavone@retrodev.com>
parents:
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diff
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|
3618 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3619 load_buffer16(buf, context->cram, CRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3620 load_buffer16(buf, context->vsram, VSRAM_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3621 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3622 for (int i = 0; i <= REG_DMASRC_H; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3623 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3624 context->regs[i] = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3625 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3626 context->address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3627 context->serial_address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3628 context->cd = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3629 uint8_t fifo_size = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3630 if (fifo_size > FIFO_SIZE) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3631 fatal_error("Invalid fifo size %d", fifo_size); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3632 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3633 if (fifo_size) { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3634 context->fifo_read = 0; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3635 context->fifo_write = fifo_size & (FIFO_SIZE - 1); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3636 for (int i = 0; i < fifo_size; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3637 { |
4e5797b3935a
WIP - New savestate format
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parents:
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diff
changeset
|
3638 fifo_entry *entry = context->fifo + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3639 entry->cycle = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3640 entry->address = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3641 entry->value = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3642 entry->cd = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3643 entry->partial = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3644 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3645 } else { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3646 context->fifo_read = -1; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3647 context->fifo_write = 0; |
4e5797b3935a
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Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3648 } |
4e5797b3935a
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Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3649 uint16_t flags = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3650 context->flags2 = flags >> 8; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3651 context->flags = flags; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3652 context->frame = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3653 context->vcounter = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3654 context->hslot = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3655 context->hv_latch = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3656 context->state = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3657 context->hscroll_a = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3658 context->hscroll_b = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3659 context->vscroll_latch[0] = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3660 context->vscroll_latch[1] = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3661 context->col_1 = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3662 context->col_2 = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3663 context->test_port = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3664 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3665 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3666 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3667 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
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|
3668 context->sprite_index = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
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|
3669 context->sprite_draws = load_int8(buf); |
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WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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diff
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|
3670 context->slot_counter = load_int8(buf); |
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WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3671 context->cur_slot = load_int8(buf); |
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Michael Pavone <pavone@retrodev.com>
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diff
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|
3672 for (int i = 0; i < MAX_DRAWS; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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1422
diff
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|
3673 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
3674 sprite_draw *draw = context->sprite_draw_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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diff
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|
3675 draw->address = load_int16(buf); |
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Michael Pavone <pavone@retrodev.com>
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diff
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|
3676 draw->x_pos = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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diff
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|
3677 draw->pal_priority = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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diff
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|
3678 draw->h_flip = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3679 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
3680 for (int i = 0; i < MAX_SPRITES_LINE; i++) |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3681 { |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3682 sprite_info *info = context->sprite_info_list + i; |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3683 info->size = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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diff
changeset
|
3684 info->index = load_int8(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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1422
diff
changeset
|
3685 info->y = load_int16(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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1422
diff
changeset
|
3686 } |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3687 load_buffer8(buf, context->linebuf, LINEBUF_SIZE); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3688 |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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1422
diff
changeset
|
3689 context->cycles = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3690 context->pending_vint_start = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
1422
diff
changeset
|
3691 context->pending_hint_start = load_int32(buf); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents:
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diff
changeset
|
3692 update_video_params(context); |
4e5797b3935a
WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
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1422
diff
changeset
|
3693 } |