repos/blastem: vdp.c annotate

annotate vdp.c @ 1644:cf4e387a8db6

Populate layer debug buffer during inactive display

author	Michael Pavone <pavone@retrodev.com>
date	Tue, 20 Nov 2018 01:10:03 -0800
parents	6909c5d0bbb5
children	b500e971da75

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	2 Copyright 2013 Michael Pavone
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	5 */
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "vdp.h"
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	7 #include "blastem.h"
1103 22e87b739ad6 WIP split of ROM loading/argument parsing from Genesis emulation code. Compiles and doesn't crash, but nothing works. Still a few too many globals as well. Michael Pavone <pavone@retrodev.com> parents: 1102 diff changeset	8 #include "genesis.h"
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #include <stdlib.h>
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	10 #include <string.h>
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	11 #include "render.h"
991 f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes Michael Pavone <pavone@retrodev.com> parents: 984 diff changeset	12 #include "util.h"
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	13
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	14 #define NTSC_INACTIVE_START 224
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	15 #define PAL_INACTIVE_START 240
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	16 #define MODE4_INACTIVE_START 192
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	17 #define BUF_BIT_PRIORITY 0x40
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	18 #define MAP_BIT_PRIORITY 0x8000
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	19 #define MAP_BIT_H_FLIP 0x800
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	20 #define MAP_BIT_V_FLIP 0x1000
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	21
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	22 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1)
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	23 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2)
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	24
328 bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	25 #define MCLKS_SLOT_H40 16
bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	26 #define MCLKS_SLOT_H32 20
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	27 #define VINT_SLOT_H40 0 //21 slots before HSYNC, 16 during, 10 after
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	28 #define VINT_SLOT_H32 0 //old value was 23, but recent tests suggest the actual value is close to the H40 one
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	29 #define VINT_SLOT_MODE4 4
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	30 #define HSYNC_SLOT_H40 230
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 680 diff changeset	31 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17)
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	32 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	33 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	34 #define HBLANK_START_H32 233 //should be 147 according to Nemesis which is very different from my test ROM result
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	35 #define HBLANK_END_H32 0 //should be 5 according to Nemesis, but 0 seems to fit better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	36 #define LINE_CHANGE_H40 165
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	37 #define LINE_CHANGE_H32 133
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	38 #define LINE_CHANGE_MODE4 249
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	39 #define VBLANK_START_H40 (LINE_CHANGE_H40+2)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	40 #define VBLANK_START_H32 (LINE_CHANGE_H32+2)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	41 #define FIFO_LATENCY 3
328 bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	42
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	43 #define BORDER_TOP_V24 27
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	44 #define BORDER_TOP_V28 11
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	45 #define BORDER_TOP_V24_PAL 54
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	46 #define BORDER_TOP_V28_PAL 38
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	47 #define BORDER_TOP_V30_PAL 30
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	48
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	49 #define BORDER_BOT_V24 24
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	50 #define BORDER_BOT_V28 8
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	51 #define BORDER_BOT_V24_PAL 48
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	52 #define BORDER_BOT_V28_PAL 32
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	53 #define BORDER_BOT_V30_PAL 24
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	54
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	55 #define INVALID_LINE 0x200
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	56
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	57 enum {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	58 INACTIVE = 0,
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	59 PREPARING, //used for line 0x1FF
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	60 ACTIVE
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	61 };
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	62
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	63 static int32_t color_map[1 << 12];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	64 static uint16_t mode4_address_map[0x4000];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	65 static uint32_t planar_to_chunky[256];
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	66 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255};
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	67
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	68 static uint8_t debug_base[][3] = {
437 afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	69 {127, 127, 127}, //BG
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	70 {0, 0, 127}, //A
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	71 {127, 0, 0}, //Window
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	72 {0, 127, 0}, //B
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	73 {127, 0, 127} //Sprites
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	74 };
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	75
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	76 static void update_video_params(vdp_context *context)
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	77 {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	78 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	79 if (context->regs[REG_MODE_2] & BIT_PAL) {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	80 if (context->flags2 & FLAG2_REGION_PAL) {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	81 context->inactive_start = PAL_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	82 context->border_top = BORDER_TOP_V30_PAL;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	83 context->border_bot = BORDER_BOT_V30_PAL;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	84 } else {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	85 //the behavior here is rather weird and needs more investigation
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	86 context->inactive_start = 0xF0;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	87 context->border_top = 1;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	88 context->border_bot = 3;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	89 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	90 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	91 context->inactive_start = NTSC_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	92 if (context->flags2 & FLAG2_REGION_PAL) {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	93 context->border_top = BORDER_TOP_V28_PAL;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	94 context->border_bot = BORDER_BOT_V28_PAL;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	95 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	96 context->border_top = BORDER_TOP_V28;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	97 context->border_bot = BORDER_TOP_V28;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	98 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	99 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	100 if (context->regs[REG_MODE_4] & BIT_H40) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	101 context->max_sprites_frame = MAX_SPRITES_FRAME;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	102 context->max_sprites_line = MAX_SPRITES_LINE;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	103 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	104 context->max_sprites_frame = MAX_SPRITES_FRAME_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	105 context->max_sprites_line = MAX_SPRITES_LINE_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	106 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	107 if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	108 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	109 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	110 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	111 } else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	112 context->state = PREPARING;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	113 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	114 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	115 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	116 context->inactive_start = MODE4_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	117 if (context->flags2 & FLAG2_REGION_PAL) {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	118 context->border_top = BORDER_TOP_V24_PAL;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	119 context->border_bot = BORDER_BOT_V24_PAL;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	120 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	121 context->border_top = BORDER_TOP_V24;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	122 context->border_bot = BORDER_BOT_V24;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	123 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	124 if (!(context->regs[REG_MODE_1] & BIT_MODE_4)){
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	125 context->state = INACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	126 } else if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	127 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	128 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	129 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	130 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	131 else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	132 context->state = PREPARING;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	133 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	134 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	135 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	136 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	137
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	138 static uint8_t color_map_init_done;
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	139
1640 3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers Michael Pavone <pavone@retrodev.com> parents: 1639 diff changeset	140 vdp_context *init_vdp_context(uint8_t region_pal)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	141 {
1640 3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers Michael Pavone <pavone@retrodev.com> parents: 1639 diff changeset	142 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	143 if (headless) {
1168 fa73a77ddf92 Fix benchmark mode Michael Pavone <pavone@retrodev.com> parents: 1167 diff changeset	144 context->output = malloc(LINEBUF_SIZE * sizeof(uint32_t));
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	145 context->output_pitch = 0;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	146 } else {
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	147 context->cur_buffer = FRAMEBUFFER_ODD;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	148 context->fb = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	149 }
26 a7c2b92d8056 Fix management of context->sprite_draws so the sprite layer only draws when it should Mike Pavone <pavone@retrodev.com> parents: 25 diff changeset	150 context->sprite_draws = MAX_DRAWS;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	151 context->fifo_write = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	152 context->fifo_read = -1;
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	153 context->regs[REG_HINT] = context->hint_counter = 0xFF;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	154
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	155 if (!color_map_init_done) {
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	156 uint8_t b,g,r;
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	157 for (uint16_t color = 0; color < (1 << 12); color++) {
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	158 if (color & FBUF_SHADOW) {
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	159 b = levels[(color >> 9) & 0x7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	160 g = levels[(color >> 5) & 0x7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	161 r = levels[(color >> 1) & 0x7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	162 } else if(color & FBUF_HILIGHT) {
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	163 b = levels[((color >> 9) & 0x7) + 7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	164 g = levels[((color >> 5) & 0x7) + 7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	165 r = levels[((color >> 1) & 0x7) + 7];
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	166 } else if(color & FBUF_MODE4) {
1127 cb4771f4543a Fix Mode 4 color mapping Michael Pavone <pavone@retrodev.com> parents: 1125 diff changeset	167 b = levels[(color >> 4 & 0xC) \| (color >> 6 & 0x2)];
1125 fba485949723 Brighten up Mode 4 colors Michael Pavone <pavone@retrodev.com> parents: 1124 diff changeset	168 g = levels[(color >> 2 & 0x8) \| (color >> 1 & 0x4) \| (color >> 4 & 0x2)];
fba485949723 Brighten up Mode 4 colors Michael Pavone <pavone@retrodev.com> parents: 1124 diff changeset	169 r = levels[(color << 1 & 0xC) \| (color >> 1 & 0x2)];
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	170 } else {
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	171 b = levels[(color >> 8) & 0xE];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	172 g = levels[(color >> 4) & 0xE];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	173 r = levels[color & 0xE];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	174 }
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	175 color_map[color] = render_map_color(r, g, b);
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	176 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	177 for (uint16_t mode4_addr = 0; mode4_addr < 0x4000; mode4_addr++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	178 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	179 uint16_t mode5_addr = mode4_addr & 0x3DFD;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	180 mode5_addr \|= mode4_addr << 8 & 0x200;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	181 mode5_addr \|= mode4_addr >> 8 & 2;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	182 mode4_address_map[mode4_addr] = mode5_addr;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	183 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	184 for (uint32_t planar = 0; planar < 256; planar++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	185 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	186 uint32_t chunky = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	187 for (int bit = 7; bit >= 0; bit--)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	188 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	189 chunky = chunky << 4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	190 chunky \|= planar >> bit & 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	191 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	192 planar_to_chunky[planar] = chunky;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	193 }
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	194 color_map_init_done = 1;
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	195 }
437 afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	196 for (uint8_t color = 0; color < (1 << (3 + 1 + 1 + 1)); color++)
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	197 {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	198 uint8_t src = color & DBG_SRC_MASK;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	199 if (src > DBG_SRC_S) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	200 context->debugcolors[color] = 0;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	201 } else {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	202 uint8_t r,g,b;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	203 b = debug_base[src][0];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	204 g = debug_base[src][1];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	205 r = debug_base[src][2];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	206 if (color & DBG_PRIORITY)
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	207 {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	208 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	209 b += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	210 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	211 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	212 g += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	213 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	214 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	215 r += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	216 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	217 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	218 if (color & DBG_SHADOW) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	219 b /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	220 g /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	221 r /=2 ;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	222 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	223 if (color & DBG_HILIGHT) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	224 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	225 b += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	226 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	227 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	228 g += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	229 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	230 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	231 r += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	232 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	233 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	234 context->debugcolors[color] = render_map_color(r, g, b);
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	235 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	236 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	237 if (region_pal) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	238 context->flags2 \|= FLAG2_REGION_PAL;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	239 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	240 update_video_params(context);
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	241 if (!headless) {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	242 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * context->border_top);
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	243 }
1640 3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers Michael Pavone <pavone@retrodev.com> parents: 1639 diff changeset	244 return context;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	245 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	246
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	247 void vdp_free(vdp_context *context)
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	248 {
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	249 free(context);
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	250 }
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	251
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	252 static int is_refresh(vdp_context * context, uint32_t slot)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	253 {
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	254 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	255 return slot == 250 \|\| slot == 26 \|\| slot == 59 \|\| slot == 90 \|\| slot == 122 \|\| slot == 154;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	256 } else {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	257 //TODO: Figure out which slots are refresh when display is off in 32-cell mode
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	258 //These numbers are guesses based on H40 numbers
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	259 return slot == 243 \|\| slot == 19 \|\| slot == 51 \|\| slot == 83 \|\| slot == 115;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	260 //The numbers below are the refresh slots during active display
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	261 //return (slot == 29 \|\| slot == 61 \|\| slot == 93 \|\| slot == 125);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	262 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	263 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	264
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	265 static void increment_address(vdp_context *context)
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	266 {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	267 context->address += context->regs[REG_AUTOINC];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	268 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	269 context->address++;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	270 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	271 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	272
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	273 static void render_sprite_cells(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	274 {
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	275 sprite_draw * d = context->sprite_draw_list + context->cur_slot;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	276 context->serial_address = d->address;
21 72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	277 if (context->cur_slot >= context->sprite_draws) {
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	278
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	279 uint16_t dir;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	280 int16_t x;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	281 if (d->h_flip) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	282 x = d->x_pos + 7;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	283 dir = -1;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	284 } else {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	285 x = d->x_pos;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	286 dir = 1;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	287 }
27 aa1c47fab3f1 Fix sprite transparency for overlapping sprites Mike Pavone <pavone@retrodev.com> parents: 26 diff changeset	288 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x);
26 a7c2b92d8056 Fix management of context->sprite_draws so the sprite layer only draws when it should Mike Pavone <pavone@retrodev.com> parents: 25 diff changeset	289 context->cur_slot--;
143 e5487ef04619 Fix infinite loop bug in sprite rendering Mike Pavone <pavone@retrodev.com> parents: 142 diff changeset	290 for (uint16_t address = d->address; address != ((d->address+4) & 0xFFFF); address++) {
1029 4263dc9cf86d Fix implementation of sprite collision flag. Old implementation did not make sense. Michael Pavone <pavone@retrodev.com> parents: 1019 diff changeset	291 if (x >= 0 && x < 320) {
4263dc9cf86d Fix implementation of sprite collision flag. Old implementation did not make sense. Michael Pavone <pavone@retrodev.com> parents: 1019 diff changeset	292 if (!(context->linebuf[x] & 0xF)) {
4263dc9cf86d Fix implementation of sprite collision flag. Old implementation did not make sense. Michael Pavone <pavone@retrodev.com> parents: 1019 diff changeset	293 context->linebuf[x] = (context->vdpmem[address] >> 4) \| d->pal_priority;
4263dc9cf86d Fix implementation of sprite collision flag. Old implementation did not make sense. Michael Pavone <pavone@retrodev.com> parents: 1019 diff changeset	294 } else if (context->vdpmem[address] >> 4) {
494 8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	295 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	296 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	297 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	298 x += dir;
1029 4263dc9cf86d Fix implementation of sprite collision flag. Old implementation did not make sense. Michael Pavone <pavone@retrodev.com> parents: 1019 diff changeset	299 if (x >= 0 && x < 320) {
4263dc9cf86d Fix implementation of sprite collision flag. Old implementation did not make sense. Michael Pavone <pavone@retrodev.com> parents: 1019 diff changeset	300 if (!(context->linebuf[x] & 0xF)) {
4263dc9cf86d Fix implementation of sprite collision flag. Old implementation did not make sense. Michael Pavone <pavone@retrodev.com> parents: 1019 diff changeset	301 context->linebuf[x] = (context->vdpmem[address] & 0xF) \| d->pal_priority;
4263dc9cf86d Fix implementation of sprite collision flag. Old implementation did not make sense. Michael Pavone <pavone@retrodev.com> parents: 1019 diff changeset	302 } else if (context->vdpmem[address] & 0xF) {
494 8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	303 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	304 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	305 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	306 x += dir;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	307 }
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	308 } else {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	309 context->cur_slot--;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	310 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	311 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	312
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	313 static void fetch_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	314 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	315 if (context->sprite_index >= context->sprite_draws) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	316 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	317 uint32_t address = mode4_address_map[d->address & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	318 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	319 context->fetch_tmp[1] = context->vdpmem[address + 1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	320 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	321 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	322
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	323 static void render_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	324 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	325 if (context->sprite_index >= context->sprite_draws) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	326 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	327 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	328 pixels \|= planar_to_chunky[context->fetch_tmp[1]];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	329 uint32_t address = mode4_address_map[(d->address + 2) & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	330 pixels \|= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	331 pixels \|= planar_to_chunky[context->vdpmem[address + 1]] << 2;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	332 int x = d->x_pos & 0xFF;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	333 for (int i = 28; i >= 0; i -= 4, x++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	334 {
1155 da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	335 if (context->linebuf[x] && (pixels >> i & 0xF)) {
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	336 if (
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	337 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	338 \|\| ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	339 ) {
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	340 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	341 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	342 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	343 context->linebuf[x] = pixels >> i & 0xF;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	344 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	345 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	346 context->sprite_index--;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	347 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	348 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	349
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	350 static uint32_t mode5_sat_address(vdp_context *context)
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	351 {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	352 uint32_t addr = context->regs[REG_SAT] << 9;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	353 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	354 addr &= 0xFFFF;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	355 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	356 if (context->regs[REG_MODE_4] & BIT_H40) {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	357 addr &= 0x1FC00;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	358 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	359 return addr;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	360 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	361
322 8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	362 void vdp_print_sprite_table(vdp_context * context)
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	363 {
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	364 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	365 uint16_t sat_address = mode5_sat_address(context);
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	366 uint16_t current_index = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	367 uint8_t count = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	368 do {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	369 uint16_t address = current_index * 8 + sat_address;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	370 uint16_t cache_address = current_index * 4;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	371 uint8_t height = ((context->sat_cache[cache_address+2] & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	372 uint8_t width = (((context->sat_cache[cache_address+2] >> 2) & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	373 int16_t y = ((context->sat_cache[cache_address] & 0x3) << 8 \| context->sat_cache[cache_address+1]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	374 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 \| context->vdpmem[address + 7]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	375 uint16_t link = context->sat_cache[cache_address+3] & 0x7F;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	376 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	377 uint8_t pri = context->vdpmem[address + 4] >> 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	378 uint16_t pattern = ((context->vdpmem[address + 4] << 8 \| context->vdpmem[address + 5]) & 0x7FF) << 5;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	379 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	380 current_index = link;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	381 count++;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	382 } while (current_index != 0 && count < 80);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	383 } else {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	384 uint16_t sat_address = (context->regs[REG_SAT] & 0x7E) << 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	385 for (int i = 0; i < 64; i++)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	386 {
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	387 uint8_t y = context->vdpmem[mode4_address_map[sat_address + (i ^ 1)]];
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	388 if (y == 0xD0) {
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	389 break;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	390 }
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	391 uint8_t x = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2 + 1]];
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	392 uint16_t tile_address = context->vdpmem[mode4_address_map[sat_address + 0x80 + i2]] 32
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	393 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	394 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	395 tile_address &= ~32;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	396 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	397 printf("Sprite %d: X=%d, Y=%d, Pat=%X\n", i, x, y, tile_address);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	398 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	399 }
322 8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	400 }
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	401
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	402 #define VRAM_READ 0 //0000
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	403 #define VRAM_WRITE 1 //0001
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	404 //2 would trigger register write 0010
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	405 #define CRAM_WRITE 3 //0011
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	406 #define VSRAM_READ 4 //0100
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	407 #define VSRAM_WRITE 5//0101
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	408 //6 would trigger regsiter write 0110
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	409 //7 is a mystery //0111
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	410 #define CRAM_READ 8 //1000
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	411 //9 is also a mystery //1001
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	412 //A would trigger register write 1010
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	413 //B is a mystery 1011
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	414 #define VRAM_READ8 0xC //1100
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	415 //D is a mystery 1101
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	416 //E would trigger register write 1110
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	417 //F is a mystery 1111
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	418
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	419 //Possible theory on how bits work
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	420 //CD0 = Read/Write flag
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	421 //CD2,(CD1\|CD3) = RAM type
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	422 // 00 = VRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	423 // 01 = CRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	424 // 10 = VSRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	425 // 11 = VRAM8
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	426 //Would result in
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	427 // 7 = VRAM8 write
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	428 // 9 = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	429 // B = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	430 // D = VRAM8 write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	431 // F = VRAM8 write alais
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	432
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	433 #define DMA_START 0x20
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	434
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	435 static const char * cd_name(uint8_t cd)
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	436 {
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	437 switch (cd & 0xF)
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	438 {
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	439 case VRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	440 return "VRAM read";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	441 case VRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	442 return "VRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	443 case CRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	444 return "CRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	445 case VSRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	446 return "VSRAM read";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	447 case VSRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	448 return "VSRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	449 case VRAM_READ8:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	450 return "VRAM read (undocumented 8-bit mode)";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	451 default:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	452 return "invalid";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	453 }
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	454 }
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	455
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	456 void vdp_print_reg_explain(vdp_context * context)
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	457 {
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	458 char * hscroll[] = {"full", "7-line", "cell", "line"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	459 printf("Mode Group\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	460 "00: %.2X \| H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n"
1331 9bba5ff5beb8 Add 128K VRAM bit to VDP register print in debugger Michael Pavone <pavone@retrodev.com> parents: 1325 diff changeset	461 "01: %.2X \| Display %s, V-ints %s, Height: %d, Mode %d, %dK VRAM\n"
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	462 "0B: %.2X \| E-ints %s, V-Scroll: %s, H-Scroll: %s\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	463 "0C: %.2X \| Width: %d, Shadow/Highlight: %s\n",
757 483f7e7926a6 More clang warning cleanup Michael Pavone <pavone@retrodev.com> parents: 748 diff changeset	464 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0,
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	465 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled",
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	466 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled",
1331 9bba5ff5beb8 Add 128K VRAM bit to VDP register print in debugger Michael Pavone <pavone@retrodev.com> parents: 1325 diff changeset	467 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, context->regs[REG_MODE_1] & BIT_128K_VRAM ? 128 : 64,
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	468 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full",
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	469 hscroll[context->regs[REG_MODE_3] & 0x3],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	470 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled");
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	471 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	472 printf("\nTable Group\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	473 "02: %.2X \| Scroll A Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	474 "03: %.2X \| Window Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	475 "04: %.2X \| Scroll B Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	476 "05: %.2X \| Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	477 "0D: %.2X \| HScroll Data Table: $%.4X\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	478 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	479 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	480 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13,
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	481 context->regs[REG_SAT], mode5_sat_address(context),
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	482 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	483 } else {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	484 printf("\nTable Group\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	485 "02: %.2X \| Background Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	486 "05: %.2X \| Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	487 "06: %.2X \| Sprite Tile Base: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	488 "08: %.2X \| Background X Scroll: %d\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	489 "09: %.2X \| Background Y Scroll: %d\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	490 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0xE) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	491 context->regs[REG_SAT], (context->regs[REG_SAT] & 0x7E) << 7,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	492 context->regs[REG_STILE_BASE], (context->regs[REG_STILE_BASE] & 2) << 11,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	493 context->regs[REG_X_SCROLL], context->regs[REG_X_SCROLL],
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	494 context->regs[REG_Y_SCROLL], context->regs[REG_Y_SCROLL]);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	495
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	496 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	497 char * sizes[] = {"32", "64", "invalid", "128"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	498 printf("\nMisc Group\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	499 "07: %.2X \| Backdrop Color: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	500 "0A: %.2X \| H-Int Counter: %u\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	501 "0F: %.2X \| Auto-increment: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	502 "10: %.2X \| Scroll A/B Size: %sx%s\n",
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	503 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR],
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	504 context->regs[REG_HINT], context->regs[REG_HINT],
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	505 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	506 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]);
621 5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	507 char * src_types[] = {"68K", "68K", "Copy", "Fill"};
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	508 printf("\nDMA Group\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	509 "13: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	510 "14: %.2X \| DMA Length: $%.4X words\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	511 "15: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	512 "16: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	513 "17: %.2X \| DMA Source Address: $%.6X, Type: %s\n",
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	514 context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	515 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 \| context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	516 context->regs[REG_DMASRC_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	517 context->regs[REG_DMASRC_M],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	518 context->regs[REG_DMASRC_H],
629 9089951a1994 Small fix to display of DMA source address in vr debug command Michael Pavone <pavone@retrodev.com> parents: 624 diff changeset	519 context->regs[REG_DMASRC_H] << 17 \| context->regs[REG_DMASRC_M] << 9 \| context->regs[REG_DMASRC_L] << 1,
621 5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	520 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]);
1628 3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	521 uint8_t old_flags = context->flags;
3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	522 uint8_t old_flags2 = context->flags2;
438 b3cee2fe690b Add address/cd registers to VDP debug message Mike Pavone <pavone@retrodev.com> parents: 437 diff changeset	523 printf("\nInternal Group\n"
b3cee2fe690b Add address/cd registers to VDP debug message Mike Pavone <pavone@retrodev.com> parents: 437 diff changeset	524 "Address: %X\n"
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	525 "CD: %X - %s\n"
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	526 "Pending: %s\n"
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	527 "VCounter: %d\n"
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	528 "HCounter: %d\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	529 "VINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	530 "HINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	531 "Status: %X\n",
1150 322d28e6f13c Display both byte and word pending values to better reflect VDP pending state in PBC mode Michael Pavone <pavone@retrodev.com> parents: 1149 diff changeset	532 context->address, context->cd, cd_name(context->cd),
322d28e6f13c Display both byte and word pending values to better reflect VDP pending state in PBC mode Michael Pavone <pavone@retrodev.com> parents: 1149 diff changeset	533 (context->flags & FLAG_PENDING) ? "word" : (context->flags2 & FLAG2_BYTE_PENDING) ? "byte" : "none",
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	534 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false",
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	535 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_control_port_read(context));
1628 3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	536 //restore flags as calling vdp_control_port_read can change them
3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	537 context->flags = old_flags;
3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	538 context->flags2 = old_flags2;
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	539 }
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	540
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	541 static uint8_t is_active(vdp_context *context)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	542 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	543 return context->state != INACTIVE && (context->regs[REG_MODE_2] & BIT_DISP_EN) != 0;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	544 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	545
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	546 static void scan_sprite_table(uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	547 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	548 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) {
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	549 line += 1;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	550 uint16_t ymask, ymin;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	551 uint8_t height_mult;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	552 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	553 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	554 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	555 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	556 }
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	557 ymask = 0x3FF;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	558 ymin = 256;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	559 height_mult = 16;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	560 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	561 ymask = 0x1FF;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	562 ymin = 128;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	563 height_mult = 8;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	564 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	565 context->sprite_index &= 0x7F;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	566 //TODO: Implement squirelly behavior documented by Kabuto
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	567 if (context->sprite_index >= context->max_sprites_frame) {
38 898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	568 context->sprite_index = 0;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	569 return;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	570 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	571 uint16_t address = context->sprite_index * 4;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	572 line += ymin;
1346 f7ca42e020fd Fix sprite rendering in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1344 diff changeset	573 line &= ymask;
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	574 uint16_t y = ((context->sat_cache[address] & 0x3) << 8 \| context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	575 uint8_t height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
21 72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	576 //printf("Sprite %d \| y: %d, height: %d\n", context->sprite_index, y, height);
72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	577 if (y <= line && line < (y + height)) {
27 aa1c47fab3f1 Fix sprite transparency for overlapping sprites Mike Pavone <pavone@retrodev.com> parents: 26 diff changeset	578 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	579 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	580 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	581 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	582 context->sprite_index = context->sat_cache[address+3] & 0x7F;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	583 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	584 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	585 //TODO: Implement squirelly behavior documented by Kabuto
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	586 if (context->sprite_index >= context->max_sprites_frame) {
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	587 context->sprite_index = 0;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	588 return;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	589 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	590 address = context->sprite_index * 4;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	591 y = ((context->sat_cache[address] & 0x3) << 8 \| context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	592 height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
323 8c01b4154480 Properly mask sprite X and Y coordinates Mike Pavone <pavone@retrodev.com> parents: 322 diff changeset	593 //printf("Sprite %d \| y: %d, height: %d\n", context->sprite_index, y, height);
21 72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	594 if (y <= line && line < (y + height)) {
27 aa1c47fab3f1 Fix sprite transparency for overlapping sprites Mike Pavone <pavone@retrodev.com> parents: 26 diff changeset	595 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	596 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	597 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	598 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	599 context->sprite_index = context->sat_cache[address+3] & 0x7F;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	600 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	601 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	602 //TODO: Seems like the overflow flag should be set here if we run out of sprite info slots without hitting the end of the list
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	603 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	604
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	605 static void scan_sprite_table_mode4(vdp_context * context)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	606 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	607 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	608 uint32_t line = context->vcounter;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	609 line &= 0xFF;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	610
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	611 uint32_t sat_address = mode4_address_map[(context->regs[REG_SAT] << 7 & 0x3F00) + context->sprite_index];
1138 25268334a24c Fix Mode 4 sprite table Y scan to account for VRAM byte swapping Michael Pavone <pavone@retrodev.com> parents: 1137 diff changeset	612 uint32_t y = context->vdpmem[sat_address+1];
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	613 uint32_t size = (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) ? 16 : 8;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	614
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	615 if (y == 0xd0) {
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	616 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	617 return;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	618 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	619 if (y <= line && line < (y + size)) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	620 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	621 context->sprite_index = MAX_SPRITES_FRAME_H32;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	622 context->flags \|= FLAG_DOT_OFLOW;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	623 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	624 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	625 context->sprite_info_list[--(context->slot_counter)].size = size;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	626 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	627 context->sprite_info_list[context->slot_counter].y = y;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	628 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	629 context->sprite_index++;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	630 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	631
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	632 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
1138 25268334a24c Fix Mode 4 sprite table Y scan to account for VRAM byte swapping Michael Pavone <pavone@retrodev.com> parents: 1137 diff changeset	633 y = context->vdpmem[sat_address];
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	634 if (y == 0xd0) {
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	635 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	636 return;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	637 } else {
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	638 if (y <= line && line < (y + size)) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	639 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	640 context->sprite_index = MAX_SPRITES_FRAME_H32;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	641 context->flags \|= FLAG_DOT_OFLOW;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	642 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	643 }
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	644 context->sprite_info_list[--(context->slot_counter)].size = size;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	645 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	646 context->sprite_info_list[context->slot_counter].y = y;
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	647 }
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	648 context->sprite_index++;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	649 }
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	650 }
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	651
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	652 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	653 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	654
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	655 static void read_sprite_x(uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	656 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	657 if (context->cur_slot == context->max_sprites_line) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	658 context->cur_slot = 0;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	659 }
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	660 if (context->cur_slot < context->slot_counter) {
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	661 if (context->sprite_draws) {
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	662 line += 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	663 //in tiles
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	664 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	665 //in pixels
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	666 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	667 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	668 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	669 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	670 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	671 }
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	672 height *= 2;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	673 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	674 uint16_t ymask, ymin;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	675 if (context->double_res) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	676 ymask = 0x3FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	677 ymin = 256;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	678 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	679 ymask = 0x1FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	680 ymin = 128;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	681 }
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	682 uint16_t att_addr = mode5_sat_address(context) + context->sprite_info_list[context->cur_slot].index * 8 + 4;
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	683 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) \| context->vdpmem[att_addr+1];
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	684 uint8_t pal_priority = (tileinfo >> 9) & 0x70;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	685 uint8_t row;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	686 uint16_t cache_addr = context->sprite_info_list[context->cur_slot].index * 4;
1346 f7ca42e020fd Fix sprite rendering in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1344 diff changeset	687 line = (line + ymin) & ymask;
1338 3706b683cd48 Fix sprite rendering for negative line. Fixes remaining visual glitch in the Titancade scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1337 diff changeset	688 int16_t y = ((context->sat_cache[cache_addr] << 8 \| context->sat_cache[cache_addr+1]) & ymask)/* - ymin*/;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	689 if (tileinfo & MAP_BIT_V_FLIP) {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	690 row = (y + height - 1) - line;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	691 } else {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	692 row = line-y;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	693 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	694 row &= ymask >> 4;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	695 uint16_t address;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	696 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	697 address = ((tileinfo & 0x3FF) << 6) + row * 4;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	698 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	699 address = ((tileinfo & 0x7FF) << 5) + row * 4;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	700 }
323 8c01b4154480 Properly mask sprite X and Y coordinates Mike Pavone <pavone@retrodev.com> parents: 322 diff changeset	701 int16_t x = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 \| context->vdpmem[att_addr + 3]) & 0x1FF;
36 04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	702 if (x) {
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	703 context->flags \|= FLAG_CAN_MASK;
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	704 } else if(context->flags & (FLAG_CAN_MASK \| FLAG_DOT_OFLOW)) {
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	705 context->flags \|= FLAG_MASKED;
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	706 }
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	707
36 04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	708 context->flags &= ~FLAG_DOT_OFLOW;
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	709 int16_t i;
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	710 if (context->flags & FLAG_MASKED) {
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	711 for (i=0; i < width && context->sprite_draws; i++) {
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	712 --context->sprite_draws;
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	713 context->sprite_draw_list[context->sprite_draws].x_pos = -128;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	714 context->sprite_draw_list[context->sprite_draws].address = address + i * height * 4;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	715 }
36 04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	716 } else {
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	717 x -= 128;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	718 int16_t base_x = x;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	719 int16_t dir;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	720 if (tileinfo & MAP_BIT_H_FLIP) {
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	721 x += (width-1) * 8;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	722 dir = -8;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	723 } else {
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	724 dir = 8;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	725 }
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	726 //printf("Sprite %d \| x: %d, y: %d, width: %d, height: %d, pal_priority: %X, row: %d, tile addr: %X\n", context->sprite_info_list[context->cur_slot].index, x, context->sprite_info_list[context->cur_slot].y, width, height, pal_priority, row, address);
35 233c7737c152 Small fix to overflow flag Mike Pavone <pavone@retrodev.com> parents: 34 diff changeset	727 for (i=0; i < width && context->sprite_draws; i++, x += dir) {
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	728 --context->sprite_draws;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	729 context->sprite_draw_list[context->sprite_draws].address = address + i * height * 4;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	730 context->sprite_draw_list[context->sprite_draws].x_pos = x;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	731 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	732 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	733 }
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	734 }
1000 1a797fcbb35f Added TODO for hardware checking Michael Pavone <pavone@retrodev.com> parents: 999 diff changeset	735 //Used to be i < width
1a797fcbb35f Added TODO for hardware checking Michael Pavone <pavone@retrodev.com> parents: 999 diff changeset	736 //TODO: Confirm this is the right condition on hardware
1a797fcbb35f Added TODO for hardware checking Michael Pavone <pavone@retrodev.com> parents: 999 diff changeset	737 if (!context->sprite_draws) {
36 04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	738 context->flags \|= FLAG_DOT_OFLOW;
04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	739 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	740 } else {
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	741 context->flags \|= FLAG_DOT_OFLOW;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	742 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	743 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	744 context->cur_slot++;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	745 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	746
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	747 static void read_sprite_x_mode4(vdp_context * context)
427 2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	748 {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	749 if (context->cur_slot >= context->slot_counter) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	750 uint32_t address = (context->regs[REG_SAT] << 7 & 0x3F00) + 0x80 + context->sprite_info_list[context->cur_slot].index * 2;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	751 address = mode4_address_map[address];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	752 --context->sprite_draws;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	753 uint32_t tile_address = context->vdpmem[address] * 32 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	754 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	755 tile_address &= ~32;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	756 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	757 tile_address += (context->vcounter - context->sprite_info_list[context->cur_slot].y)* 4;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	758 context->sprite_draw_list[context->sprite_draws].x_pos = context->vdpmem[address + 1];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	759 context->sprite_draw_list[context->sprite_draws].address = tile_address;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	760 context->cur_slot--;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	761 }
427 2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	762 }
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	763
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	764 #define CRAM_BITS 0xEEE
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	765 #define VSRAM_BITS 0x7FF
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	766 #define VSRAM_DIRTY_BITS 0xF800
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	767
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	768 //rough estimate of slot number at which border display starts
1270 687d3969416b Adjust correspondance between slot number and actual video output to better match video signal measurements and analysis of Outrunners behavior on hardware. Partially fixes ticket:13 Michael Pavone <pavone@retrodev.com> parents: 1269 diff changeset	769 #define BG_START_SLOT 6
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	770
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	771 static void update_color_map(vdp_context *context, uint16_t index, uint16_t value)
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	772 {
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	773 context->colors[index] = color_map[value & CRAM_BITS];
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	774 context->colors[index + CRAM_SIZE] = color_map[(value & CRAM_BITS) \| FBUF_SHADOW];
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	775 context->colors[index + CRAM_SIZE*2] = color_map[(value & CRAM_BITS) \| FBUF_HILIGHT];
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	776 context->colors[index + CRAM_SIZE*3] = color_map[(value & CRAM_BITS) \| FBUF_MODE4];
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	777 }
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	778
1428 2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	779 void write_cram_internal(vdp_context * context, uint16_t addr, uint16_t value)
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	780 {
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	781 context->cram[addr] = value;
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	782 update_color_map(context, addr, value);
1428 2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	783 }
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	784
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	785 static void write_cram(vdp_context * context, uint16_t address, uint16_t value)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	786 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	787 uint16_t addr;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	788 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	789 addr = (address/2) & (CRAM_SIZE-1);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	790 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	791 addr = address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	792 value = (value << 1 & 0xE) \| (value << 2 & 0xE0) \| (value & 0xE00);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	793 }
1428 2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	794 write_cram_internal(context, addr, value);
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	795
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	796 if (context->hslot >= BG_START_SLOT && (
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	797 context->vcounter < context->inactive_start + context->border_bot
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	798 \|\| context->vcounter > 0x200 - context->border_top
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	799 )) {
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	800 uint8_t bg_end_slot = BG_START_SLOT + (context->regs[REG_MODE_4] & BIT_H40) ? LINEBUF_SIZE/2 : (256+HORIZ_BORDER)/2;
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	801 if (context->hslot < bg_end_slot) {
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	802 uint32_t color = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->colors[addr] : context->colors[addr + CRAM_SIZE*3];
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	803 context->output[(context->hslot - BG_START_SLOT)*2 + 1] = color;
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	804 }
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	805 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	806 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	807
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	808 static void vdp_advance_dma(vdp_context * context)
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	809 {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	810 context->regs[REG_DMASRC_L] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	811 if (!context->regs[REG_DMASRC_L]) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	812 context->regs[REG_DMASRC_M] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	813 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	814 context->address += context->regs[REG_AUTOINC];
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	815 uint16_t dma_len = ((context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L]) - 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	816 context->regs[REG_DMALEN_H] = dma_len >> 8;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	817 context->regs[REG_DMALEN_L] = dma_len;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	818 if (!dma_len) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	819 context->flags &= ~FLAG_DMA_RUN;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	820 context->cd &= 0xF;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	821 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	822 }
1019 e34334e6c682 Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running Michael Pavone <pavone@retrodev.com> parents: 1001 diff changeset	823
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	824 static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value)
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	825 {
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	826 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	827 if (!(address & 4)) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	828 uint32_t sat_address = mode5_sat_address(context);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	829 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	830 uint16_t cache_address = address - sat_address;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	831 cache_address = (cache_address & 3) \| (cache_address >> 1 & 0x1FC);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	832 context->sat_cache[cache_address] = value >> 8;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	833 context->sat_cache[cache_address^1] = value;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	834 }
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	835 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	836 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	837 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	838
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	839 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value)
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	840 {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	841 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	842 if (!(address & 4)) {
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	843 uint32_t sat_address = mode5_sat_address(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	844 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	845 uint16_t cache_address = address - sat_address;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	846 cache_address = (cache_address & 3) \| (cache_address >> 1 & 0x1FC);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	847 context->sat_cache[cache_address] = value;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	848 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	849 }
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	850 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	851 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	852
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	853 static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value)
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	854 {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	855 address = (address & 0x3FC) \| (address >> 1 & 0xFC01) \| (address >> 9 & 0x2);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	856 address ^= 1;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	857 //TODO: Support an option to actually have 128KB of VRAM
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	858 context->vdpmem[address] = value;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	859 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	860
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	861 static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value)
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	862 {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	863 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	864 address &= 0xFFFF;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	865 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	866 address = mode4_address_map[address & 0x3FFF];
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	867 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	868 context->vdpmem[address] = value;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	869 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	870
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	871 #define DMA_FILL 0x80
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	872 #define DMA_COPY 0xC0
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	873 #define DMA_TYPE_MASK 0xC0
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	874 static void external_slot(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	875 {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	876 if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL && context->fifo_read < 0) {
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	877 context->fifo_read = (context->fifo_write-1) & (FIFO_SIZE-1);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	878 fifo_entry * cur = context->fifo + context->fifo_read;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	879 cur->cycle = context->cycles;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	880 cur->address = context->address;
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	881 cur->partial = 1;
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	882 vdp_advance_dma(context);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	883 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	884 fifo_entry * start = context->fifo + context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	885 if (context->fifo_read >= 0 && start->cycle <= context->cycles) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	886 switch (start->cd & 0xF)
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	887 {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	888 case VRAM_WRITE:
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	889 if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM\|BIT_MODE_5)) == (BIT_128K_VRAM\|BIT_MODE_5)) {
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	890 vdp_check_update_sat(context, start->address, start->value);
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	891 write_vram_word(context, start->address, start->value);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	892 } else {
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	893 uint8_t byte = start->partial == 1 ? start->value >> 8 : start->value;
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	894 vdp_check_update_sat_byte(context, start->address ^ 1, byte);
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	895 write_vram_byte(context, start->address ^ 1, byte);
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	896 if (!start->partial) {
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	897 start->address = start->address ^ 1;
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	898 start->partial = 1;
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	899 //skip auto-increment and removal of entry from fifo
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	900 return;
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	901 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	902 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	903 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	904 case CRAM_WRITE: {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	905 //printf("CRAM Write \| %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1));
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	906 if (start->partial == 3) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	907 uint16_t val;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	908 if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	909 val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) \| start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	910 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	911 uint16_t address = (context->regs[REG_MODE_2] & BIT_MODE_5) ? start->address >> 1 & (CRAM_SIZE-1) : start->address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	912 val = (context->cram[address] & 0xFF00) \| start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	913 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	914 write_cram(context, start->address, val);
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	915 } else {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	916 write_cram(context, start->address, start->partial ? context->fifo[context->fifo_write].value : start->value);
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	917 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	918 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	919 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	920 case VSRAM_WRITE:
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	921 if (((start->address/2) & 63) < VSRAM_SIZE) {
1432 5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	922 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles);
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	923 if (start->partial == 3) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	924 if (start->address & 1) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	925 context->vsram[(start->address/2) & 63] &= 0xFF;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	926 context->vsram[(start->address/2) & 63] \|= start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	927 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	928 context->vsram[(start->address/2) & 63] &= 0xFF00;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	929 context->vsram[(start->address/2) & 63] \|= start->value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	930 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	931 } else {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	932 context->vsram[(start->address/2) & 63] = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	933 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	934 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	935
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	936 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	937 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	938 context->fifo_read = (context->fifo_read+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	939 if (context->fifo_read == context->fifo_write) {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	940 if ((context->cd & 0x20) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	941 context->flags \|= FLAG_DMA_RUN;
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	942 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	943 context->fifo_read = -1;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	944 }
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	945 } else if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	946 if (context->flags & FLAG_READ_FETCHED) {
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	947 write_vram_byte(context, context->address ^ 1, context->prefetch);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	948
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	949 //Update DMA state
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	950 vdp_advance_dma(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	951
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	952 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	953 } else {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	954 context->prefetch = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L] ^ 1];
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	955
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	956 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	957 }
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	958 } else if (!(context->cd & 1) && !(context->flags & (FLAG_READ_FETCHED\|FLAG_PENDING))) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	959 switch(context->cd & 0xF)
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	960 {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	961 case VRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	962 if (context->flags2 & FLAG2_READ_PENDING) {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	963 context->prefetch \|= context->vdpmem[context->address \| 1];
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	964 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	965 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	966 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	967 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	968 } else {
1318 bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support Michael Pavone <pavone@retrodev.com> parents: 1315 diff changeset	969 //TODO: 128K VRAM Mode
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	970 context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	971 context->flags2 \|= FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	972 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	973 break;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	974 case VRAM_READ8: {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	975 uint32_t address = context->address ^ 1;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	976 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	977 address = mode4_address_map[address & 0x3FFF];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	978 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	979 context->prefetch = context->vdpmem[address];
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	980 context->prefetch \|= context->fifo[context->fifo_write].value & 0xFF00;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	981 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	982 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	983 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	984 break;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	985 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	986 case CRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	987 context->prefetch = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	988 context->prefetch \|= context->fifo[context->fifo_write].value & ~CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	989 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	990 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	991 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	992 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	993 case VSRAM_READ: {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	994 uint16_t address = (context->address /2) & 63;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	995 if (address >= VSRAM_SIZE) {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	996 address = 0;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	997 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	998 context->prefetch = context->vsram[address] & VSRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	999 context->prefetch \|= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1000 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1001 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1002 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1003 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1004 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1005 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1006 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1007 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1008
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1009 static void run_dma_src(vdp_context * context, int32_t slot)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1010 {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1011 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1012 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1013 if (context->fifo_write == context->fifo_read) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1014 return;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1015 }
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1016 fifo_entry * cur = NULL;
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1017 if (!(context->regs[REG_DMASRC_H] & 0x80))
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1018 {
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1019 //68K -> VDP
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	1020 if (slot == -1 \|\| !is_refresh(context, slot-1)) {
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1021 cur = context->fifo + context->fifo_write;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	1022 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1023 cur->address = context->address;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1024 cur->value = read_dma_value((context->regs[REG_DMASRC_H] << 16) \| (context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L]);
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1025 cur->cd = context->cd;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1026 cur->partial = 0;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1027 if (context->fifo_read < 0) {
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1028 context->fifo_read = context->fifo_write;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1029 }
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1030 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1031 vdp_advance_dma(context);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1032 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	1033 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1034 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1035
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1036 #define WINDOW_RIGHT 0x80
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1037 #define WINDOW_DOWN 0x80
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1038
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1039 static void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1040 {
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1041 uint16_t window_line_shift, v_offset_mask, vscroll_shift;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1042 if (context->double_res) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1043 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	1044 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1045 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1046 }
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1047 window_line_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1048 v_offset_mask = 0xF;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1049 vscroll_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1050 } else {
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1051 window_line_shift = 3;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1052 v_offset_mask = 0x7;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1053 vscroll_shift = 3;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1054 }
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1055 //TODO: Further research on vscroll latch behavior and the "first column bug"
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1056 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1057 if (!column) {
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1058 if (context->regs[REG_MODE_4] & BIT_H40) {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1059 //Based on observed behavior documented by Eke-Eke, I'm guessing the VDP
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1060 //ends up fetching the last value on the VSRAM bus in the H40 case
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1061 //getting the last latched value should be close enough for now
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1062 if (!vsram_off) {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1063 context->vscroll_latch[0] = context->vscroll_latch[1];
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1064 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1065 } else {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1066 //supposedly it's always forced to 0 in the H32 case
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1067 context->vscroll_latch[0] = context->vscroll_latch[1] = 0;
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1068 }
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1069 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1070 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off];
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1071 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1072 }
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1073 if (!vsram_off) {
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1074 uint16_t left_col, right_col;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1075 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) {
920 e64168bb2b25 Fix calculation of window start column when it's on the right side. This removes graphical glitches in Afterburner 2, Fireshark and Dungeons and Dragons: Warriors of the Eternal Sun and probably others Michael Pavone <pavone@retrodev.com> parents: 884 diff changeset	1076 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2 + 2;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1077 right_col = 42;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1078 } else {
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1079 left_col = 0;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1080 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1081 if (right_col) {
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1082 right_col += 2;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1083 }
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1084 }
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1085 uint16_t top_line, bottom_line;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1086 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) {
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1087 top_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1088 bottom_line = context->double_res ? 481 : 241;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1089 } else {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1090 top_line = 0;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1091 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1092 }
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1093 if ((column >= left_col && column < right_col) \|\| (line >= top_line && line < bottom_line)) {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1094 uint16_t address = context->regs[REG_WINDOW] << 10;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1095 uint16_t line_offset, offset, mask;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	1096 if (context->regs[REG_MODE_4] & BIT_H40) {
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1097 address &= 0xF000;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1098 line_offset = (((line) >> vscroll_shift) * 64 * 2) & 0xFFF;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1099 mask = 0x7F;
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	1100
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1101 } else {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1102 address &= 0xF800;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1103 line_offset = (((line) >> vscroll_shift) * 32 * 2) & 0xFFF;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1104 mask = 0x3F;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1105 }
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1106 if (context->double_res) {
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1107 mask <<= 1;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1108 mask \|= 1;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1109 }
42 6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane. Mike Pavone <pavone@retrodev.com> parents: 41 diff changeset	1110 offset = address + line_offset + (((column - 2) * 2) & mask);
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1111 context->col_1 = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	1112 //printf("Window \| top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]);
42 6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane. Mike Pavone <pavone@retrodev.com> parents: 41 diff changeset	1113 offset = address + line_offset + (((column - 1) * 2) & mask);
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1114 context->col_2 = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1115 context->v_offset = (line) & v_offset_mask;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1116 context->flags \|= FLAG_WINDOW;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1117 return;
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1118 }
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1119 context->flags &= ~FLAG_WINDOW;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1120 }
1290 aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk Michael Pavone <pavone@retrodev.com> parents: 1289 diff changeset	1121 //TODO: Verify behavior for 0x20 case
aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk Michael Pavone <pavone@retrodev.com> parents: 1289 diff changeset	1122 uint16_t vscroll = 0xFF \| (context->regs[REG_SCROLL] & 0x30) << 4;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1123 if (context->double_res) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1124 vscroll <<= 1;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1125 vscroll \|= 1;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1126 }
710 4cd8823f79e3 First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it Michael Pavone <pavone@retrodev.com> parents: 708 diff changeset	1127 vscroll &= context->vscroll_latch[vsram_off] + line;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1128 context->v_offset = vscroll & v_offset_mask;
26 a7c2b92d8056 Fix management of context->sprite_draws so the sprite layer only draws when it should Mike Pavone <pavone@retrodev.com> parents: 25 diff changeset	1129 //printf("%s \| line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset);
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1130 vscroll >>= vscroll_shift;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1131 uint16_t hscroll_mask;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1132 uint16_t v_mul;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1133 switch(context->regs[REG_SCROLL] & 0x3)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1134 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1135 case 0:
108 1a551a85cb06 Fix horizontal mask values for scroll plane map address calculation Mike Pavone <pavone@retrodev.com> parents: 87 diff changeset	1136 hscroll_mask = 0x1F;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1137 v_mul = 64;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1138 break;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1139 case 0x1:
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1140 hscroll_mask = 0x3F;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1141 v_mul = 128;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1142 break;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1143 case 0x2:
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1144 //TODO: Verify this behavior
1334 7757d605e365 Adjust how the invalid size is handled for the horizontal dimmension of a plane. Fixes some garbage on the spinning cube scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1333 diff changeset	1145 hscroll_mask = 0x1F;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1146 v_mul = 0;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1147 break;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1148 case 0x3:
108 1a551a85cb06 Fix horizontal mask values for scroll plane map address calculation Mike Pavone <pavone@retrodev.com> parents: 87 diff changeset	1149 hscroll_mask = 0x7F;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1150 v_mul = 256;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1151 break;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1152 }
28 037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1153 uint16_t hscroll, offset;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1154 for (int i = 0; i < 2; i++) {
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1155 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask;
3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1156 offset = address + ((vscroll * v_mul + hscroll*2) & 0x1FFF);
3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1157 //printf("%s \| line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset);
28 037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1158 uint16_t col_val = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1159 if (i) {
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1160 context->col_2 = col_val;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1161 } else {
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1162 context->col_1 = col_val;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1163 }
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1164 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1165 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1166
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1167 static void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1168 {
25 4d0c20ad815a Fix vertical scroll value for plane B Mike Pavone <pavone@retrodev.com> parents: 24 diff changeset	1169 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1170 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1171
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1172 static void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1173 {
25 4d0c20ad815a Fix vertical scroll value for plane B Mike Pavone <pavone@retrodev.com> parents: 24 diff changeset	1174 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1175 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1176
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1177 static void read_map_mode4(uint16_t column, uint32_t line, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1178 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1179 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1180 //add row
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1181 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1182 if (column < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1183 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1184 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1185 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1186 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1187 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1188 address += (vscroll >> 3) * 2 * 32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1189 //add column
1136 52f25c41abdd Fix horizontal scrolling in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1135 diff changeset	1190 address += ((column - (context->hscroll_a >> 3)) & 31) * 2;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1191 //adjust for weird VRAM mapping in Mode 4
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1192 address = mode4_address_map[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1193 context->col_1 = (context->vdpmem[address] << 8) \| context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1194 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1195
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1196 static void render_map(uint16_t col, uint8_t * tmp_buf, uint8_t offset, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1197 {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1198 uint16_t address;
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1199 uint16_t vflip_base;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1200 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1201 address = ((col & 0x3FF) << 6);
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1202 vflip_base = 60;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1203 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1204 address = ((col & 0x7FF) << 5);
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1205 vflip_base = 28;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1206 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1207 if (col & MAP_BIT_V_FLIP) {
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1208 address += vflip_base - 4 * context->v_offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1209 } else {
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1210 address += 4 * context->v_offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1211 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1212 uint16_t pal_priority = (col >> 9) & 0x70;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1213 int32_t dir;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1214 if (col & MAP_BIT_H_FLIP) {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1215 offset += 7;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1216 offset &= SCROLL_BUFFER_MASK;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1217 dir = -1;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1218 } else {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1219 dir = 1;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1220 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1221 for (uint32_t i=0; i < 4; i++, address++)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1222 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1223 tmp_buf[offset] = pal_priority \| (context->vdpmem[address] >> 4);
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1224 offset += dir;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1225 offset &= SCROLL_BUFFER_MASK;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1226 tmp_buf[offset] = pal_priority \| (context->vdpmem[address] & 0xF);
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1227 offset += dir;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1228 offset &= SCROLL_BUFFER_MASK;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1229 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1230 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1231
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1232 static void render_map_1(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1233 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1234 render_map(context->col_1, context->tmp_buf_a, context->buf_a_off, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1235 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1236
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1237 static void render_map_2(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1238 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1239 render_map(context->col_2, context->tmp_buf_a, context->buf_a_off+8, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1240 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1241
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1242 static void render_map_3(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1243 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1244 render_map(context->col_1, context->tmp_buf_b, context->buf_b_off, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1245 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1246
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1247 static void fetch_map_mode4(uint16_t col, uint32_t line, vdp_context *context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1248 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1249 //calculate pixel row to fetch
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1250 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1251 if (col < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1252 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1253 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1254 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1255 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1256 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1257 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1258 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1259 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1260 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1261
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1262 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1263 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1264 context->fetch_tmp[1] = context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1265 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1266
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1267 static void render_map_output(uint32_t line, int32_t col, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1268 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1269 uint32_t *dst;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1270 uint8_t *debug_dst;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1271 uint8_t output_disabled = (context->test_port & TEST_BIT_DISABLE) != 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1272 uint8_t test_layer = context->test_port >> 7 & 3;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	1273 if (context->state == PREPARING && !test_layer) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1274 if (col) {
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1275 col -= 2;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1276 dst = context->output + BORDER_LEFT + col * 8;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1277 } else {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1278 dst = context->output;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1279 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1280 for (int i = 0; i < BORDER_LEFT; i++, dst++)
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1281 {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1282 *dst = bg_color;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1283 }
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1284 context->done_output = dst;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1285 return;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1286 }
1170 9170fc4d9835 Don't adjust cycles every frame. Only when we start getting close to UINT_MAX. Don't adjust all the way down to zero when we do adjust. Shouldn't fix anything, but may make debugging current issues easier. Michael Pavone <pavone@retrodev.com> parents: 1169 diff changeset	1287 uint32_t color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1288 for (int i = 0; i < 16; i++)
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1289 {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1290 *(dst++) = color;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1291 }
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1292 context->done_output = dst;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1293 return;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1294 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1295 line &= 0xFF;
1180 e2b81a0f8fd8 Undo poorly thought out minor optimization that screwed up rendering Michael Pavone <pavone@retrodev.com> parents: 1179 diff changeset	1296 render_map(context->col_2, context->tmp_buf_b, context->buf_b_off+8, context);
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1297 uint8_t sprite_buf, plane_a, *plane_b;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1298 int plane_a_off, plane_b_off;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1299 if (col)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1300 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1301 col-=2;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1302 dst = context->output + BORDER_LEFT + col * 8;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1303 debug_dst = context->layer_debug_buf + BORDER_LEFT + col * 8;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1304
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1305 sprite_buf = context->linebuf + col * 8;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1306 uint8_t a_src, src;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1307 if (context->flags & FLAG_WINDOW) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1308 plane_a_off = context->buf_a_off;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1309 a_src = DBG_SRC_W;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1310 } else {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1311 plane_a_off = context->buf_a_off - (context->hscroll_a & 0xF);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1312 a_src = DBG_SRC_A;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1313 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1314 plane_b_off = context->buf_b_off - (context->hscroll_b & 0xF);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1315 //printf("A \| tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7));
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1316
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1317 if (context->regs[REG_MODE_4] & BIT_HILIGHT) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1318 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1319 plane_a = context->tmp_buf_a + (plane_a_off & SCROLL_BUFFER_MASK);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1320 plane_b = context->tmp_buf_b + (plane_b_off & SCROLL_BUFFER_MASK);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1321 uint8_t pixel = context->regs[REG_BG_COLOR];
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1322 uint32_t *colors = context->colors;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1323 src = DBG_SRC_BG;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1324 uint8_t intensity = 0;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1325 if (col \|\| !(context->regs[REG_MODE_1] & BIT_COL0_MASK) \|\| i >= 8) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1326 if (*plane_b & 0xF) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1327 pixel = *plane_b;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1328 src = DBG_SRC_B;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1329 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1330 intensity = *plane_b & BUF_BIT_PRIORITY;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1331 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1332 pixel = *plane_a;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1333 src = a_src;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1334 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1335 intensity \|= *plane_a & BUF_BIT_PRIORITY;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1336 if (sprite_buf & 0xF && (sprite_buf & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1337 if ((*sprite_buf & 0x3F) == 0x3E) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1338 intensity += BUF_BIT_PRIORITY;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1339 } else if ((*sprite_buf & 0x3F) == 0x3F) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1340 intensity = 0;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1341 } else {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1342 pixel = *sprite_buf;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1343 src = DBG_SRC_S;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1344 if ((pixel & 0xF) == 0xE) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1345 intensity = BUF_BIT_PRIORITY;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1346 } else {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1347 intensity \|= pixel & BUF_BIT_PRIORITY;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1348 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1349 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1350 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1351 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1352 if (output_disabled) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1353 pixel = 0x3F;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1354 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1355 if (!intensity) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1356 src \|= DBG_SHADOW;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1357 colors += CRAM_SIZE;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1358 } else if (intensity == BUF_BIT_PRIORITY*2) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1359 src \|= DBG_HILIGHT;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1360 colors += CRAM_SIZE*2;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1361 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1362 //TODO: Verify how test register stuff interacts with shadow/highlight
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1363 //TODO: Simulate CRAM corruption from bus fight
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1364 switch (test_layer)
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1365 {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1366 case 1:
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1367 pixel &= *sprite_buf;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1368 if (output_disabled && pixel) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1369 src = DBG_SRC_S;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1370 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1371 break;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1372 case 2:
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1373 pixel &= *plane_a;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1374 if (output_disabled && pixel) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1375 src = DBG_SRC_A;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1376 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1377 break;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1378 case 3:
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1379 pixel &= *plane_b;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1380 if (output_disabled && pixel) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1381 src = DBG_SRC_B;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1382 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1383 break;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1384 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1385 *(debug_dst++) = src;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1386 *(dst++) = colors[pixel & 0x3F];
722 8f5339961903 Restore the other 2 debug display modes Michael Pavone <pavone@retrodev.com> parents: 720 diff changeset	1387 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1388 } else {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1389 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1390 plane_a = context->tmp_buf_a + (plane_a_off & SCROLL_BUFFER_MASK);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1391 plane_b = context->tmp_buf_b + (plane_b_off & SCROLL_BUFFER_MASK);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1392 uint8_t pixel = context->regs[REG_BG_COLOR];
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1393 src = DBG_SRC_BG;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1394 if (output_disabled) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1395 pixel = 0x3F;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1396 } else {
1639 93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1397 if (col \|\| !(context->regs[REG_MODE_1] & BIT_COL0_MASK) \|\| i >= 8) {
93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1398 if (*plane_b & 0xF) {
93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1399 pixel = *plane_b;
93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1400 src = DBG_SRC_B;
93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1401 }
93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1402 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1403 pixel = *plane_a;
93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1404 src = a_src;
93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1405 }
93518786f882 Implemented left column blank register bit in mode 5 Michael Pavone <pavone@retrodev.com> parents: 1638 diff changeset	1406 if (sprite_buf & 0xF && (sprite_buf & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1407 pixel = *sprite_buf;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1408 src = DBG_SRC_S;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1409 }
1322 b1423d432c0e Initial stab at implementing the output disable/layer selection bits of the VDP test register Michael Pavone <pavone@retrodev.com> parents: 1321 diff changeset	1410 }
722 8f5339961903 Restore the other 2 debug display modes Michael Pavone <pavone@retrodev.com> parents: 720 diff changeset	1411 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1412 //TODO: Simulate CRAM corruption from bus fight
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1413 switch (test_layer)
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1414 {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1415 case 1:
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1416 pixel &= *sprite_buf;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1417 if (output_disabled && pixel) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1418 src = DBG_SRC_S;
722 8f5339961903 Restore the other 2 debug display modes Michael Pavone <pavone@retrodev.com> parents: 720 diff changeset	1419 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1420 break;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1421 case 2:
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1422 pixel &= *plane_a;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1423 if (output_disabled && pixel) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1424 src = DBG_SRC_A;
230 d3266cee02c9 Implemented shadow hilight mode. Mike Pavone <pavone@retrodev.com> parents: 191 diff changeset	1425 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1426 break;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1427 case 3:
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1428 pixel &= *plane_b;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1429 if (output_disabled && pixel) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1430 src = DBG_SRC_B;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1431 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1432 break;
230 d3266cee02c9 Implemented shadow hilight mode. Mike Pavone <pavone@retrodev.com> parents: 191 diff changeset	1433 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1434 *(dst++) = context->colors[pixel & 0x3F];
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1435 *(debug_dst++) = src;
230 d3266cee02c9 Implemented shadow hilight mode. Mike Pavone <pavone@retrodev.com> parents: 191 diff changeset	1436 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1437 }
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1438 } else {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1439 dst = context->output;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1440 debug_dst = context->layer_debug_buf;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1441 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1442 if (output_disabled) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1443 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1444 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1445 uint32_t bg_color = context->colors[pixel];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1446 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1447 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1448 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1449 case 1:
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	1450 bg_color = context->colors[0];
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1451 for (int i = 0; i < BORDER_LEFT; i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1452 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1453 *dst = bg_color;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1454 *debug_dst = DBG_SRC_BG;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1455
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1456 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1457 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1458 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1459 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1460 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1461 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1462 i = 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1463 uint8_t buf_off = context->buf_a_off - (context->hscroll_a & 0xF) + (16 - BORDER_LEFT);
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1464 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1465 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1466 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1467 *dst = context->colors[context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK]];
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1468 *debug_dst = DBG_SRC_A;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1469 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1470 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1471 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1472 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1473 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1474 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1475 i = 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1476 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF) + (16 - BORDER_LEFT);
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1477 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1478 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1479 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1480 *dst = context->colors[context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK]];
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1481 *debug_dst = DBG_SRC_B;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1482 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1483 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1484 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1485 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1486 } else {
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1487 for (int i = 0; i < BORDER_LEFT; i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1488 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1489 *dst = bg_color;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1490 *debug_dst = DBG_SRC_BG;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1491 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1492 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1493 }
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	1494 context->done_output = dst;
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1495 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1496 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1497 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1498
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1499 static void render_map_mode4(uint32_t line, int32_t col, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1500 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1501 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1502 if (col < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1503 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1504 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1505 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1506 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1507 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1508 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1509 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1510 //vflip
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1511 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1512 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1513
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1514 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1515 pixels \|= planar_to_chunky[context->fetch_tmp[1]];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1516
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1517 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4 + 2];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1518 pixels \|= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1519 pixels \|= planar_to_chunky[context->vdpmem[address+1]] << 2;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1520
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1521 int i, i_inc, i_limit;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1522 if (context->col_1 & 0x200) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1523 //hflip
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1524 i = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1525 i_inc = 4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1526 i_limit = 32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1527 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1528 i = 28;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1529 i_inc = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1530 i_limit = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1531 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1532 uint8_t pal_priority = (context->col_1 >> 7 & 0x10) \| (context->col_1 >> 6 & 0x40);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1533 for (uint8_t *dst = context->tmp_buf_a + context->buf_a_off; i != i_limit; i += i_inc, dst++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1534 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1535 *dst = (pixels >> i & 0xF) \| pal_priority;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1536 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1537 context->buf_a_off = (context->buf_a_off + 8) & 15;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1538
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1539 uint8_t bgcolor = 0x10 \| (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1540 uint32_t dst = context->output + col 8 + BORDER_LEFT;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1541 uint8_t debug_dst = context->layer_debug_buf + col 8 + BORDER_LEFT;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1542 if (context->state == PREPARING) {
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1543 for (int i = 0; i < 16; i++)
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1544 {
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1545 *(dst++) = context->colors[bgcolor];
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1546 }
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1547 context->done_output = dst;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1548 return;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1549 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1550
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1551 if (col \|\| !(context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1552 uint8_t sprite_src = context->linebuf + col 8;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1553 if (context->regs[REG_MODE_1] & BIT_SPRITE_8PX) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1554 sprite_src += 8;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1555 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1556 for (int i = 0; i < 8; i++, sprite_src++)
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1557 {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1558 uint8_t bg_src = context->tmp_buf_a + ((8 + i + col 8 - (context->hscroll_a & 0x7)) & 15);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1559 if ((bg_src & 0x4F) > 0x40 \|\| !sprite_src) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1560 //background plane has priority and is opaque or sprite layer is transparent
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1561 (dst++) = context->colors[(bg_src & 0x1F) + CRAM_SIZE*3];
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1562 *(debug_dst++) = DBG_SRC_A;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1563 } else {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1564 //sprite layer is opaque and not covered by high priority BG pixels
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1565 (dst++) = context->colors[sprite_src \| 0x10 + CRAM_SIZE*3];
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1566 *(debug_dst++) = DBG_SRC_S;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1567 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1568 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1569 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1570 for (int i = 0; i < 8; i++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1571 {
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1572 *(dst++) = context->colors[bgcolor];
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1573 *(debug_dst++) = DBG_SRC_BG;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1574 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1575 }
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1576 context->done_output = dst;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1577 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1578
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1579 static uint32_t const h40_hsync_cycles[] = {19, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 19};
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1580
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1581 static void vdp_advance_line(vdp_context *context)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1582 {
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1583 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1584 static uint32_t last_line = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1585 if (last_line != 0xFFFFFFFF) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1586 uint32_t diff = context->cycles - last_line;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1587 if (diff != MCLKS_LINE) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1588 printf("Line %d took %d cycles\n", context->vcounter, diff);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1589 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1590 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1591 last_line = context->cycles;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1592 #endif
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1593 uint16_t jump_start, jump_end;
1156 b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	1594 uint8_t is_mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	1595 if (is_mode_5) {
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	1596 if (context->flags2 & FLAG2_REGION_PAL) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1597 if (context->regs[REG_MODE_2] & BIT_PAL) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1598 jump_start = 0x10B;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1599 jump_end = 0x1D2;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1600 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1601 jump_start = 0x103;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1602 jump_end = 0x1CA;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1603 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1604 } else if (context->regs[REG_MODE_2] & BIT_PAL) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1605 jump_start = 0x100;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1606 jump_end = 0x1FA;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1607 } else {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1608 jump_start = 0xEB;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1609 jump_end = 0x1E5;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1610 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1611 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1612 jump_start = 0xDB;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1613 jump_end = 0x1D5;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1614 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1615
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1616 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM \| 1 << VDP_DEBUG_COMPOSITE)) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1617 uint32_t line = context->vcounter;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1618 if (line >= jump_end) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1619 line -= jump_end - jump_start;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1620 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1621 uint32_t total_lines = (context->flags2 & FLAG2_REGION_PAL) ? 313 : 262;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1622
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1623 if (total_lines - line <= context->border_top) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1624 line -= total_lines - context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1625 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1626 line += context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1627 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1628 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM)) {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1629 uint32_t fb = context->debug_fbs[VDP_DEBUG_CRAM] + context->debug_fb_pitch[VDP_DEBUG_CRAM] line / sizeof(uint32_t);
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1630 for (int i = 0; i < 64; i++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1631 {
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1632 for (int x = 0; x < 8; x++)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1633 {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1634 *(fb++) = context->colors[i];
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1635 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1636 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1637 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1638 if (
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1639 context->enabled_debuggers & (1 << VDP_DEBUG_COMPOSITE)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1640 && line < (context->inactive_start + context->border_bot + context->border_top)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1641 ) {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1642 uint32_t fb = context->debug_fbs[VDP_DEBUG_COMPOSITE] + context->debug_fb_pitch[VDP_DEBUG_COMPOSITE] line / sizeof(uint32_t);
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1643 for (int i = 0; i < LINEBUF_SIZE; i++)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1644 {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1645 *(fb++) = context->debugcolors[context->layer_debug_buf[i]];
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1646 }
1299 da1ffc4026c4 Fix latching of V32 mode bit Michael Pavone <pavone@retrodev.com> parents: 1290 diff changeset	1647 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1648 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1649
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1650 context->vcounter++;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1651 if (context->vcounter == jump_start) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1652 context->vcounter = jump_end;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1653 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1654 context->vcounter &= 0x1FF;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1655 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1656 if (context->state == PREPARING) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1657 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1658 }
1377 e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	1659 if (context->vcounter == 0x1FF) {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	1660 context->flags2 &= ~FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	1661 }
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1662
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1663 if (context->state != ACTIVE) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1664 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1665 } else if (context->hint_counter) {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1666 context->hint_counter--;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1667 } else {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1668 context->flags2 \|= FLAG2_HINT_PENDING;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1669 context->pending_hint_start = context->cycles;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1670 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1671 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1672 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1673
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1674 static void vdp_update_per_frame_debug(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1675 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1676 if (context->enabled_debuggers & (1 << VDP_DEBUG_PLANE)) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1677 uint32_t pitch;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1678 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_PLANE], &pitch);
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1679 uint16_t hscroll_mask;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1680 uint16_t v_mul;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1681 uint16_t vscroll_mask = 0x1F \| (context->regs[REG_SCROLL] & 0x30) << 1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1682 switch(context->regs[REG_SCROLL] & 0x3)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1683 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1684 case 0:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1685 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1686 v_mul = 64;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1687 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1688 case 0x1:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1689 hscroll_mask = 0x3F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1690 v_mul = 128;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1691 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1692 case 0x2:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1693 //TODO: Verify this behavior
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1694 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1695 v_mul = 0;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1696 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1697 case 0x3:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1698 hscroll_mask = 0x7F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1699 v_mul = 256;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1700 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1701 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1702 uint16_t table_address;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1703 switch(context->debug_modes[VDP_DEBUG_PLANE] % 3)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1704 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1705 case 0:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1706 table_address = context->regs[REG_SCROLL_A] << 10 & 0xE000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1707 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1708 case 1:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1709 table_address = context->regs[REG_SCROLL_B] << 13 & 0xE000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1710 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1711 case 2:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1712 table_address = context->regs[REG_WINDOW] << 10;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1713 if (context->regs[REG_MODE_4] & BIT_H40) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1714 table_address &= 0xF000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1715 v_mul = 128;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1716 hscroll_mask = 0x3F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1717 } else {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1718 table_address &= 0xF800;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1719 v_mul = 64;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1720 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1721 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1722 vscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1723 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1724 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1725 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR & 0x3F]];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1726 for (uint16_t row = 0; row < 128; row++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1727 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1728 uint16_t row_address = table_address + (row & vscroll_mask) * v_mul;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1729 for (uint16_t col = 0; col < 128; col++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1730 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1731 uint16_t address = row_address + (col & hscroll_mask) * 2;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1732 //pccv hnnn nnnn nnnn
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1733 //
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1734 uint16_t entry = context->vdpmem[address] << 8 \| context->vdpmem[address + 1];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1735 uint8_t pal = entry >> 9 & 0x30;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1736
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1737 uint32_t dst = fb + (row pitch * 8 / sizeof(uint32_t)) + col * 8;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1738 address = (entry & 0x7FF) * 32;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1739 int y_diff = 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1740 if (entry & 0x1000) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1741 y_diff = -4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1742 address += 7 * 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1743 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1744 int x_diff = 1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1745 if (entry & 0x800) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1746 x_diff = -1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1747 address += 3;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1748 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1749 for (int y = 0; y < 8; y++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1750 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1751 uint16_t trow_address = address;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1752 uint32_t *row_dst = dst;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1753 for (int x = 0; x < 4; x++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1754 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1755 uint8_t byte = context->vdpmem[trow_address];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1756 trow_address += x_diff;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1757 uint8_t left, right;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1758 if (x_diff > 0) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1759 left = byte >> 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1760 right = byte & 0xF;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1761 } else {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1762 left = byte & 0xF;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1763 right = byte >> 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1764 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1765 *(row_dst++) = left ? context->colors[left\|pal] : bg_color;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1766 *(row_dst++) = right ? context->colors[right\|pal] : bg_color;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1767 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1768 address += y_diff;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1769 dst += pitch / sizeof(uint32_t);
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1770 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1771 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1772 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1773 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_PLANE], 1024);
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1774 }
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1775
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1776 if (context->enabled_debuggers & (1 << VDP_DEBUG_VRAM)) {
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1777 uint32_t pitch;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1778 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_VRAM], &pitch);
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1779
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1780 uint8_t pal = (context->debug_modes[VDP_DEBUG_VRAM] % 4) << 4;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1781 for (int y = 0; y < 512; y++)
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1782 {
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1783 uint32_t line = fb + y pitch / sizeof(uint32_t);
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1784 int row = y >> 4;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1785 int yoff = y >> 1 & 7;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1786 for (int col = 0; col < 64; col++)
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1787 {
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1788 uint16_t address = (row * 64 + col) * 32 + yoff * 4;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1789 for (int x = 0; x < 4; x++)
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1790 {
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1791 uint8_t byte = context->vdpmem[address++];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1792 uint8_t left = byte >> 4 \| pal;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1793 uint8_t right = byte & 0xF \| pal;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1794 *(line++) = context->colors[left];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1795 *(line++) = context->colors[left];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1796 *(line++) = context->colors[right];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1797 *(line++) = context->colors[right];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1798 }
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1799 }
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1800 }
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1801
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1802 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_VRAM], 1024);
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	1803 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1804
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1805 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM)) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1806 uint32_t starting_line = 512 - 32*4;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1807 uint32_t *line = context->debug_fbs[VDP_DEBUG_CRAM]
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1808 + context->debug_fb_pitch[VDP_DEBUG_CRAM] * starting_line / sizeof(uint32_t);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1809 for (int pal = 0; pal < 4; pal ++)
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1810 {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1811 uint32_t *cur;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1812 for (int y = 0; y < 31; y++)
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1813 {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1814 cur = line;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1815 for (int offset = 0; offset < 16; offset++)
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1816 {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1817 for (int x = 0; x < 31; x++)
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1818 {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1819 (cur++) = context->colors[pal 16 + offset];
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1820 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1821 *(cur++) = 0xFF000000;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1822 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1823 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1824 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1825 cur = line;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1826 for (int x = 0; x < 512; x++)
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1827 {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1828 *(cur++) = 0xFF000000;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1829 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1830 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1831 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1832 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_CRAM], 512);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1833 context->debug_fbs[VDP_DEBUG_CRAM] = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_CRAM], &context->debug_fb_pitch[VDP_DEBUG_CRAM]);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1834 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1835 if (context->enabled_debuggers & (1 << VDP_DEBUG_COMPOSITE)) {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1836 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_COMPOSITE], LINEBUF_SIZE);
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1837 context->debug_fbs[VDP_DEBUG_COMPOSITE] = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_COMPOSITE], &context->debug_fb_pitch[VDP_DEBUG_COMPOSITE]);
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1838 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1839 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1840
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1841 void vdp_force_update_framebuffer(vdp_context *context)
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1842 {
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1843 uint16_t lines_max = (context->flags2 & FLAG2_REGION_PAL)
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1844 ? 240 + BORDER_TOP_V30_PAL + BORDER_BOT_V30_PAL
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1845 : 224 + BORDER_TOP_V28 + BORDER_BOT_V28;
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1846
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1847 uint16_t to_fill = lines_max - context->output_lines;
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1848 memset(
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1849 ((char )context->fb) + context->output_pitch context->output_lines,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1850 0,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1851 to_fill * context->output_pitch
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1852 );
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1853 render_framebuffer_updated(context->cur_buffer, context->h40_lines > context->output_lines / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1854 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1855 vdp_update_per_frame_debug(context);
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1856 }
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	1857
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1858 static void advance_output_line(vdp_context *context)
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1859 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1860 if (headless) {
1168 fa73a77ddf92 Fix benchmark mode Michael Pavone <pavone@retrodev.com> parents: 1167 diff changeset	1861 if (context->vcounter == context->inactive_start) {
fa73a77ddf92 Fix benchmark mode Michael Pavone <pavone@retrodev.com> parents: 1167 diff changeset	1862 context->frame++;
fa73a77ddf92 Fix benchmark mode Michael Pavone <pavone@retrodev.com> parents: 1167 diff changeset	1863 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1864 context->vcounter &= 0x1FF;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1865 } else {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1866 uint16_t lines_max = (context->flags2 & FLAG2_REGION_PAL)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1867 ? 240 + BORDER_TOP_V30_PAL + BORDER_BOT_V30_PAL
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1868 : 224 + BORDER_TOP_V28 + BORDER_BOT_V28;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1869
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1870 if (context->output_lines == lines_max) {
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	1871 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	1872 context->cur_buffer = context->flags2 & FLAG2_EVEN_FIELD ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD;
40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	1873 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1874 vdp_update_per_frame_debug(context);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1875 context->h40_lines = 0;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1876 context->frame++;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1877 context->output_lines = 0;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1878 }
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1879 uint32_t output_line = context->vcounter;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1880 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1881 //vcounter increment occurs much later in Mode 4
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1882 output_line++;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1883 }
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1884 if (output_line < context->inactive_start + context->border_bot && context->output_lines > 0) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1885 output_line = context->output_lines++;//context->border_top + context->vcounter;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1886 } else if (output_line >= 0x200 - context->border_top) {
1385 1eded4f19910 Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time Michael Pavone <pavone@retrodev.com> parents: 1380 diff changeset	1887 if (output_line == 0x200 - context->border_top) {
1eded4f19910 Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time Michael Pavone <pavone@retrodev.com> parents: 1380 diff changeset	1888 //We're at the top of the display, force context->output_lines to be zero to avoid
1eded4f19910 Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time Michael Pavone <pavone@retrodev.com> parents: 1380 diff changeset	1889 //potential screen rolling if the mode is changed at an inopportune time
1eded4f19910 Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time Michael Pavone <pavone@retrodev.com> parents: 1380 diff changeset	1890 context->output_lines = 0;
1eded4f19910 Prevent emulated screen from "rolling" when the vertical resolution is changed at an inopportune time Michael Pavone <pavone@retrodev.com> parents: 1380 diff changeset	1891 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1892 output_line = context->output_lines++;//context->vcounter - (0x200 - context->border_top);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1893 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1894 output_line = INVALID_LINE;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1895 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1896 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * output_line);
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	1897 context->done_output = context->output;
1271 c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	1898 #ifdef DEBUG_FB_FILL
c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	1899 for (int i = 0; i < LINEBUF_SIZE; i++)
c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	1900 {
c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	1901 context->output[i] = 0xFFFF00FF;
c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	1902 }
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1903 #endif
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1904 if (output_line != INVALID_LINE && (context->regs[REG_MODE_4] & BIT_H40)) {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1905 context->h40_lines++;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	1906 }
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	1907 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1908 }
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1909
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1910 void vdp_release_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1911 {
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	1912 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1913 context->output = context->fb = NULL;
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1914 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1915
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1916 void vdp_reacquire_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1917 {
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	1918 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1919 uint16_t lines_max = (context->flags2 & FLAG2_REGION_PAL)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1920 ? 240 + BORDER_TOP_V30_PAL + BORDER_BOT_V30_PAL
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1921 : 224 + BORDER_TOP_V28 + BORDER_BOT_V28;
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1922 if (context->output_lines <= lines_max && context->output_lines > 0) {
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1923 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * (context->output_lines - 1));
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1924 } else {
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1925 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * INVALID_LINE);
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1926 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1927 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	1928
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1929 static void render_border_garbage(vdp_context context, uint32_t address, uint8_t buf, uint8_t buf_off, uint16_t col)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1930 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1931 uint8_t base = col >> 9 & 0x30;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1932 for (int i = 0; i < 4; i++, address++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1933 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1934 uint8_t byte = context->vdpmem[address & 0xFFFF];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1935 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base \| byte >> 4;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1936 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base \| byte & 0xF;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1937 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1938 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1939
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1940 static void draw_right_border(vdp_context *context)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1941 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1942 uint32_t *dst = context->output + BORDER_LEFT + ((context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256);
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1943 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1944 if ((context->test_port & TEST_BIT_DISABLE) != 0) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1945 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1946 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1947 uint32_t bg_color = context->colors[pixel];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1948 uint8_t test_layer = context->test_port >> 7 & 3;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1949 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1950 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1951 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1952 case 1:
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	1953 bg_color = context->colors[0];
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1954 for (int i = 0; i < BORDER_RIGHT; i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1955 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1956 *dst = bg_color;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1957 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1958 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1959 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1960 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1961 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1962 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1963 i = 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1964 uint8_t buf_off = context->buf_a_off - (context->hscroll_a & 0xF);
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1965 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1966 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1967 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1968 *dst = context->colors[context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK] & 0x3F];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1969 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1970 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1971 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1972 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1973 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1974 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1975 i = 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1976 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF);
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1977 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1978 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1979 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1980 *dst = context->colors[context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK] & 0x3F];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1981 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1982 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1983 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1984 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1985 } else {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1986 for (int i = 0; i < BORDER_RIGHT; i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1987 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1988 *dst = bg_color;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1989 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1990 }
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	1991 context->done_output = dst;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1992 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1993 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1994 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1995
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1996 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; }
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	1997 #define CHECK_LIMIT if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } context->hslot++; context->cycles += slot_cycles; CHECK_ONLY
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1998
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1999 #define COLUMN_RENDER_BLOCK(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2000 case startcyc:\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2001 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2002 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2003 case ((startcyc+1)&0xFF):\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2004 external_slot(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2005 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2006 case ((startcyc+2)&0xFF):\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2007 render_map_1(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2008 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2009 case ((startcyc+3)&0xFF):\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2010 render_map_2(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2011 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2012 case ((startcyc+4)&0xFF):\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2013 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2014 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2015 case ((startcyc+5)&0xFF):\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2016 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2017 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2018 case ((startcyc+6)&0xFF):\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2019 render_map_3(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2020 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2021 case ((startcyc+7)&0xFF):\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2022 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2023 CHECK_LIMIT
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2024
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2025 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2026 case startcyc:\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2027 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2028 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2029 case (startcyc+1):\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2030 /* refresh, no don't run dma src */\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2031 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2032 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2033 CHECK_ONLY\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2034 case (startcyc+2):\
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2035 render_map_1(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2036 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2037 case (startcyc+3):\
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2038 render_map_2(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2039 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2040 case (startcyc+4):\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2041 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2042 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2043 case (startcyc+5):\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2044 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2045 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2046 case (startcyc+6):\
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2047 render_map_3(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2048 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2049 case (startcyc+7):\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2050 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2051 CHECK_LIMIT
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2052
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2053 #define COLUMN_RENDER_BLOCK_MODE4(column, startcyc) \
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2054 case startcyc:\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2055 read_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2056 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2057 case ((startcyc+1)&0xFF):\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2058 if (column & 3) {\
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2059 scan_sprite_table_mode4(context);\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2060 } else {\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2061 external_slot(context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2062 }\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2063 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2064 case ((startcyc+2)&0xFF):\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2065 fetch_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2066 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2067 case ((startcyc+3)&0xFF):\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2068 render_map_mode4(context->vcounter, column, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2069 CHECK_LIMIT
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2070
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2071 #define CHECK_LIMIT_HSYNC(slot) \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2072 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2073 if (slot >= HSYNC_SLOT_H40 && slot < HSYNC_END_H40) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2074 context->cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2075 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2076 context->cycles += slot_cycles;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2077 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2078 if (slot == 182) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2079 context->hslot = 229;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2080 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2081 context->hslot++;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2082 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2083 CHECK_ONLY
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	2084
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2085 #define SPRITE_RENDER_H40(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2086 case slot:\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2087 if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2088 advance_output_line(context);\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2089 }\
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2090 if (slot == 168 \|\| slot == 247 \|\| slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2091 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2092 context,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2093 context->sprite_draw_list[context->cur_slot].address,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2094 context->tmp_buf_b,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2095 context->buf_b_off + (slot == 247 ? 0 : 8),\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2096 slot == 247 ? context->col_1 : context->col_2\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2097 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2098 if (slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2099 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2100 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2101 }\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2102 } else if (slot == 243) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2103 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2104 context,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2105 context->sprite_draw_list[context->cur_slot].address,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2106 context->tmp_buf_a,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2107 context->buf_a_off,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2108 context->col_1\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2109 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2110 } else if (slot == 169) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2111 draw_right_border(context);\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2112 }\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2113 render_sprite_cells( context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2114 scan_sprite_table(context->vcounter, context);\
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2115 CHECK_LIMIT_HSYNC(slot)
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	2116
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2117 //Note that the line advancement check will fail if BG_START_SLOT is > 6
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2118 //as we're bumping up against the hcounter jump
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2119 #define SPRITE_RENDER_H32(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2120 case slot:\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2121 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2122 advance_output_line(context);\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2123 }\
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2124 if (slot == 136 \|\| slot == 247 \|\| slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2125 render_border_garbage(\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2126 context,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2127 context->sprite_draw_list[context->cur_slot].address,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2128 context->tmp_buf_b,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2129 context->buf_b_off + (slot == 247 ? 0 : 8),\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2130 slot == 247 ? context->col_1 : context->col_2\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2131 );\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2132 if (slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2133 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2134 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2135 }\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2136 } else if (slot == 137) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2137 draw_right_border(context);\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2138 }\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2139 render_sprite_cells( context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2140 scan_sprite_table(context->vcounter, context);\
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	2141 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2142 if (slot == 147) {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2143 context->hslot = 233;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2144 } else {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2145 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2146 }\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2147 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2148 CHECK_ONLY
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2149
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2150 #define MODE4_CHECK_SLOT_LINE(slot) \
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2151 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2152 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2153 advance_output_line(context);\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2154 }\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2155 if ((slot) == 147) {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2156 context->hslot = 233;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2157 } else {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2158 context->hslot++;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2159 }\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2160 context->cycles += slot_cycles;\
1163 b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2161 if ((slot+1) == LINE_CHANGE_MODE4) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2162 vdp_advance_line(context);\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2163 if (context->vcounter == 192) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2164 return;\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2165 }\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2166 }\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2167 CHECK_ONLY
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2168
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2169 #define CALC_SLOT(slot, increment) ((slot+increment) > 147 && (slot+increment) < 233 ? (slot+increment-148+233): (slot+increment))
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2170
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2171 #define SPRITE_RENDER_H32_MODE4(slot) \
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2172 case slot:\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2173 read_sprite_x_mode4(context);\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2174 MODE4_CHECK_SLOT_LINE(slot)\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2175 case CALC_SLOT(slot, 1):\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2176 read_sprite_x_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2177 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot,1))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2178 case CALC_SLOT(slot, 2):\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2179 fetch_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2180 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 2))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2181 case CALC_SLOT(slot, 3):\
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2182 if ((slot + 3) == 140) {\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2183 uint32_t *dst = context->output + BORDER_LEFT + 256 + 8;\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2184 uint32_t bgcolor = context->colors[0x10 \| (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3];\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2185 for (int i = 0; i < BORDER_RIGHT-8; i++, dst++)\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2186 {\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2187 *dst = bgcolor;\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2188 }\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2189 context->done_output = dst;\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2190 }\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2191 render_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2192 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 3))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2193 case CALC_SLOT(slot, 4):\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2194 fetch_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2195 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 4))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2196 case CALC_SLOT(slot, 5):\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2197 render_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2198 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 5))
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2199
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	2200 static void vdp_h40(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2201 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2202 uint16_t address;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2203 uint32_t mask;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2204 uint32_t const slot_cycles = MCLKS_SLOT_H40;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2205 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2206 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2207 for (;;)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2208 {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2209 case 165:
1432 5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2210 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2211 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2212 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2213 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2214 //pretty consistently
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2215 context->vscroll_latch[0] = context->vsram[0];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2216 context->vscroll_latch[1] = context->vsram[1];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2217 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2218 if (context->state == PREPARING) {
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2219 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2220 uint32_t dst = context->output + (context->hslot - BG_START_SLOT) 2;
1368 4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2221 if (dst >= context->done_output) {
4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2222 *dst = bg_color;
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2223 }
1368 4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2224 dst++;
4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2225 if (dst >= context->done_output) {
4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2226 *dst = bg_color;
4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2227 }
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2228 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2229 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2230 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2231 }
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2232 CHECK_LIMIT
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2233 case 166:
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2234 if (context->state == PREPARING) {
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2235 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2236 uint32_t dst = context->output + (context->hslot - BG_START_SLOT) 2;
1368 4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2237 if (dst >= context->done_output) {
4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2238 *dst = bg_color;
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2239 }
1368 4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2240 dst++;
4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2241 if (dst >= context->done_output) {
4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2242 *dst = bg_color;
4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2243 }
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2244 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2245 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2246 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2247 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2248 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2249 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2250 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2251 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2252 }
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2253 CHECK_LIMIT
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2254 //sprite attribute table scan starts
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2255 case 167:
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2256 if (context->state == PREPARING) {
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2257 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2258 uint32_t dst = context->output + (context->hslot - BG_START_SLOT) 2;
1361 1679ea04c449 WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene Michael Pavone <pavone@retrodev.com> parents: 1358 diff changeset	2259 for (int i = 0; i < LINEBUF_SIZE - 2 * (context->hslot - BG_START_SLOT); i++, dst++)
1271 c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	2260 {
1361 1679ea04c449 WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene Michael Pavone <pavone@retrodev.com> parents: 1358 diff changeset	2261 if (dst >= context->done_output) {
1679ea04c449 WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene Michael Pavone <pavone@retrodev.com> parents: 1358 diff changeset	2262 *dst = bg_color;
1679ea04c449 WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene Michael Pavone <pavone@retrodev.com> parents: 1358 diff changeset	2263 }
1271 c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	2264 }
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2265 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2266 context->sprite_index = 0x80;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2267 context->slot_counter = 0;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2268 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2269 context,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2270 context->sprite_draw_list[context->cur_slot].address,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2271 context->tmp_buf_b, context->buf_b_off,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2272 context->col_1
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2273 );
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2274 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2275 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2276 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2277 SPRITE_RENDER_H40(168)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2278 SPRITE_RENDER_H40(169)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2279 SPRITE_RENDER_H40(170)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2280 SPRITE_RENDER_H40(171)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2281 SPRITE_RENDER_H40(172)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2282 SPRITE_RENDER_H40(173)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2283 SPRITE_RENDER_H40(174)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2284 SPRITE_RENDER_H40(175)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2285 SPRITE_RENDER_H40(176)
1365 6dd2c3edd0b5 Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2 Michael Pavone <pavone@retrodev.com> parents: 1362 diff changeset	2286 SPRITE_RENDER_H40(177)//End of border?
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2287 SPRITE_RENDER_H40(178)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2288 SPRITE_RENDER_H40(179)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2289 SPRITE_RENDER_H40(180)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2290 SPRITE_RENDER_H40(181)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2291 SPRITE_RENDER_H40(182)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2292 SPRITE_RENDER_H40(229)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2293 //!HSYNC asserted
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2294 SPRITE_RENDER_H40(230)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2295 SPRITE_RENDER_H40(231)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2296 case 232:
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2297 external_slot(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2298 CHECK_LIMIT_HSYNC(232)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2299 SPRITE_RENDER_H40(233)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2300 SPRITE_RENDER_H40(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2301 SPRITE_RENDER_H40(235)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2302 SPRITE_RENDER_H40(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2303 SPRITE_RENDER_H40(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2304 SPRITE_RENDER_H40(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2305 SPRITE_RENDER_H40(239)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2306 SPRITE_RENDER_H40(240)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2307 SPRITE_RENDER_H40(241)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2308 SPRITE_RENDER_H40(242)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2309 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2310 case 244:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2311 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2312 mask = 0;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2313 if (context->regs[REG_MODE_3] & 0x2) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2314 mask \|= 0xF8;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2315 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2316 if (context->regs[REG_MODE_3] & 0x1) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2317 mask \|= 0x7;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2318 }
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2319 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2320 address += (context->vcounter & mask) * 4;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2321 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2322 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2323 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	2324 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2325 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2326 context->cycles += h40_hsync_cycles[14];
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2327 CHECK_ONLY //provides "garbage" for border when plane A selected
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2328 //!HSYNC high
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2329 SPRITE_RENDER_H40(245)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2330 SPRITE_RENDER_H40(246)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2331 SPRITE_RENDER_H40(247) //provides "garbage" for border when plane B selected
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2332 SPRITE_RENDER_H40(248) //provides "garbage" for border when plane B selected
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2333 case 249:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2334 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2335 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2336 SPRITE_RENDER_H40(250)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2337 case 251:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2338 render_map_1(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2339 scan_sprite_table(context->vcounter, context);//Just a guess
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2340 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2341 case 252:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2342 render_map_2(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2343 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2344 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2345 case 253:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2346 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2347 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2348 SPRITE_RENDER_H40(254)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2349 case 255:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2350 render_map_3(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2351 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2352 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2353 case 0:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2354 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2355 scan_sprite_table(context->vcounter, context);//Just a guess
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2356 //seems like the sprite table scan fills a shift register
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2357 //values are FIFO, but unused slots precede used slots
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2358 //so we set cur_slot to slot_counter and let it wrap around to
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2359 //the beginning of the list
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2360 context->cur_slot = context->slot_counter;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2361 context->sprite_draws = MAX_DRAWS;
36 04672c060062 Pass all sprite masking tests Mike Pavone <pavone@retrodev.com> parents: 35 diff changeset	2362 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2363 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2364 COLUMN_RENDER_BLOCK(2, 1)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2365 COLUMN_RENDER_BLOCK(4, 9)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2366 COLUMN_RENDER_BLOCK(6, 17)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2367 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2368 COLUMN_RENDER_BLOCK(10, 33)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2369 COLUMN_RENDER_BLOCK(12, 41)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2370 COLUMN_RENDER_BLOCK(14, 49)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2371 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2372 COLUMN_RENDER_BLOCK(18, 65)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2373 COLUMN_RENDER_BLOCK(20, 73)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2374 COLUMN_RENDER_BLOCK(22, 81)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2375 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2376 COLUMN_RENDER_BLOCK(26, 97)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2377 COLUMN_RENDER_BLOCK(28, 105)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2378 COLUMN_RENDER_BLOCK(30, 113)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2379 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2380 COLUMN_RENDER_BLOCK(34, 129)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2381 COLUMN_RENDER_BLOCK(36, 137)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2382 COLUMN_RENDER_BLOCK(38, 145)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2383 COLUMN_RENDER_BLOCK_REFRESH(40, 153)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2384 case 161:
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2385 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2386 CHECK_LIMIT
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2387 case 162:
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2388 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2389 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2390 //sprite render to line buffer starts
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2391 case 163:
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2392 context->cur_slot = MAX_DRAWS-1;
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2393 memset(context->linebuf, 0, LINEBUF_SIZE);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2394 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2395 context,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2396 context->sprite_draw_list[context->cur_slot].address,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2397 context->tmp_buf_a, context->buf_a_off,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2398 context->col_1
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2399 );
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2400 render_sprite_cells(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2401 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2402 case 164:
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2403 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2404 context,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2405 context->sprite_draw_list[context->cur_slot].address,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2406 context->tmp_buf_a, context->buf_a_off + 8,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2407 context->col_2
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2408 );
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2409 render_sprite_cells(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2410 if (context->flags & FLAG_DMA_RUN) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2411 run_dma_src(context, -1);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2412 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2413 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2414 context->cycles += slot_cycles;
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2415 vdp_advance_line(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2416 CHECK_ONLY
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2417 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2418 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2419 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2420 context->cycles += slot_cycles;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2421 return;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2422 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2423 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2424
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	2425 static void vdp_h32(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2426 {
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2427 uint16_t address;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2428 uint32_t mask;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2429 uint32_t const slot_cycles = MCLKS_SLOT_H32;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2430 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2431 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2432 for (;;)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2433 {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2434 case 133:
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2435 if (context->state == PREPARING) {
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2436 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2437 uint32_t dst = context->output + (context->hslot - BG_START_SLOT) 2;
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2438 if (dst >= context->done_output) {
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2439 *dst = bg_color;
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2440 }
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2441 dst++;
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2442 if (dst >= context->done_output) {
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2443 *dst = bg_color;
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2444 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2445 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2446 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2447 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2448 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2449 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2450 case 134:
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2451 if (context->state == PREPARING) {
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2452 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2453 uint32_t dst = context->output + (context->hslot - BG_START_SLOT) 2;
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2454 if (dst >= context->done_output) {
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2455 *dst = bg_color;
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2456 }
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2457 dst++;
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2458 if (dst >= context->done_output) {
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2459 *dst = bg_color;
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2460 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2461 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2462 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2463 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2464 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2465 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2466 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2467 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2468 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2469 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2470 CHECK_LIMIT
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2471 //sprite attribute table scan starts
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2472 case 135:
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2473 if (context->state == PREPARING) {
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2474 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2475 uint32_t dst = context->output + (context->hslot - BG_START_SLOT) 2;
1271 c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	2476 for (int i = 0; i < (256+HORIZ_BORDER) - 2 * (context->hslot - BG_START_SLOT); i++)
c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	2477 {
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2478 if (dst >= context->done_output) {
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2479 *(dst++) = bg_color;
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2480 }
1271 c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	2481 }
1185 9de9d2c6ebe5 Fix border rendering at end of line 1FE. vdp_inactive will probably need a small fixup for the edge case when we start between when the vcounter is incremented and the line is truly finished. Michael Pavone <pavone@retrodev.com> parents: 1183 diff changeset	2482 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2483 context->sprite_index = 0x80;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2484 context->slot_counter = 0;
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2485 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2486 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2487 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2488 context->tmp_buf_b, context->buf_b_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2489 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2490 );
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2491 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2492 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2493 CHECK_LIMIT
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2494 SPRITE_RENDER_H32(136)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2495 SPRITE_RENDER_H32(137)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2496 SPRITE_RENDER_H32(138)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2497 SPRITE_RENDER_H32(139)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2498 SPRITE_RENDER_H32(140)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2499 SPRITE_RENDER_H32(141)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2500 SPRITE_RENDER_H32(142)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2501 SPRITE_RENDER_H32(143)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2502 SPRITE_RENDER_H32(144)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2503 case 145:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2504 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2505 CHECK_LIMIT
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2506 SPRITE_RENDER_H32(146)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2507 SPRITE_RENDER_H32(147)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2508 SPRITE_RENDER_H32(233)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2509 SPRITE_RENDER_H32(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2510 SPRITE_RENDER_H32(235)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2511 //HSYNC start
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2512 SPRITE_RENDER_H32(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2513 SPRITE_RENDER_H32(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2514 SPRITE_RENDER_H32(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2515 SPRITE_RENDER_H32(239)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2516 SPRITE_RENDER_H32(240)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2517 SPRITE_RENDER_H32(241)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2518 SPRITE_RENDER_H32(242)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2519 case 243:
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	2520 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	2521 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	2522 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	2523 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	2524 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	2525 //to confirm that one way or another
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	2526 context->vscroll_latch[0] = context->vsram[0];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	2527 context->vscroll_latch[1] = context->vsram[1];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	2528 }
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2529 external_slot(context);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2530 //provides "garbage" for border when plane A selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2531 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2532 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2533 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2534 context->tmp_buf_a,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2535 context->buf_a_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2536 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2537 );
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2538 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2539 case 244:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2540 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2541 mask = 0;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2542 if (context->regs[REG_MODE_3] & 0x2) {
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2543 mask \|= 0xF8;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2544 }
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2545 if (context->regs[REG_MODE_3] & 0x1) {
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2546 mask \|= 0x7;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2547 }
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2548 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2549 address += (context->vcounter & mask) * 4;
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2550 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2551 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2552 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2553 CHECK_LIMIT //provides "garbage" for border when plane A selected
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2554 SPRITE_RENDER_H32(245)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2555 SPRITE_RENDER_H32(246)
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2556 SPRITE_RENDER_H32(247) //provides "garbage" for border when plane B selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2557 SPRITE_RENDER_H32(248) //provides "garbage" for border when plane B selected
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2558 //!HSYNC high
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2559 case 249:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2560 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2561 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2562 SPRITE_RENDER_H32(250)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2563 case 251:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2564 render_map_1(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2565 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2566 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2567 case 252:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2568 render_map_2(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2569 scan_sprite_table(context->vcounter, context);//Just a guess
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2570 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2571 case 253:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2572 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2573 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2574 case 254:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2575 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2576 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2577 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2578 case 255:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2579 render_map_3(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2580 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2581 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2582 case 0:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2583 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2584 scan_sprite_table(context->vcounter, context);//Just a guess
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2585 //reverse context slot counter so it counts the number of sprite slots
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2586 //filled rather than the number of available slots
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2587 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2588 context->cur_slot = context->slot_counter;
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2589 context->sprite_draws = MAX_DRAWS_H32;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	2590 context->flags &= (~FLAG_CAN_MASK & ~FLAG_MASKED);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2591 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2592 COLUMN_RENDER_BLOCK(2, 1)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2593 COLUMN_RENDER_BLOCK(4, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2594 COLUMN_RENDER_BLOCK(6, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2595 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2596 COLUMN_RENDER_BLOCK(10, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2597 COLUMN_RENDER_BLOCK(12, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2598 COLUMN_RENDER_BLOCK(14, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2599 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2600 COLUMN_RENDER_BLOCK(18, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2601 COLUMN_RENDER_BLOCK(20, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2602 COLUMN_RENDER_BLOCK(22, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2603 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2604 COLUMN_RENDER_BLOCK(26, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2605 COLUMN_RENDER_BLOCK(28, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2606 COLUMN_RENDER_BLOCK(30, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2607 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2608 case 129:
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2609 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2610 CHECK_LIMIT
1269 ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1267 diff changeset	2611 case 130: {
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2612 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2613 CHECK_LIMIT
1269 ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1267 diff changeset	2614 }
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2615 //sprite render to line buffer starts
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2616 case 131:
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2617 context->cur_slot = MAX_DRAWS_H32-1;
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2618 memset(context->linebuf, 0, LINEBUF_SIZE);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2619 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2620 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2621 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2622 context->tmp_buf_a, context->buf_a_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2623 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2624 );
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2625 render_sprite_cells(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2626 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2627 case 132:
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2628 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2629 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2630 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2631 context->tmp_buf_a, context->buf_a_off + 8,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2632 context->col_2
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2633 );
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2634 render_sprite_cells(context);
1173 d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	2635 if (context->flags & FLAG_DMA_RUN) {
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	2636 run_dma_src(context, -1);
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	2637 }
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	2638 context->hslot++;
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	2639 context->cycles += slot_cycles;
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	2640 vdp_advance_line(context);
1173 d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	2641 CHECK_ONLY
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2642 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2643 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2644 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2645 context->cycles += MCLKS_SLOT_H32;
503 eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	2646 }
eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	2647 }
eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	2648
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2649 static void vdp_h32_mode4(vdp_context * context, uint32_t target_cycles)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2650 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2651 uint16_t address;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2652 uint32_t mask;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2653 uint32_t const slot_cycles = MCLKS_SLOT_H32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2654 switch(context->hslot)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2655 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2656 for (;;)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2657 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2658 //sprite rendering starts
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2659 SPRITE_RENDER_H32_MODE4(137)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2660 SPRITE_RENDER_H32_MODE4(143)
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2661 case 234:
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2662 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2663 CHECK_LIMIT
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2664 case 235:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2665 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2666 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2667 //!HSYNC low
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2668 case 236:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2669 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2670 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2671 case 237:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2672 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2673 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2674 case 238:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2675 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2676 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2677 SPRITE_RENDER_H32_MODE4(239)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2678 SPRITE_RENDER_H32_MODE4(245)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2679 case 251:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2680 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2681 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2682 case 252:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2683 external_slot(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2684 if (context->regs[REG_MODE_1] & BIT_HSCRL_LOCK && context->vcounter < 16) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2685 context->hscroll_a = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2686 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2687 context->hscroll_a = context->regs[REG_X_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2688 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2689 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2690 case 253:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2691 context->sprite_index = 0;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2692 context->slot_counter = MAX_DRAWS_H32_MODE4;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2693 scan_sprite_table_mode4(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2694 CHECK_LIMIT
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2695 case 254:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2696 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2697 CHECK_LIMIT
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2698 case 255:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2699 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2700 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2701 case 0: {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2702 scan_sprite_table_mode4(context);
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2703 uint32_t *dst = context->output;;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2704 uint32_t bgcolor = context->colors[0x10 \| (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3];
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2705 for (int i = 0; i < BORDER_LEFT-8; i++, dst++)
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2706 {
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2707 *dst = bgcolor;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2708 }
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2709 context->done_output = dst;
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2710 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2711 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2712 case 1:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2713 scan_sprite_table_mode4(context);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2714 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2715 case 2:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2716 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2717 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2718 case 3:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2719 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2720 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2721 case 4: {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2722 scan_sprite_table_mode4(context);
1121 1913f9c28003 Less broken Mode 4 implementation Michael Pavone <pavone@retrodev.com> parents: 1120 diff changeset	2723 context->buf_a_off = 8;
1913f9c28003 Less broken Mode 4 implementation Michael Pavone <pavone@retrodev.com> parents: 1120 diff changeset	2724 memset(context->tmp_buf_a, 0, 8);
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2725 uint32_t *dst = context->output + BORDER_LEFT - 8;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2726 uint32_t bgcolor = context->colors[0x10 \| (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3];
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2727 for (int i = 0; i < 8; i++, dst++)
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2728 {
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2729 *dst = bgcolor;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2730 }
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2731 context->done_output = dst;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2732 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2733 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2734 COLUMN_RENDER_BLOCK_MODE4(0, 5)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2735 COLUMN_RENDER_BLOCK_MODE4(1, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2736 COLUMN_RENDER_BLOCK_MODE4(2, 13)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2737 COLUMN_RENDER_BLOCK_MODE4(3, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2738 COLUMN_RENDER_BLOCK_MODE4(4, 21)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2739 COLUMN_RENDER_BLOCK_MODE4(5, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2740 COLUMN_RENDER_BLOCK_MODE4(6, 29)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2741 COLUMN_RENDER_BLOCK_MODE4(7, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2742 COLUMN_RENDER_BLOCK_MODE4(8, 37)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2743 COLUMN_RENDER_BLOCK_MODE4(9, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2744 COLUMN_RENDER_BLOCK_MODE4(10, 45)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2745 COLUMN_RENDER_BLOCK_MODE4(11, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2746 COLUMN_RENDER_BLOCK_MODE4(12, 53)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2747 COLUMN_RENDER_BLOCK_MODE4(13, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2748 COLUMN_RENDER_BLOCK_MODE4(14, 61)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2749 COLUMN_RENDER_BLOCK_MODE4(15, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2750 COLUMN_RENDER_BLOCK_MODE4(16, 69)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2751 COLUMN_RENDER_BLOCK_MODE4(17, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2752 COLUMN_RENDER_BLOCK_MODE4(18, 77)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2753 COLUMN_RENDER_BLOCK_MODE4(19, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2754 COLUMN_RENDER_BLOCK_MODE4(20, 85)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2755 COLUMN_RENDER_BLOCK_MODE4(21, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2756 COLUMN_RENDER_BLOCK_MODE4(22, 93)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2757 COLUMN_RENDER_BLOCK_MODE4(23, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2758 COLUMN_RENDER_BLOCK_MODE4(24, 101)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2759 COLUMN_RENDER_BLOCK_MODE4(25, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2760 COLUMN_RENDER_BLOCK_MODE4(26, 109)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2761 COLUMN_RENDER_BLOCK_MODE4(27, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2762 COLUMN_RENDER_BLOCK_MODE4(28, 117)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2763 COLUMN_RENDER_BLOCK_MODE4(29, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2764 COLUMN_RENDER_BLOCK_MODE4(30, 125)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2765 COLUMN_RENDER_BLOCK_MODE4(31, 129)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2766 case 133:
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2767 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2768 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2769 case 134:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2770 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2771 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2772 case 135:
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2773 external_slot(context);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2774 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2775 case 136: {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2776 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2777 //set things up for sprite rendering in the next slot
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2778 memset(context->linebuf, 0, LINEBUF_SIZE);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2779 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2780 context->sprite_draws = MAX_DRAWS_H32_MODE4;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2781 uint32_t *dst = context->output + BORDER_LEFT + 256;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2782 uint32_t bgcolor = context->colors[0x10 \| (context->regs[REG_BG_COLOR] & 0xF) + CRAM_SIZE*3];
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2783 for (int i = 0; i < 8; i++, dst++)
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2784 {
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2785 *dst = bgcolor;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2786 }
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2787 context->done_output = dst;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2788 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2789 }}
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2790 default:
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2791 context->hslot++;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2792 context->cycles += MCLKS_SLOT_H32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2793 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2794 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2795
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2796 static void inactive_test_output(vdp_context *context, uint8_t is_h40, uint8_t test_layer)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2797 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2798 uint8_t max_slot = is_h40 ? 169 : 136;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2799 if (context->hslot > max_slot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2800 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2801 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2802 uint32_t dst = context->output + (context->hslot >> 3) SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2803 int32_t len;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2804 uint32_t src_off;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2805 if (context->hslot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2806 dst -= SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2807 src_off = 0;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2808 len = context->hslot == max_slot ? BORDER_RIGHT : SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2809 } else {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2810 src_off = SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2811 len = BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2812 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2813 uint8_t *src;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2814 if (test_layer == 2) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2815 //plane A
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2816 src_off += context->buf_a_off + context->hscroll_a;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2817 src = context->tmp_buf_a;
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	2818 } else if (test_layer == 3){
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2819 //plane B
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2820 src_off += context->buf_b_off + context->hscroll_b;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2821 src = context->tmp_buf_b;
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	2822 } else {
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	2823 //sprite layer
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	2824 for (; len >=0; len--, dst++, src_off++)
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	2825 {
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	2826 *dst = context->colors[0];
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	2827 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2828 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2829 for (; len >=0; len--, dst++, src_off++)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2830 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2831 *dst = context->colors[src[src_off & SCROLL_BUFFER_MASK] & 0x3F];
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2832 }
1368 4c5a78555209 Fix small blank spot on line -2 in "ninja escape" border fade in OD2 Michael Pavone <pavone@retrodev.com> parents: 1366 diff changeset	2833 context->done_output = dst;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2834 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2835 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2836 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2837
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	2838 static void check_switch_inactive(vdp_context *context, uint8_t is_h40)
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	2839 {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	2840 //technically the second hcounter check should be different for H40, but this is probably close enough for now
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	2841 if (context->state == ACTIVE && context->vcounter == context->inactive_start && (context->hslot >= (is_h40 ? 167 : 135) \|\| context->hslot < 133)) {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	2842 context->state = INACTIVE;
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	2843 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	2844 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	2845
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2846 static void vdp_inactive(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	2847 {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2848 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2849 uint8_t index_reset_value, max_draws, max_sprites;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2850 uint16_t vint_line, active_line;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2851 uint32_t bg_color;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2852
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2853 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2854 if (is_h40) {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2855 latch_slot = 165;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2856 buf_clear_slot = 163;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2857 index_reset_slot = 167;
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	2858 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2859 max_draws = MAX_DRAWS-1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2860 max_sprites = MAX_SPRITES_LINE;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2861 index_reset_value = 0x80;
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	2862 vint_slot = VINT_SLOT_H40;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2863 line_change = LINE_CHANGE_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2864 jump_start = 182;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2865 jump_dest = 229;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2866 } else {
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	2867 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2868 max_draws = MAX_DRAWS_H32-1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2869 max_sprites = MAX_SPRITES_LINE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2870 buf_clear_slot = 128;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2871 index_reset_slot = 132;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2872 index_reset_value = 0x80;
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	2873 vint_slot = VINT_SLOT_H32;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2874 line_change = LINE_CHANGE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2875 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2876 jump_dest = 233;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2877 latch_slot = 243;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	2878 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2879 vint_line = context->inactive_start;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2880 active_line = 0x1FF;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2881 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2882 latch_slot = 220;
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2883 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	2884 } else {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2885 latch_slot = 220;
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	2886 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2887 max_draws = MAX_DRAWS_H32_MODE4;
1278 34d3cb05014d Fix VDP buffer overrun that was causing sprite flickering in some games Michael Pavone <pavone@retrodev.com> parents: 1273 diff changeset	2888 max_sprites = 8;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2889 buf_clear_slot = 136;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2890 index_reset_slot = 253;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2891 index_reset_value = 0;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2892 vint_line = context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2893 vint_slot = VINT_SLOT_MODE4;
1177 67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency Michael Pavone <pavone@retrodev.com> parents: 1175 diff changeset	2894 line_change = LINE_CHANGE_MODE4;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2895 bg_color = render_map_color(0, 0, 0);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2896 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2897 jump_dest = 233;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2898 if (context->regs[REG_MODE_1] & BIT_MODE_4) {
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2899 active_line = 0x1FF;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2900 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2901 //never active unless either mode 4 or mode 5 is turned on
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2902 active_line = 0x200;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2903 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	2904 }
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2905 uint32_t *dst;
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2906 uint8_t *debug_dst;
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2907 if (
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2908 (
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2909 context->vcounter < context->inactive_start + context->border_bot
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2910 \|\| context->vcounter >= 0x200 - context->border_top
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2911 ) && context->hslot >= BG_START_SLOT && context->hslot < bg_end_slot
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2912 ) {
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2913 dst = context->output + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2914 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2915 } else {
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2916 dst = NULL;
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2917 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2918
1342 4ea094d15cce Fix border rendering so that the first and last line of display are consistently drawn Michael Pavone <pavone@retrodev.com> parents: 1339 diff changeset	2919 if (
4ea094d15cce Fix border rendering so that the first and last line of display are consistently drawn Michael Pavone <pavone@retrodev.com> parents: 1339 diff changeset	2920 !dst && context->vcounter == context->inactive_start + context->border_bot
4ea094d15cce Fix border rendering so that the first and last line of display are consistently drawn Michael Pavone <pavone@retrodev.com> parents: 1339 diff changeset	2921 && context->hslot >= line_change && context->hslot < bg_end_slot
4ea094d15cce Fix border rendering so that the first and last line of display are consistently drawn Michael Pavone <pavone@retrodev.com> parents: 1339 diff changeset	2922 ) {
4ea094d15cce Fix border rendering so that the first and last line of display are consistently drawn Michael Pavone <pavone@retrodev.com> parents: 1339 diff changeset	2923 dst = context->output + 2 * (context->hslot - BG_START_SLOT);
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2924 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
1342 4ea094d15cce Fix border rendering so that the first and last line of display are consistently drawn Michael Pavone <pavone@retrodev.com> parents: 1339 diff changeset	2925 }
4ea094d15cce Fix border rendering so that the first and last line of display are consistently drawn Michael Pavone <pavone@retrodev.com> parents: 1339 diff changeset	2926
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2927 uint8_t test_layer = context->test_port >> 7 & 3;
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	2928 if (test_layer) {
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2929 dst = NULL;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2930 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2931
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2932 while(context->cycles < target_cycles)
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2933 {
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	2934 check_switch_inactive(context, is_h40);
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2935 if (context->hslot == BG_START_SLOT && !test_layer && (
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2936 context->vcounter < context->inactive_start + context->border_bot
1342 4ea094d15cce Fix border rendering so that the first and last line of display are consistently drawn Michael Pavone <pavone@retrodev.com> parents: 1339 diff changeset	2937 \|\| context->vcounter >= 0x200 - context->border_top
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2938 )) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2939 dst = context->output + (context->hslot - BG_START_SLOT) * 2;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	2940 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2941 } else if (context->hslot == bg_end_slot) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2942 advance_output_line(context);
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2943 dst = NULL;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2944 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2945 //this will need some tweaking to properly interact with 128K mode,
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2946 //but this should be good enough for now
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2947 context->serial_address += 1024;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2948 if (test_layer) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2949 switch (context->hslot & 7)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2950 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2951 case 3:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2952 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2953 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2954 case 4:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2955 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2956 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2957 case 7:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2958 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2959 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2960 case 0:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2961 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off+8, context->col_2);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2962 inactive_test_output(context, is_h40, test_layer);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2963 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2964 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2965 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2966
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2967 if (context->hslot == buf_clear_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2968 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2969 context->cur_slot = max_draws;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2970 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2971 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2972 context->sprite_draws = MAX_DRAWS_H32_MODE4;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2973 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2974 memset(context->linebuf, 0, LINEBUF_SIZE);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2975 } else if (context->hslot == index_reset_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2976 context->sprite_index = index_reset_value;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2977 context->slot_counter = mode_5 ? 0 : max_sprites;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2978 } else if (context->hslot == latch_slot) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2979 //it seems unlikely to me that vscroll actually gets latched when the display is off
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2980 //but it's the only straightforward way to reconcile what I'm seeing between Skitchin
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2981 //(which seems to expect vscroll to be latched early) and the intro of Gunstar Heroes
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2982 //(which disables the display and ends up with garbage if vscroll is latched during that period)
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2983 //without it. Some more tests are definitely needed
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2984 context->vscroll_latch[0] = context->vsram[0];
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	2985 context->vscroll_latch[1] = context->vsram[1];
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2986 } else if (context->vcounter == vint_line && context->hslot == vint_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2987 context->flags2 \|= FLAG2_VINT_PENDING;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2988 context->pending_vint_start = context->cycles;
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	2989 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	2990 context->flags2 ^= FLAG2_EVEN_FIELD;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2991 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2992
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2993 if (dst) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2994 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2995 bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2996 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2997 bg_color = context->colors[CRAM_SIZE * 3 + 0x10 + (context->regs[REG_BG_COLOR] & 0xF)];
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	2998 }
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	2999 if (dst >= context->done_output) {
033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3000 *(dst++) = bg_color;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3001 *(debug_dst++) = DBG_SRC_BG;
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3002 } else {
033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3003 dst++;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3004 debug_dst++;
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3005 }
033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3006 if (dst >= context->done_output) {
033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3007 *(dst++) = bg_color;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3008 *(debug_dst++) = DBG_SRC_BG;
1361 1679ea04c449 WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene Michael Pavone <pavone@retrodev.com> parents: 1358 diff changeset	3009 context->done_output = dst;
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3010 } else {
033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3011 dst++;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3012 debug_dst++;
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3013 }
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	3014 if (context->hslot == (bg_end_slot-1)) {
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	3015 *(dst++) = bg_color;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3016 *(debug_dst++) = DBG_SRC_BG;
1361 1679ea04c449 WIP attempt at fixing the minor line -2 glitch in the OD2 Ninja Escape scene Michael Pavone <pavone@retrodev.com> parents: 1358 diff changeset	3017 context->done_output = dst;
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	3018 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3019 }
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3020
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3021 if (!is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3022 external_slot(context);
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3023 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3024 run_dma_src(context, context->hslot);
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3025 }
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3026 }
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3027
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3028 if (is_h40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3029 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3030 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40];
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3031 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3032 context->cycles += MCLKS_SLOT_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3033 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3034 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3035 context->cycles += MCLKS_SLOT_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3036 }
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3037 if (context->hslot == jump_start) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3038 context->hslot = jump_dest;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3039 } else {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3040 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3041 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3042 if (context->hslot == line_change) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3043 vdp_advance_line(context);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3044 if (context->vcounter == active_line) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3045 context->state = PREPARING;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3046 return;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3047 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3048 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3049 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3050 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3051
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3052 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3053 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3054 uint8_t is_h40 = context->regs[REG_MODE_4] & BIT_H40;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3055 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3056 while(context->cycles < target_cycles)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3057 {
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3058 check_switch_inactive(context, is_h40);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3059
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3060 if (is_active(context)) {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3061 if (mode_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3062 if (is_h40) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3063 vdp_h40(context, target_cycles);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3064 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3065 vdp_h32(context, target_cycles);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3066 }
330 57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	3067 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3068 vdp_h32_mode4(context, target_cycles);
330 57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	3069 }
57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	3070 } else {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3071 vdp_inactive(context, target_cycles, is_h40, mode_5);
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3072 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3073 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3074 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3075
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3076 void vdp_run_context(vdp_context *context, uint32_t target_cycles)
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3077 {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3078 //TODO: Deal with H40 hsync shenanigans
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3079 uint32_t slot_cyc = context->regs[REG_MODE_4] & BIT_H40 ? 15 : 19;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3080 if (target_cycles < slot_cyc) {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3081 //avoid overflow
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3082 return;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3083 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3084 vdp_run_context_full(context, target_cycles - slot_cyc);
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3085 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3086
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3087 uint32_t vdp_run_to_vblank(vdp_context * context)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3088 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3089 uint32_t old_frame = context->frame;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3090 while (context->frame == old_frame) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3091 vdp_run_context_full(context, context->cycles + MCLKS_LINE);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3092 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3093 return context->cycles;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3094 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3095
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3096 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles)
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3097 {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3098 for(;;) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3099 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L];
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3100 if (!dmalen) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3101 dmalen = 0x10000;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3102 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3103 uint32_t min_dma_complete = dmalen * (context->regs[REG_MODE_4] & BIT_H40 ? 16 : 20);
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	3104 if (
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	3105 (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	3106 \|\| (((context->cd & 0xF) == VRAM_WRITE) && !(context->regs[REG_MODE_2] & BIT_128K_VRAM))) {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3107 //DMA copies take twice as long to complete since they require a read and a write
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3108 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	3109 //unless 128KB mode is enabled
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3110 min_dma_complete *= 2;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3111 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3112 min_dma_complete += context->cycles;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3113 if (target_cycles < min_dma_complete) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3114 vdp_run_context_full(context, target_cycles);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3115 return;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3116 } else {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3117 vdp_run_context_full(context, min_dma_complete);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3118 if (!(context->flags & FLAG_DMA_RUN)) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3119 return;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3120 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3121 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3122 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3123 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3124
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3125 static uint16_t get_ext_vcounter(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3126 {
1437 da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3127 uint16_t line= context->vcounter;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3128 if (context->regs[REG_MODE_4] & BIT_INTERLACE) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3129 if (context->double_res) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3130 line <<= 1;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3131 } else {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3132 line &= 0x1FE;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3133 }
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3134 if (line & 0x100) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3135 line \|= 1;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3136 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3137 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3138 return line << 8;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3139 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3140
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3141 void vdp_latch_hv(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3142 {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3143 context->hv_latch = context->hslot \| get_ext_vcounter(context);
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3144 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3145
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3146 uint16_t vdp_hv_counter_read(vdp_context * context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3147 {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3148 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3149 return context->hv_latch;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3150 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3151 uint16_t hv;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3152 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3153 hv = context->hslot;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3154 } else {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3155 hv = context->hv_latch & 0xFF;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3156 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3157 hv \|= get_ext_vcounter(context);
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3158
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3159 return hv;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3160 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3161
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3162 int vdp_control_port_write(vdp_context * context, uint16_t value)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3163 {
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3164 //printf("control port write: %X at %d\n", value, context->cycles);
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3165 if (context->flags & FLAG_DMA_RUN) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3166 return -1;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3167 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3168 if (context->flags & FLAG_PENDING) {
1318 bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support Michael Pavone <pavone@retrodev.com> parents: 1315 diff changeset	3169 context->address = (context->address & 0x3FFF) \| (value << 14 & 0x1C000);
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	3170 //It seems like the DMA enable bit doesn't so much enable DMA so much
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	3171 //as it enables changing CD5 from control port writes
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	3172 uint8_t preserve = (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) ? 0x3 : 0x23;
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	3173 context->cd = (context->cd & preserve) \| ((value >> 2) & ~preserve & 0xFF);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3174 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3175 //Should these be taken care of here or after the first write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3176 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3177 context->flags2 &= ~FLAG2_READ_PENDING;
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	3178 //printf("New Address: %X, New CD: %X\n", context->address, context->cd);
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	3179 if (context->cd & 0x20) {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3180 //
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	3181 if((context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3182 //DMA copy or 68K -> VDP, transfer starts immediately
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3183 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot);
1191 8dc50e50ced6 Remove accidentally committed debug logging Michael Pavone <pavone@retrodev.com> parents: 1189 diff changeset	3184 if (!(context->regs[REG_DMASRC_H] & 0x80)) {
8dc50e50ced6 Remove accidentally committed debug logging Michael Pavone <pavone@retrodev.com> parents: 1189 diff changeset	3185 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) \| (context->regs[REG_DMASRC_M] << 9) \| (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 \| context->regs[REG_DMALEN_L]);
1289 6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	3186 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	3187 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	3188 //only captures are from a direct color DMA demo which will generally start DMA at a very specific point in display so other values are plausible
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	3189 //sticking with 3 slots for now until I can do some more captures
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3190 vdp_run_context_full(context, context->cycles + 12 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5));
1285 76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation Michael Pavone <pavone@retrodev.com> parents: 1278 diff changeset	3191 context->flags \|= FLAG_DMA_RUN;
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3192 return 1;
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3193 } else {
1285 76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation Michael Pavone <pavone@retrodev.com> parents: 1278 diff changeset	3194 context->flags \|= FLAG_DMA_RUN;
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3195 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L]);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3196 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3197 } else {
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	3198 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3199 }
63 a6dd5b7a971b Add FPS counter to console output Mike Pavone <pavone@retrodev.com> parents: 58 diff changeset	3200 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3201 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3202 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3203 context->address = (context->address &0xC000) \| (value & 0x3FFF);
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3204 context->cd = (context->cd & 0x3C) \| (value >> 14);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3205 if ((value & 0xC000) == 0x8000) {
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3206 //Register write
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3207 uint8_t reg = (value >> 8) & 0x1F;
1123 d5412f76accc Fix inactive start line for Mode 4 in vdp_next_hint. Fix an off by one error in the range of registers allowed to be written in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1122 diff changeset	3208 if (reg < (mode_5 ? VDP_REGS : 0xB)) {
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	3209 //printf("register %d set to %X\n", reg, value & 0xFF);
480 0737953132ad Implement HV counter latch Mike Pavone <pavone@retrodev.com> parents: 479 diff changeset	3210 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) {
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3211 vdp_latch_hv(context);
480 0737953132ad Implement HV counter latch Mike Pavone <pavone@retrodev.com> parents: 479 diff changeset	3212 }
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	3213 if (reg == REG_BG_COLOR) {
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	3214 value &= 0x3F;
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	3215 }
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	3216 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3217 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame);
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	3218 }*/
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3219 context->regs[reg] = value;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	3220 if (reg == REG_MODE_4) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	3221 context->double_res = (value & (BIT_INTERLACE \| BIT_DOUBLE_RES)) == (BIT_INTERLACE \| BIT_DOUBLE_RES);
415 8c60c8c09a0f Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode. Mike Pavone <pavone@retrodev.com> parents: 414 diff changeset	3222 if (!context->double_res) {
1106 cacbd3f18f03 Fix field flag handling bug introduced with VDP/render interface cleanup Michael Pavone <pavone@retrodev.com> parents: 1103 diff changeset	3223 context->flags2 &= ~FLAG2_EVEN_FIELD;
415 8c60c8c09a0f Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode. Mike Pavone <pavone@retrodev.com> parents: 414 diff changeset	3224 }
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	3225 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3226 if (reg == REG_MODE_1 \|\| reg == REG_MODE_2 \|\| reg == REG_MODE_4) {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3227 update_video_params(context);
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3228 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3229 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3230 } else if (mode_5) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3231 context->flags \|= FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3232 //Should these be taken care of here or after the second write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3233 //context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3234 //context->flags2 &= ~FLAG2_READ_PENDING;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3235 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3236 context->flags &= ~FLAG_READ_FETCHED;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3237 context->flags2 &= ~FLAG2_READ_PENDING;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3238 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3239 }
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3240 return 0;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3241 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3242
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3243 void vdp_control_port_write_pbc(vdp_context *context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3244 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3245 if (context->flags2 & FLAG2_BYTE_PENDING) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3246 uint16_t full_val = value << 8 \| context->pending_byte;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3247 context->flags2 &= ~FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3248 //TODO: Deal with fact that Vbus->VDP DMA doesn't do anything in PBC mode
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3249 vdp_control_port_write(context, full_val);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3250 if (context->cd == VRAM_READ) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3251 context->cd = VRAM_READ8;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3252 }
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3253 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3254 context->pending_byte = value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3255 context->flags2 \|= FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3256 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3257 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3258
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3259 int vdp_data_port_write(vdp_context * context, uint16_t value)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3260 {
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3261 //printf("data port write: %X at %d\n", value, context->cycles);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	3262 if (context->flags & FLAG_DMA_RUN && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3263 return -1;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3264 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3265 if (context->flags & FLAG_PENDING) {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3266 context->flags &= ~FLAG_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3267 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3268 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3269 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3270 }
109 004dd46e0a97 COmment out fifo full debug printf Mike Pavone <pavone@retrodev.com> parents: 108 diff changeset	3271 /*if (context->fifo_cur == context->fifo_end) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3272 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
109 004dd46e0a97 COmment out fifo full debug printf Mike Pavone <pavone@retrodev.com> parents: 108 diff changeset	3273 }*/
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	3274 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	3275 context->flags &= ~FLAG_DMA_RUN;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	3276 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3277 while (context->fifo_write == context->fifo_read) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3278 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3279 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3280 fifo_entry * cur = context->fifo + context->fifo_write;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3281 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3282 cur->address = context->address;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3283 cur->value = value;
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3284 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3285 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3286 } else {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3287 cur->cd = (context->cd & 2) \| 1;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3288 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3289 cur->partial = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3290 if (context->fifo_read < 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3291 context->fifo_read = context->fifo_write;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3292 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3293 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3294 increment_address(context);
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3295 return 0;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3296 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3297
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3298 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3299 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3300 if (context->flags & FLAG_PENDING) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3301 context->flags &= ~FLAG_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3302 //Should these be cleared here?
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3303 context->flags &= ~FLAG_READ_FETCHED;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3304 context->flags2 &= ~FLAG2_READ_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3305 }
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3306 context->flags2 &= ~FLAG2_BYTE_PENDING;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3307 /*if (context->fifo_cur == context->fifo_end) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3308 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3309 }*/
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	3310 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3311 context->flags &= ~FLAG_DMA_RUN;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3312 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3313 while (context->fifo_write == context->fifo_read) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3314 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3315 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3316 fifo_entry * cur = context->fifo + context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3317 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3318 cur->address = context->address;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3319 cur->value = value;
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3320 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3321 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3322 } else {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3323 cur->cd = (context->cd & 2) \| 1;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3324 }
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	3325 cur->partial = 3;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3326 if (context->fifo_read < 0) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3327 context->fifo_read = context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3328 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3329 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3330 increment_address(context);
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3331 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3332
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3333 void vdp_test_port_write(vdp_context * context, uint16_t value)
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3334 {
1318 bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support Michael Pavone <pavone@retrodev.com> parents: 1315 diff changeset	3335 context->test_port = value;
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3336 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3337
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3338 uint16_t vdp_control_port_read(vdp_context * context)
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3339 {
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3340 context->flags &= ~FLAG_PENDING;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3341 context->flags2 &= ~FLAG2_BYTE_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3342 //Bits 15-10 are not fixed like Charles MacDonald's doc suggests, but instead open bus values that reflect 68K prefetch
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3343 uint16_t value = context->system->get_open_bus_value(context->system) & 0xFC00;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3344 if (context->fifo_read < 0) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3345 value \|= 0x200;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3346 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3347 if (context->fifo_read == context->fifo_write) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3348 value \|= 0x100;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3349 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3350 if (context->flags2 & FLAG2_VINT_PENDING) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	3351 value \|= 0x80;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	3352 }
494 8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	3353 if (context->flags & FLAG_DOT_OFLOW) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	3354 value \|= 0x40;
1156 b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	3355 context->flags &= ~FLAG_DOT_OFLOW;
494 8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	3356 }
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	3357 if (context->flags2 & FLAG2_SPRITE_COLLIDE) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	3358 value \|= 0x20;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	3359 context->flags2 &= ~FLAG2_SPRITE_COLLIDE;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	3360 }
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	3361 if ((context->regs[REG_MODE_4] & BIT_INTERLACE) && !(context->flags2 & FLAG2_EVEN_FIELD)) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	3362 value \|= 0x10;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3363 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3364 uint32_t slot = context->hslot;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3365 if (!is_active(context)) {
318 789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	3366 value \|= 0x8;
789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	3367 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3368 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3369 if (slot < HBLANK_END_H40 \|\| slot > HBLANK_START_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3370 value \|= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3371 }
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3372 } else {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3373 if (slot < HBLANK_END_H32 \|\| slot > HBLANK_START_H32) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3374 value \|= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3375 }
318 789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	3376 }
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	3377 if (context->cd & 0x20) {
141 576f55711d8d Fix DMA in progress flag in VDP status register Mike Pavone <pavone@retrodev.com> parents: 138 diff changeset	3378 value \|= 0x2;
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3379 }
714 e29bc2918f69 Fix VDP status register PAL bit based on observations of the Titan Overdrive demo Michael Pavone <pavone@retrodev.com> parents: 711 diff changeset	3380 if (context->flags2 & FLAG2_REGION_PAL) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3381 value \|= 0x1;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3382 }
459 c49ecf575784 Revert change to VBLANK flag timing based on new direct color DMA test Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	3383 //printf("status read at cycle %d returned %X\n", context->cycles, value);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3384 return value;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3385 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3386
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3387 uint16_t vdp_data_port_read(vdp_context * context)
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3388 {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3389 if (context->flags & FLAG_PENDING) {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3390 context->flags &= ~FLAG_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3391 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3392 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3393 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3394 }
138 aa3e1bb338c9 Fix VDP reads Mike Pavone <pavone@retrodev.com> parents: 137 diff changeset	3395 if (context->cd & 1) {
991 f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes Michael Pavone <pavone@retrodev.com> parents: 984 diff changeset	3396 warning("Read from VDP data port while writes are configured, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3397 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3398 while (!(context->flags & FLAG_READ_FETCHED)) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3399 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3400 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3401 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3402 return context->prefetch;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3403 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3404
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	3405 uint8_t vdp_data_port_read_pbc(vdp_context * context)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	3406 {
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3407 context->flags &= ~(FLAG_PENDING \| FLAG_READ_FETCHED);
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3408 context->flags2 &= ~FLAG2_BYTE_PENDING;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3409
1152 ddbb61be6119 Fix to pass a couple more tests in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1151 diff changeset	3410 context->cd = VRAM_READ8;
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	3411 return context->prefetch;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	3412 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	3413
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3414 uint16_t vdp_test_port_read(vdp_context * context)
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3415 {
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3416 //TODO: Find out what actually gets returned here
1318 bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support Michael Pavone <pavone@retrodev.com> parents: 1315 diff changeset	3417 return context->test_port;
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3418 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3419
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	3420 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction)
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	3421 {
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	3422 context->cycles -= deduction;
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3423 if (context->pending_vint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3424 context->pending_vint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3425 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3426 context->pending_vint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3427 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3428 if (context->pending_hint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3429 context->pending_hint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3430 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3431 context->pending_hint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3432 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3433 if (context->fifo_read >= 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3434 int32_t idx = context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3435 do {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3436 if (context->fifo[idx].cycle >= deduction) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3437 context->fifo[idx].cycle -= deduction;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3438 } else {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3439 context->fifo[idx].cycle = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3440 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3441 idx = (idx+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3442 } while(idx != context->fifo_write);
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	3443 }
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	3444 }
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	3445
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	3446 static uint32_t vdp_cycles_hslot_wrap_h40(vdp_context * context)
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3447 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3448 if (context->hslot < 183) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3449 return MCLKS_LINE - context->hslot * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3450 } else if (context->hslot < HSYNC_END_H40) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3451 uint32_t before_hsync = context->hslot < HSYNC_SLOT_H40 ? (HSYNC_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40 : 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3452 uint32_t hsync = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3453 for (int i = context->hslot <= HSYNC_SLOT_H40 ? 0 : context->hslot - HSYNC_SLOT_H40; i < sizeof(h40_hsync_cycles)/sizeof(uint32_t); i++)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3454 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3455 hsync += h40_hsync_cycles[i];
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3456 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3457 uint32_t after_hsync = (256- HSYNC_END_H40) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3458 return before_hsync + hsync + after_hsync;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3459 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3460 return (256-context->hslot) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3461 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3462 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3463
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	3464 static uint32_t vdp_cycles_next_line(vdp_context * context)
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3465 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3466 if (context->regs[REG_MODE_4] & BIT_H40) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3467 //TODO: Handle "illegal" Mode 4/H40 combo
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	3468 if (context->hslot < LINE_CHANGE_H40) {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 680 diff changeset	3469 return (LINE_CHANGE_H40 - context->hslot) * MCLKS_SLOT_H40;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3470 } else {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3471 return vdp_cycles_hslot_wrap_h40(context) + LINE_CHANGE_H40 * MCLKS_SLOT_H40;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3472 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3473 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3474 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3475 if (context->hslot < LINE_CHANGE_H32) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3476 return (LINE_CHANGE_H32 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3477 } else if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3478 return MCLKS_LINE - (context->hslot - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3479 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3480 return (256-context->hslot + LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3481 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3482 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3483 if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3484 return (148 - context->hslot + LINE_CHANGE_MODE4 - 233) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3485 } else if (context->hslot < LINE_CHANGE_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3486 return (LINE_CHANGE_MODE4 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3487 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3488 return MCLKS_LINE - (context->hslot - LINE_CHANGE_MODE4) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3489 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3490 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3491 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3492 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3493
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3494 static void get_jump_params(vdp_context context, uint32_t jump_start, uint32_t *jump_dst)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3495 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3496 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3497 if (context->flags2 & FLAG2_REGION_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3498 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3499 *jump_start = 0x10B;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3500 *jump_dst = 0x1D2;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3501 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3502 *jump_start = 0x103;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3503 *jump_dst = 0x1CA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3504 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3505 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3506 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3507 *jump_start = 0x100;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3508 *jump_dst = 0x1FA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3509 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3510 *jump_start = 0xEB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3511 *jump_dst = 0x1E5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3512 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3513 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3514 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3515 *jump_start = 0xDB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3516 *jump_dst = 0x1D5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3517 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3518 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3519
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	3520 static uint32_t vdp_cycles_to_line(vdp_context * context, uint32_t target)
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3521 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3522 uint32_t jump_start, jump_dst;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3523 get_jump_params(context, &jump_start, &jump_dst);
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3524 uint32_t lines;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3525 if (context->vcounter < target) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3526 if (target < jump_start \|\| context->vcounter > jump_start) {
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3527 lines = target - context->vcounter;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3528 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3529 lines = jump_start - context->vcounter + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3530 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3531 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3532 if (context->vcounter < jump_start) {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	3533 lines = jump_start - context->vcounter + 512 - jump_dst;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3534 } else {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	3535 lines = 512 - context->vcounter;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3536 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3537 if (target < jump_start) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3538 lines += target;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3539 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3540 lines += jump_start + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3541 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3542 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3543 return MCLKS_LINE * (lines - 1) + vdp_cycles_next_line(context);
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3544 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3545
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	3546 uint32_t vdp_cycles_to_frame_end(vdp_context * context)
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	3547 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3548 return context->cycles + vdp_cycles_to_line(context, context->inactive_start);
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	3549 }
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	3550
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3551 uint32_t vdp_next_hint(vdp_context * context)
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3552 {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3553 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3554 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3555 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3556 if (context->flags2 & FLAG2_HINT_PENDING) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3557 return context->pending_hint_start;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3558 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3559 uint32_t hint_line;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3560 if (context->state != ACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3561 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3562 if (hint_line > context->inactive_start) {
724 2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display Michael Pavone <pavone@retrodev.com> parents: 722 diff changeset	3563 return 0xFFFFFFFF;
2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display Michael Pavone <pavone@retrodev.com> parents: 722 diff changeset	3564 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3565 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3566 hint_line = context->vcounter + context->hint_counter + 1;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3567 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3568 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3569 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3570 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3571 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3572 }
1366 c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	3573 if (hint_line >= context->vcounter) {
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	3574 //Next interrupt is for a line in the next frame that
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	3575 //is higher than the line we're on now so just passing
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	3576 //that line number to vdp_cycles_to_line will yield the wrong
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	3577 //result
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3578 return context->cycles + vdp_cycles_to_line(context, 0) + hint_line * MCLKS_LINE;
1366 c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	3579 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3580 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3581 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3582 uint32_t jump_start, jump_dst;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3583 get_jump_params(context, &jump_start, &jump_dst);
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3584 if (hint_line >= jump_start && context->vcounter < jump_dst) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3585 hint_line = (hint_line + jump_dst - jump_start) & 0x1FF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3586 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3587 if (hint_line < context->vcounter && hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3588 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3589 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3590 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3591 }
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3592 return context->cycles + vdp_cycles_to_line(context, hint_line);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3593 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3594
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3595 static uint32_t vdp_next_vint_real(vdp_context * context)
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3596 {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3597 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3598 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3599 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3600 if (context->flags2 & FLAG2_VINT_PENDING) {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3601 return context->pending_vint_start;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3602 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3603
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3604
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3605 return vdp_next_vint_z80(context);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3606 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3607
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3608 uint32_t vdp_next_vint(vdp_context *context)
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3609 {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3610 uint32_t ret = vdp_next_vint_real(context);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3611 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3612 static uint32_t last = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3613 if (last != ret) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3614 printf("vdp_next_vint is %d at frame %d, line %d, hslot %d\n", ret, context->frame, context->vcounter, context->hslot);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3615 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3616 last = ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3617 #endif
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3618 return ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3619 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3620
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	3621 uint32_t vdp_next_vint_z80(vdp_context * context)
f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	3622 {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3623 uint16_t vint_line = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->inactive_start : context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3624 if (context->vcounter == vint_line) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3625 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3626 if (context->regs[REG_MODE_4] & BIT_H40) {
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3627 if (context->hslot >= LINE_CHANGE_H40 \|\| context->hslot <= VINT_SLOT_H40) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3628 uint32_t cycles = context->cycles;
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3629 if (context->hslot >= LINE_CHANGE_H40) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3630 if (context->hslot < 183) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3631 cycles += (183 - context->hslot) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3632 }
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3633
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3634 if (context->hslot < HSYNC_SLOT_H40) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3635 cycles += (HSYNC_SLOT_H40 - (context->hslot >= 229 ? context->hslot : 229)) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3636 }
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3637 for (int slot = context->hslot <= HSYNC_SLOT_H40 ? HSYNC_SLOT_H40 : context->hslot; slot < HSYNC_END_H40; slot++ )
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3638 {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3639 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3640 }
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3641 cycles += (256 - (context->hslot > HSYNC_END_H40 ? context->hslot : HSYNC_END_H40)) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3642 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3643
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3644 cycles += (VINT_SLOT_H40 - (context->hslot >= LINE_CHANGE_H40 ? 0 : context->hslot)) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3645 return cycles;
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	3646 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3647 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	3648 if (context->hslot >= LINE_CHANGE_H32 \|\| context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	3649 if (context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	3650 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32;
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	3651 } else if (context->hslot < 233) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	3652 return context->cycles + (VINT_SLOT_H32 + 256 - 233 + 148 - context->hslot) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3653 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	3654 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3655 }
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	3656 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3657 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3658 } else {
1177 67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency Michael Pavone <pavone@retrodev.com> parents: 1175 diff changeset	3659 if (context->hslot >= LINE_CHANGE_MODE4) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3660 return context->cycles + (VINT_SLOT_MODE4 + 256 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3661 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3662 if (context->hslot <= VINT_SLOT_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3663 return context->cycles + (VINT_SLOT_MODE4 - context->hslot) * MCLKS_SLOT_H32;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3664 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3665 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3666 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3667 int32_t cycles_to_vint = vdp_cycles_to_line(context, vint_line);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3668 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3669 if (context->regs[REG_MODE_4] & BIT_H40) {
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	3670 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3671 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	3672 cycles_to_vint += (VINT_SLOT_H32 + 256 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3673 }
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	3674 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3675 cycles_to_vint += (256 - LINE_CHANGE_MODE4 + VINT_SLOT_MODE4) * MCLKS_SLOT_H32;
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	3676 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	3677 return context->cycles + cycles_to_vint;
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	3678 }
f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	3679
1377 e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3680 uint32_t vdp_next_nmi(vdp_context *context)
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3681 {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3682 if (!(context->flags2 & FLAG2_PAUSE)) {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3683 return 0xFFFFFFFF;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3684 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3685 return context->cycles + vdp_cycles_to_line(context, 0x1FF);
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3686 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3687
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3688 void vdp_pbc_pause(vdp_context *context)
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3689 {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3690 context->flags2 \|= FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3691 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	3692
953 08346262990b Remove the int number argument to vdp_int_ack since it is no longer used Michael Pavone <pavone@retrodev.com> parents: 952 diff changeset	3693 void vdp_int_ack(vdp_context * context)
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3694 {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3695 //CPU interrupt acknowledge is only used in Mode 5
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3696 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3697 //Apparently the VDP interrupt controller is not very smart
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3698 //Instead of paying attention to what interrupt is being acknowledged it just
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3699 //clears the pending flag for whatever interrupt it is currently asserted
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3700 //which may be different from the interrupt it was asserting when the 68k
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3701 //started the interrupt process. The window for this is narrow and depends
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3702 //on the latency between the int enable register write and the interrupt being
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3703 //asserted, but Fatal Rewind depends on this due to some buggy code
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3704 if ((context->flags2 & FLAG2_VINT_PENDING) && (context->regs[REG_MODE_2] & BIT_VINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3705 context->flags2 &= ~FLAG2_VINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3706 } else if((context->flags2 & FLAG2_HINT_PENDING) && (context->regs[REG_MODE_1] & BIT_HINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3707 context->flags2 &= ~FLAG2_HINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3708 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3709 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3710 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	3711
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3712 void vdp_serialize(vdp_context context, serialize_buffer buf)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3713 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3714 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3715 save_buffer8(buf, context->vdpmem, VRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3716 save_buffer16(buf, context->cram, CRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3717 save_buffer16(buf, context->vsram, VSRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3718 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3719 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3720 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3721 save_int8(buf, context->regs[i]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3722 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3723 save_int32(buf, context->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3724 save_int32(buf, context->serial_address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3725 save_int8(buf, context->cd);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3726 uint8_t fifo_size;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3727 if (context->fifo_read < 0) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3728 fifo_size = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3729 } else if (context->fifo_write > context->fifo_read) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3730 fifo_size = context->fifo_write - context->fifo_read;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3731 } else {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3732 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3733 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3734 save_int8(buf, fifo_size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3735 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3736 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3737 fifo_entry *entry = context->fifo + cur;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3738 cur = (cur + 1) & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3739 save_int32(buf, entry->cycle);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3740 save_int32(buf, entry->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3741 save_int16(buf, entry->value);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3742 save_int8(buf, entry->cd);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3743 save_int8(buf, entry->partial);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3744 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3745 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3746 save_int16(buf, context->flags2 << 8 \| context->flags);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3747 save_int32(buf, context->frame);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3748 save_int16(buf, context->vcounter);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3749 save_int8(buf, context->hslot);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3750 save_int16(buf, context->hv_latch);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3751 save_int8(buf, context->state);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3752 save_int16(buf, context->hscroll_a);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3753 save_int16(buf, context->hscroll_b);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3754 save_int16(buf, context->vscroll_latch[0]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3755 save_int16(buf, context->vscroll_latch[1]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3756 save_int16(buf, context->col_1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3757 save_int16(buf, context->col_2);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3758 save_int16(buf, context->test_port);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3759 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3760 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3761 save_int8(buf, context->buf_a_off);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3762 save_int8(buf, context->buf_b_off);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3763 //FIXME: Sprite rendering state is currently a mess
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3764 save_int8(buf, context->sprite_index);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3765 save_int8(buf, context->sprite_draws);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3766 save_int8(buf, context->slot_counter);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3767 save_int8(buf, context->cur_slot);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3768 for (int i = 0; i < MAX_DRAWS; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3769 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3770 sprite_draw *draw = context->sprite_draw_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3771 save_int16(buf, draw->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3772 save_int16(buf, draw->x_pos);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3773 save_int8(buf, draw->pal_priority);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3774 save_int8(buf, draw->h_flip);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3775 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3776 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3777 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3778 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3779 save_int8(buf, info->size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3780 save_int8(buf, info->index);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3781 save_int16(buf, info->y);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3782 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3783 save_buffer8(buf, context->linebuf, LINEBUF_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3784
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3785 save_int32(buf, context->cycles);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3786 save_int32(buf, context->pending_vint_start);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3787 save_int32(buf, context->pending_hint_start);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3788 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3789
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3790 void vdp_deserialize(deserialize_buffer buf, void vcontext)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3791 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3792 vdp_context *context = vcontext;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3793 uint8_t vramk = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3794 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3795 if ((vramk * 1024) > VRAM_SIZE) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3796 buf->cur_pos += (vramk * 1024) - VRAM_SIZE;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3797 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3798 load_buffer16(buf, context->cram, CRAM_SIZE);
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	3799 for (int i = 0; i < CRAM_SIZE; i++)
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	3800 {
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	3801 update_color_map(context, i, context->cram[i]);
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	3802 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3803 load_buffer16(buf, context->vsram, VSRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3804 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3805 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3806 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3807 context->regs[i] = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3808 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3809 context->address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3810 context->serial_address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3811 context->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3812 uint8_t fifo_size = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3813 if (fifo_size > FIFO_SIZE) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3814 fatal_error("Invalid fifo size %d", fifo_size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3815 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3816 if (fifo_size) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3817 context->fifo_read = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3818 context->fifo_write = fifo_size & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3819 for (int i = 0; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3820 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3821 fifo_entry *entry = context->fifo + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3822 entry->cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3823 entry->address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3824 entry->value = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3825 entry->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3826 entry->partial = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3827 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3828 } else {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3829 context->fifo_read = -1;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3830 context->fifo_write = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3831 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3832 uint16_t flags = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3833 context->flags2 = flags >> 8;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3834 context->flags = flags;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3835 context->frame = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3836 context->vcounter = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3837 context->hslot = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3838 context->hv_latch = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3839 context->state = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3840 context->hscroll_a = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3841 context->hscroll_b = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3842 context->vscroll_latch[0] = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3843 context->vscroll_latch[1] = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3844 context->col_1 = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3845 context->col_2 = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3846 context->test_port = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3847 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3848 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3849 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3850 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3851 context->sprite_index = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3852 context->sprite_draws = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3853 context->slot_counter = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3854 context->cur_slot = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3855 for (int i = 0; i < MAX_DRAWS; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3856 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3857 sprite_draw *draw = context->sprite_draw_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3858 draw->address = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3859 draw->x_pos = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3860 draw->pal_priority = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3861 draw->h_flip = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3862 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3863 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3864 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3865 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3866 info->size = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3867 info->index = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3868 info->y = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3869 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3870 load_buffer8(buf, context->linebuf, LINEBUF_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3871
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3872 context->cycles = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3873 context->pending_vint_start = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3874 context->pending_hint_start = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3875 update_video_params(context);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	3876 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3877
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3878 void vdp_toggle_debug_view(vdp_context *context, uint8_t debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3879 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3880 if (context->enabled_debuggers & 1 << debug_type) {
1642 c6b2c0f8cc61 Implemented support for toggling off a debug view Michael Pavone <pavone@retrodev.com> parents: 1641 diff changeset	3881 render_destroy_window(context->debug_fb_indices[debug_type]);
c6b2c0f8cc61 Implemented support for toggling off a debug view Michael Pavone <pavone@retrodev.com> parents: 1641 diff changeset	3882 context->enabled_debuggers &= ~(1 << debug_type);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3883 } else {
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	3884 uint32_t width,height;
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3885 uint8_t fetch_immediately = 0;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3886 char *caption;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3887 switch(debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3888 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3889 case VDP_DEBUG_PLANE:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3890 caption = "BlastEm - VDP Plane Debugger";
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	3891 width = height = 1024;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	3892 break;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	3893 case VDP_DEBUG_VRAM:
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	3894 caption = "BlastEm - VDP VRAM Debugger";
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	3895 width = 1024;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	3896 height = 512;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3897 break;
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3898 case VDP_DEBUG_CRAM:
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3899 caption = "BlastEm - VDP CRAM Debugger";
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3900 width = 512;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3901 height = 512;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3902 fetch_immediately = 1;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3903 break;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	3904 case VDP_DEBUG_COMPOSITE:
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	3905 caption = "BlastEm - VDP Plane Composition Debugger";
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	3906 width = LINEBUF_SIZE;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	3907 height = context->inactive_start + context->border_top + context->border_bot;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	3908 fetch_immediately = 1;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	3909 break;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3910 default:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3911 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3912 }
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	3913 context->debug_fb_indices[debug_type] = render_create_window(caption, width, height);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3914 if (context->debug_fb_indices[debug_type]) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3915 context->enabled_debuggers \|= 1 << debug_type;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3916 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3917 if (fetch_immediately) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3918 context->debug_fbs[debug_type] = render_get_framebuffer(context->debug_fb_indices[debug_type], &context->debug_fb_pitch[debug_type]);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	3919 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3920 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3921 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3922
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3923 void vdp_inc_debug_mode(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3924 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3925 uint8_t active = render_get_active_framebuffer();
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3926 if (active < FRAMEBUFFER_USER_START) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3927 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3928 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3929 for (int i = 0; i < VDP_NUM_DEBUG_TYPES; i++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3930 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3931 if (context->enabled_debuggers & (1 << i) && context->debug_fb_indices[i] == active) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3932 context->debug_modes[i]++;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3933 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3934 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3935 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	3936 }

Mercurial > repos > blastem

annotate vdp.c @ 1644:cf4e387a8db6