repos/blastem: vdp.c annotate

annotate vdp.c @ 2227:eaaf28af3c94

Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM

author	Michael Pavone <pavone@retrodev.com>
date	Mon, 05 Sep 2022 22:18:25 -0700
parents	1cccc57c069a
children	3888c7ed4e36

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	2 Copyright 2013 Michael Pavone
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	5 */
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "vdp.h"
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	7 #include "blastem.h"
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	8 #include <stdlib.h>
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #include <string.h>
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	10 #include "render.h"
991 f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes Michael Pavone <pavone@retrodev.com> parents: 984 diff changeset	11 #include "util.h"
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	12 #include "event_log.h"
2009 4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	13 #include "terminal.h"
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	14
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	15 #define NTSC_INACTIVE_START 224
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	16 #define PAL_INACTIVE_START 240
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	17 #define MODE4_INACTIVE_START 192
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	18 #define BUF_BIT_PRIORITY 0x40
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	19 #define MAP_BIT_PRIORITY 0x8000
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	20 #define MAP_BIT_H_FLIP 0x800
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	21 #define MAP_BIT_V_FLIP 0x1000
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	22
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	23 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1)
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	24 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2)
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	25
328 bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	26 #define MCLKS_SLOT_H40 16
bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	27 #define MCLKS_SLOT_H32 20
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	28 #define VINT_SLOT_H40 0 //21 slots before HSYNC, 16 during, 10 after
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	29 #define VINT_SLOT_H32 0 //old value was 23, but recent tests suggest the actual value is close to the H40 one
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	30 #define VINT_SLOT_MODE4 4
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	31 #define HSYNC_SLOT_H40 230
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 680 diff changeset	32 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17)
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	33 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	34 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	35 #define HBLANK_START_H32 233 //should be 147 according to Nemesis which is very different from my test ROM result
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	36 #define HBLANK_END_H32 0 //should be 5 according to Nemesis, but 0 seems to fit better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	37 #define LINE_CHANGE_H40 165
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	38 #define LINE_CHANGE_H32 133
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	39 #define LINE_CHANGE_MODE4 249
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	40 #define VBLANK_START_H40 (LINE_CHANGE_H40+2)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	41 #define VBLANK_START_H32 (LINE_CHANGE_H32+2)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	42 #define FIFO_LATENCY 3
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	43 #define READ_LATENCY 3
328 bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	44
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	45 #define BORDER_TOP_V24 27
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	46 #define BORDER_TOP_V28 11
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	47 #define BORDER_TOP_V24_PAL 54
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	48 #define BORDER_TOP_V28_PAL 38
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	49 #define BORDER_TOP_V30_PAL 30
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	50
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	51 #define BORDER_BOT_V24 24
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	52 #define BORDER_BOT_V28 8
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	53 #define BORDER_BOT_V24_PAL 48
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	54 #define BORDER_BOT_V28_PAL 32
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	55 #define BORDER_BOT_V30_PAL 24
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	56
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	57 enum {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	58 INACTIVE = 0,
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	59 PREPARING, //used for line 0x1FF
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	60 ACTIVE
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	61 };
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	62
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	63 static int32_t color_map[1 << 12];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	64 static uint16_t mode4_address_map[0x4000];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	65 static uint32_t planar_to_chunky[256];
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	66 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255};
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	67
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	68 static uint8_t debug_base[][3] = {
437 afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	69 {127, 127, 127}, //BG
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	70 {0, 0, 127}, //A
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	71 {127, 0, 0}, //Window
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	72 {0, 127, 0}, //B
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	73 {127, 0, 127} //Sprites
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	74 };
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	75
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	76 static uint32_t calc_crop(uint32_t crop, uint32_t border)
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	77 {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	78 return crop >= border ? 0 : border - crop;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	79 }
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	80
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	81 static void update_video_params(vdp_context *context)
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	82 {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	83 uint32_t top_crop = render_overscan_top();
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	84 uint32_t bot_crop = render_overscan_bot();
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	85 uint32_t border_top;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	86 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	87 if (context->regs[REG_MODE_2] & BIT_PAL) {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	88 if (context->flags2 & FLAG2_REGION_PAL) {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	89 context->inactive_start = PAL_INACTIVE_START;
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	90 border_top = BORDER_TOP_V30_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	91 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V30_PAL);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	92 } else {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	93 //the behavior here is rather weird and needs more investigation
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	94 context->inactive_start = 0xF0;
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	95 border_top = 1;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	96 context->border_bot = calc_crop(bot_crop, 3);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	97 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	98 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	99 context->inactive_start = NTSC_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	100 if (context->flags2 & FLAG2_REGION_PAL) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	101 border_top = BORDER_TOP_V28_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	102 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28_PAL);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	103 } else {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	104 border_top = BORDER_TOP_V28;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	105 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	106 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	107 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	108 if (context->regs[REG_MODE_4] & BIT_H40) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	109 context->max_sprites_frame = MAX_SPRITES_FRAME;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	110 context->max_sprites_line = MAX_SPRITES_LINE;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	111 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	112 context->max_sprites_frame = MAX_SPRITES_FRAME_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	113 context->max_sprites_line = MAX_SPRITES_LINE_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	114 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	115 if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	116 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	117 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	118 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	119 } else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	120 context->state = PREPARING;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	121 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	122 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	123 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	124 context->inactive_start = MODE4_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	125 if (context->flags2 & FLAG2_REGION_PAL) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	126 border_top = BORDER_TOP_V24_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	127 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24_PAL);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	128 } else {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	129 border_top = BORDER_TOP_V24;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	130 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	131 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	132 if (!(context->regs[REG_MODE_1] & BIT_MODE_4)){
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	133 context->state = INACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	134 } else if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	135 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	136 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	137 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	138 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	139 else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	140 context->state = PREPARING;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	141 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	142 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	143 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	144 context->border_top = calc_crop(top_crop, border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	145 context->top_offset = border_top - context->border_top;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	146 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	147
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	148 static uint8_t color_map_init_done;
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	149
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	150 vdp_context *init_vdp_context(uint8_t region_pal, uint8_t has_max_vsram, uint8_t type)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	151 {
1640 3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers Michael Pavone <pavone@retrodev.com> parents: 1639 diff changeset	152 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	153 if (headless) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	154 context->fb = malloc(512 * LINEBUF_SIZE * sizeof(uint32_t));
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	155 context->output_pitch = LINEBUF_SIZE * sizeof(uint32_t);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	156 } else {
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	157 context->cur_buffer = FRAMEBUFFER_ODD;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	158 context->fb = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	159 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	160 context->sprite_draws = MAX_SPRITES_LINE;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	161 context->fifo_write = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	162 context->fifo_read = -1;
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	163 context->regs[REG_HINT] = context->hint_counter = 0xFF;
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	164 context->vsram_size = has_max_vsram ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE;
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	165 context->type = type;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	166
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	167 if (!color_map_init_done) {
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	168 uint8_t b,g,r;
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	169 for (uint16_t color = 0; color < (1 << 12); color++) {
2199 6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	170 if (type == VDP_GAMEGEAR) {
6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	171 b = (color >> 8 & 0xF) * 0x11;
6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	172 g = (color >> 4 & 0xF) * 0x11;
6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	173 r = (color & 0xF) * 0x11;
6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	174 }else if (color & FBUF_SHADOW) {
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	175 b = levels[(color >> 9) & 0x7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	176 g = levels[(color >> 5) & 0x7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	177 r = levels[(color >> 1) & 0x7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	178 } else if(color & FBUF_HILIGHT) {
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	179 b = levels[((color >> 9) & 0x7) + 7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	180 g = levels[((color >> 5) & 0x7) + 7];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	181 r = levels[((color >> 1) & 0x7) + 7];
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	182 } else if(color & FBUF_MODE4) {
2199 6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	183 //TODO: Mode 4 has a separate DAC tap so this isn't quite correct
6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	184 b = levels[(color >> 4 & 0xC) \| (color >> 6 & 0x2)];
6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	185 g = levels[(color >> 2 & 0x8) \| (color >> 1 & 0x4) \| (color >> 4 & 0x2)];
6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	186 r = levels[(color << 1 & 0xC) \| (color >> 1 & 0x2)];
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	187 } else {
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	188 b = levels[(color >> 8) & 0xE];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	189 g = levels[(color >> 4) & 0xE];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	190 r = levels[color & 0xE];
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	191 }
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	192 color_map[color] = render_map_color(r, g, b);
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	193 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	194 for (uint16_t mode4_addr = 0; mode4_addr < 0x4000; mode4_addr++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	195 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	196 uint16_t mode5_addr = mode4_addr & 0x3DFD;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	197 mode5_addr \|= mode4_addr << 8 & 0x200;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	198 mode5_addr \|= mode4_addr >> 8 & 2;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	199 mode4_address_map[mode4_addr] = mode5_addr;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	200 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	201 for (uint32_t planar = 0; planar < 256; planar++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	202 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	203 uint32_t chunky = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	204 for (int bit = 7; bit >= 0; bit--)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	205 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	206 chunky = chunky << 4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	207 chunky \|= planar >> bit & 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	208 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	209 planar_to_chunky[planar] = chunky;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	210 }
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	211 color_map_init_done = 1;
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	212 }
437 afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	213 for (uint8_t color = 0; color < (1 << (3 + 1 + 1 + 1)); color++)
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	214 {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	215 uint8_t src = color & DBG_SRC_MASK;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	216 if (src > DBG_SRC_S) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	217 context->debugcolors[color] = 0;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	218 } else {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	219 uint8_t r,g,b;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	220 b = debug_base[src][0];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	221 g = debug_base[src][1];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	222 r = debug_base[src][2];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	223 if (color & DBG_PRIORITY)
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	224 {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	225 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	226 b += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	227 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	228 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	229 g += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	230 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	231 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	232 r += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	233 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	234 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	235 if (color & DBG_SHADOW) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	236 b /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	237 g /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	238 r /=2 ;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	239 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	240 if (color & DBG_HILIGHT) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	241 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	242 b += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	243 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	244 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	245 g += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	246 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	247 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	248 r += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	249 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	250 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	251 context->debugcolors[color] = render_map_color(r, g, b);
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	252 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	253 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	254 if (region_pal) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	255 context->flags2 \|= FLAG2_REGION_PAL;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	256 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	257 update_video_params(context);
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	258 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * context->border_top);
1640 3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers Michael Pavone <pavone@retrodev.com> parents: 1639 diff changeset	259 return context;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	260 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	261
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	262 void vdp_free(vdp_context *context)
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	263 {
2030 bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	264 if (headless) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	265 free(context->fb);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	266 }
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	267 for (int i = 0; i < VDP_NUM_DEBUG_TYPES; i++)
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	268 {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	269 if (context->enabled_debuggers & (1 << i)) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	270 vdp_toggle_debug_view(context, i);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	271 }
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	272 }
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	273 free(context);
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	274 }
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	275
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	276 static int is_refresh(vdp_context * context, uint32_t slot)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	277 {
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	278 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	279 return slot == 250 \|\| slot == 26 \|\| slot == 59 \|\| slot == 90 \|\| slot == 122 \|\| slot == 154;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	280 } else {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	281 //TODO: Figure out which slots are refresh when display is off in 32-cell mode
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	282 //These numbers are guesses based on H40 numbers
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	283 return slot == 243 \|\| slot == 19 \|\| slot == 51 \|\| slot == 83 \|\| slot == 115;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	284 //The numbers below are the refresh slots during active display
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	285 //return (slot == 29 \|\| slot == 61 \|\| slot == 93 \|\| slot == 125);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	286 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	287 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	288
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	289 static void increment_address(vdp_context *context)
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	290 {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	291 context->address += context->regs[REG_AUTOINC];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	292 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	293 context->address++;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	294 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	295 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	296
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	297 static void render_sprite_cells(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	298 {
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	299 if (context->cur_slot > MAX_SPRITES_LINE) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	300 context->cur_slot--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	301 return;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	302 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	303 if (context->cur_slot < 0) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	304 return;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	305 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	306 sprite_draw * d = context->sprite_draw_list + context->cur_slot;
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	307 uint16_t address = d->address;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	308 address += context->sprite_x_offset * d->height * 4;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	309 context->serial_address = address;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	310 uint16_t dir;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	311 int16_t x;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	312 if (d->h_flip) {
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	313 x = d->x_pos + 7 + 8 * (d->width - context->sprite_x_offset - 1);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	314 dir = -1;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	315 } else {
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	316 x = d->x_pos + context->sprite_x_offset * 8;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	317 dir = 1;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	318 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	319 if (d->x_pos) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	320 context->flags \|= FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	321 if (!(context->flags & FLAG_MASKED)) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	322 x -= 128;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	323 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x);
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	324 uint8_t collide = 0;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	325 if (x >= 8 && x < 312) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	326 //sprite is fully visible
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	327 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	328 uint8_t pixel = context->vdpmem[address] >> 4;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	329 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	330 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	331 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	332 collide \|= pixel;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	333 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	334 x += dir;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	335 pixel = context->vdpmem[address] & 0xF;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	336 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	337 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	338 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	339 collide \|= pixel;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	340 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	341 x += dir;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	342 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	343 } else if (x > -8 && x < 327) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	344 //sprite is partially visible
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	345 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	346 if (x >= 0 && x < 320) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	347 uint8_t pixel = context->vdpmem[address] >> 4;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	348 if (!(context->linebuf[x] & 0xF)) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	349 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	350 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	351 collide \|= pixel;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	352 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	353 }
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	354 x += dir;
b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	355 if (x >= 0 && x < 320) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	356 uint8_t pixel = context->vdpmem[address] & 0xF;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	357 if (!(context->linebuf[x] & 0xF)) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	358 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	359 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	360 collide \|= pixel;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	361 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	362 }
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	363 x += dir;
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	364 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	365 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	366 if (collide) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	367 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	368 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	369 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	370 } else if (context->flags & FLAG_CAN_MASK) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	371 context->flags \|= FLAG_MASKED;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	372 context->flags &= ~FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	373 }
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	374
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	375 context->sprite_x_offset++;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	376 if (context->sprite_x_offset == d->width) {
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	377 d->x_pos = 0;
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	378 context->sprite_x_offset = 0;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	379 context->cur_slot--;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	380 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	381 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	382
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	383 static void fetch_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	384 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	385 if (context->sprite_index >= context->sprite_draws) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	386 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	387 uint32_t address = mode4_address_map[d->address & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	388 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	389 context->fetch_tmp[1] = context->vdpmem[address + 1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	390 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	391 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	392
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	393 static void render_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	394 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	395 if (context->sprite_index >= context->sprite_draws) {
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	396 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	397 if (context->type == VDP_SMS && context->sprite_index < 4) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	398 zoom = 0;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	399 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	400 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	401 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	402 pixels \|= planar_to_chunky[context->fetch_tmp[1]];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	403 uint32_t address = mode4_address_map[(d->address + 2) & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	404 pixels \|= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	405 pixels \|= planar_to_chunky[context->vdpmem[address + 1]] << 2;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	406 int x = d->x_pos & 0xFF;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	407 for (int i = 28; i >= 0; i -= 4, x++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	408 {
1155 da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	409 if (context->linebuf[x] && (pixels >> i & 0xF)) {
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	410 if (
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	411 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	412 \|\| ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	413 ) {
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	414 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	415 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	416 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	417 context->linebuf[x] = pixels >> i & 0xF;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	418 }
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	419 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	420 x++;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	421 if (context->linebuf[x] && (pixels >> i & 0xF)) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	422 if (
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	423 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	424 \|\| ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	425 ) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	426 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	427 }
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	428 } else {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	429 context->linebuf[x] = pixels >> i & 0xF;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	430 }
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	431 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	432 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	433 context->sprite_index--;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	434 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	435 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	436
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	437 static uint32_t mode5_sat_address(vdp_context *context)
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	438 {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	439 uint32_t addr = context->regs[REG_SAT] << 9;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	440 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	441 addr &= 0xFFFF;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	442 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	443 if (context->regs[REG_MODE_4] & BIT_H40) {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	444 addr &= 0x1FC00;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	445 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	446 return addr;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	447 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	448
322 8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	449 void vdp_print_sprite_table(vdp_context * context)
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	450 {
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	451 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	452 uint16_t sat_address = mode5_sat_address(context);
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	453 uint16_t current_index = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	454 uint8_t count = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	455 do {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	456 uint16_t address = current_index * 8 + sat_address;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	457 uint16_t cache_address = current_index * 4;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	458 uint8_t height = ((context->sat_cache[cache_address+2] & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	459 uint8_t width = (((context->sat_cache[cache_address+2] >> 2) & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	460 int16_t y = ((context->sat_cache[cache_address] & 0x3) << 8 \| context->sat_cache[cache_address+1]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	461 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 \| context->vdpmem[address + 7]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	462 uint16_t link = context->sat_cache[cache_address+3] & 0x7F;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	463 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	464 uint8_t pri = context->vdpmem[address + 4] >> 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	465 uint16_t pattern = ((context->vdpmem[address + 4] << 8 \| context->vdpmem[address + 5]) & 0x7FF) << 5;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	466 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	467 current_index = link;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	468 count++;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	469 } while (current_index != 0 && count < 80);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	470 } else {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	471 uint16_t sat_address = (context->regs[REG_SAT] & 0x7E) << 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	472 for (int i = 0; i < 64; i++)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	473 {
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	474 uint8_t y = context->vdpmem[mode4_address_map[sat_address + (i ^ 1)]];
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	475 if (y == 0xD0) {
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	476 break;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	477 }
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	478 uint8_t x = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2 + 1]];
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	479 uint16_t tile_address = context->vdpmem[mode4_address_map[sat_address + 0x80 + i2]] 32
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	480 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	481 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	482 tile_address &= ~32;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	483 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	484 printf("Sprite %d: X=%d, Y=%d, Pat=%X\n", i, x, y, tile_address);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	485 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	486 }
322 8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	487 }
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	488
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	489 #define VRAM_READ 0 //0000
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	490 #define VRAM_WRITE 1 //0001
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	491 //2 would trigger register write 0010
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	492 #define CRAM_WRITE 3 //0011
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	493 #define VSRAM_READ 4 //0100
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	494 #define VSRAM_WRITE 5//0101
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	495 //6 would trigger regsiter write 0110
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	496 //7 is a mystery //0111
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	497 #define CRAM_READ 8 //1000
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	498 //9 is also a mystery //1001
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	499 //A would trigger register write 1010
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	500 //B is a mystery 1011
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	501 #define VRAM_READ8 0xC //1100
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	502 //D is a mystery 1101
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	503 //E would trigger register write 1110
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	504 //F is a mystery 1111
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	505
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	506 //Possible theory on how bits work
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	507 //CD0 = Read/Write flag
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	508 //CD2,(CD1\|CD3) = RAM type
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	509 // 00 = VRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	510 // 01 = CRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	511 // 10 = VSRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	512 // 11 = VRAM8
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	513 //Would result in
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	514 // 7 = VRAM8 write
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	515 // 9 = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	516 // B = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	517 // D = VRAM8 write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	518 // F = VRAM8 write alais
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	519
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	520 #define DMA_START 0x20
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	521
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	522 static const char * cd_name(uint8_t cd)
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	523 {
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	524 switch (cd & 0xF)
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	525 {
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	526 case VRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	527 return "VRAM read";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	528 case VRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	529 return "VRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	530 case CRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	531 return "CRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	532 case VSRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	533 return "VSRAM read";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	534 case VSRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	535 return "VSRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	536 case VRAM_READ8:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	537 return "VRAM read (undocumented 8-bit mode)";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	538 default:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	539 return "invalid";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	540 }
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	541 }
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	542
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	543 void vdp_print_reg_explain(vdp_context * context)
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	544 {
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	545 char * hscroll[] = {"full", "7-line", "cell", "line"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	546 printf("Mode Group\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	547 "00: %.2X \| H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n"
1331 9bba5ff5beb8 Add 128K VRAM bit to VDP register print in debugger Michael Pavone <pavone@retrodev.com> parents: 1325 diff changeset	548 "01: %.2X \| Display %s, V-ints %s, Height: %d, Mode %d, %dK VRAM\n"
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	549 "0B: %.2X \| E-ints %s, V-Scroll: %s, H-Scroll: %s\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	550 "0C: %.2X \| Width: %d, Shadow/Highlight: %s\n",
757 483f7e7926a6 More clang warning cleanup Michael Pavone <pavone@retrodev.com> parents: 748 diff changeset	551 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0,
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	552 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled",
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	553 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled",
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	554 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, context->regs[REG_MODE_1] & BIT_128K_VRAM ? 128 : 64,
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	555 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full",
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	556 hscroll[context->regs[REG_MODE_3] & 0x3],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	557 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled");
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	558 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	559 printf("\nTable Group\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	560 "02: %.2X \| Scroll A Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	561 "03: %.2X \| Window Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	562 "04: %.2X \| Scroll B Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	563 "05: %.2X \| Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	564 "0D: %.2X \| HScroll Data Table: $%.4X\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	565 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	566 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	567 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13,
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	568 context->regs[REG_SAT], mode5_sat_address(context),
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	569 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	570 } else {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	571 printf("\nTable Group\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	572 "02: %.2X \| Background Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	573 "05: %.2X \| Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	574 "06: %.2X \| Sprite Tile Base: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	575 "08: %.2X \| Background X Scroll: %d\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	576 "09: %.2X \| Background Y Scroll: %d\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	577 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0xE) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	578 context->regs[REG_SAT], (context->regs[REG_SAT] & 0x7E) << 7,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	579 context->regs[REG_STILE_BASE], (context->regs[REG_STILE_BASE] & 2) << 11,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	580 context->regs[REG_X_SCROLL], context->regs[REG_X_SCROLL],
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	581 context->regs[REG_Y_SCROLL], context->regs[REG_Y_SCROLL]);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	582
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	583 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	584 char * sizes[] = {"32", "64", "invalid", "128"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	585 printf("\nMisc Group\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	586 "07: %.2X \| Backdrop Color: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	587 "0A: %.2X \| H-Int Counter: %u\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	588 "0F: %.2X \| Auto-increment: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	589 "10: %.2X \| Scroll A/B Size: %sx%s\n",
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	590 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR],
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	591 context->regs[REG_HINT], context->regs[REG_HINT],
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	592 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	593 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]);
621 5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	594 char * src_types[] = {"68K", "68K", "Copy", "Fill"};
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	595 printf("\nDMA Group\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	596 "13: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	597 "14: %.2X \| DMA Length: $%.4X words\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	598 "15: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	599 "16: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	600 "17: %.2X \| DMA Source Address: $%.6X, Type: %s\n",
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	601 context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	602 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 \| context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	603 context->regs[REG_DMASRC_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	604 context->regs[REG_DMASRC_M],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	605 context->regs[REG_DMASRC_H],
629 9089951a1994 Small fix to display of DMA source address in vr debug command Michael Pavone <pavone@retrodev.com> parents: 624 diff changeset	606 context->regs[REG_DMASRC_H] << 17 \| context->regs[REG_DMASRC_M] << 9 \| context->regs[REG_DMASRC_L] << 1,
621 5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	607 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]);
1628 3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	608 uint8_t old_flags = context->flags;
3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	609 uint8_t old_flags2 = context->flags2;
438 b3cee2fe690b Add address/cd registers to VDP debug message Mike Pavone <pavone@retrodev.com> parents: 437 diff changeset	610 printf("\nInternal Group\n"
b3cee2fe690b Add address/cd registers to VDP debug message Mike Pavone <pavone@retrodev.com> parents: 437 diff changeset	611 "Address: %X\n"
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	612 "CD: %X - %s\n"
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	613 "Pending: %s\n"
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	614 "VCounter: %d\n"
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	615 "HCounter: %d\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	616 "VINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	617 "HINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	618 "Status: %X\n",
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	619 context->address, context->cd, cd_name(context->cd),
1150 322d28e6f13c Display both byte and word pending values to better reflect VDP pending state in PBC mode Michael Pavone <pavone@retrodev.com> parents: 1149 diff changeset	620 (context->flags & FLAG_PENDING) ? "word" : (context->flags2 & FLAG2_BYTE_PENDING) ? "byte" : "none",
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	621 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false",
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	622 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_control_port_read(context));
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	623 printf("\nDebug Register: %X \| Output disabled: %s, Force Layer: %d\n", context->test_port,
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	624 (context->test_port & TEST_BIT_DISABLE) ? "true" : "false", context->test_port >> 7 & 3
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	625 );
1628 3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	626 //restore flags as calling vdp_control_port_read can change them
3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	627 context->flags = old_flags;
3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	628 context->flags2 = old_flags2;
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	629 }
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	630
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	631 static uint8_t is_active(vdp_context *context)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	632 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	633 return context->state != INACTIVE && (context->regs[REG_MODE_2] & BIT_DISP_EN) != 0;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	634 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	635
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	636 static void scan_sprite_table(uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	637 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	638 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) {
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	639 line += 1;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	640 uint16_t ymask, ymin;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	641 uint8_t height_mult;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	642 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	643 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	644 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	645 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	646 }
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	647 ymask = 0x3FF;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	648 ymin = 256;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	649 height_mult = 16;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	650 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	651 ymask = 0x1FF;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	652 ymin = 128;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	653 height_mult = 8;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	654 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	655 context->sprite_index &= 0x7F;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	656 //TODO: Implement squirelly behavior documented by Kabuto
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	657 if (context->sprite_index >= context->max_sprites_frame) {
38 898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	658 context->sprite_index = 0;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	659 return;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	660 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	661 uint16_t address = context->sprite_index * 4;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	662 line += ymin;
1346 f7ca42e020fd Fix sprite rendering in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1344 diff changeset	663 line &= ymask;
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	664 uint16_t y = ((context->sat_cache[address] & 0x3) << 8 \| context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	665 uint8_t height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
21 72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	666 //printf("Sprite %d \| y: %d, height: %d\n", context->sprite_index, y, height);
72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	667 if (y <= line && line < (y + height)) {
27 aa1c47fab3f1 Fix sprite transparency for overlapping sprites Mike Pavone <pavone@retrodev.com> parents: 26 diff changeset	668 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	669 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	670 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	671 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	672 context->sprite_index = context->sat_cache[address+3] & 0x7F;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	673 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	674 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	675 //TODO: Implement squirelly behavior documented by Kabuto
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	676 if (context->sprite_index >= context->max_sprites_frame) {
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	677 context->sprite_index = 0;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	678 return;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	679 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	680 address = context->sprite_index * 4;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	681 y = ((context->sat_cache[address] & 0x3) << 8 \| context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	682 height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
323 8c01b4154480 Properly mask sprite X and Y coordinates Mike Pavone <pavone@retrodev.com> parents: 322 diff changeset	683 //printf("Sprite %d \| y: %d, height: %d\n", context->sprite_index, y, height);
21 72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	684 if (y <= line && line < (y + height)) {
27 aa1c47fab3f1 Fix sprite transparency for overlapping sprites Mike Pavone <pavone@retrodev.com> parents: 26 diff changeset	685 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	686 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	687 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	688 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	689 context->sprite_index = context->sat_cache[address+3] & 0x7F;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	690 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	691 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	692 //TODO: Seems like the overflow flag should be set here if we run out of sprite info slots without hitting the end of the list
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	693 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	694
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	695 static void scan_sprite_table_mode4(vdp_context * context)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	696 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	697 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	698 uint32_t line = context->vcounter;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	699 line &= 0xFF;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	700
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	701 uint32_t sat_address = mode4_address_map[(context->regs[REG_SAT] << 7 & 0x3F00) + context->sprite_index];
1138 25268334a24c Fix Mode 4 sprite table Y scan to account for VRAM byte swapping Michael Pavone <pavone@retrodev.com> parents: 1137 diff changeset	702 uint32_t y = context->vdpmem[sat_address+1];
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	703 uint32_t size = (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) ? 16 : 8;
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	704 uint32_t ysize = size;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	705 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	706 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	707 ysize *= 2;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	708 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	709
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	710 if (y == 0xd0) {
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	711 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	712 return;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	713 } else {
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	714 if (y <= line && line < (y + ysize)) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	715 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	716 context->sprite_index = MAX_SPRITES_FRAME_H32;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	717 context->flags \|= FLAG_DOT_OFLOW;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	718 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	719 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	720 context->sprite_info_list[--(context->slot_counter)].size = size;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	721 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	722 context->sprite_info_list[context->slot_counter].y = y;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	723 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	724 context->sprite_index++;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	725 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	726
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	727 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
1138 25268334a24c Fix Mode 4 sprite table Y scan to account for VRAM byte swapping Michael Pavone <pavone@retrodev.com> parents: 1137 diff changeset	728 y = context->vdpmem[sat_address];
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	729 if (y == 0xd0) {
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	730 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	731 return;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	732 } else {
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	733 if (y <= line && line < (y + ysize)) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	734 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	735 context->sprite_index = MAX_SPRITES_FRAME_H32;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	736 context->flags \|= FLAG_DOT_OFLOW;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	737 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	738 }
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	739 context->sprite_info_list[--(context->slot_counter)].size = size;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	740 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	741 context->sprite_info_list[context->slot_counter].y = y;
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	742 }
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	743 context->sprite_index++;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	744 }
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	745 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	746
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	747 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	748 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	749
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	750 static void read_sprite_x(uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	751 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	752 if (context->cur_slot == context->max_sprites_line) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	753 context->cur_slot = 0;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	754 }
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	755 if (context->cur_slot < context->slot_counter) {
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	756 if (context->sprite_draws) {
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	757 line += 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	758 //in tiles
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	759 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	760 //in pixels
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	761 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	762 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	763 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	764 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	765 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	766 }
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	767 height *= 2;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	768 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	769 uint16_t ymask, ymin;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	770 if (context->double_res) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	771 ymask = 0x3FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	772 ymin = 256;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	773 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	774 ymask = 0x1FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	775 ymin = 128;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	776 }
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	777 uint16_t att_addr = mode5_sat_address(context) + context->sprite_info_list[context->cur_slot].index * 8 + 4;
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	778 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) \| context->vdpmem[att_addr+1];
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	779 uint8_t pal_priority = (tileinfo >> 9) & 0x70;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	780 uint8_t row;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	781 uint16_t cache_addr = context->sprite_info_list[context->cur_slot].index * 4;
1346 f7ca42e020fd Fix sprite rendering in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1344 diff changeset	782 line = (line + ymin) & ymask;
1338 3706b683cd48 Fix sprite rendering for negative line. Fixes remaining visual glitch in the Titancade scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1337 diff changeset	783 int16_t y = ((context->sat_cache[cache_addr] << 8 \| context->sat_cache[cache_addr+1]) & ymask)/* - ymin*/;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	784 if (tileinfo & MAP_BIT_V_FLIP) {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	785 row = (y + height - 1) - line;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	786 } else {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	787 row = line-y;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	788 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	789 row &= ymask >> 4;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	790 uint16_t address;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	791 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	792 address = ((tileinfo & 0x3FF) << 6) + row * 4;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	793 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	794 address = ((tileinfo & 0x7FF) << 5) + row * 4;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	795 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	796 context->sprite_draws--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	797 context->sprite_draw_list[context->sprite_draws].x_pos = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 \| context->vdpmem[att_addr + 3]) & 0x1FF;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	798 context->sprite_draw_list[context->sprite_draws].address = address;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	799 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	800 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	801 context->sprite_draw_list[context->sprite_draws].width = width;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	802 context->sprite_draw_list[context->sprite_draws].height = height;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	803 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	804 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	805 context->cur_slot++;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	806 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	807
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	808 static void read_sprite_x_mode4(vdp_context * context)
427 2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	809 {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	810 if (context->cur_slot >= context->slot_counter) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	811 uint32_t address = (context->regs[REG_SAT] << 7 & 0x3F00) + 0x80 + context->sprite_info_list[context->cur_slot].index * 2;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	812 address = mode4_address_map[address];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	813 --context->sprite_draws;
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	814 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	815 uint32_t tile_address = context->vdpmem[address] * 32 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	816 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	817 tile_address &= ~32;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	818 }
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	819 uint16_t y_diff = context->vcounter - context->sprite_info_list[context->cur_slot].y;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	820 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	821 y_diff >>= 1;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	822 }
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	823 tile_address += y_diff * 4;
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	824 context->sprite_draw_list[context->sprite_draws].x_pos = context->vdpmem[address + 1];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	825 context->sprite_draw_list[context->sprite_draws].address = tile_address;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	826 context->cur_slot--;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	827 }
427 2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	828 }
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	829
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	830 #define CRAM_BITS 0xEEE
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	831 #define VSRAM_BITS 0x7FF
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	832 #define VSRAM_DIRTY_BITS 0xF800
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	833
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	834 //rough estimate of slot number at which border display starts
1270 687d3969416b Adjust correspondance between slot number and actual video output to better match video signal measurements and analysis of Outrunners behavior on hardware. Partially fixes ticket:13 Michael Pavone <pavone@retrodev.com> parents: 1269 diff changeset	835 #define BG_START_SLOT 6
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	836
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	837 static void update_color_map(vdp_context *context, uint16_t index, uint16_t value)
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	838 {
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	839 context->colors[index] = color_map[value & CRAM_BITS];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	840 context->colors[index + SHADOW_OFFSET] = color_map[(value & CRAM_BITS) \| FBUF_SHADOW];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	841 context->colors[index + HIGHLIGHT_OFFSET] = color_map[(value & CRAM_BITS) \| FBUF_HILIGHT];
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	842 if (context->type == VDP_GAMEGEAR) {
2199 6f66356af4e2 Fix Game Gear color issues (thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2194 diff changeset	843 context->colors[index + MODE4_OFFSET] = color_map[value & 0xFFF];
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	844 } else {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	845 context->colors[index + MODE4_OFFSET] = color_map[(value & CRAM_BITS) \| FBUF_MODE4];
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	846 }
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	847 }
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	848
1428 2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	849 void write_cram_internal(vdp_context * context, uint16_t addr, uint16_t value)
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	850 {
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	851 context->cram[addr] = value;
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	852 update_color_map(context, addr, value);
1428 2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	853 }
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	854
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	855 static void write_cram(vdp_context * context, uint16_t address, uint16_t value)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	856 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	857 uint16_t addr;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	858 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	859 addr = (address/2) & (CRAM_SIZE-1);
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	860 } else if (context->type == VDP_GAMEGEAR) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	861 addr = (address/2) & 31;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	862 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	863 addr = address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	864 value = (value << 1 & 0xE) \| (value << 2 & 0xE0) \| (value & 0xE00);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	865 }
1428 2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	866 write_cram_internal(context, addr, value);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	867
1928 abc89555f2e0 Admit defeat on the "trying to write CRAM dots while output is null issue" for now and just add a null check Mike Pavone <pavone@retrodev.com> parents: 1925 diff changeset	868 if (context->output && context->hslot >= BG_START_SLOT && (
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	869 context->vcounter < context->inactive_start + context->border_bot
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	870 \|\| context->vcounter > 0x200 - context->border_top
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	871 )) {
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	872 uint8_t bg_end_slot = BG_START_SLOT + (context->regs[REG_MODE_4] & BIT_H40) ? LINEBUF_SIZE/2 : (256+HORIZ_BORDER)/2;
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	873 if (context->hslot < bg_end_slot) {
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	874 uint32_t color = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->colors[addr] : context->colors[addr + MODE4_OFFSET];
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	875 context->output[(context->hslot - BG_START_SLOT)*2 + 1] = color;
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	876 }
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	877 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	878 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	879
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	880 static void vdp_advance_dma(vdp_context * context)
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	881 {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	882 context->regs[REG_DMASRC_L] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	883 if (!context->regs[REG_DMASRC_L]) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	884 context->regs[REG_DMASRC_M] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	885 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	886 context->address += context->regs[REG_AUTOINC];
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	887 uint16_t dma_len = ((context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L]) - 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	888 context->regs[REG_DMALEN_H] = dma_len >> 8;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	889 context->regs[REG_DMALEN_L] = dma_len;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	890 if (!dma_len) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	891 context->flags &= ~FLAG_DMA_RUN;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	892 context->cd &= 0xF;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	893 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	894 }
1019 e34334e6c682 Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running Michael Pavone <pavone@retrodev.com> parents: 1001 diff changeset	895
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	896 static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value)
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	897 {
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	898 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	899 if (!(address & 4)) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	900 uint32_t sat_address = mode5_sat_address(context);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	901 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	902 uint16_t cache_address = address - sat_address;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	903 cache_address = (cache_address & 3) \| (cache_address >> 1 & 0x1FC);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	904 context->sat_cache[cache_address] = value >> 8;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	905 context->sat_cache[cache_address^1] = value;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	906 }
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	907 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	908 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	909 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	910
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	911 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value)
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	912 {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	913 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	914 if (!(address & 4)) {
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	915 uint32_t sat_address = mode5_sat_address(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	916 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	917 uint16_t cache_address = address - sat_address;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	918 cache_address = (cache_address & 3) \| (cache_address >> 1 & 0x1FC);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	919 context->sat_cache[cache_address] = value;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	920 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	921 }
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	922 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	923 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	924
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	925 static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value)
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	926 {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	927 address = (address & 0x3FC) \| (address >> 1 & 0xFC01) \| (address >> 9 & 0x2);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	928 address ^= 1;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	929 //TODO: Support an option to actually have 128KB of VRAM
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	930 context->vdpmem[address] = value;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	931 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	932
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	933 static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value)
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	934 {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	935 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	936 address &= 0xFFFF;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	937 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	938 address = mode4_address_map[address & 0x3FFF];
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	939 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	940 context->vdpmem[address] = value;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	941 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	942
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	943 #define DMA_FILL 0x80
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	944 #define DMA_COPY 0xC0
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	945 #define DMA_TYPE_MASK 0xC0
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	946 static void external_slot(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	947 {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	948 if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL && context->fifo_read < 0) {
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	949 context->fifo_read = (context->fifo_write-1) & (FIFO_SIZE-1);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	950 fifo_entry * cur = context->fifo + context->fifo_read;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	951 cur->cycle = context->cycles;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	952 cur->address = context->address;
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	953 cur->partial = 1;
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	954 vdp_advance_dma(context);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	955 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	956 fifo_entry * start = context->fifo + context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	957 if (context->fifo_read >= 0 && start->cycle <= context->cycles) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	958 switch (start->cd & 0xF)
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	959 {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	960 case VRAM_WRITE:
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	961 if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM\|BIT_MODE_5)) == (BIT_128K_VRAM\|BIT_MODE_5)) {
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	962 event_vram_word(context->cycles, start->address, start->value);
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	963 vdp_check_update_sat(context, start->address, start->value);
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	964 write_vram_word(context, start->address, start->value);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	965 } else {
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	966 uint8_t byte = start->partial == 1 ? start->value >> 8 : start->value;
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	967 uint32_t address = start->address ^ 1;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	968 event_vram_byte(context->cycles, start->address, byte, context->regs[REG_AUTOINC]);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	969 vdp_check_update_sat_byte(context, address, byte);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	970 write_vram_byte(context, address, byte);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	971 if (!start->partial) {
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	972 start->address = address;
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	973 start->partial = 1;
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	974 //skip auto-increment and removal of entry from fifo
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	975 return;
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	976 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	977 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	978 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	979 case CRAM_WRITE: {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	980 //printf("CRAM Write \| %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1));
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	981 uint16_t val;
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	982 if (start->partial == 3) {
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	983 if (context->type == VDP_GAMEGEAR) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	984 if (start->address & 1) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	985 val = start->value << 8 \| context->cram_latch;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	986 } else {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	987 context->cram_latch = start->value;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	988 break;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	989 }
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	990 } else if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	991 val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) \| start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	992 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	993 uint16_t address = (context->regs[REG_MODE_2] & BIT_MODE_5) ? start->address >> 1 & (CRAM_SIZE-1) : start->address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	994 val = (context->cram[address] & 0xFF00) \| start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	995 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	996 } else {
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	997 val = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	998 }
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	999 uint8_t buffer[3] = {start->address & 127, val >> 8, val};
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1000 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1001 write_cram(context, start->address, val);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1002 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1003 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1004 case VSRAM_WRITE:
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	1005 if (((start->address/2) & 63) < context->vsram_size) {
1432 5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	1006 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles);
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1007 if (start->partial == 3) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1008 if (start->address & 1) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1009 context->vsram[(start->address/2) & 63] &= 0xFF;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1010 context->vsram[(start->address/2) & 63] \|= start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1011 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1012 context->vsram[(start->address/2) & 63] &= 0xFF00;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1013 context->vsram[(start->address/2) & 63] \|= start->value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1014 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1015 } else {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1016 context->vsram[(start->address/2) & 63] = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1017 }
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1018 uint8_t buffer[3] = {((start->address/2) & 63) + 128, context->vsram[(start->address/2) & 63] >> 8, context->vsram[(start->address/2) & 63]};
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1019 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1020 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1021
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1022 break;
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1023 default:
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1024 if (!(context->cd & 4) && !start->partial && (context->regs[REG_MODE_2] & (BIT_128K_VRAM\|BIT_MODE_5)) != (BIT_128K_VRAM\|BIT_MODE_5)) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1025 start->partial = 1;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1026 return;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1027 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1028 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1029 context->fifo_read = (context->fifo_read+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1030 if (context->fifo_read == context->fifo_write) {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1031 if ((context->cd & 0x20) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	1032 context->flags \|= FLAG_DMA_RUN;
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	1033 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1034 context->fifo_read = -1;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1035 }
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1036 } else if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1037 if (context->flags & FLAG_READ_FETCHED) {
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	1038 write_vram_byte(context, context->address ^ 1, context->prefetch);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1039
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1040 //Update DMA state
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1041 vdp_advance_dma(context);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1042
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1043 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1044 } else {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1045 context->prefetch = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L] ^ 1];
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1046
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1047 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1048 }
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1049 } else if (!(context->cd & 1) && !(context->flags & (FLAG_READ_FETCHED\|FLAG_PENDING)) && context->read_latency <= context->cycles) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1050 switch(context->cd & 0xF)
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1051 {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1052 case VRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1053 if (context->flags2 & FLAG2_READ_PENDING) {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1054 context->prefetch \|= context->vdpmem[context->address \| 1];
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1055 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1056 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1057 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1058 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1059 } else {
1318 bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support Michael Pavone <pavone@retrodev.com> parents: 1315 diff changeset	1060 //TODO: 128K VRAM Mode
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1061 context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1062 context->flags2 \|= FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1063 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1064 break;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1065 case VRAM_READ8: {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1066 uint32_t address = context->address ^ 1;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1067 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1068 address = mode4_address_map[address & 0x3FFF];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1069 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1070 context->prefetch = context->vdpmem[address];
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1071 context->prefetch \|= context->fifo[context->fifo_write].value & 0xFF00;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1072 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1073 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1074 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1075 break;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1076 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1077 case CRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1078 context->prefetch = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1079 context->prefetch \|= context->fifo[context->fifo_write].value & ~CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1080 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1081 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1082 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1083 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1084 case VSRAM_READ: {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1085 uint16_t address = (context->address /2) & 63;
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	1086 if (address >= context->vsram_size) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1087 address = 0;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1088 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1089 context->prefetch = context->vsram[address] & VSRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1090 context->prefetch \|= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1091 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1092 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1093 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1094 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1095 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1096 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1097 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1098 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1099
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1100 static void run_dma_src(vdp_context * context, int32_t slot)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1101 {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1102 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1103 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1104 if (context->fifo_write == context->fifo_read) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1105 return;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1106 }
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1107 fifo_entry * cur = NULL;
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1108 if (!(context->regs[REG_DMASRC_H] & 0x80))
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1109 {
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1110 //68K -> VDP
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	1111 if (slot == -1 \|\| !is_refresh(context, slot-1)) {
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1112 cur = context->fifo + context->fifo_write;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	1113 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1114 cur->address = context->address;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1115 cur->value = read_dma_value((context->regs[REG_DMASRC_H] << 16) \| (context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L]);
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1116 cur->cd = context->cd;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1117 cur->partial = 0;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1118 if (context->fifo_read < 0) {
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1119 context->fifo_read = context->fifo_write;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1120 }
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1121 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1122 vdp_advance_dma(context);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1123 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	1124 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1125 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1126
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1127 #define WINDOW_RIGHT 0x80
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1128 #define WINDOW_DOWN 0x80
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1129
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1130 static void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1131 {
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1132 uint16_t window_line_shift, v_offset_mask, vscroll_shift;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1133 if (context->double_res) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1134 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	1135 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1136 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1137 }
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1138 window_line_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1139 v_offset_mask = 0xF;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1140 vscroll_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1141 } else {
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1142 window_line_shift = 3;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1143 v_offset_mask = 0x7;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1144 vscroll_shift = 3;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1145 }
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1146 //TODO: Further research on vscroll latch behavior and the "first column bug"
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1147 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1148 if (!column) {
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1149 if (context->regs[REG_MODE_4] & BIT_H40) {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1150 //Based on observed behavior documented by Eke-Eke, I'm guessing the VDP
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1151 //ends up fetching the last value on the VSRAM bus in the H40 case
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1152 //getting the last latched value should be close enough for now
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1153 if (!vsram_off) {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1154 context->vscroll_latch[0] = context->vscroll_latch[1];
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1155 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1156 } else {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1157 //supposedly it's always forced to 0 in the H32 case
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1158 context->vscroll_latch[0] = context->vscroll_latch[1] = 0;
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1159 }
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1160 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1161 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off];
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1162 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1163 }
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1164 if (!vsram_off) {
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1165 uint16_t left_col, right_col;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1166 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) {
920 e64168bb2b25 Fix calculation of window start column when it's on the right side. This removes graphical glitches in Afterburner 2, Fireshark and Dungeons and Dragons: Warriors of the Eternal Sun and probably others Michael Pavone <pavone@retrodev.com> parents: 884 diff changeset	1167 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2 + 2;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1168 right_col = 42;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1169 } else {
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1170 left_col = 0;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1171 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1172 if (right_col) {
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1173 right_col += 2;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1174 }
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1175 }
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1176 uint16_t top_line, bottom_line;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1177 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) {
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1178 top_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1179 bottom_line = context->double_res ? 481 : 241;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1180 } else {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1181 top_line = 0;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1182 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1183 }
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1184 if ((column >= left_col && column < right_col) \|\| (line >= top_line && line < bottom_line)) {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1185 uint16_t address = context->regs[REG_WINDOW] << 10;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1186 uint16_t line_offset, offset, mask;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	1187 if (context->regs[REG_MODE_4] & BIT_H40) {
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1188 address &= 0xF000;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1189 line_offset = (((line) >> vscroll_shift) * 64 * 2) & 0xFFF;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1190 mask = 0x7F;
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	1191
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1192 } else {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1193 address &= 0xF800;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1194 line_offset = (((line) >> vscroll_shift) * 32 * 2) & 0xFFF;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1195 mask = 0x3F;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1196 }
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1197 if (context->double_res) {
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1198 mask <<= 1;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1199 mask \|= 1;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1200 }
42 6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane. Mike Pavone <pavone@retrodev.com> parents: 41 diff changeset	1201 offset = address + line_offset + (((column - 2) * 2) & mask);
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1202 context->col_1 = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	1203 //printf("Window \| top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]);
42 6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane. Mike Pavone <pavone@retrodev.com> parents: 41 diff changeset	1204 offset = address + line_offset + (((column - 1) * 2) & mask);
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1205 context->col_2 = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1206 context->v_offset = (line) & v_offset_mask;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1207 context->flags \|= FLAG_WINDOW;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1208 return;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1209 } else if (column == right_col) {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1210 context->flags \|= FLAG_WINDOW_EDGE;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1211 context->flags &= ~FLAG_WINDOW;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1212 } else {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1213 context->flags &= ~(FLAG_WINDOW_EDGE\|FLAG_WINDOW);
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1214 }
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1215 }
1290 aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk Michael Pavone <pavone@retrodev.com> parents: 1289 diff changeset	1216 //TODO: Verify behavior for 0x20 case
aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk Michael Pavone <pavone@retrodev.com> parents: 1289 diff changeset	1217 uint16_t vscroll = 0xFF \| (context->regs[REG_SCROLL] & 0x30) << 4;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1218 if (context->double_res) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1219 vscroll <<= 1;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1220 vscroll \|= 1;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1221 }
710 4cd8823f79e3 First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it Michael Pavone <pavone@retrodev.com> parents: 708 diff changeset	1222 vscroll &= context->vscroll_latch[vsram_off] + line;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1223 context->v_offset = vscroll & v_offset_mask;
26 a7c2b92d8056 Fix management of context->sprite_draws so the sprite layer only draws when it should Mike Pavone <pavone@retrodev.com> parents: 25 diff changeset	1224 //printf("%s \| line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset);
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1225 vscroll >>= vscroll_shift;
1887 bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1226 //TODO: Verify the behavior for a setting of 2
bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1227 static const uint16_t hscroll_masks[] = {0x1F, 0x3F, 0x1F, 0x7F};
2013 dcdad92f84a4 Multiplying by zero and shifting by zero are very different. Fixes regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2010 diff changeset	1228 static const uint16_t v_shifts[] = {6, 7, 16, 8};
1887 bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1229 uint16_t hscroll_mask = hscroll_masks[context->regs[REG_SCROLL] & 0x3];
bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1230 uint16_t v_shift = v_shifts[context->regs[REG_SCROLL] & 0x3];
28 037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1231 uint16_t hscroll, offset;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1232 for (int i = 0; i < 2; i++) {
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1233 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask;
1887 bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1234 offset = address + (((vscroll << v_shift) + hscroll*2) & 0x1FFF);
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1235 //printf("%s \| line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset);
28 037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1236 uint16_t col_val = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1237 if (i) {
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1238 context->col_2 = col_val;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1239 } else {
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1240 context->col_1 = col_val;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1241 }
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1242 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1243 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1244
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1245 static void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1246 {
25 4d0c20ad815a Fix vertical scroll value for plane B Mike Pavone <pavone@retrodev.com> parents: 24 diff changeset	1247 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1248 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1249
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1250 static void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1251 {
25 4d0c20ad815a Fix vertical scroll value for plane B Mike Pavone <pavone@retrodev.com> parents: 24 diff changeset	1252 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1253 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1254
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1255 static void read_map_mode4(uint16_t column, uint32_t line, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1256 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1257 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1258 //add row
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1259 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1260 if (column < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1261 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1262 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1263 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1264 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1265 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1266 address += (vscroll >> 3) * 2 * 32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1267 //add column
1136 52f25c41abdd Fix horizontal scrolling in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1135 diff changeset	1268 address += ((column - (context->hscroll_a >> 3)) & 31) * 2;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1269 //adjust for weird VRAM mapping in Mode 4
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1270 address = mode4_address_map[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1271 context->col_1 = (context->vdpmem[address] << 8) \| context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1272 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1273
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1274 static void render_map(uint16_t col, uint8_t * tmp_buf, uint8_t offset, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1275 {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1276 uint16_t address;
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1277 uint16_t vflip_base;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1278 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1279 address = ((col & 0x3FF) << 6);
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1280 vflip_base = 60;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1281 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1282 address = ((col & 0x7FF) << 5);
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1283 vflip_base = 28;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1284 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1285 if (col & MAP_BIT_V_FLIP) {
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1286 address += vflip_base - 4 * context->v_offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1287 } else {
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1288 address += 4 * context->v_offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1289 }
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1290 uint8_t pal_priority = (col >> 9) & 0x70;
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1291 uint32_t bits = ((uint32_t )(&context->vdpmem[address]));
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1292 tmp_buf += offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1293 if (col & MAP_BIT_H_FLIP) {
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1294 uint32_t shift = 28;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1295 for (int i = 0; i < 4; i++)
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1296 {
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1297 uint8_t right = pal_priority \| ((bits >> shift) & 0xF);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1298 shift -= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1299 *(tmp_buf++) = pal_priority \| ((bits >> shift) & 0xF);
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1300 shift -= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1301 *(tmp_buf++) = right;
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1302 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1303 } else {
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1304 for (int i = 0; i < 4; i++)
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1305 {
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1306 uint8_t right = pal_priority \| (bits & 0xF);
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1307 bits >>= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1308 *(tmp_buf++) = pal_priority \| (bits & 0xF);
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1309 bits >>= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1310 *(tmp_buf++) = right;
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1311 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1312 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1313 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1314
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1315 static void render_map_1(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1316 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1317 render_map(context->col_1, context->tmp_buf_a, context->buf_a_off, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1318 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1319
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1320 static void render_map_2(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1321 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1322 render_map(context->col_2, context->tmp_buf_a, context->buf_a_off+8, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1323 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1324
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1325 static void render_map_3(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1326 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1327 render_map(context->col_1, context->tmp_buf_b, context->buf_b_off, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1328 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1329
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1330 static void fetch_map_mode4(uint16_t col, uint32_t line, vdp_context *context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1331 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1332 //calculate pixel row to fetch
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1333 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1334 if (col < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1335 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1336 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1337 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1338 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1339 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1340 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1341 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1342 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1343 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1344
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1345 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1346 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1347 context->fetch_tmp[1] = context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1348 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1349
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1350 static uint8_t composite_normal(vdp_context context, uint8_t debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1351 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1352 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1353 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1354 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1355 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1356 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1357 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1358 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1359 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1360 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1361 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1362 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1363 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1364 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1365 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1366 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1367 return pixel;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1368 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1369 typedef struct {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1370 uint8_t index, intensity;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1371 } sh_pixel;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1372
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1373 static sh_pixel composite_highlight(vdp_context context, uint8_t debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1374 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1375 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1376 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1377 uint8_t intensity = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1378 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1379 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1380 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1381 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1382 intensity = plane_b & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1383 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1384 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1385 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1386 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1387 intensity \|= plane_a & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1388 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1389 if ((sprite & 0x3F) == 0x3E) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1390 intensity += BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1391 } else if ((sprite & 0x3F) == 0x3F) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1392 intensity = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1393 } else {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1394 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1395 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1396 if ((pixel & 0xF) == 0xE) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1397 intensity = BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1398 } else {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1399 intensity \|= pixel & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1400 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1401 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1402 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1403 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1404 return (sh_pixel){.index = pixel, .intensity = intensity};
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1405 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1406
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1407 static void render_normal(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1408 {
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1409 uint8_t sprite_buf = context->linebuf + col 8;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1410 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1411 memset(dst, 0, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1412 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1413 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1414 debug_dst += 8;
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1415 sprite_buf += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1416 plane_a_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1417 plane_b_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1418 for (int i = 0; i < 8; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1419 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1420 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1421 plane_a = buf_a[plane_a_off & plane_a_mask];
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1422 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1423 (dst++) = composite_normal(context, debug_dst, sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1424 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1425 }
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1426 } else {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1427 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1428 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1429 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1430 plane_a = buf_a[plane_a_off & plane_a_mask];
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1431 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1432 (dst++) = composite_normal(context, debug_dst, sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1433 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1434 }
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1435 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1436 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1437
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1438 static void render_highlight(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1439 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1440 int start = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1441 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1442 memset(dst, SHADOW_OFFSET + (context->regs[REG_BG_COLOR] & 0x3F), 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1443 memset(debug_dst, DBG_SRC_BG \| DBG_SHADOW, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1444 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1445 debug_dst += 8;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1446 start = 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1447 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1448 uint8_t sprite_buf = context->linebuf + col 8 + start;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1449 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1450 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1451 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1452 plane_a = buf_a[plane_a_off & plane_a_mask];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1453 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1454 sprite = *sprite_buf;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1455 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, context->regs[REG_BG_COLOR]);
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1456 uint8_t final_pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1457 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1458 final_pixel = (pixel.index & 0x3F) + HIGHLIGHT_OFFSET;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1459 } else if (pixel.intensity) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1460 final_pixel = pixel.index & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1461 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1462 final_pixel = (pixel.index & 0x3F) + SHADOW_OFFSET;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1463 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1464 debug_dst++;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1465 *(dst++) = final_pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1466 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1467 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1468
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1469 static void render_testreg(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1470 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1471 if (output_disabled) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1472 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1473 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1474 case 0:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1475 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1476 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1477 *(dst++) = 0x3F; //TODO: confirm this on hardware
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1478 *(debug_dst++) = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1479 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1480 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1481 case 1: {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1482 uint8_t sprite_buf = context->linebuf + col 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1483 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1484 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1485 (dst++) = (sprite_buf++) & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1486 *(debug_dst++) = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1487 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1488 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1489 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1490 case 2:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1491 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1492 {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1493 *(dst++) = buf_a[(plane_a_off++) & plane_a_mask] & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1494 *(debug_dst++) = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1495 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1496 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1497 case 3:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1498 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1499 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1500 *(dst++) = context->tmp_buf_b[(plane_b_off++) & SCROLL_BUFFER_MASK] & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1501 *(debug_dst++) = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1502 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1503 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1504 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1505 } else {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1506 int start = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1507 uint8_t sprite_buf = context->linebuf + col 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1508 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1509 //TODO: Confirm how test register interacts with column 0 blanking
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1510 uint8_t pixel = 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1511 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1512 for (int i = 0; i < 8; ++i)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1513 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1514 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1515 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1516 case 1:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1517 pixel &= sprite_buf[i];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1518 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1519 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1520 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1521 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1522 case 2:
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1523 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1524 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1525 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1526 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1527 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1528 case 3:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1529 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1530 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1531 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1532 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1533 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1534 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1535
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1536 *(dst++) = pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1537 *(debug_dst++) = src;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1538 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1539 plane_a_off += 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1540 plane_b_off += 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1541 sprite_buf += 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1542 start = 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1543 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1544 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1545 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1546 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1547 plane_a = buf_a[plane_a_off & plane_a_mask];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1548 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1549 sprite = *sprite_buf;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1550 uint8_t pixel = composite_normal(context, debug_dst, sprite, plane_a, plane_b, 0x3F) & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1551 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1552 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1553 case 1:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1554 pixel &= sprite;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1555 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1556 *debug_dst = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1557 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1558 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1559 case 2:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1560 pixel &= plane_a;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1561 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1562 *debug_dst = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1563 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1564 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1565 case 3:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1566 pixel &= plane_b;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1567 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1568 *debug_dst = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1569 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1570 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1571 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1572 debug_dst++;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1573 *(dst++) = pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1574 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1575 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1576 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1577
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1578 static void render_testreg_highlight(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1579 {
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1580 int start = 0;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1581 uint8_t sprite_buf = context->linebuf + col 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1582 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1583 //TODO: Confirm how test register interacts with column 0 blanking
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1584 uint8_t pixel = 0x3F;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1585 uint8_t src = DBG_SRC_BG \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1586 for (int i = 0; i < 8; ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1587 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1588 switch (test_layer)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1589 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1590 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1591 pixel &= sprite_buf[i];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1592 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1593 src = DBG_SRC_S \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1594 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1595 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1596 case 2:
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1597 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1598 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1599 src = DBG_SRC_A \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1600 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1601 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1602 case 3:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1603 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1604 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1605 src = DBG_SRC_B \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1606 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1607 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1608 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1609
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1610 *(dst++) = SHADOW_OFFSET + pixel;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1611 *(debug_dst++) = src;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1612 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1613 plane_a_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1614 plane_b_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1615 sprite_buf += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1616 start = 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1617 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1618 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1619 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1620 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1621 plane_a = buf_a[plane_a_off & plane_a_mask];
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1622 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1623 sprite = *sprite_buf;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1624 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, 0x3F);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1625 if (output_disabled) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1626 pixel.index = 0x3F;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1627 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1628 pixel.index &= 0x3F;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1629 }
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1630 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1631 {
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1632 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1633 pixel.index &= sprite;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1634 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1635 *debug_dst = DBG_SRC_S;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1636 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1637 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1638 case 2:
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1639 pixel.index &= plane_a;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1640 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1641 *debug_dst = DBG_SRC_A;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1642 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1643 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1644 case 3:
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1645 pixel.index &= plane_b;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1646 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1647 *debug_dst = DBG_SRC_B;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1648 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1649 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1650 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1651 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1652 pixel.index += HIGHLIGHT_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1653 } else if (!pixel.intensity) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1654 pixel.index += SHADOW_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1655 }
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1656 debug_dst++;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1657 *(dst++) = pixel.index;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1658 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1659 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1660
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1661 static void render_map_output(uint32_t line, int32_t col, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1662 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1663 uint8_t *dst;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1664 uint8_t *debug_dst;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1665 uint8_t output_disabled = (context->test_port & TEST_BIT_DISABLE) != 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1666 uint8_t test_layer = context->test_port >> 7 & 3;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	1667 if (context->state == PREPARING && !test_layer) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1668 if (col) {
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1669 col -= 2;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1670 dst = context->compositebuf + BORDER_LEFT + col * 8;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1671 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1672 dst = context->compositebuf;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1673 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1674 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1675 context->done_composite = dst + BORDER_LEFT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1676 return;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1677 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1678 memset(dst, 0, 16);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1679 context->done_composite = dst + 16;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1680 return;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1681 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1682 line &= 0xFF;
1180 e2b81a0f8fd8 Undo poorly thought out minor optimization that screwed up rendering Michael Pavone <pavone@retrodev.com> parents: 1179 diff changeset	1683 render_map(context->col_2, context->tmp_buf_b, context->buf_b_off+8, context);
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1684 uint8_t *sprite_buf;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1685 uint8_t sprite, plane_a, plane_b;
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1686 int plane_a_off, plane_b_off;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1687 if (col)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1688 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1689 col-=2;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1690 dst = context->compositebuf + BORDER_LEFT + col * 8;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1691 debug_dst = context->layer_debug_buf + BORDER_LEFT + col * 8;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1692
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1693
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1694 uint8_t a_src, src;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1695 uint8_t *buf_a;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1696 int plane_a_mask;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1697 if (context->flags & FLAG_WINDOW) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1698 plane_a_off = context->buf_a_off;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1699 buf_a = context->tmp_buf_a;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1700 a_src = DBG_SRC_W;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1701 plane_a_mask = SCROLL_BUFFER_MASK;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1702 } else {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1703 if (context->flags & FLAG_WINDOW_EDGE) {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1704 buf_a = context->tmp_buf_a + context->buf_a_off;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1705 plane_a_mask = 15;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1706 plane_a_off = -context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1707 } else {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1708 plane_a_off = context->buf_a_off - context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1709 plane_a_mask = SCROLL_BUFFER_MASK;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1710 buf_a = context->tmp_buf_a;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1711 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1712 a_src = DBG_SRC_A;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1713 }
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1714 plane_a_off &= plane_a_mask;
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	1715 plane_b_off = context->buf_b_off - context->hscroll_b_fine;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1716 //printf("A \| tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7));
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1717
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1718 if (context->regs[REG_MODE_4] & BIT_HILIGHT) {
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1719 if (output_disabled \|\| test_layer) {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1720 render_testreg_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1721 } else {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1722 render_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
722 8f5339961903 Restore the other 2 debug display modes Michael Pavone <pavone@retrodev.com> parents: 720 diff changeset	1723 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1724 } else {
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1725 if (output_disabled \|\| test_layer) {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1726 render_testreg(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1727 } else {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1728 render_normal(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
230 d3266cee02c9 Implemented shadow hilight mode. Mike Pavone <pavone@retrodev.com> parents: 191 diff changeset	1729 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1730 }
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1731 dst += 16;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1732 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1733 dst = context->compositebuf;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1734 debug_dst = context->layer_debug_buf;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1735 uint8_t pixel = 0;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1736 if (output_disabled) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1737 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1738 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1739 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1740 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1741 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1742 case 1:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1743 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1744 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1745 dst += BORDER_LEFT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1746 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1747 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1748 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1749 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1750 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1751 i = 0;
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	1752 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine + (16 - BORDER_LEFT);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1753 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1754 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1755 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1756 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK];
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1757 *debug_dst = DBG_SRC_A;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1758 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1759 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1760 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1761 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1762 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1763 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1764 i = 0;
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	1765 uint8_t buf_off = context->buf_b_off - context->hscroll_b_fine + (16 - BORDER_LEFT);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1766 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1767 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1768 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1769 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK];
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1770 *debug_dst = DBG_SRC_B;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1771 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1772 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1773 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1774 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1775 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1776 memset(dst, pixel, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1777 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1778 dst += BORDER_LEFT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1779 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1780 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1781 context->done_composite = dst;
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1782 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1783 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1784 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1785
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1786 static void render_map_mode4(uint32_t line, int32_t col, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1787 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1788 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1789 if (col < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1790 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1791 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1792 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1793 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1794 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1795 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1796 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1797 //vflip
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1798 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1799 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1800
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1801 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1802 pixels \|= planar_to_chunky[context->fetch_tmp[1]];
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1803
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1804 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4 + 2];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1805 pixels \|= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1806 pixels \|= planar_to_chunky[context->vdpmem[address+1]] << 2;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1807
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1808 int i, i_inc, i_limit;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1809 if (context->col_1 & 0x200) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1810 //hflip
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1811 i = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1812 i_inc = 4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1813 i_limit = 32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1814 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1815 i = 28;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1816 i_inc = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1817 i_limit = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1818 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1819 uint8_t pal_priority = (context->col_1 >> 7 & 0x10) \| (context->col_1 >> 6 & 0x40);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1820 for (uint8_t *dst = context->tmp_buf_a + context->buf_a_off; i != i_limit; i += i_inc, dst++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1821 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1822 *dst = (pixels >> i & 0xF) \| pal_priority;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1823 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1824 context->buf_a_off = (context->buf_a_off + 8) & 15;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1825
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1826 uint8_t dst = context->compositebuf + col 8 + BORDER_LEFT;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1827 uint8_t debug_dst = context->layer_debug_buf + col 8 + BORDER_LEFT;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1828 if (context->state == PREPARING) {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1829 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1830 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1831 context->done_composite = dst + 8;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1832 return;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1833 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1834
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1835 if (col \|\| !(context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1836 uint8_t sprite_src = context->linebuf + col 8;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1837 if (context->regs[REG_MODE_1] & BIT_SPRITE_8PX) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1838 sprite_src += 8;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1839 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1840 for (int i = 0; i < 8; i++, sprite_src++)
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1841 {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1842 uint8_t bg_src = context->tmp_buf_a + ((8 + i + col 8 - (context->hscroll_a & 0x7)) & 15);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1843 if ((bg_src & 0x4F) > 0x40 \|\| !sprite_src) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1844 //background plane has priority and is opaque or sprite layer is transparent
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1845 uint8_t pixel = *bg_src & 0x1F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1846 *(dst++) = pixel + MODE4_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1847 *(debug_dst++) = pixel ? DBG_SRC_A : DBG_SRC_BG;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1848 } else {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1849 //sprite layer is opaque and not covered by high priority BG pixels
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1850 (dst++) = (sprite_src \| 0x10) + MODE4_OFFSET;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1851 *(debug_dst++) = DBG_SRC_S;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1852 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1853 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1854 context->done_composite = dst;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1855 } else {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1856 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1857 memset(debug_dst, DBG_SRC_BG, 8);
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1858 context->done_composite = dst + 8;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1859 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1860 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1861
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1862 static uint32_t const h40_hsync_cycles[] = {19, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 19};
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1863
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1864 static void vdp_advance_line(vdp_context *context)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1865 {
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1866 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1867 static uint32_t last_line = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1868 if (last_line != 0xFFFFFFFF) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1869 uint32_t diff = context->cycles - last_line;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1870 if (diff != MCLKS_LINE) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1871 printf("Line %d took %d cycles\n", context->vcounter, diff);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1872 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1873 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1874 last_line = context->cycles;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1875 #endif
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1876 uint16_t jump_start, jump_end;
1156 b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	1877 uint8_t is_mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	1878 if (is_mode_5) {
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	1879 if (context->flags2 & FLAG2_REGION_PAL) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1880 if (context->regs[REG_MODE_2] & BIT_PAL) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1881 jump_start = 0x10B;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1882 jump_end = 0x1D2;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1883 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1884 jump_start = 0x103;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1885 jump_end = 0x1CA;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1886 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1887 } else if (context->regs[REG_MODE_2] & BIT_PAL) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1888 jump_start = 0x100;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1889 jump_end = 0x1FA;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1890 } else {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1891 jump_start = 0xEB;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1892 jump_end = 0x1E5;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1893 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1894 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1895 jump_start = 0xDB;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1896 jump_end = 0x1D5;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1897 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1898
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1899 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM \| 1 << VDP_DEBUG_COMPOSITE)) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1900 uint32_t line = context->vcounter;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1901 if (line >= jump_end) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1902 line -= jump_end - jump_start;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1903 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1904 uint32_t total_lines = (context->flags2 & FLAG2_REGION_PAL) ? 313 : 262;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1905
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1906 if (total_lines - line <= context->border_top) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1907 line -= total_lines - context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1908 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1909 line += context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1910 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1911 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM)) {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1912 uint32_t fb = context->debug_fbs[VDP_DEBUG_CRAM] + context->debug_fb_pitch[VDP_DEBUG_CRAM] line / sizeof(uint32_t);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1913 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1914 for (int i = 0; i < 64; i++)
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1915 {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1916 for (int x = 0; x < 8; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1917 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1918 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1919 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1920 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1921 } else {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1922 for (int i = MODE4_OFFSET; i < MODE4_OFFSET+32; i++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1923 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1924 for (int x = 0; x < 16; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1925 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1926 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1927 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1928 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1929 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1930 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1931 if (
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1932 context->enabled_debuggers & (1 << VDP_DEBUG_COMPOSITE)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1933 && line < (context->inactive_start + context->border_bot + context->border_top)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1934 ) {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1935 uint32_t fb = context->debug_fbs[VDP_DEBUG_COMPOSITE] + context->debug_fb_pitch[VDP_DEBUG_COMPOSITE] line / sizeof(uint32_t);
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1936 for (int i = 0; i < LINEBUF_SIZE; i++)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1937 {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1938 *(fb++) = context->debugcolors[context->layer_debug_buf[i]];
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1939 }
1299 da1ffc4026c4 Fix latching of V32 mode bit Michael Pavone <pavone@retrodev.com> parents: 1290 diff changeset	1940 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1941 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1942
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1943 context->vcounter++;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1944 if (context->vcounter == jump_start) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1945 context->vcounter = jump_end;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1946 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1947 context->vcounter &= 0x1FF;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1948 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1949 if (context->state == PREPARING) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1950 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1951 }
1377 e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	1952 if (context->vcounter == 0x1FF) {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	1953 context->flags2 &= ~FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	1954 }
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1955
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1956 if (context->state != ACTIVE) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1957 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1958 } else if (context->hint_counter) {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1959 context->hint_counter--;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1960 } else {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1961 context->flags2 \|= FLAG2_HINT_PENDING;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1962 context->pending_hint_start = context->cycles;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1963 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1964 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1965 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1966
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1967 static void vdp_update_per_frame_debug(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1968 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1969 if (context->enabled_debuggers & (1 << VDP_DEBUG_PLANE)) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1970 uint32_t pitch;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1971 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_PLANE], &pitch);
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1972 uint16_t hscroll_mask;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1973 uint16_t v_mul;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1974 uint16_t vscroll_mask = 0x1F \| (context->regs[REG_SCROLL] & 0x30) << 1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1975 switch(context->regs[REG_SCROLL] & 0x3)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1976 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1977 case 0:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1978 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1979 v_mul = 64;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1980 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1981 case 0x1:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1982 hscroll_mask = 0x3F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1983 v_mul = 128;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1984 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1985 case 0x2:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1986 //TODO: Verify this behavior
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1987 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1988 v_mul = 0;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1989 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1990 case 0x3:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1991 hscroll_mask = 0x7F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1992 v_mul = 256;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1993 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1994 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1995 uint16_t table_address;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1996 switch(context->debug_modes[VDP_DEBUG_PLANE] % 3)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1997 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1998 case 0:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	1999 table_address = context->regs[REG_SCROLL_A] << 10 & 0xE000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2000 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2001 case 1:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2002 table_address = context->regs[REG_SCROLL_B] << 13 & 0xE000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2003 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2004 case 2:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2005 table_address = context->regs[REG_WINDOW] << 10;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2006 if (context->regs[REG_MODE_4] & BIT_H40) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2007 table_address &= 0xF000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2008 v_mul = 128;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2009 hscroll_mask = 0x3F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2010 } else {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2011 table_address &= 0xF800;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2012 v_mul = 64;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2013 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2014 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2015 vscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2016 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2017 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2018 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR & 0x3F]];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2019 for (uint16_t row = 0; row < 128; row++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2020 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2021 uint16_t row_address = table_address + (row & vscroll_mask) * v_mul;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2022 for (uint16_t col = 0; col < 128; col++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2023 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2024 uint16_t address = row_address + (col & hscroll_mask) * 2;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2025 //pccv hnnn nnnn nnnn
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2026 //
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2027 uint16_t entry = context->vdpmem[address] << 8 \| context->vdpmem[address + 1];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2028 uint8_t pal = entry >> 9 & 0x30;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2029
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2030 uint32_t dst = fb + (row pitch * 8 / sizeof(uint32_t)) + col * 8;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2031 address = (entry & 0x7FF) * 32;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2032 int y_diff = 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2033 if (entry & 0x1000) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2034 y_diff = -4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2035 address += 7 * 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2036 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2037 int x_diff = 1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2038 if (entry & 0x800) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2039 x_diff = -1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2040 address += 3;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2041 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2042 for (int y = 0; y < 8; y++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2043 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2044 uint16_t trow_address = address;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2045 uint32_t *row_dst = dst;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2046 for (int x = 0; x < 4; x++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2047 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2048 uint8_t byte = context->vdpmem[trow_address];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2049 trow_address += x_diff;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2050 uint8_t left, right;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2051 if (x_diff > 0) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2052 left = byte >> 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2053 right = byte & 0xF;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2054 } else {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2055 left = byte & 0xF;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2056 right = byte >> 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2057 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2058 *(row_dst++) = left ? context->colors[left\|pal] : bg_color;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2059 *(row_dst++) = right ? context->colors[right\|pal] : bg_color;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2060 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2061 address += y_diff;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2062 dst += pitch / sizeof(uint32_t);
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2063 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2064 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2065 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2066 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_PLANE], 1024);
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2067 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2068
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2069 if (context->enabled_debuggers & (1 << VDP_DEBUG_VRAM)) {
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2070 uint32_t pitch;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2071 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_VRAM], &pitch);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2072
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2073 uint8_t pal = (context->debug_modes[VDP_DEBUG_VRAM] % 4) << 4;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2074 for (int y = 0; y < 512; y++)
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2075 {
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2076 uint32_t line = fb + y pitch / sizeof(uint32_t);
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2077 int row = y >> 4;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2078 int yoff = y >> 1 & 7;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2079 for (int col = 0; col < 64; col++)
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2080 {
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2081 uint16_t address = (row * 64 + col) * 32 + yoff * 4;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2082 for (int x = 0; x < 4; x++)
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2083 {
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2084 uint8_t byte = context->vdpmem[address++];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2085 uint8_t left = byte >> 4 \| pal;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2086 uint8_t right = byte & 0xF \| pal;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2087 *(line++) = context->colors[left];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2088 *(line++) = context->colors[left];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2089 *(line++) = context->colors[right];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2090 *(line++) = context->colors[right];
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2091 }
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2092 }
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2093 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2094
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2095 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_VRAM], 1024);
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2096 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2097
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2098 if (context->enabled_debuggers & (1 << VDP_DEBUG_CRAM)) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2099 uint32_t starting_line = 512 - 32*4;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2100 uint32_t *line = context->debug_fbs[VDP_DEBUG_CRAM]
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2101 + context->debug_fb_pitch[VDP_DEBUG_CRAM] * starting_line / sizeof(uint32_t);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2102 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2103 for (int pal = 0; pal < 4; pal ++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2104 {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2105 uint32_t *cur;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2106 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2107 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2108 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2109 for (int offset = 0; offset < 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2110 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2111 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2112 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2113 (cur++) = context->colors[pal 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2114 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2115 *(cur++) = 0xFF000000;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2116 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2117 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t);
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2118 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2119 cur = line;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2120 for (int x = 0; x < 512; x++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2121 {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2122 *(cur++) = 0xFF000000;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2123 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2124 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2125 }
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2126 } else {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2127 for (int pal = 0; pal < 2; pal ++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2128 {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2129 uint32_t *cur;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2130 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2131 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2132 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2133 for (int offset = MODE4_OFFSET; offset < MODE4_OFFSET + 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2134 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2135 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2136 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2137 (cur++) = context->colors[pal 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2138 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2139 *(cur++) = 0xFF000000;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2140 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2141 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t);
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2142 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2143 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2144 for (int x = 0; x < 512; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2145 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2146 *(cur++) = 0xFF000000;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2147 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2148 line += context->debug_fb_pitch[VDP_DEBUG_CRAM] / sizeof(uint32_t);
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2149 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2150 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2151 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_CRAM], 512);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2152 context->debug_fbs[VDP_DEBUG_CRAM] = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_CRAM], &context->debug_fb_pitch[VDP_DEBUG_CRAM]);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2153 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2154 if (context->enabled_debuggers & (1 << VDP_DEBUG_COMPOSITE)) {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2155 render_framebuffer_updated(context->debug_fb_indices[VDP_DEBUG_COMPOSITE], LINEBUF_SIZE);
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2156 context->debug_fbs[VDP_DEBUG_COMPOSITE] = render_get_framebuffer(context->debug_fb_indices[VDP_DEBUG_COMPOSITE], &context->debug_fb_pitch[VDP_DEBUG_COMPOSITE]);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2157 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2158 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2159
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2160 void vdp_force_update_framebuffer(vdp_context *context)
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2161 {
1897 59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired Michael Pavone <pavone@retrodev.com> parents: 1894 diff changeset	2162 if (!context->fb) {
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired Michael Pavone <pavone@retrodev.com> parents: 1894 diff changeset	2163 return;
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired Michael Pavone <pavone@retrodev.com> parents: 1894 diff changeset	2164 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2165 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2166
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2167 uint16_t to_fill = lines_max - context->output_lines;
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2168 memset(
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2169 ((char )context->fb) + context->output_pitch context->output_lines,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2170 0,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2171 to_fill * context->output_pitch
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2172 );
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2173 render_framebuffer_updated(context->cur_buffer, context->h40_lines > context->output_lines / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2174 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2175 vdp_update_per_frame_debug(context);
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2176 }
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2177
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2178 static void advance_output_line(vdp_context *context)
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2179 {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2180 //This function is kind of gross because of the need to deal with vertical border busting via mode changes
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2181 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2182 uint32_t output_line = context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2183 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2184 //vcounter increment occurs much later in Mode 4
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2185 output_line++;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2186 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2187
1899 789746b1a1b3 Fix crash in OD2 Titancade scene when border is completely cropped by overscan settings Mike Pavone <pavone@retrodev.com> parents: 1897 diff changeset	2188 if (context->output_lines >= lines_max \|\| (!context->pushed_frame && output_line == context->inactive_start + context->border_top)) {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2189 //we've either filled up a full frame or we're at the bottom of screen in the current defined mode + border crop
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2190 if (!headless) {
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	2191 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2192 uint8_t is_even = context->flags2 & FLAG2_EVEN_FIELD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2193 if (context->vcounter <= context->inactive_start && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2194 is_even = !is_even;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2195 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2196 context->cur_buffer = is_even ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2197 context->pushed_frame = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2198 context->fb = NULL;
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2199 }
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2200 vdp_update_per_frame_debug(context);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2201 context->h40_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2202 context->frame++;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2203 context->output_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2204 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2205
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2206 if (output_line < context->inactive_start + context->border_bot) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2207 if (context->output_lines) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2208 output_line = context->output_lines++;//context->border_top + context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2209 } else if (!output_line && !context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2210 //top border is completely cropped so we won't hit the case below
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2211 output_line = 0;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2212 context->output_lines = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2213 context->pushed_frame = 0;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2214 } else {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2215 context->output_lines = output_line + 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2216 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2217 } else if (output_line >= 0x200 - context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2218 if (output_line == 0x200 - context->border_top) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2219 //We're at the top of the display, force context->output_lines to be zero to avoid
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2220 //potential screen rolling if the mode is changed at an inopportune time
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2221 context->output_lines = 0;
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2222 context->pushed_frame = 0;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	2223 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2224 output_line = context->output_lines++;//context->vcounter - (0x200 - context->border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2225 } else {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2226 context->output = NULL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2227 return;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2228 }
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2229 if (!context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2230 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2231 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2232 output_line += context->top_offset;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2233 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * output_line);
1271 c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	2234 #ifdef DEBUG_FB_FILL
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2235 for (int i = 0; i < LINEBUF_SIZE; i++)
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2236 {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2237 context->output[i] = 0xFFFF00FF;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2238 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2239 #endif
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2240 if (context->output && (context->regs[REG_MODE_4] & BIT_H40)) {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2241 context->h40_lines++;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	2242 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2243 }
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2244
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2245 void vdp_release_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2246 {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2247 if (context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2248 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2249 context->output = context->fb = NULL;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2250 }
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2251 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2252
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2253 void vdp_reacquire_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2254 {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2255 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2256 if (context->output_lines <= lines_max && context->output_lines > 0) {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2257 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2258 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * (context->output_lines - 1 + context->top_offset));
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2259 } else {
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2260 context->output = NULL;
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2261 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2262 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2263
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2264 static void render_border_garbage(vdp_context context, uint32_t address, uint8_t buf, uint8_t buf_off, uint16_t col)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2265 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2266 uint8_t base = col >> 9 & 0x30;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2267 for (int i = 0; i < 4; i++, address++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2268 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2269 uint8_t byte = context->vdpmem[address & 0xFFFF];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2270 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base \| byte >> 4;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2271 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base \| byte & 0xF;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2272 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2273 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2274
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2275 static void draw_right_border(vdp_context *context)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2276 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2277 uint8_t *dst = context->compositebuf + BORDER_LEFT + ((context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2278 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2279 if ((context->test_port & TEST_BIT_DISABLE) != 0) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2280 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2281 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2282 uint8_t test_layer = context->test_port >> 7 & 3;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2283 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2284 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2285 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2286 case 1:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2287 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2288 dst += BORDER_RIGHT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2289 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2290 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2291 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2292 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2293 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2294 i = 0;
1888 bd60e74fd173 Fix regression in H32 from fine scroll optimization Michael Pavone <pavone@retrodev.com> parents: 1887 diff changeset	2295 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2296 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2297 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2298 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2299 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2300 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2301 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2302 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2303 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2304 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2305 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2306 i = 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2307 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2308 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2309 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2310 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2311 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2312 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2313 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2314 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2315 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2316 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2317 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2318 dst += BORDER_RIGHT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2319 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2320 context->done_composite = dst;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2321 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2322 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2323 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2324
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2325 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; }
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	2326 #define CHECK_LIMIT if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } context->hslot++; context->cycles += slot_cycles; CHECK_ONLY
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2327 #define OUTPUT_PIXEL(slot) if ((slot) >= BG_START_SLOT) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2328 uint8_t src = context->compositebuf + ((slot) - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2329 uint32_t dst = context->output + ((slot) - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2330 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2331 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2332 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2333 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2334 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2335 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2336 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2337 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2338 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2339 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2340 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2341
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2342 #define OUTPUT_PIXEL_H40(slot) if (slot <= (BG_START_SLOT + LINEBUF_SIZE/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2343 uint8_t src = context->compositebuf + (slot - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2344 uint32_t dst = context->output + (slot - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2345 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2346 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2347 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2348 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2349 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2350 if (slot != (BG_START_SLOT + LINEBUF_SIZE/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2351 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2352 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2353 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2354 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2355 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2356 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2357 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2358
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2359 #define OUTPUT_PIXEL_H32(slot) if (slot <= (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2360 uint8_t src = context->compositebuf + (slot - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2361 uint32_t dst = context->output + (slot - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2362 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2363 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2364 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2365 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2366 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2367 if (slot != (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2368 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2369 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2370 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2371 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2372 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2373 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2374 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2375
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2376 //BG_START_SLOT => dst = 0, src = border
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2377 //BG_START_SLOT + 13/2=6, dst = 6, src = border + comp + 13
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2378 #define OUTPUT_PIXEL_MODE4(slot) if ((slot) >= BG_START_SLOT) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2379 uint8_t src = context->compositebuf + ((slot) - BG_START_SLOT) 2;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2380 uint32_t dst = context->output + ((slot) - BG_START_SLOT) 2;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2381 if ((slot) - BG_START_SLOT < BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2382 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2383 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2384 } else if ((slot) - BG_START_SLOT < (BORDER_LEFT+256)/2){\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2385 if ((slot) - BG_START_SLOT == BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2386 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2387 src++;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2388 } else {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2389 (dst++) = context->colors[(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2390 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2391 (dst++) = context->colors[(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2392 } else if ((slot) - BG_START_SLOT <= (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2393 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2394 if ((slot) - BG_START_SLOT < (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2395 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2396 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2397 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2398 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2399
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2400 #define COLUMN_RENDER_BLOCK(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2401 case startcyc:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2402 OUTPUT_PIXEL(startcyc)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2403 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2404 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2405 case ((startcyc+1)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2406 OUTPUT_PIXEL((startcyc+1)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2407 external_slot(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2408 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2409 case ((startcyc+2)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2410 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2411 render_map_1(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2412 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2413 case ((startcyc+3)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2414 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2415 render_map_2(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2416 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2417 case ((startcyc+4)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2418 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2419 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2420 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2421 case ((startcyc+5)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2422 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2423 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2424 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2425 case ((startcyc+6)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2426 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2427 render_map_3(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2428 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2429 case ((startcyc+7)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2430 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2431 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2432 CHECK_LIMIT
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2433
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2434 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2435 case startcyc:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2436 OUTPUT_PIXEL(startcyc)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2437 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2438 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2439 case (startcyc+1):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2440 /* refresh, so don't run dma src */\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2441 OUTPUT_PIXEL((startcyc+1)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2442 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2443 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2444 CHECK_ONLY\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2445 case (startcyc+2):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2446 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2447 render_map_1(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2448 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2449 case (startcyc+3):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2450 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2451 render_map_2(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2452 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2453 case (startcyc+4):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2454 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2455 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2456 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2457 case (startcyc+5):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2458 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2459 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2460 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2461 case (startcyc+6):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2462 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2463 render_map_3(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2464 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2465 case (startcyc+7):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2466 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2467 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2468 CHECK_LIMIT
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2469
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2470 #define COLUMN_RENDER_BLOCK_MODE4(column, startcyc) \
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2471 case startcyc:\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2472 OUTPUT_PIXEL_MODE4(startcyc)\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2473 read_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2474 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2475 case ((startcyc+1)&0xFF):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2476 OUTPUT_PIXEL_MODE4((startcyc+1)&0xFF)\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2477 if (column & 3) {\
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2478 scan_sprite_table_mode4(context);\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2479 } else {\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2480 external_slot(context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2481 }\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2482 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2483 case ((startcyc+2)&0xFF):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2484 OUTPUT_PIXEL_MODE4((startcyc+2)&0xFF)\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2485 fetch_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2486 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2487 case ((startcyc+3)&0xFF):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2488 OUTPUT_PIXEL_MODE4((startcyc+3)&0xFF)\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2489 render_map_mode4(context->vcounter, column, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2490 CHECK_LIMIT
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2491
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2492 #define CHECK_LIMIT_HSYNC(slot) \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2493 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2494 if (slot >= HSYNC_SLOT_H40 && slot < HSYNC_END_H40) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2495 context->cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2496 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2497 context->cycles += slot_cycles;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2498 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2499 if (slot == 182) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2500 context->hslot = 229;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2501 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2502 context->hslot++;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2503 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2504 CHECK_ONLY
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	2505
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2506 #define SPRITE_RENDER_H40(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2507 case slot:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2508 OUTPUT_PIXEL_H40(slot)\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2509 if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2510 advance_output_line(context);\
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2511 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2512 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2513 }\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2514 }\
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2515 if (slot == 168 \|\| slot == 247 \|\| slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2516 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2517 context,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2518 context->sprite_draw_list[context->cur_slot].address,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2519 context->tmp_buf_b,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2520 context->buf_b_off + (slot == 247 ? 0 : 8),\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2521 slot == 247 ? context->col_1 : context->col_2\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2522 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2523 if (slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2524 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2525 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2526 }\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2527 } else if (slot == 243) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2528 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2529 context,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2530 context->sprite_draw_list[context->cur_slot].address,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2531 context->tmp_buf_a,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2532 context->buf_a_off,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2533 context->col_1\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2534 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2535 } else if (slot == 169) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2536 draw_right_border(context);\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2537 }\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2538 render_sprite_cells( context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2539 scan_sprite_table(context->vcounter, context);\
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2540 CHECK_LIMIT_HSYNC(slot)
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	2541
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2542 //Note that the line advancement check will fail if BG_START_SLOT is > 6
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2543 //as we're bumping up against the hcounter jump
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2544 #define SPRITE_RENDER_H32(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2545 case slot:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2546 OUTPUT_PIXEL_H32(slot)\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2547 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2548 advance_output_line(context);\
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2549 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2550 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2551 }\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2552 }\
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2553 if (slot == 136 \|\| slot == 247 \|\| slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2554 render_border_garbage(\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2555 context,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2556 context->sprite_draw_list[context->cur_slot].address,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2557 context->tmp_buf_b,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2558 context->buf_b_off + (slot == 247 ? 0 : 8),\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2559 slot == 247 ? context->col_1 : context->col_2\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2560 );\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2561 if (slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2562 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2563 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2564 }\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2565 } else if (slot == 137) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2566 draw_right_border(context);\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2567 }\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2568 render_sprite_cells( context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2569 scan_sprite_table(context->vcounter, context);\
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	2570 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2571 if (slot == 147) {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2572 context->hslot = 233;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2573 } else {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2574 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2575 }\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2576 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2577 CHECK_ONLY
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2578
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2579 #define MODE4_CHECK_SLOT_LINE(slot) \
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2580 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2581 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2582 advance_output_line(context);\
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2583 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2584 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2585 }\
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2586 }\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2587 if ((slot) == 147) {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2588 context->hslot = 233;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2589 } else {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2590 context->hslot++;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2591 }\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2592 context->cycles += slot_cycles;\
1163 b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2593 if ((slot+1) == LINE_CHANGE_MODE4) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2594 vdp_advance_line(context);\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2595 if (context->vcounter == 192) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2596 return;\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2597 }\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2598 }\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2599 CHECK_ONLY
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2600
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2601 #define CALC_SLOT(slot, increment) ((slot+increment) > 147 && (slot+increment) < 233 ? (slot+increment-148+233): (slot+increment))
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2602
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2603 #define SPRITE_RENDER_H32_MODE4(slot) \
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2604 case slot:\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2605 OUTPUT_PIXEL_MODE4(slot)\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2606 read_sprite_x_mode4(context);\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2607 MODE4_CHECK_SLOT_LINE(slot)\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2608 case CALC_SLOT(slot, 1):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2609 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 1))\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2610 read_sprite_x_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2611 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot,1))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2612 case CALC_SLOT(slot, 2):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2613 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 2))\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2614 fetch_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2615 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 2))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2616 case CALC_SLOT(slot, 3):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2617 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 3))\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2618 render_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2619 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 3))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2620 case CALC_SLOT(slot, 4):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2621 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 4))\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2622 fetch_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2623 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 4))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2624 case CALC_SLOT(slot, 5):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2625 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 5))\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2626 render_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2627 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 5))
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2628
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2629 static uint32_t dummy_buffer[LINEBUF_SIZE];
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2630 static void vdp_h40_line(vdp_context * context)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2631 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2632 uint16_t address;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2633 uint32_t mask;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2634 uint32_t const slot_cycles = MCLKS_SLOT_H40;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2635 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2636 uint8_t test_layer = context->test_port >> 7 & 3;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2637
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2638 //165
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2639 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2640 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2641 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2642 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2643 //pretty consistently
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2644 context->vscroll_latch[0] = context->vsram[0];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2645 context->vscroll_latch[1] = context->vsram[1];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2646 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2647 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2648 //166
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2649 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2650 //167
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2651 context->sprite_index = 0x80;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2652 context->slot_counter = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2653 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2654 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2655 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2656 context->tmp_buf_b, context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2657 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2658 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2659 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2660 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2661 //168
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2662 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2663 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2664 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2665 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2666 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2667 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2668 );
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2669
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2670 //Do palette lookup for end of previous line
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2671 uint8_t src = context->compositebuf + (LINE_CHANGE_H40 - BG_START_SLOT) 2;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2672 uint32_t dst = context->output + (LINE_CHANGE_H40 - BG_START_SLOT) 2;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2673 if (context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2674 if (test_layer) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2675 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2676 {
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2677 (dst++) = context->colors[(src++)];
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2678 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2679 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2680 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2681 {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2682 if (*src & 0x3F) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2683 (dst++) = context->colors[(src++)];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2684 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2685 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2686 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2687 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2688 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2689 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2690 advance_output_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2691 //168-242 (inclusive)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2692 for (int i = 0; i < 28; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2693 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2694 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2695 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2696 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2697 //243
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2698 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2699 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2700 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2701 context->tmp_buf_a,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2702 context->buf_a_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2703 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2704 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2705 //244
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2706 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2707 mask = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2708 if (context->regs[REG_MODE_3] & 0x2) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2709 mask \|= 0xF8;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2710 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2711 if (context->regs[REG_MODE_3] & 0x1) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2712 mask \|= 0x7;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2713 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2714 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2715 address += (context->vcounter & mask) * 4;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2716 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	2717 context->hscroll_a_fine = context->hscroll_a & 0xF;
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2718 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	2719 context->hscroll_b_fine = context->hscroll_b & 0xF;
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2720 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2721 //243-246 inclusive
1877 9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2722 for (int i = 0; i < 3; i++)
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2723 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2724 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2725 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2726 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2727 //247
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2728 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2729 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2730 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2731 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2732 context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2733 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2734 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2735 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2736 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2737 //248
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2738 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2739 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2740 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2741 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2742 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2743 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2744 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2745 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2746 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2747 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2748 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2749 //250
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2750 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2751 scan_sprite_table(context->vcounter, context);
1877 9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2752 //251
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2753 scan_sprite_table(context->vcounter, context);//Just a guess
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2754 //252
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2755 scan_sprite_table(context->vcounter, context);//Just a guess
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2756 //254
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2757 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2758 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2759 //255
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2760 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2761 context->flags \|= FLAG_DOT_OFLOW;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2762 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2763 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2764 //0
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2765 scan_sprite_table(context->vcounter, context);//Just a guess
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2766 //seems like the sprite table scan fills a shift register
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2767 //values are FIFO, but unused slots precede used slots
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2768 //so we set cur_slot to slot_counter and let it wrap around to
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2769 //the beginning of the list
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2770 context->cur_slot = context->slot_counter;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2771 context->sprite_x_offset = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2772 context->sprite_draws = MAX_SPRITES_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2773 //background planes and layer compositing
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2774 for (int col = 0; col < 42; col+=2)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2775 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2776 read_map_scroll_a(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2777 render_map_1(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2778 render_map_2(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2779 read_map_scroll_b(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2780 render_map_3(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2781 render_map_output(context->vcounter, col, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2782 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2783 //sprite rendering phase 2
1877 9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2784 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2785 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2786 read_sprite_x(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2787 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2788 //163
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2789 context->cur_slot = MAX_SPRITES_LINE-1;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2790 memset(context->linebuf, 0, LINEBUF_SIZE);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2791 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2792 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2793 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2794 context->tmp_buf_a, context->buf_a_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2795 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2796 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2797 context->flags &= ~FLAG_MASKED;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2798 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2799 //164
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2800 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2801 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2802 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2803 context->tmp_buf_a, context->buf_a_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2804 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2805 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2806 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2807 context->cycles += MCLKS_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2808 vdp_advance_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2809 src = context->compositebuf;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2810 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2811 return;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2812 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2813 dst = context->output;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2814 if (test_layer) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2815 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2816 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2817 (dst++) = context->colors[(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2818 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2819 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2820 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2821 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2822 if (*src & 0x3F) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2823 (dst++) = context->colors[(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2824 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2825 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2826 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2827 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2828 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2829 }
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	2830 static void vdp_h40(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2831 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2832 uint16_t address;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2833 uint32_t mask;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2834 uint32_t const slot_cycles = MCLKS_SLOT_H40;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2835 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2836 uint8_t test_layer = context->test_port >> 7 & 3;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2837 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2838 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2839 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2840 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2841 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2842 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2843 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2844 for (;;)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2845 {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2846 case 165:
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2847 //only consider doing a line at a time if the FIFO is empty, there are no pending reads and there is no DMA running
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	2848 if (context->fifo_read == -1 && !(context->flags & FLAG_DMA_RUN) && ((context->cd & 1) \|\| (context->flags & FLAG_READ_FETCHED))) {
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2849 while (target_cycles - context->cycles >= MCLKS_LINE && context->state != PREPARING && context->vcounter != context->inactive_start) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2850 vdp_h40_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2851 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2852 CHECK_ONLY
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2853 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2854 //This shouldn't happen normally, but it can theoretically
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2855 //happen when doing border busting
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2856 context->output = dummy_buffer;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2857 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2858 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2859 OUTPUT_PIXEL(165)
1432 5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2860 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2861 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2862 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2863 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2864 //pretty consistently
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2865 context->vscroll_latch[0] = context->vsram[0];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2866 context->vscroll_latch[1] = context->vsram[1];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	2867 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2868 if (context->state == PREPARING) {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2869 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2870 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2871 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2872 }
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2873 CHECK_LIMIT
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2874 case 166:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2875 OUTPUT_PIXEL(166)
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2876 if (context->state == PREPARING) {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2877 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2878 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2879 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2880 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2881 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2882 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2883 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2884 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	2885 }
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2886 CHECK_LIMIT
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2887 //sprite attribute table scan starts
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2888 case 167:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2889 OUTPUT_PIXEL(167)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2890 context->sprite_index = 0x80;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2891 context->slot_counter = 0;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2892 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2893 context,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2894 context->sprite_draw_list[context->cur_slot].address,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2895 context->tmp_buf_b, context->buf_b_off,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2896 context->col_1
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2897 );
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2898 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2899 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2900 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2901 SPRITE_RENDER_H40(168)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2902 SPRITE_RENDER_H40(169)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2903 SPRITE_RENDER_H40(170)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2904 SPRITE_RENDER_H40(171)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2905 SPRITE_RENDER_H40(172)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2906 SPRITE_RENDER_H40(173)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2907 SPRITE_RENDER_H40(174)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2908 SPRITE_RENDER_H40(175)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2909 SPRITE_RENDER_H40(176)
1365 6dd2c3edd0b5 Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2 Michael Pavone <pavone@retrodev.com> parents: 1362 diff changeset	2910 SPRITE_RENDER_H40(177)//End of border?
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2911 SPRITE_RENDER_H40(178)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2912 SPRITE_RENDER_H40(179)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2913 SPRITE_RENDER_H40(180)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2914 SPRITE_RENDER_H40(181)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2915 SPRITE_RENDER_H40(182)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2916 SPRITE_RENDER_H40(229)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2917 //!HSYNC asserted
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2918 SPRITE_RENDER_H40(230)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2919 SPRITE_RENDER_H40(231)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2920 case 232:
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2921 external_slot(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2922 CHECK_LIMIT_HSYNC(232)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2923 SPRITE_RENDER_H40(233)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2924 SPRITE_RENDER_H40(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2925 SPRITE_RENDER_H40(235)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2926 SPRITE_RENDER_H40(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2927 SPRITE_RENDER_H40(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2928 SPRITE_RENDER_H40(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2929 SPRITE_RENDER_H40(239)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2930 SPRITE_RENDER_H40(240)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2931 SPRITE_RENDER_H40(241)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2932 SPRITE_RENDER_H40(242)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2933 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2934 case 244:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2935 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2936 mask = 0;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2937 if (context->regs[REG_MODE_3] & 0x2) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2938 mask \|= 0xF8;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2939 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2940 if (context->regs[REG_MODE_3] & 0x1) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2941 mask \|= 0x7;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2942 }
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2943 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2944 address += (context->vcounter & mask) * 4;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2945 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	2946 context->hscroll_a_fine = context->hscroll_a & 0xF;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2947 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	2948 context->hscroll_b_fine = context->hscroll_b & 0xF;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2949 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	2950 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2951 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2952 context->cycles += h40_hsync_cycles[14];
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2953 CHECK_ONLY //provides "garbage" for border when plane A selected
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2954 //!HSYNC high
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2955 SPRITE_RENDER_H40(245)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2956 SPRITE_RENDER_H40(246)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2957 SPRITE_RENDER_H40(247) //provides "garbage" for border when plane B selected
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2958 SPRITE_RENDER_H40(248) //provides "garbage" for border when plane B selected
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2959 case 249:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2960 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2961 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2962 SPRITE_RENDER_H40(250)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2963 case 251:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2964 render_map_1(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2965 scan_sprite_table(context->vcounter, context);//Just a guess
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2966 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2967 case 252:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2968 render_map_2(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2969 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2970 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2971 case 253:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2972 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2973 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2974 SPRITE_RENDER_H40(254)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2975 case 255:
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	2976 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	2977 context->flags \|= FLAG_DOT_OFLOW;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	2978 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2979 render_map_3(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2980 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2981 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2982 case 0:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2983 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2984 scan_sprite_table(context->vcounter, context);//Just a guess
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2985 //seems like the sprite table scan fills a shift register
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2986 //values are FIFO, but unused slots precede used slots
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2987 //so we set cur_slot to slot_counter and let it wrap around to
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2988 //the beginning of the list
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	2989 context->cur_slot = context->slot_counter;
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	2990 context->sprite_x_offset = 0;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	2991 context->sprite_draws = MAX_SPRITES_LINE;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2992 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2993 COLUMN_RENDER_BLOCK(2, 1)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2994 COLUMN_RENDER_BLOCK(4, 9)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2995 COLUMN_RENDER_BLOCK(6, 17)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2996 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2997 COLUMN_RENDER_BLOCK(10, 33)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2998 COLUMN_RENDER_BLOCK(12, 41)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	2999 COLUMN_RENDER_BLOCK(14, 49)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3000 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3001 COLUMN_RENDER_BLOCK(18, 65)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3002 COLUMN_RENDER_BLOCK(20, 73)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3003 COLUMN_RENDER_BLOCK(22, 81)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3004 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3005 COLUMN_RENDER_BLOCK(26, 97)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3006 COLUMN_RENDER_BLOCK(28, 105)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3007 COLUMN_RENDER_BLOCK(30, 113)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3008 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3009 COLUMN_RENDER_BLOCK(34, 129)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3010 COLUMN_RENDER_BLOCK(36, 137)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3011 COLUMN_RENDER_BLOCK(38, 145)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3012 COLUMN_RENDER_BLOCK_REFRESH(40, 153)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3013 case 161:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3014 OUTPUT_PIXEL(161)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3015 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3016 CHECK_LIMIT
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3017 case 162:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3018 OUTPUT_PIXEL(162)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3019 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3020 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3021 //sprite render to line buffer starts
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3022 case 163:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3023 OUTPUT_PIXEL(163)
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3024 context->cur_slot = MAX_SPRITES_LINE-1;
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3025 memset(context->linebuf, 0, LINEBUF_SIZE);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3026 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3027 context,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3028 context->sprite_draw_list[context->cur_slot].address,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3029 context->tmp_buf_a, context->buf_a_off,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3030 context->col_1
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3031 );
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3032 context->flags &= ~FLAG_MASKED;
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3033 render_sprite_cells(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3034 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3035 case 164:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3036 OUTPUT_PIXEL(164)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3037 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3038 context,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3039 context->sprite_draw_list[context->cur_slot].address,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3040 context->tmp_buf_a, context->buf_a_off + 8,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3041 context->col_2
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3042 );
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3043 render_sprite_cells(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3044 if (context->flags & FLAG_DMA_RUN) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3045 run_dma_src(context, -1);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3046 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3047 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3048 context->cycles += slot_cycles;
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3049 vdp_advance_line(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3050 CHECK_ONLY
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3051 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3052 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3053 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3054 context->cycles += slot_cycles;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3055 return;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3056 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3057 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3058
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	3059 static void vdp_h32(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3060 {
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3061 uint16_t address;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3062 uint32_t mask;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3063 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3064 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3065 uint8_t test_layer = context->test_port >> 7 & 3;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3066 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3067 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3068 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3069 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3070 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3071 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3072 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3073 for (;;)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3074 {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3075 case 133:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3076 OUTPUT_PIXEL(133)
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3077 if (context->state == PREPARING) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3078 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3079 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3080 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3081 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3082 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3083 case 134:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3084 OUTPUT_PIXEL(134)
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3085 if (context->state == PREPARING) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3086 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3087 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3088 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3089 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3090 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3091 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3092 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3093 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3094 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3095 CHECK_LIMIT
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3096 //sprite attribute table scan starts
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3097 case 135:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3098 OUTPUT_PIXEL(135)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3099 context->sprite_index = 0x80;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3100 context->slot_counter = 0;
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3101 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3102 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3103 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3104 context->tmp_buf_b, context->buf_b_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3105 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3106 );
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3107 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3108 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3109 CHECK_LIMIT
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3110 SPRITE_RENDER_H32(136)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3111 SPRITE_RENDER_H32(137)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3112 SPRITE_RENDER_H32(138)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3113 SPRITE_RENDER_H32(139)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3114 SPRITE_RENDER_H32(140)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3115 SPRITE_RENDER_H32(141)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3116 SPRITE_RENDER_H32(142)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3117 SPRITE_RENDER_H32(143)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3118 SPRITE_RENDER_H32(144)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3119 case 145:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3120 OUTPUT_PIXEL(145)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3121 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3122 CHECK_LIMIT
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3123 SPRITE_RENDER_H32(146)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3124 SPRITE_RENDER_H32(147)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3125 SPRITE_RENDER_H32(233)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3126 SPRITE_RENDER_H32(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3127 SPRITE_RENDER_H32(235)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3128 //HSYNC start
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3129 SPRITE_RENDER_H32(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3130 SPRITE_RENDER_H32(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3131 SPRITE_RENDER_H32(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3132 SPRITE_RENDER_H32(239)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3133 SPRITE_RENDER_H32(240)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3134 SPRITE_RENDER_H32(241)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3135 SPRITE_RENDER_H32(242)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3136 case 243:
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3137 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3138 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3139 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3140 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3141 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3142 //to confirm that one way or another
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3143 context->vscroll_latch[0] = context->vsram[0];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3144 context->vscroll_latch[1] = context->vsram[1];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3145 }
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3146 external_slot(context);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3147 //provides "garbage" for border when plane A selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3148 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3149 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3150 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3151 context->tmp_buf_a,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3152 context->buf_a_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3153 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3154 );
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3155 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3156 case 244:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3157 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3158 mask = 0;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3159 if (context->regs[REG_MODE_3] & 0x2) {
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3160 mask \|= 0xF8;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3161 }
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3162 if (context->regs[REG_MODE_3] & 0x1) {
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3163 mask \|= 0x7;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3164 }
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3165 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3166 address += (context->vcounter & mask) * 4;
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3167 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	3168 context->hscroll_a_fine = context->hscroll_a & 0xF;
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3169 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
1888 bd60e74fd173 Fix regression in H32 from fine scroll optimization Michael Pavone <pavone@retrodev.com> parents: 1887 diff changeset	3170 context->hscroll_b_fine = context->hscroll_b & 0xF;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3171 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3172 CHECK_LIMIT //provides "garbage" for border when plane A selected
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3173 SPRITE_RENDER_H32(245)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3174 SPRITE_RENDER_H32(246)
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3175 SPRITE_RENDER_H32(247) //provides "garbage" for border when plane B selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3176 SPRITE_RENDER_H32(248) //provides "garbage" for border when plane B selected
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3177 //!HSYNC high
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3178 case 249:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3179 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3180 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3181 SPRITE_RENDER_H32(250)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3182 case 251:
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3183 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3184 context->flags \|= FLAG_DOT_OFLOW;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3185 }
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3186 render_map_1(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3187 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3188 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3189 case 252:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3190 render_map_2(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3191 scan_sprite_table(context->vcounter, context);//Just a guess
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3192 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3193 case 253:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3194 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3195 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3196 case 254:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3197 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3198 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3199 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3200 case 255:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3201 render_map_3(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3202 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3203 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3204 case 0:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3205 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3206 scan_sprite_table(context->vcounter, context);//Just a guess
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3207 //reverse context slot counter so it counts the number of sprite slots
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3208 //filled rather than the number of available slots
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3209 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3210 context->cur_slot = context->slot_counter;
1873 041a381b9f0d Fix regression in sprite rendering in H32 mode Michael Pavone <pavone@retrodev.com> parents: 1871 diff changeset	3211 context->sprite_x_offset = 0;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3212 context->sprite_draws = MAX_SPRITES_LINE_H32;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3213 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3214 COLUMN_RENDER_BLOCK(2, 1)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3215 COLUMN_RENDER_BLOCK(4, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3216 COLUMN_RENDER_BLOCK(6, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3217 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3218 COLUMN_RENDER_BLOCK(10, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3219 COLUMN_RENDER_BLOCK(12, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3220 COLUMN_RENDER_BLOCK(14, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3221 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3222 COLUMN_RENDER_BLOCK(18, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3223 COLUMN_RENDER_BLOCK(20, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3224 COLUMN_RENDER_BLOCK(22, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3225 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3226 COLUMN_RENDER_BLOCK(26, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3227 COLUMN_RENDER_BLOCK(28, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3228 COLUMN_RENDER_BLOCK(30, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3229 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3230 case 129:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3231 OUTPUT_PIXEL(129)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3232 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3233 CHECK_LIMIT
1269 ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1267 diff changeset	3234 case 130: {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3235 OUTPUT_PIXEL(130)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3236 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3237 CHECK_LIMIT
1269 ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1267 diff changeset	3238 }
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3239 //sprite render to line buffer starts
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3240 case 131:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3241 OUTPUT_PIXEL(131)
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3242 context->cur_slot = MAX_SPRITES_LINE_H32-1;
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3243 memset(context->linebuf, 0, LINEBUF_SIZE);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3244 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3245 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3246 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3247 context->tmp_buf_a, context->buf_a_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3248 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3249 );
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3250 context->flags &= ~FLAG_MASKED;
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3251 render_sprite_cells(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3252 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3253 case 132:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3254 OUTPUT_PIXEL(132)
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3255 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3256 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3257 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3258 context->tmp_buf_a, context->buf_a_off + 8,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3259 context->col_2
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3260 );
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3261 render_sprite_cells(context);
1173 d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3262 if (context->flags & FLAG_DMA_RUN) {
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3263 run_dma_src(context, -1);
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3264 }
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3265 context->hslot++;
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3266 context->cycles += slot_cycles;
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3267 vdp_advance_line(context);
1173 d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3268 CHECK_ONLY
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3269 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3270 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3271 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3272 context->cycles += MCLKS_SLOT_H32;
503 eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	3273 }
eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	3274 }
eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	3275
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3276 static void vdp_h32_mode4(vdp_context * context, uint32_t target_cycles)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3277 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3278 uint16_t address;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3279 uint32_t mask;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3280 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3281 uint8_t bgindex = 0x10 \| (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3282 uint8_t test_layer = context->test_port >> 7 & 3;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3283 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3284 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3285 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3286 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3287 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3288 switch(context->hslot)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3289 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3290 for (;;)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3291 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3292 //sprite rendering starts
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3293 SPRITE_RENDER_H32_MODE4(137)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3294 SPRITE_RENDER_H32_MODE4(143)
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3295 case 234:
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3296 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3297 CHECK_LIMIT
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3298 case 235:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3299 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3300 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3301 //!HSYNC low
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3302 case 236:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3303 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3304 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3305 case 237:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3306 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3307 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3308 case 238:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3309 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3310 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3311 SPRITE_RENDER_H32_MODE4(239)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3312 SPRITE_RENDER_H32_MODE4(245)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3313 case 251:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3314 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3315 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3316 case 252:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3317 external_slot(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3318 if (context->regs[REG_MODE_1] & BIT_HSCRL_LOCK && context->vcounter < 16) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3319 context->hscroll_a = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3320 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3321 context->hscroll_a = context->regs[REG_X_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3322 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3323 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3324 case 253:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3325 context->sprite_index = 0;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3326 context->slot_counter = MAX_DRAWS_H32_MODE4;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3327 scan_sprite_table_mode4(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3328 CHECK_LIMIT
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3329 case 254:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3330 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3331 CHECK_LIMIT
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3332 case 255:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3333 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3334 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3335 case 0: {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3336 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3337 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3338 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3339 case 1:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3340 scan_sprite_table_mode4(context);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3341 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3342 case 2:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3343 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3344 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3345 case 3:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3346 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3347 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3348 case 4: {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3349 scan_sprite_table_mode4(context);
1121 1913f9c28003 Less broken Mode 4 implementation Michael Pavone <pavone@retrodev.com> parents: 1120 diff changeset	3350 context->buf_a_off = 8;
1913f9c28003 Less broken Mode 4 implementation Michael Pavone <pavone@retrodev.com> parents: 1120 diff changeset	3351 memset(context->tmp_buf_a, 0, 8);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3352 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3353 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3354 COLUMN_RENDER_BLOCK_MODE4(0, 5)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3355 COLUMN_RENDER_BLOCK_MODE4(1, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3356 COLUMN_RENDER_BLOCK_MODE4(2, 13)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3357 COLUMN_RENDER_BLOCK_MODE4(3, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3358 COLUMN_RENDER_BLOCK_MODE4(4, 21)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3359 COLUMN_RENDER_BLOCK_MODE4(5, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3360 COLUMN_RENDER_BLOCK_MODE4(6, 29)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3361 COLUMN_RENDER_BLOCK_MODE4(7, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3362 COLUMN_RENDER_BLOCK_MODE4(8, 37)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3363 COLUMN_RENDER_BLOCK_MODE4(9, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3364 COLUMN_RENDER_BLOCK_MODE4(10, 45)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3365 COLUMN_RENDER_BLOCK_MODE4(11, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3366 COLUMN_RENDER_BLOCK_MODE4(12, 53)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3367 COLUMN_RENDER_BLOCK_MODE4(13, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3368 COLUMN_RENDER_BLOCK_MODE4(14, 61)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3369 COLUMN_RENDER_BLOCK_MODE4(15, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3370 COLUMN_RENDER_BLOCK_MODE4(16, 69)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3371 COLUMN_RENDER_BLOCK_MODE4(17, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3372 COLUMN_RENDER_BLOCK_MODE4(18, 77)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3373 COLUMN_RENDER_BLOCK_MODE4(19, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3374 COLUMN_RENDER_BLOCK_MODE4(20, 85)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3375 COLUMN_RENDER_BLOCK_MODE4(21, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3376 COLUMN_RENDER_BLOCK_MODE4(22, 93)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3377 COLUMN_RENDER_BLOCK_MODE4(23, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3378 COLUMN_RENDER_BLOCK_MODE4(24, 101)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3379 COLUMN_RENDER_BLOCK_MODE4(25, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3380 COLUMN_RENDER_BLOCK_MODE4(26, 109)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3381 COLUMN_RENDER_BLOCK_MODE4(27, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3382 COLUMN_RENDER_BLOCK_MODE4(28, 117)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3383 COLUMN_RENDER_BLOCK_MODE4(29, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3384 COLUMN_RENDER_BLOCK_MODE4(30, 125)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3385 COLUMN_RENDER_BLOCK_MODE4(31, 129)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3386 case 133:
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3387 OUTPUT_PIXEL_MODE4(133)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3388 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3389 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3390 case 134:
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3391 OUTPUT_PIXEL_MODE4(134)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3392 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3393 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3394 case 135:
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3395 OUTPUT_PIXEL_MODE4(135)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3396 external_slot(context);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3397 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3398 case 136: {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3399 OUTPUT_PIXEL_MODE4(136)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3400 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3401 //set things up for sprite rendering in the next slot
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3402 memset(context->linebuf, 0, LINEBUF_SIZE);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3403 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3404 context->sprite_draws = MAX_DRAWS_H32_MODE4;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3405 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3406 }}
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3407 default:
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3408 context->hslot++;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3409 context->cycles += MCLKS_SLOT_H32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3410 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3411 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3412
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3413 static void inactive_test_output(vdp_context *context, uint8_t is_h40, uint8_t test_layer)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3414 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3415 uint8_t max_slot = is_h40 ? 169 : 136;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3416 if (context->hslot > max_slot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3417 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3418 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3419 uint8_t dst = context->compositebuf + (context->hslot >> 3) SCROLL_BUFFER_DRAW;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3420 int32_t len;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3421 uint32_t src_off;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3422 if (context->hslot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3423 dst -= SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3424 src_off = 0;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3425 len = context->hslot == max_slot ? BORDER_RIGHT : SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3426 } else {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3427 src_off = SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3428 len = BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3429 }
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3430 uint8_t *src = NULL;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3431 if (test_layer == 2) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3432 //plane A
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	3433 src_off += context->buf_a_off - (context->hscroll_a & 0xF);
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3434 src = context->tmp_buf_a;
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	3435 } else if (test_layer == 3){
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3436 //plane B
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	3437 src_off += context->buf_b_off - (context->hscroll_b & 0xF);
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3438 src = context->tmp_buf_b;
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	3439 } else {
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	3440 //sprite layer
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3441 memset(dst, 0, len);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3442 dst += len;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3443 len = 0;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3444 }
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3445 if (src) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3446 for (; len >=0; len--, dst++, src_off++)
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3447 {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3448 *dst = src[src_off & SCROLL_BUFFER_MASK] & 0x3F;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3449 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3450 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3451 context->done_composite = dst;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3452 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3453 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3454 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3455
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3456 static void check_switch_inactive(vdp_context *context, uint8_t is_h40)
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3457 {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3458 //technically the second hcounter check should be different for H40, but this is probably close enough for now
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3459 if (context->state == ACTIVE && context->vcounter == context->inactive_start && (context->hslot >= (is_h40 ? 167 : 135) \|\| context->hslot < 133)) {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3460 context->state = INACTIVE;
2010 19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line Mike Pavone <pavone@retrodev.com> parents: 2009 diff changeset	3461 context->cur_slot = MAX_SPRITES_LINE-1;
19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line Mike Pavone <pavone@retrodev.com> parents: 2009 diff changeset	3462 context->sprite_x_offset = 0;
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3463 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3464 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3465
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3466 static void vdp_inactive(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3467 {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3468 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3469 uint8_t index_reset_value, max_draws, max_sprites;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3470 uint16_t vint_line, active_line;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3471
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3472 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3473 if (is_h40) {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3474 latch_slot = 165;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3475 buf_clear_slot = 163;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3476 index_reset_slot = 167;
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	3477 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3478 max_draws = MAX_SPRITES_LINE-1;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3479 max_sprites = MAX_SPRITES_LINE;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3480 index_reset_value = 0x80;
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	3481 vint_slot = VINT_SLOT_H40;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3482 line_change = LINE_CHANGE_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3483 jump_start = 182;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3484 jump_dest = 229;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3485 } else {
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	3486 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3487 max_draws = MAX_SPRITES_LINE_H32-1;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3488 max_sprites = MAX_SPRITES_LINE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3489 buf_clear_slot = 128;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3490 index_reset_slot = 132;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3491 index_reset_value = 0x80;
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	3492 vint_slot = VINT_SLOT_H32;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3493 line_change = LINE_CHANGE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3494 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3495 jump_dest = 233;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3496 latch_slot = 243;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3497 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3498 vint_line = context->inactive_start;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3499 active_line = 0x1FF;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3500 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3501 latch_slot = 220;
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3502 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3503 } else {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3504 latch_slot = 220;
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	3505 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3506 max_draws = MAX_DRAWS_H32_MODE4;
1278 34d3cb05014d Fix VDP buffer overrun that was causing sprite flickering in some games Michael Pavone <pavone@retrodev.com> parents: 1273 diff changeset	3507 max_sprites = 8;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3508 buf_clear_slot = 136;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3509 index_reset_slot = 253;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3510 index_reset_value = 0;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3511 vint_line = context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3512 vint_slot = VINT_SLOT_MODE4;
1177 67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency Michael Pavone <pavone@retrodev.com> parents: 1175 diff changeset	3513 line_change = LINE_CHANGE_MODE4;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3514 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3515 jump_dest = 233;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3516 if (context->regs[REG_MODE_1] & BIT_MODE_4) {
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3517 active_line = 0x1FF;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3518 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3519 //never active unless either mode 4 or mode 5 is turned on
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3520 active_line = 0x200;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3521 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3522 }
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3523 uint32_t *dst;
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3524 uint8_t *debug_dst;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3525 if (context->output && context->hslot >= BG_START_SLOT && context->hslot < bg_end_slot) {
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3526 dst = context->output + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3527 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3528 } else {
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3529 dst = NULL;
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3530 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3531
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3532 uint8_t test_layer = context->test_port >> 7 & 3;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3533
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3534 while(context->cycles < target_cycles)
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3535 {
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3536 check_switch_inactive(context, is_h40);
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3537 if (context->hslot == BG_START_SLOT && context->output) {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3538 dst = context->output + (context->hslot - BG_START_SLOT) * 2;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3539 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3540 } else if (context->hslot == bg_end_slot) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	3541 advance_output_line(context);
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3542 dst = NULL;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3543 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3544 //this will need some tweaking to properly interact with 128K mode,
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3545 //but this should be good enough for now
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3546 context->serial_address += 1024;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3547 if (test_layer) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3548 switch (context->hslot & 7)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3549 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3550 case 3:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3551 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3552 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3553 case 4:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3554 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3555 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3556 case 7:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3557 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3558 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3559 case 0:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3560 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off+8, context->col_2);
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	3561 break;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	3562 case 1:
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3563 inactive_test_output(context, is_h40, test_layer);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3564 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3565 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3566 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3567
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3568 if (context->hslot == buf_clear_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3569 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3570 context->cur_slot = max_draws;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3571 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3572 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3573 context->sprite_draws = MAX_DRAWS_H32_MODE4;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3574 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3575 memset(context->linebuf, 0, LINEBUF_SIZE);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3576 } else if (context->hslot == index_reset_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3577 context->sprite_index = index_reset_value;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3578 context->slot_counter = mode_5 ? 0 : max_sprites;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3579 } else if (context->hslot == latch_slot) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3580 //it seems unlikely to me that vscroll actually gets latched when the display is off
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3581 //but it's the only straightforward way to reconcile what I'm seeing between Skitchin
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3582 //(which seems to expect vscroll to be latched early) and the intro of Gunstar Heroes
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3583 //(which disables the display and ends up with garbage if vscroll is latched during that period)
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3584 //without it. Some more tests are definitely needed
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3585 context->vscroll_latch[0] = context->vsram[0];
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	3586 context->vscroll_latch[1] = context->vsram[1];
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3587 } else if (context->vcounter == vint_line && context->hslot == vint_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3588 context->flags2 \|= FLAG2_VINT_PENDING;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3589 context->pending_vint_start = context->cycles;
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	3590 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	3591 context->flags2 ^= FLAG2_EVEN_FIELD;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3592 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3593
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3594 if (dst) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3595 uint8_t bg_index;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3596 uint32_t bg_color;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3597 if (mode_5) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3598 bg_index = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3599 bg_color = context->colors[bg_index];
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3600 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3601 bg_index = 0x10 + (context->regs[REG_BG_COLOR] & 0xF);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3602 bg_color = context->colors[MODE4_OFFSET + bg_index];
1913 2c742812bcbb Fix regression at the very start of The Revenge of Shinobi Michael Pavone <pavone@retrodev.com> parents: 1906 diff changeset	3603 } else {
2c742812bcbb Fix regression at the very start of The Revenge of Shinobi Michael Pavone <pavone@retrodev.com> parents: 1906 diff changeset	3604 bg_color = render_map_color(0, 0, 0);
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3605 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3606 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3607 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3608 if (!(pixel & 0x3F \| test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3609 pixel = pixel & 0xC0 \| bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3610 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3611 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3612 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3613 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3614 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3615 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3616 } else {
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3617 *(dst++) = bg_color;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3618 *(debug_dst++) = DBG_SRC_BG;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3619 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3620 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3621 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3622 if (!(pixel & 0x3F \| test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3623 pixel = pixel & 0xC0 \| bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3624 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3625 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3626 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3627 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3628 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3629 }
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3630 } else {
033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3631 *(dst++) = bg_color;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	3632 *(debug_dst++) = DBG_SRC_BG;
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	3633 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3634
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	3635 if (context->hslot == (bg_end_slot-1)) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3636 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3637 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3638 if (!(pixel & 0x3F \| test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3639 pixel = pixel & 0xC0 \| bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3640 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3641 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3642 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3643 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3644 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3645 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3646 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3647 *(dst++) = bg_color;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3648 *(debug_dst++) = DBG_SRC_BG;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3649 }
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	3650 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3651 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3652
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3653 if (!is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3654 external_slot(context);
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3655 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3656 run_dma_src(context, context->hslot);
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3657 }
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	3658 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3659
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3660 if (is_h40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3661 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3662 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40];
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3663 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3664 context->cycles += MCLKS_SLOT_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3665 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3666 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3667 context->cycles += MCLKS_SLOT_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3668 }
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3669 if (context->hslot == jump_start) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3670 context->hslot = jump_dest;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3671 } else {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3672 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3673 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3674 if (context->hslot == line_change) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3675 vdp_advance_line(context);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3676 if (context->vcounter == active_line) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3677 context->state = PREPARING;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3678 return;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3679 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3680 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3681 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3682 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3683
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3684 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3685 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3686 uint8_t is_h40 = context->regs[REG_MODE_4] & BIT_H40;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3687 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3688 while(context->cycles < target_cycles)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3689 {
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	3690 check_switch_inactive(context, is_h40);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3691
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3692 if (is_active(context)) {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3693 if (mode_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3694 if (is_h40) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3695 vdp_h40(context, target_cycles);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3696 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3697 vdp_h32(context, target_cycles);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3698 }
330 57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	3699 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3700 vdp_h32_mode4(context, target_cycles);
330 57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	3701 }
57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	3702 } else {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	3703 vdp_inactive(context, target_cycles, is_h40, mode_5);
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3704 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3705 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3706 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3707
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3708 void vdp_run_context(vdp_context *context, uint32_t target_cycles)
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3709 {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3710 //TODO: Deal with H40 hsync shenanigans
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3711 uint32_t slot_cyc = context->regs[REG_MODE_4] & BIT_H40 ? 15 : 19;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3712 if (target_cycles < slot_cyc) {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3713 //avoid overflow
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3714 return;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3715 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3716 vdp_run_context_full(context, target_cycles - slot_cyc);
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3717 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3718
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3719 uint32_t vdp_run_to_vblank(vdp_context * context)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3720 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3721 uint32_t old_frame = context->frame;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3722 while (context->frame == old_frame) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3723 vdp_run_context_full(context, context->cycles + MCLKS_LINE);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3724 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3725 return context->cycles;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3726 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3727
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3728 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles)
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3729 {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3730 for(;;) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3731 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L];
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3732 if (!dmalen) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3733 dmalen = 0x10000;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3734 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3735 uint32_t min_dma_complete = dmalen * (context->regs[REG_MODE_4] & BIT_H40 ? 16 : 20);
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	3736 if (
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3737 (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	3738 \|\| (((context->cd & 0xF) == VRAM_WRITE) && !(context->regs[REG_MODE_2] & BIT_128K_VRAM))) {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3739 //DMA copies take twice as long to complete since they require a read and a write
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3740 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	3741 //unless 128KB mode is enabled
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3742 min_dma_complete *= 2;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3743 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3744 min_dma_complete += context->cycles;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3745 if (target_cycles < min_dma_complete) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3746 vdp_run_context_full(context, target_cycles);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3747 return;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3748 } else {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3749 vdp_run_context_full(context, min_dma_complete);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3750 if (!(context->flags & FLAG_DMA_RUN)) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3751 return;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3752 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3753 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3754 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3755 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3756
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3757 static uint16_t get_ext_vcounter(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3758 {
1437 da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3759 uint16_t line= context->vcounter;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3760 if (context->regs[REG_MODE_4] & BIT_INTERLACE) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3761 if (context->double_res) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3762 line <<= 1;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3763 } else {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3764 line &= 0x1FE;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	3765 }
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3766 if (line & 0x100) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3767 line \|= 1;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3768 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3769 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3770 return line << 8;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3771 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3772
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3773 void vdp_latch_hv(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3774 {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3775 context->hv_latch = context->hslot \| get_ext_vcounter(context);
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3776 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3777
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3778 uint16_t vdp_hv_counter_read(vdp_context * context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3779 {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3780 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3781 return context->hv_latch;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3782 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3783 uint16_t hv;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3784 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3785 hv = context->hslot;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3786 } else {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3787 hv = context->hv_latch & 0xFF;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3788 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3789 hv \|= get_ext_vcounter(context);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3790
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3791 return hv;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3792 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3793
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	3794 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3795 {
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3796 //printf("control port write: %X at %d\n", value, context->cycles);
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3797 if (context->flags & FLAG_DMA_RUN) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3798 return -1;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3799 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3800 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3801 context->address_latch = value << 14 & 0x1C000;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3802 context->address = (context->address & 0x3FFF) \| context->address_latch;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3803 //It seems like the DMA enable bit doesn't so much enable DMA so much
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3804 //as it enables changing CD5 from control port writes
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3805 if (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3806 context->cd = (context->cd & 0x3) \| ((value >> 2) & ~0x3 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3807 } else {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3808 context->cd = (context->cd & 0x23) \| ((value >> 2) & ~0x23 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3809 }
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3810 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3811 //Should these be taken care of here or after the first write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3812 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3813 context->flags2 &= ~FLAG2_READ_PENDING;
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	3814 if (!(context->cd & 1)) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	3815 context->read_latency = cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	3816 }
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	3817 //printf("New Address: %X, New CD: %X\n", context->address, context->cd);
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	3818 if (context->cd & 0x20) {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3819 //
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	3820 if((context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3821 //DMA copy or 68K -> VDP, transfer starts immediately
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3822 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot);
1191 8dc50e50ced6 Remove accidentally committed debug logging Michael Pavone <pavone@retrodev.com> parents: 1189 diff changeset	3823 if (!(context->regs[REG_DMASRC_H] & 0x80)) {
8dc50e50ced6 Remove accidentally committed debug logging Michael Pavone <pavone@retrodev.com> parents: 1189 diff changeset	3824 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) \| (context->regs[REG_DMASRC_M] << 9) \| (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 \| context->regs[REG_DMALEN_L]);
1289 6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	3825 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	3826 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	3827 //only captures are from a direct color DMA demo which will generally start DMA at a very specific point in display so other values are plausible
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	3828 //sticking with 3 slots for now until I can do some more captures
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3829 vdp_run_context_full(context, context->cycles + 12 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5));
1285 76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation Michael Pavone <pavone@retrodev.com> parents: 1278 diff changeset	3830 context->flags \|= FLAG_DMA_RUN;
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3831 return 1;
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3832 } else {
1285 76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation Michael Pavone <pavone@retrodev.com> parents: 1278 diff changeset	3833 context->flags \|= FLAG_DMA_RUN;
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3834 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L]);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3835 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	3836 } else {
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	3837 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3838 }
63 a6dd5b7a971b Add FPS counter to console output Mike Pavone <pavone@retrodev.com> parents: 58 diff changeset	3839 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3840 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3841 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3842 context->address = context->address_latch \| (value & 0x3FFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3843 context->cd = (context->cd & 0x3C) \| (value >> 14);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3844 if ((value & 0xC000) == 0x8000) {
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3845 //Register write
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3846 uint8_t reg = (value >> 8) & 0x1F;
1123 d5412f76accc Fix inactive start line for Mode 4 in vdp_next_hint. Fix an off by one error in the range of registers allowed to be written in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1122 diff changeset	3847 if (reg < (mode_5 ? VDP_REGS : 0xB)) {
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	3848 //printf("register %d set to %X\n", reg, value & 0xFF);
480 0737953132ad Implement HV counter latch Mike Pavone <pavone@retrodev.com> parents: 479 diff changeset	3849 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) {
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	3850 vdp_latch_hv(context);
2201 2f8984ff5c85 Prevent Mode 5 selection when not emulating the Genesis VDP Michael Pavone <pavone@retrodev.com> parents: 2199 diff changeset	3851 } else if (reg == REG_BG_COLOR) {
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	3852 value &= 0x3F;
2201 2f8984ff5c85 Prevent Mode 5 selection when not emulating the Genesis VDP Michael Pavone <pavone@retrodev.com> parents: 2199 diff changeset	3853 } else if (reg == REG_MODE_2 && context->type != VDP_GENESIS) {
2f8984ff5c85 Prevent Mode 5 selection when not emulating the Genesis VDP Michael Pavone <pavone@retrodev.com> parents: 2199 diff changeset	3854 // only the Genesis VDP does anything with this bit
2f8984ff5c85 Prevent Mode 5 selection when not emulating the Genesis VDP Michael Pavone <pavone@retrodev.com> parents: 2199 diff changeset	3855 // so just clear it to prevent Mode 5 selection if we're not emulating that chip
2f8984ff5c85 Prevent Mode 5 selection when not emulating the Genesis VDP Michael Pavone <pavone@retrodev.com> parents: 2199 diff changeset	3856 value &= ~BIT_MODE_5;
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	3857 }
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	3858 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	3859 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame);
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	3860 }*/
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	3861 uint8_t buffer[2] = {reg, value};
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	3862 event_log(EVENT_VDP_REG, context->cycles, sizeof(buffer), buffer);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3863 context->regs[reg] = value;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	3864 if (reg == REG_MODE_4) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	3865 context->double_res = (value & (BIT_INTERLACE \| BIT_DOUBLE_RES)) == (BIT_INTERLACE \| BIT_DOUBLE_RES);
415 8c60c8c09a0f Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode. Mike Pavone <pavone@retrodev.com> parents: 414 diff changeset	3866 if (!context->double_res) {
1106 cacbd3f18f03 Fix field flag handling bug introduced with VDP/render interface cleanup Michael Pavone <pavone@retrodev.com> parents: 1103 diff changeset	3867 context->flags2 &= ~FLAG2_EVEN_FIELD;
415 8c60c8c09a0f Fix sprite y mask in interlace mode. Fix framebuffer selection when switching out of interlace mode. Mike Pavone <pavone@retrodev.com> parents: 414 diff changeset	3868 }
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	3869 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3870 if (reg == REG_MODE_1 \|\| reg == REG_MODE_2 \|\| reg == REG_MODE_4) {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3871 update_video_params(context);
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	3872 }
2009 4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3873 } else if (reg == REG_KMOD_CTRL) {
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3874 if (!(value & 0xFF)) {
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3875 context->system->enter_debugger = 1;
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3876 }
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3877 } else if (reg == REG_KMOD_MSG) {
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3878 char c = value;
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3879 if (c) {
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3880 context->kmod_buffer_length++;
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3881 if ((context->kmod_buffer_length + 1) > context->kmod_buffer_storage) {
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3882 context->kmod_buffer_storage = context->kmod_buffer_length ? 128 : context->kmod_buffer_length * 2;
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3883 context->kmod_msg_buffer = realloc(context->kmod_msg_buffer, context->kmod_buffer_storage);
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3884 }
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3885 context->kmod_msg_buffer[context->kmod_buffer_length - 1] = c;
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3886 } else if (context->kmod_buffer_length) {
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3887 context->kmod_msg_buffer[context->kmod_buffer_length] = 0;
2032 441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3888 if (is_stdout_enabled()) {
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3889 init_terminal();
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3890 printf("KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3891 } else {
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3892 // GDB remote debugging is enabled, use stderr instead
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3893 fprintf(stderr, "KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3894 }
2009 4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3895 context->kmod_buffer_length = 0;
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3896 }
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3897 } else if (reg == REG_KMOD_TIMER) {
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3898 if (!(value & 0x80)) {
2032 441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3899 if (is_stdout_enabled()) {
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3900 init_terminal();
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3901 printf("KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3902 } else {
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3903 // GDB remote debugging is enabled, use stderr instead
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3904 fprintf(stderr, "KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
441d5d6cea2f Make KDEBUG functionality play nice with gdb remote debugging Michael Pavone <pavone@retrodev.com> parents: 2030 diff changeset	3905 }
2009 4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3906 }
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3907 if (value & 0xC0) {
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3908 context->timer_start_cycle = context->cycles;
4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	3909 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3910 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3911 } else if (mode_5) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3912 context->flags \|= FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3913 //Should these be taken care of here or after the second write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3914 //context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3915 //context->flags2 &= ~FLAG2_READ_PENDING;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3916 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3917 context->flags &= ~FLAG_READ_FETCHED;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3918 context->flags2 &= ~FLAG2_READ_PENDING;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3919 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3920 }
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	3921 return 0;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3922 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3923
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3924 void vdp_control_port_write_pbc(vdp_context *context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3925 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3926 if (context->flags2 & FLAG2_BYTE_PENDING) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3927 uint16_t full_val = value << 8 \| context->pending_byte;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3928 context->flags2 &= ~FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3929 //TODO: Deal with fact that Vbus->VDP DMA doesn't do anything in PBC mode
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	3930 vdp_control_port_write(context, full_val, context->cycles);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3931 if (context->cd == VRAM_READ) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3932 context->cd = VRAM_READ8;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3933 }
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3934 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3935 context->pending_byte = value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3936 context->flags2 \|= FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3937 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3938 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3939
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3940 int vdp_data_port_write(vdp_context * context, uint16_t value)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3941 {
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3942 //printf("data port write: %X at %d\n", value, context->cycles);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	3943 if (context->flags & FLAG_DMA_RUN && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3944 return -1;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3945 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3946 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3947 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3948 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3949 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3950 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	3951 }
109 004dd46e0a97 COmment out fifo full debug printf Mike Pavone <pavone@retrodev.com> parents: 108 diff changeset	3952 /*if (context->fifo_cur == context->fifo_end) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3953 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
109 004dd46e0a97 COmment out fifo full debug printf Mike Pavone <pavone@retrodev.com> parents: 108 diff changeset	3954 }*/
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	3955 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	3956 context->flags &= ~FLAG_DMA_RUN;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	3957 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3958 while (context->fifo_write == context->fifo_read) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3959 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3960 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3961 fifo_entry * cur = context->fifo + context->fifo_write;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	3962 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3963 cur->address = context->address;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3964 cur->value = value;
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3965 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3966 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3967 } else {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3968 cur->cd = (context->cd & 2) \| 1;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3969 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3970 cur->partial = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3971 if (context->fifo_read < 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3972 context->fifo_read = context->fifo_write;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3973 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	3974 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	3975 increment_address(context);
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	3976 return 0;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3977 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	3978
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3979 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3980 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3981 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	3982 context->flags &= ~FLAG_PENDING;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3983 //Should these be cleared here?
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3984 context->flags &= ~FLAG_READ_FETCHED;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3985 context->flags2 &= ~FLAG2_READ_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3986 }
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	3987 context->flags2 &= ~FLAG2_BYTE_PENDING;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3988 /*if (context->fifo_cur == context->fifo_end) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3989 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3990 }*/
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	3991 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3992 context->flags &= ~FLAG_DMA_RUN;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3993 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3994 while (context->fifo_write == context->fifo_read) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	3995 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3996 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3997 fifo_entry * cur = context->fifo + context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3998 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	3999 cur->address = context->address;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4000 cur->value = value;
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4001 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4002 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4003 } else {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4004 cur->cd = (context->cd & 2) \| 1;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4005 }
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	4006 cur->partial = 3;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4007 if (context->fifo_read < 0) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4008 context->fifo_read = context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4009 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4010 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	4011 increment_address(context);
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4012 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4013
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	4014 void vdp_test_port_write(vdp_context * context, uint16_t value)
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	4015 {
1318 bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support Michael Pavone <pavone@retrodev.com> parents: 1315 diff changeset	4016 context->test_port = value;
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	4017 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	4018
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4019 uint16_t vdp_control_port_read(vdp_context * context)
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4020 {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4021 context->flags &= ~FLAG_PENDING;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	4022 context->flags2 &= ~FLAG2_BYTE_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4023 //Bits 15-10 are not fixed like Charles MacDonald's doc suggests, but instead open bus values that reflect 68K prefetch
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4024 uint16_t value = context->system->get_open_bus_value(context->system) & 0xFC00;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4025 if (context->fifo_read < 0) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4026 value \|= 0x200;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4027 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4028 if (context->fifo_read == context->fifo_write) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4029 value \|= 0x100;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4030 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4031 if (context->flags2 & FLAG2_VINT_PENDING) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	4032 value \|= 0x80;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	4033 }
494 8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4034 if (context->flags & FLAG_DOT_OFLOW) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4035 value \|= 0x40;
1156 b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	4036 context->flags &= ~FLAG_DOT_OFLOW;
494 8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4037 }
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4038 if (context->flags2 & FLAG2_SPRITE_COLLIDE) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4039 value \|= 0x20;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4040 context->flags2 &= ~FLAG2_SPRITE_COLLIDE;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4041 }
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	4042 if ((context->regs[REG_MODE_4] & BIT_INTERLACE) && !(context->flags2 & FLAG2_EVEN_FIELD)) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	4043 value \|= 0x10;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4044 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4045 uint32_t slot = context->hslot;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4046 if (!is_active(context)) {
318 789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	4047 value \|= 0x8;
789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	4048 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4049 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4050 if (slot < HBLANK_END_H40 \|\| slot > HBLANK_START_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4051 value \|= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4052 }
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4053 } else {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4054 if (slot < HBLANK_END_H32 \|\| slot > HBLANK_START_H32) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4055 value \|= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4056 }
318 789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	4057 }
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	4058 if (context->cd & 0x20) {
141 576f55711d8d Fix DMA in progress flag in VDP status register Mike Pavone <pavone@retrodev.com> parents: 138 diff changeset	4059 value \|= 0x2;
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4060 }
714 e29bc2918f69 Fix VDP status register PAL bit based on observations of the Titan Overdrive demo Michael Pavone <pavone@retrodev.com> parents: 711 diff changeset	4061 if (context->flags2 & FLAG2_REGION_PAL) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4062 value \|= 0x1;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4063 }
459 c49ecf575784 Revert change to VBLANK flag timing based on new direct color DMA test Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	4064 //printf("status read at cycle %d returned %X\n", context->cycles, value);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4065 return value;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4066 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4067
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4068 uint16_t vdp_data_port_read(vdp_context * context, uint32_t *cpu_cycle, uint32_t cpu_divider)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4069 {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4070 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4071 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4072 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4073 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4074 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4075 }
138 aa3e1bb338c9 Fix VDP reads Mike Pavone <pavone@retrodev.com> parents: 137 diff changeset	4076 if (context->cd & 1) {
991 f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes Michael Pavone <pavone@retrodev.com> parents: 984 diff changeset	4077 warning("Read from VDP data port while writes are configured, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
1998 0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4078 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4079 return context->prefetch;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4080 }
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4081 switch (context->cd)
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4082 {
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4083 case VRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4084 case VSRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4085 case CRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4086 case VRAM_READ8:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4087 break;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4088 default:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4089 warning("Read from VDP data port with invalid source, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4090 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4091 return context->prefetch;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4092 }
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4093 uint32_t starting_cycle = context->cycles;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4094 while (!(context->flags & FLAG_READ_FETCHED)) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4095 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4096 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4097 context->flags &= ~FLAG_READ_FETCHED;
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4098 //TODO: Make some logic analyzer captures to better characterize what's happening with read latency here
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4099 if (context->cycles != starting_cycle) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4100 uint32_t delta = context->cycles - *cpu_cycle;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4101 uint32_t cpu_delta = delta / cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4102 if (delta % cpu_divider) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4103 cpu_delta++;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4104 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4105 cpu_cycle += cpu_delta cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4106 if (*cpu_cycle - context->cycles < 2) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4107 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4108 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4109 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4110 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4111 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4112 context->read_latency = cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4113 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4114 return context->prefetch;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4115 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4116
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	4117 uint8_t vdp_data_port_read_pbc(vdp_context * context)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	4118 {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4119 context->flags &= ~(FLAG_PENDING \| FLAG_READ_FETCHED);
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4120 context->flags2 &= ~FLAG2_BYTE_PENDING;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4121
1152 ddbb61be6119 Fix to pass a couple more tests in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1151 diff changeset	4122 context->cd = VRAM_READ8;
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	4123 return context->prefetch;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	4124 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	4125
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	4126 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction)
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	4127 {
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	4128 context->cycles -= deduction;
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4129 if (context->pending_vint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4130 context->pending_vint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4131 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4132 context->pending_vint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4133 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4134 if (context->pending_hint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4135 context->pending_hint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4136 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4137 context->pending_hint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4138 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4139 if (context->fifo_read >= 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4140 int32_t idx = context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4141 do {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4142 if (context->fifo[idx].cycle >= deduction) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4143 context->fifo[idx].cycle -= deduction;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4144 } else {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4145 context->fifo[idx].cycle = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4146 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4147 idx = (idx+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4148 } while(idx != context->fifo_write);
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	4149 }
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4150 if (context->read_latency >= deduction) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4151 context->read_latency -= deduction;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4152 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4153 context->read_latency = 0;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4154 }
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	4155 }
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	4156
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	4157 static uint32_t vdp_cycles_hslot_wrap_h40(vdp_context * context)
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4158 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4159 if (context->hslot < 183) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4160 return MCLKS_LINE - context->hslot * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4161 } else if (context->hslot < HSYNC_END_H40) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4162 uint32_t before_hsync = context->hslot < HSYNC_SLOT_H40 ? (HSYNC_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40 : 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4163 uint32_t hsync = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4164 for (int i = context->hslot <= HSYNC_SLOT_H40 ? 0 : context->hslot - HSYNC_SLOT_H40; i < sizeof(h40_hsync_cycles)/sizeof(uint32_t); i++)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4165 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4166 hsync += h40_hsync_cycles[i];
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4167 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4168 uint32_t after_hsync = (256- HSYNC_END_H40) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4169 return before_hsync + hsync + after_hsync;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4170 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4171 return (256-context->hslot) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4172 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4173 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4174
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	4175 static uint32_t vdp_cycles_next_line(vdp_context * context)
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4176 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4177 if (context->regs[REG_MODE_4] & BIT_H40) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4178 //TODO: Handle "illegal" Mode 4/H40 combo
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	4179 if (context->hslot < LINE_CHANGE_H40) {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 680 diff changeset	4180 return (LINE_CHANGE_H40 - context->hslot) * MCLKS_SLOT_H40;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4181 } else {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4182 return vdp_cycles_hslot_wrap_h40(context) + LINE_CHANGE_H40 * MCLKS_SLOT_H40;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4183 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4184 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4185 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4186 if (context->hslot < LINE_CHANGE_H32) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4187 return (LINE_CHANGE_H32 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4188 } else if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4189 return MCLKS_LINE - (context->hslot - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4190 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4191 return (256-context->hslot + LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4192 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4193 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4194 if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4195 return (148 - context->hslot + LINE_CHANGE_MODE4 - 233) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4196 } else if (context->hslot < LINE_CHANGE_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4197 return (LINE_CHANGE_MODE4 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4198 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4199 return MCLKS_LINE - (context->hslot - LINE_CHANGE_MODE4) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4200 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4201 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4202 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4203 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4204
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4205 static void get_jump_params(vdp_context context, uint32_t jump_start, uint32_t *jump_dst)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4206 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4207 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4208 if (context->flags2 & FLAG2_REGION_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4209 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4210 *jump_start = 0x10B;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4211 *jump_dst = 0x1D2;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4212 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4213 *jump_start = 0x103;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4214 *jump_dst = 0x1CA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4215 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4216 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4217 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4218 *jump_start = 0x100;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4219 *jump_dst = 0x1FA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4220 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4221 *jump_start = 0xEB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4222 *jump_dst = 0x1E5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4223 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4224 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4225 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4226 *jump_start = 0xDB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4227 *jump_dst = 0x1D5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4228 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4229 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4230
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	4231 static uint32_t vdp_cycles_to_line(vdp_context * context, uint32_t target)
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4232 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4233 uint32_t jump_start, jump_dst;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4234 get_jump_params(context, &jump_start, &jump_dst);
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4235 uint32_t lines;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4236 if (context->vcounter < target) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4237 if (target < jump_start \|\| context->vcounter > jump_start) {
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4238 lines = target - context->vcounter;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4239 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4240 lines = jump_start - context->vcounter + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4241 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4242 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4243 if (context->vcounter < jump_start) {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	4244 lines = jump_start - context->vcounter + 512 - jump_dst;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4245 } else {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	4246 lines = 512 - context->vcounter;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4247 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4248 if (target < jump_start) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4249 lines += target;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4250 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4251 lines += jump_start + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4252 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4253 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4254 return MCLKS_LINE * (lines - 1) + vdp_cycles_next_line(context);
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4255 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4256
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	4257 uint32_t vdp_cycles_to_frame_end(vdp_context * context)
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	4258 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	4259 return context->cycles + vdp_cycles_to_line(context, context->inactive_start);
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	4260 }
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	4261
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4262 uint32_t vdp_next_hint(vdp_context * context)
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4263 {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	4264 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4265 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4266 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4267 if (context->flags2 & FLAG2_HINT_PENDING) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4268 return context->pending_hint_start;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4269 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4270 uint32_t hint_line;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4271 if (context->state != ACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4272 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4273 if (hint_line > context->inactive_start) {
724 2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display Michael Pavone <pavone@retrodev.com> parents: 722 diff changeset	4274 return 0xFFFFFFFF;
2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display Michael Pavone <pavone@retrodev.com> parents: 722 diff changeset	4275 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4276 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4277 hint_line = context->vcounter + context->hint_counter + 1;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4278 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4279 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4280 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4281 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4282 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4283 }
1366 c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	4284 if (hint_line >= context->vcounter) {
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	4285 //Next interrupt is for a line in the next frame that
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	4286 //is higher than the line we're on now so just passing
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	4287 //that line number to vdp_cycles_to_line will yield the wrong
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	4288 //result
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4289 return context->cycles + vdp_cycles_to_line(context, 0) + hint_line * MCLKS_LINE;
1366 c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	4290 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4291 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4292 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4293 uint32_t jump_start, jump_dst;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4294 get_jump_params(context, &jump_start, &jump_dst);
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4295 if (hint_line >= jump_start && context->vcounter < jump_dst) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4296 hint_line = (hint_line + jump_dst - jump_start) & 0x1FF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4297 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4298 if (hint_line < context->vcounter && hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4299 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4300 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4301 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4302 }
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4303 return context->cycles + vdp_cycles_to_line(context, hint_line);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4304 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4305
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4306 static uint32_t vdp_next_vint_real(vdp_context * context)
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4307 {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	4308 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4309 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4310 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4311 if (context->flags2 & FLAG2_VINT_PENDING) {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4312 return context->pending_vint_start;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4313 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4314
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4315
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4316 return vdp_next_vint_z80(context);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4317 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4318
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4319 uint32_t vdp_next_vint(vdp_context *context)
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4320 {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4321 uint32_t ret = vdp_next_vint_real(context);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4322 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4323 static uint32_t last = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4324 if (last != ret) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4325 printf("vdp_next_vint is %d at frame %d, line %d, hslot %d\n", ret, context->frame, context->vcounter, context->hslot);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4326 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4327 last = ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4328 #endif
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4329 return ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4330 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4331
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	4332 uint32_t vdp_next_vint_z80(vdp_context * context)
f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	4333 {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4334 uint16_t vint_line = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->inactive_start : context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4335 if (context->vcounter == vint_line) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4336 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4337 if (context->regs[REG_MODE_4] & BIT_H40) {
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4338 if (context->hslot >= LINE_CHANGE_H40 \|\| context->hslot <= VINT_SLOT_H40) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4339 uint32_t cycles = context->cycles;
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4340 if (context->hslot >= LINE_CHANGE_H40) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4341 if (context->hslot < 183) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4342 cycles += (183 - context->hslot) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4343 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4344
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4345 if (context->hslot < HSYNC_SLOT_H40) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4346 cycles += (HSYNC_SLOT_H40 - (context->hslot >= 229 ? context->hslot : 229)) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4347 }
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4348 for (int slot = context->hslot <= HSYNC_SLOT_H40 ? HSYNC_SLOT_H40 : context->hslot; slot < HSYNC_END_H40; slot++ )
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4349 {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4350 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4351 }
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4352 cycles += (256 - (context->hslot > HSYNC_END_H40 ? context->hslot : HSYNC_END_H40)) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4353 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4354
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4355 cycles += (VINT_SLOT_H40 - (context->hslot >= LINE_CHANGE_H40 ? 0 : context->hslot)) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4356 return cycles;
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	4357 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4358 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	4359 if (context->hslot >= LINE_CHANGE_H32 \|\| context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	4360 if (context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	4361 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32;
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	4362 } else if (context->hslot < 233) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	4363 return context->cycles + (VINT_SLOT_H32 + 256 - 233 + 148 - context->hslot) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4364 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	4365 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4366 }
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	4367 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4368 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4369 } else {
1177 67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency Michael Pavone <pavone@retrodev.com> parents: 1175 diff changeset	4370 if (context->hslot >= LINE_CHANGE_MODE4) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4371 return context->cycles + (VINT_SLOT_MODE4 + 256 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4372 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4373 if (context->hslot <= VINT_SLOT_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4374 return context->cycles + (VINT_SLOT_MODE4 - context->hslot) * MCLKS_SLOT_H32;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4375 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4376 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4377 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4378 int32_t cycles_to_vint = vdp_cycles_to_line(context, vint_line);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4379 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4380 if (context->regs[REG_MODE_4] & BIT_H40) {
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	4381 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4382 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	4383 cycles_to_vint += (VINT_SLOT_H32 + 256 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4384 }
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	4385 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4386 cycles_to_vint += (256 - LINE_CHANGE_MODE4 + VINT_SLOT_MODE4) * MCLKS_SLOT_H32;
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	4387 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	4388 return context->cycles + cycles_to_vint;
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	4389 }
f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	4390
1377 e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4391 uint32_t vdp_next_nmi(vdp_context *context)
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4392 {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4393 if (!(context->flags2 & FLAG2_PAUSE)) {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4394 return 0xFFFFFFFF;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4395 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4396 return context->cycles + vdp_cycles_to_line(context, 0x1FF);
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4397 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4398
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4399 void vdp_pbc_pause(vdp_context *context)
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4400 {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4401 context->flags2 \|= FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4402 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	4403
953 08346262990b Remove the int number argument to vdp_int_ack since it is no longer used Michael Pavone <pavone@retrodev.com> parents: 952 diff changeset	4404 void vdp_int_ack(vdp_context * context)
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4405 {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4406 //CPU interrupt acknowledge is only used in Mode 5
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4407 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4408 //Apparently the VDP interrupt controller is not very smart
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4409 //Instead of paying attention to what interrupt is being acknowledged it just
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4410 //clears the pending flag for whatever interrupt it is currently asserted
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4411 //which may be different from the interrupt it was asserting when the 68k
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4412 //started the interrupt process. The window for this is narrow and depends
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4413 //on the latency between the int enable register write and the interrupt being
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4414 //asserted, but Fatal Rewind depends on this due to some buggy code
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4415 if ((context->flags2 & FLAG2_VINT_PENDING) && (context->regs[REG_MODE_2] & BIT_VINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4416 context->flags2 &= ~FLAG2_VINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4417 } else if((context->flags2 & FLAG2_HINT_PENDING) && (context->regs[REG_MODE_1] & BIT_HINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4418 context->flags2 &= ~FLAG2_HINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	4419 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4420 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4421 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4422
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	4423 #define VDP_STATE_VERSION 3
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4424 void vdp_serialize(vdp_context context, serialize_buffer buf)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4425 {
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4426 save_int8(buf, VDP_STATE_VERSION);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4427 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4428 save_buffer8(buf, context->vdpmem, VRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4429 save_buffer16(buf, context->cram, CRAM_SIZE);
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	4430 save_buffer16(buf, context->vsram, MAX_VSRAM_SIZE);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4431 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4432 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4433 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4434 save_int8(buf, context->regs[i]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4435 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4436 save_int32(buf, context->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4437 save_int32(buf, context->serial_address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4438 save_int8(buf, context->cd);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4439 uint8_t fifo_size;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4440 if (context->fifo_read < 0) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4441 fifo_size = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4442 } else if (context->fifo_write > context->fifo_read) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4443 fifo_size = context->fifo_write - context->fifo_read;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4444 } else {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4445 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4446 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4447 save_int8(buf, fifo_size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4448 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4449 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4450 fifo_entry *entry = context->fifo + cur;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4451 cur = (cur + 1) & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4452 save_int32(buf, entry->cycle);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4453 save_int32(buf, entry->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4454 save_int16(buf, entry->value);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4455 save_int8(buf, entry->cd);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4456 save_int8(buf, entry->partial);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4457 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4458 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4459 save_int16(buf, context->flags2 << 8 \| context->flags);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4460 save_int32(buf, context->frame);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4461 save_int16(buf, context->vcounter);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4462 save_int8(buf, context->hslot);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4463 save_int16(buf, context->hv_latch);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4464 save_int8(buf, context->state);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4465 save_int16(buf, context->hscroll_a);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4466 save_int16(buf, context->hscroll_b);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4467 save_int16(buf, context->vscroll_latch[0]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4468 save_int16(buf, context->vscroll_latch[1]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4469 save_int16(buf, context->col_1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4470 save_int16(buf, context->col_2);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4471 save_int16(buf, context->test_port);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4472 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4473 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4474 save_int8(buf, context->buf_a_off);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4475 save_int8(buf, context->buf_b_off);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4476 //FIXME: Sprite rendering state is currently a mess
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4477 save_int8(buf, context->sprite_index);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4478 save_int8(buf, context->sprite_draws);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4479 save_int8(buf, context->slot_counter);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4480 save_int8(buf, context->cur_slot);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4481 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4482 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4483 sprite_draw *draw = context->sprite_draw_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4484 save_int16(buf, draw->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4485 save_int16(buf, draw->x_pos);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4486 save_int8(buf, draw->pal_priority);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4487 save_int8(buf, draw->h_flip);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4488 save_int8(buf, draw->width);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4489 save_int8(buf, draw->height);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4490 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4491 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4492 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4493 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4494 save_int8(buf, info->size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4495 save_int8(buf, info->index);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4496 save_int16(buf, info->y);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4497 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4498 save_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4499
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4500 save_int32(buf, context->cycles);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4501 save_int32(buf, context->pending_vint_start);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4502 save_int32(buf, context->pending_hint_start);
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	4503 save_int32(buf, context->address_latch);
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4504 //was cd_latch, for compatibility with older builds that expect it
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4505 save_int8(buf, context->cd);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4506 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4507
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4508 void vdp_deserialize(deserialize_buffer buf, void vcontext)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4509 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4510 vdp_context *context = vcontext;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4511 uint8_t version = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4512 uint8_t vramk;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4513 if (version == 64) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4514 vramk = version;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4515 version = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4516 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4517 vramk = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4518 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4519 if (version > VDP_STATE_VERSION) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4520 warning("Save state has VDP version %d, but this build only understands versions %d and lower", version, VDP_STATE_VERSION);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4521 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4522 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4523 if ((vramk * 1024) > VRAM_SIZE) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4524 buf->cur_pos += (vramk * 1024) - VRAM_SIZE;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4525 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4526 load_buffer16(buf, context->cram, CRAM_SIZE);
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	4527 for (int i = 0; i < CRAM_SIZE; i++)
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	4528 {
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	4529 update_color_map(context, i, context->cram[i]);
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	4530 }
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	4531 load_buffer16(buf, context->vsram, version > 1 ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4532 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4533 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4534 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4535 context->regs[i] = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4536 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4537 context->address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4538 context->serial_address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4539 context->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4540 uint8_t fifo_size = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4541 if (fifo_size > FIFO_SIZE) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4542 fatal_error("Invalid fifo size %d", fifo_size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4543 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4544 if (fifo_size) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4545 context->fifo_read = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4546 context->fifo_write = fifo_size & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4547 for (int i = 0; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4548 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4549 fifo_entry *entry = context->fifo + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4550 entry->cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4551 entry->address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4552 entry->value = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4553 entry->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4554 entry->partial = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4555 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4556 } else {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4557 context->fifo_read = -1;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4558 context->fifo_write = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4559 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4560 uint16_t flags = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4561 context->flags2 = flags >> 8;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4562 context->flags = flags;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4563 context->frame = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4564 context->vcounter = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4565 context->hslot = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4566 context->hv_latch = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4567 context->state = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4568 context->hscroll_a = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4569 context->hscroll_b = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4570 context->vscroll_latch[0] = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4571 context->vscroll_latch[1] = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4572 context->col_1 = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4573 context->col_2 = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4574 context->test_port = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4575 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4576 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4577 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4578 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4579 context->sprite_index = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4580 context->sprite_draws = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4581 context->slot_counter = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4582 context->cur_slot = load_int8(buf);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4583 if (version == 0) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4584 int cur_draw = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4585 for (int i = 0; i < MAX_SPRITES_LINE * 2; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4586 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4587 if (cur_draw < MAX_SPRITES_LINE) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4588 sprite_draw *last = cur_draw ? context->sprite_draw_list + cur_draw - 1 : NULL;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4589 sprite_draw *draw = context->sprite_draw_list + cur_draw++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4590 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4591 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4592 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4593 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4594 draw->width = 1;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4595 draw->height = 8;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4596
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4597 if (last && last->width < 4 && last->h_flip == draw->h_flip && last->pal_priority == draw->pal_priority) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4598 int adjust_x = draw->x_pos + draw->h_flip ? -8 : 8;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4599 int height = draw->address - last->address /4;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4600 if (last->x_pos == adjust_x && (
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4601 (last->width > 1 && height == last->height) \|\|
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4602 (last->width == 1 && (height == 8 \|\| height == 16 \|\| height == 24 \|\| height == 32))
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4603 )) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4604 //current draw appears to be part of the same sprite as the last one, combine it
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4605 cur_draw--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4606 last->width++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4607 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4608 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4609 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4610 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4611 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4612 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4613 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4614 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4615 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4616 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4617 for (int i = 0; i < MAX_SPRITES_LINE; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4618 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4619 sprite_draw *draw = context->sprite_draw_list + i;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4620 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4621 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4622 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4623 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4624 draw->width = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4625 draw->height = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4626 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4627 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4628 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4629 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4630 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4631 info->size = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4632 info->index = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4633 info->y = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4634 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4635 load_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4636
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4637 context->cycles = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4638 context->pending_vint_start = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4639 context->pending_hint_start = load_int32(buf);
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	4640 if (version > 2) {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	4641 context->address_latch = load_int32(buf);
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4642 //was cd_latch, no longer used
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4643 load_int8(buf);
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	4644 } else {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	4645 context->address_latch = context->address;
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	4646 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4647 update_video_params(context);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	4648 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4649
1649 b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4650 static vdp_context *current_vdp;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4651 static void vdp_debug_window_close(uint8_t which)
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4652 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4653 //TODO: remove need for current_vdp global, and find the VDP via current_system instead
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4654 for (int i = 0; i < VDP_NUM_DEBUG_TYPES; i++)
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4655 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4656 if (current_vdp->enabled_debuggers & (1 << i) && which == current_vdp->debug_fb_indices[i]) {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4657 vdp_toggle_debug_view(current_vdp, i);
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4658 break;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4659 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4660 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4661 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4662
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4663 void vdp_toggle_debug_view(vdp_context *context, uint8_t debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4664 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4665 if (context->enabled_debuggers & 1 << debug_type) {
1642 c6b2c0f8cc61 Implemented support for toggling off a debug view Michael Pavone <pavone@retrodev.com> parents: 1641 diff changeset	4666 render_destroy_window(context->debug_fb_indices[debug_type]);
c6b2c0f8cc61 Implemented support for toggling off a debug view Michael Pavone <pavone@retrodev.com> parents: 1641 diff changeset	4667 context->enabled_debuggers &= ~(1 << debug_type);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4668 } else {
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	4669 uint32_t width,height;
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4670 uint8_t fetch_immediately = 0;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4671 char *caption;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4672 switch(debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4673 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4674 case VDP_DEBUG_PLANE:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4675 caption = "BlastEm - VDP Plane Debugger";
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	4676 width = height = 1024;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	4677 break;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	4678 case VDP_DEBUG_VRAM:
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	4679 caption = "BlastEm - VDP VRAM Debugger";
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	4680 width = 1024;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	4681 height = 512;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4682 break;
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4683 case VDP_DEBUG_CRAM:
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4684 caption = "BlastEm - VDP CRAM Debugger";
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4685 width = 512;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4686 height = 512;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4687 fetch_immediately = 1;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4688 break;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	4689 case VDP_DEBUG_COMPOSITE:
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	4690 caption = "BlastEm - VDP Plane Composition Debugger";
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	4691 width = LINEBUF_SIZE;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	4692 height = context->inactive_start + context->border_top + context->border_bot;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	4693 fetch_immediately = 1;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	4694 break;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4695 default:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4696 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4697 }
1649 b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4698 current_vdp = context;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	4699 context->debug_fb_indices[debug_type] = render_create_window(caption, width, height, vdp_debug_window_close);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4700 if (context->debug_fb_indices[debug_type]) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4701 context->enabled_debuggers \|= 1 << debug_type;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4702 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4703 if (fetch_immediately) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4704 context->debug_fbs[debug_type] = render_get_framebuffer(context->debug_fb_indices[debug_type], &context->debug_fb_pitch[debug_type]);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	4705 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4706 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4707 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4708
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4709 void vdp_inc_debug_mode(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4710 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4711 uint8_t active = render_get_active_framebuffer();
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4712 if (active < FRAMEBUFFER_USER_START) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4713 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4714 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4715 for (int i = 0; i < VDP_NUM_DEBUG_TYPES; i++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4716 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4717 if (context->enabled_debuggers & (1 << i) && context->debug_fb_indices[i] == active) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4718 context->debug_modes[i]++;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4719 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4720 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4721 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	4722 }
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4723
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4724 void vdp_replay_event(vdp_context context, uint8_t event, event_reader reader)
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4725 {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4726 uint32_t address;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4727 deserialize_buffer *buffer = &reader->buffer;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4728 switch (event)
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4729 {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4730 case EVENT_VRAM_BYTE:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	4731 reader_ensure_data(reader, 3);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4732 address = load_int16(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4733 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4734 case EVENT_VRAM_BYTE_DELTA:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	4735 reader_ensure_data(reader, 2);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4736 address = reader->last_byte_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4737 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4738 case EVENT_VRAM_BYTE_ONE:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	4739 reader_ensure_data(reader, 1);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4740 address = reader->last_byte_address + 1;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4741 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4742 case EVENT_VRAM_BYTE_AUTO:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	4743 reader_ensure_data(reader, 1);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4744 address = reader->last_byte_address + context->regs[REG_AUTOINC];
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4745 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4746 case EVENT_VRAM_WORD:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	4747 reader_ensure_data(reader, 4);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4748 address = load_int8(buffer) << 16;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4749 address \|= load_int16(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4750 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4751 case EVENT_VRAM_WORD_DELTA:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	4752 reader_ensure_data(reader, 3);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4753 address = reader->last_word_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4754 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4755 case EVENT_VDP_REG:
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	4756 case EVENT_VDP_INTRAM:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	4757 reader_ensure_data(reader, event == EVENT_VDP_REG ? 2 : 3);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4758 address = load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4759 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4760 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4761
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4762 switch (event)
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4763 {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4764 case EVENT_VDP_REG: {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4765 uint8_t value = load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4766 context->regs[address] = value;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4767 if (address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4768 context->double_res = (value & (BIT_INTERLACE \| BIT_DOUBLE_RES)) == (BIT_INTERLACE \| BIT_DOUBLE_RES);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4769 if (!context->double_res) {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4770 context->flags2 &= ~FLAG2_EVEN_FIELD;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4771 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4772 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4773 if (address == REG_MODE_1 \|\| address == REG_MODE_2 \|\| address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4774 update_video_params(context);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4775 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4776 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4777 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4778 case EVENT_VRAM_BYTE:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4779 case EVENT_VRAM_BYTE_DELTA:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4780 case EVENT_VRAM_BYTE_ONE:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4781 case EVENT_VRAM_BYTE_AUTO: {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4782 uint8_t byte = load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4783 reader->last_byte_address = address;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4784 vdp_check_update_sat_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4785 write_vram_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4786 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4787 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4788 case EVENT_VRAM_WORD:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4789 case EVENT_VRAM_WORD_DELTA: {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4790 uint16_t value = load_int16(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4791 reader->last_word_address = address;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4792 vdp_check_update_sat(context, address, value);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4793 write_vram_word(context, address, value);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4794 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4795 }
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	4796 case EVENT_VDP_INTRAM:
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	4797 if (address < 128) {
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	4798 write_cram(context, address, load_int16(buffer));
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	4799 } else {
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	4800 context->vsram[address&63] = load_int16(buffer);
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	4801 }
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4802 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4803 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	4804 }

Mercurial > repos > blastem

annotate vdp.c @ 2227:eaaf28af3c94