repos/blastem: vdp.c annotate

annotate vdp.c @ 2507:aa888682faa0

Fix debug windows not filling window in GL mode. Thanks Sik!

author	Michael Pavone <pavone@retrodev.com>
date	Wed, 14 Aug 2024 22:29:11 -0700
parents	593a4f308335
children	caf92f1b7b76

rev	line source
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	1 /*
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	2 Copyright 2013 Michael Pavone
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	3 This file is part of BlastEm.
467 140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
140af5509ce7 Added copyright notice to source files and added GPL license text in COPYING Mike Pavone <pavone@retrodev.com> parents: 462 diff changeset	5 */
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	6 #include "vdp.h"
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	7 #include "blastem.h"
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	8 #include <stdlib.h>
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	9 #include <string.h>
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	10 #include "render.h"
991 f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes Michael Pavone <pavone@retrodev.com> parents: 984 diff changeset	11 #include "util.h"
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	12 #include "event_log.h"
2009 4ace0fef6f8f Add support for the parts of the KMod debug ports used by SGDK Mike Pavone <pavone@retrodev.com> parents: 1998 diff changeset	13 #include "terminal.h"
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	14
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	15 #define NTSC_INACTIVE_START 224
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	16 #define PAL_INACTIVE_START 240
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	17 #define MODE4_INACTIVE_START 192
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	18 #define BUF_BIT_PRIORITY 0x40
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	19 #define MAP_BIT_PRIORITY 0x8000
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	20 #define MAP_BIT_H_FLIP 0x800
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	21 #define MAP_BIT_V_FLIP 0x1000
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	22
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	23 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1)
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	24 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2)
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	25
328 bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	26 #define MCLKS_SLOT_H40 16
bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	27 #define MCLKS_SLOT_H32 20
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	28 #define VINT_SLOT_H40 0 //21 slots before HSYNC, 16 during, 10 after
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	29 #define VINT_SLOT_H32 0 //old value was 23, but recent tests suggest the actual value is close to the H40 one
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	30 #define VINT_SLOT_MODE4 4
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	31 #define HSYNC_SLOT_H40 230
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 680 diff changeset	32 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17)
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	33 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	34 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	35 #define HBLANK_START_H32 233 //should be 147 according to Nemesis which is very different from my test ROM result
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	36 #define HBLANK_END_H32 0 //should be 5 according to Nemesis, but 0 seems to fit better with my test ROM results
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	37 #define LINE_CHANGE_H40 165
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	38 #define LINE_CHANGE_H32 133
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	39 #define LINE_CHANGE_MODE4 248
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	40 #define VBLANK_START_H40 (LINE_CHANGE_H40+2)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	41 #define VBLANK_START_H32 (LINE_CHANGE_H32+2)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	42 #define FIFO_LATENCY 3
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	43 #define READ_LATENCY 3
328 bf7ed23efa40 Fewer magic numbers in the VDP core for the win Mike Pavone <pavone@retrodev.com> parents: 327 diff changeset	44
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	45 #define BORDER_TOP_V24 27
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	46 #define BORDER_TOP_V28 11
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	47 #define BORDER_TOP_V24_PAL 54
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	48 #define BORDER_TOP_V28_PAL 38
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	49 #define BORDER_TOP_V30_PAL 30
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	50
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	51 #define BORDER_BOT_V24 24
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	52 #define BORDER_BOT_V28 8
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	53 #define BORDER_BOT_V24_PAL 48
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	54 #define BORDER_BOT_V28_PAL 32
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	55 #define BORDER_BOT_V30_PAL 24
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	56
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	57 enum {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	58 INACTIVE = 0,
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	59 PREPARING, //used for line 0x1FF
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	60 ACTIVE
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	61 };
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	62
2411 efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	63 uint16_t mode4_address_map[0x4000];
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	64 static uint32_t planar_to_chunky[256];
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	65 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255};
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	66
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	67 static uint8_t debug_base[][3] = {
437 afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	68 {127, 127, 127}, //BG
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	69 {0, 0, 127}, //A
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	70 {127, 0, 0}, //Window
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	71 {0, 127, 0}, //B
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	72 {127, 0, 127} //Sprites
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	73 };
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	74
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	75 static uint32_t calc_crop(uint32_t crop, uint32_t border)
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	76 {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	77 return crop >= border ? 0 : border - crop;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	78 }
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	79
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	80 static void update_video_params(vdp_context *context)
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	81 {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	82 uint32_t top_crop = render_overscan_top();
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	83 uint32_t bot_crop = render_overscan_bot();
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	84 uint32_t border_top;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	85 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	86 if (context->regs[REG_MODE_2] & BIT_PAL) {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	87 if (context->flags2 & FLAG2_REGION_PAL) {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	88 context->inactive_start = PAL_INACTIVE_START;
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	89 border_top = BORDER_TOP_V30_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	90 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V30_PAL);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	91 } else {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	92 //the behavior here is rather weird and needs more investigation
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	93 context->inactive_start = 0xF0;
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	94 border_top = 1;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	95 context->border_bot = calc_crop(bot_crop, 3);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	96 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	97 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	98 context->inactive_start = NTSC_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	99 if (context->flags2 & FLAG2_REGION_PAL) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	100 border_top = BORDER_TOP_V28_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	101 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28_PAL);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	102 } else {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	103 border_top = BORDER_TOP_V28;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	104 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	105 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	106 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	107 if (context->regs[REG_MODE_4] & BIT_H40) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	108 context->max_sprites_frame = MAX_SPRITES_FRAME;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	109 context->max_sprites_line = MAX_SPRITES_LINE;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	110 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	111 context->max_sprites_frame = MAX_SPRITES_FRAME_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	112 context->max_sprites_line = MAX_SPRITES_LINE_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	113 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	114 if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	115 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	116 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	117 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	118 } else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	119 context->state = PREPARING;
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	120 memset(context->compositebuf, 0, sizeof(context->compositebuf));
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	121 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	122 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	123 } else {
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	124 context->inactive_start = MODE4_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	125 if (context->flags2 & FLAG2_REGION_PAL) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	126 border_top = BORDER_TOP_V24_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	127 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24_PAL);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	128 } else {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	129 border_top = BORDER_TOP_V24;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	130 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	131 }
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	132 if (!(context->regs[REG_MODE_1] & BIT_MODE_4) && context->type == VDP_GENESIS){
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	133 context->state = INACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	134 } else if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	135 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	136 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	137 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	138 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	139 else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	140 context->state = PREPARING;
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	141 memset(context->compositebuf, 0, sizeof(context->compositebuf));
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	142 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	143 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	144 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	145 context->border_top = calc_crop(top_crop, border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	146 context->top_offset = border_top - context->border_top;
2385 ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state Michael Pavone <pavone@retrodev.com> parents: 2381 diff changeset	147 context->double_res = (context->regs[REG_MODE_4] & (BIT_INTERLACE \| BIT_DOUBLE_RES)) == (BIT_INTERLACE \| BIT_DOUBLE_RES);
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state Michael Pavone <pavone@retrodev.com> parents: 2381 diff changeset	148 if (!context->double_res) {
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state Michael Pavone <pavone@retrodev.com> parents: 2381 diff changeset	149 context->flags2 &= ~FLAG2_EVEN_FIELD;
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state Michael Pavone <pavone@retrodev.com> parents: 2381 diff changeset	150 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	151 }
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	152
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	153 static uint8_t static_table_init_done;
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	154
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	155 vdp_context *init_vdp_context(uint8_t region_pal, uint8_t has_max_vsram, uint8_t type)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	156 {
1640 3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers Michael Pavone <pavone@retrodev.com> parents: 1639 diff changeset	157 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	158 if (headless) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	159 context->fb = malloc(512 * LINEBUF_SIZE * sizeof(uint32_t));
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	160 context->output_pitch = LINEBUF_SIZE * sizeof(uint32_t);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	161 } else {
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	162 context->cur_buffer = FRAMEBUFFER_ODD;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	163 context->fb = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch);
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	164 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	165 context->sprite_draws = MAX_SPRITES_LINE;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	166 context->fifo_write = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	167 context->fifo_read = -1;
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	168 context->regs[REG_HINT] = context->hint_counter = 0xFF;
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	169 context->vsram_size = has_max_vsram ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE;
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	170 context->type = type;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	171 uint8_t b,g,r,index;
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	172 for (uint16_t color = 0; color < (1 << 12); color++) {
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	173 if (type == VDP_GAMEGEAR) {
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	174 b = (color >> 8 & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	175 g = (color >> 4 & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	176 r = (color & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	177 } else {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	178 switch (color & FBUF_MASK)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	179 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	180 case FBUF_SHADOW:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	181 b = levels[(color >> 9) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	182 g = levels[(color >> 5) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	183 r = levels[(color >> 1) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	184 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	185 case FBUF_HILIGHT:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	186 b = levels[((color >> 9) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	187 g = levels[((color >> 5) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	188 r = levels[((color >> 1) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	189 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	190 case FBUF_MODE4:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	191 //TODO: Mode 4 has a separate DAC tap so this isn't quite correct
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	192 //TODO: blue channel has one of its taps offest on SMS1 and MD
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	193 b = levels[(color >> 4 & 0xC) \| (color >> 6 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	194 g = levels[(color >> 2 & 0x8) \| (color >> 1 & 0x4) \| (color >> 4 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	195 r = levels[(color << 1 & 0xC) \| (color >> 1 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	196 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	197 case FBUF_TMS:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	198 index = color >> 1 & 0x7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	199 index \|= color >> 2 & 0x8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	200 if (type == VDP_TMS9918A) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	201 switch (index)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	202 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	203 case 0:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	204 case 1:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	205 r = g = b = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	206 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	207 case 2:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	208 r = 0x21; g = 0xC8; b = 0x42;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	209 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	210 case 3:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	211 r = 0x5E; g = 0xDC; b = 0x78;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	212 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	213 case 4:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	214 r = 0x54; g = 0x55; b = 0xED;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	215 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	216 case 5:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	217 r = 0x7D; g = 0x76; b = 0xFC;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	218 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	219 case 6:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	220 r = 0xD4; g = 0x52; b = 0x4D;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	221 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	222 case 7:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	223 r = 0x42; g = 0xEB; b = 0xF5;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	224 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	225 case 8:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	226 r = 0xFC; g = 0x55; b = 0x54;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	227 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	228 case 9:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	229 r = 0xFF; g = 0x79; b = 0x78;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	230 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	231 case 10:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	232 r = 0xD4; g = 0xC1; b = 0x54;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	233 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	234 case 11:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	235 r = 0xE6; g = 0xCE; b = 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	236 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	237 case 12:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	238 r = 0x21; g = 0xB0; b = 0x3B;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	239 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	240 case 13:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	241 r = 0xC9; g = 0x5B; b = 0xBA;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	242 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	243 case 14:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	244 r = g = b = 0xCC;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	245 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	246 case 15:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	247 r = g = b = 0xFF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	248 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	249 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	250 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	251 static const uint8_t tms_to_sms[] = {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	252 0x00, 0x00, 0x08, 0x0C, 0x10, 0x30, 0x01, 0x3C, 0x02, 0x03, 0x05, 0x0F, 0x04, 0x33, 0x15, 0x3F
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	253 };
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	254 index = tms_to_sms[index] << 1;
2258 a28e1042f4de Fix a few of the most glaring TMS9918A issues Michael Pavone <pavone@retrodev.com> parents: 2257 diff changeset	255 index = (index & 0xE) \| (index << 1 & 0xE0);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	256 //TODO: Mode 4 has a separate DAC tap so this isn't quite correct
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	257 //TODO: blue channel has one of its taps offest on SMS1 and MD
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	258 b = levels[(index >> 4 & 0xC) \| (index >> 6 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	259 g = levels[(index >> 2 & 0x8) \| (index >> 1 & 0x4) \| (index >> 4 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	260 r = levels[(index << 1 & 0xC) \| (index >> 1 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	261 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	262 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	263 default:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	264 b = levels[(color >> 8) & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	265 g = levels[(color >> 4) & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	266 r = levels[color & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	267 }
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	268 }
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	269 context->color_map[color] = render_map_color(r, g, b);
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	270 }
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	271
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	272 if (!static_table_init_done) {
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	273
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	274 for (uint16_t mode4_addr = 0; mode4_addr < 0x4000; mode4_addr++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	275 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	276 uint16_t mode5_addr = mode4_addr & 0x3DFD;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	277 mode5_addr \|= mode4_addr << 8 & 0x200;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	278 mode5_addr \|= mode4_addr >> 8 & 2;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	279 mode4_address_map[mode4_addr] = mode5_addr;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	280 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	281 for (uint32_t planar = 0; planar < 256; planar++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	282 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	283 uint32_t chunky = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	284 for (int bit = 7; bit >= 0; bit--)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	285 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	286 chunky = chunky << 4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	287 chunky \|= planar >> bit & 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	288 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	289 planar_to_chunky[planar] = chunky;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	290 }
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	291 static_table_init_done = 1;
426 add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering Mike Pavone <pavone@retrodev.com> parents: 424 diff changeset	292 }
437 afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	293 for (uint8_t color = 0; color < (1 << (3 + 1 + 1 + 1)); color++)
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	294 {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	295 uint8_t src = color & DBG_SRC_MASK;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	296 if (src > DBG_SRC_S) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	297 context->debugcolors[color] = 0;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	298 } else {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	299 uint8_t r,g,b;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	300 b = debug_base[src][0];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	301 g = debug_base[src][1];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	302 r = debug_base[src][2];
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	303 if (color & DBG_PRIORITY)
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	304 {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	305 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	306 b += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	307 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	308 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	309 g += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	310 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	311 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	312 r += 48;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	313 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	314 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	315 if (color & DBG_SHADOW) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	316 b /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	317 g /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	318 r /=2 ;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	319 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	320 if (color & DBG_HILIGHT) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	321 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	322 b += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	323 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	324 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	325 g += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	326 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	327 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	328 r += 72;
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	329 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	330 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	331 context->debugcolors[color] = render_map_color(r, g, b);
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	332 }
afbea09d7fb4 Restore one of the VDP debugging modes Mike Pavone <pavone@retrodev.com> parents: 436 diff changeset	333 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	334 if (region_pal) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	335 context->flags2 \|= FLAG2_REGION_PAL;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	336 }
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	337 update_video_params(context);
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	338 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * context->border_top);
1640 3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers Michael Pavone <pavone@retrodev.com> parents: 1639 diff changeset	339 return context;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	340 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	341
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	342 void vdp_free(vdp_context *context)
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	343 {
2030 bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	344 if (headless) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	345 free(context->fb);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	346 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	347 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
2030 bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	348 {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	349 if (context->enabled_debuggers & (1 << i)) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	350 vdp_toggle_debug_view(context, i);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	351 }
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39 Michael Pavone <pavone@retrodev.com> parents: 2013 diff changeset	352 }
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	353 free(context);
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	354 }
252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	355
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	356 static int is_refresh(vdp_context * context, uint32_t slot)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	357 {
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	358 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	359 return slot == 250 \|\| slot == 26 \|\| slot == 59 \|\| slot == 90 \|\| slot == 122 \|\| slot == 154;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	360 } else {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	361 //TODO: Figure out which slots are refresh when display is off in 32-cell mode
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	362 //These numbers are guesses based on H40 numbers
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	363 return slot == 243 \|\| slot == 19 \|\| slot == 51 \|\| slot == 83 \|\| slot == 115;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	364 //The numbers below are the refresh slots during active display
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	365 //return (slot == 29 \|\| slot == 61 \|\| slot == 93 \|\| slot == 125);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	366 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	367 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	368
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	369 static void increment_address(vdp_context *context)
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	370 {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	371 context->address += context->regs[REG_AUTOINC];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	372 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	373 context->address++;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	374 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	375 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	376
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	377 static void render_sprite_cells(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	378 {
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	379 if (context->cur_slot > MAX_SPRITES_LINE) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	380 context->cur_slot--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	381 return;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	382 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	383 if (context->cur_slot < 0) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	384 return;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	385 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	386 sprite_draw * d = context->sprite_draw_list + context->cur_slot;
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	387 uint16_t address = d->address;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	388 address += context->sprite_x_offset * d->height * 4;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	389 context->serial_address = address;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	390 uint16_t dir;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	391 int16_t x;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	392 if (d->h_flip) {
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	393 x = d->x_pos + 7 + 8 * (d->width - context->sprite_x_offset - 1);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	394 dir = -1;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	395 } else {
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	396 x = d->x_pos + context->sprite_x_offset * 8;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	397 dir = 1;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	398 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	399 if (d->x_pos) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	400 context->flags \|= FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	401 if (!(context->flags & FLAG_MASKED)) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	402 x -= 128;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	403 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x);
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	404 uint8_t collide = 0;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	405 if (x >= 8 && x < 312) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	406 //sprite is fully visible
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	407 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	408 uint8_t pixel = context->vdpmem[address] >> 4;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	409 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	410 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	411 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	412 collide \|= pixel;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	413 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	414 x += dir;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	415 pixel = context->vdpmem[address] & 0xF;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	416 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	417 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	418 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	419 collide \|= pixel;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	420 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	421 x += dir;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	422 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	423 } else if (x > -8 && x < 327) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	424 //sprite is partially visible
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	425 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	426 if (x >= 0 && x < 320) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	427 uint8_t pixel = context->vdpmem[address] >> 4;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	428 if (!(context->linebuf[x] & 0xF)) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	429 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	430 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	431 collide \|= pixel;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	432 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	433 }
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	434 x += dir;
b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	435 if (x >= 0 && x < 320) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	436 uint8_t pixel = context->vdpmem[address] & 0xF;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	437 if (!(context->linebuf[x] & 0xF)) {
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	438 context->linebuf[x] = pixel \| d->pal_priority;
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	439 } else {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	440 collide \|= pixel;
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	441 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	442 }
1884 b5549258b98b Slightly gross fix for edge case introduced in border cropping change Michael Pavone <pavone@retrodev.com> parents: 1881 diff changeset	443 x += dir;
1886 183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	444 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	445 }
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	446 if (collide) {
183b86ba0212 Optimized sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1885 diff changeset	447 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	448 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	449 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	450 } else if (context->flags & FLAG_CAN_MASK) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	451 context->flags \|= FLAG_MASKED;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	452 context->flags &= ~FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	453 }
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	454
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	455 context->sprite_x_offset++;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	456 if (context->sprite_x_offset == d->width) {
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	457 d->x_pos = 0;
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	458 context->sprite_x_offset = 0;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	459 context->cur_slot--;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	460 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	461 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	462
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	463 static void fetch_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	464 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	465 if (context->sprite_index >= context->sprite_draws) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	466 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	467 uint32_t address = mode4_address_map[d->address & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	468 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	469 context->fetch_tmp[1] = context->vdpmem[address + 1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	470 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	471 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	472
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	473 static void render_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	474 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	475 if (context->sprite_index >= context->sprite_draws) {
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	476 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	477 if (context->type == VDP_SMS && context->sprite_index < 4) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	478 zoom = 0;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	479 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	480 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	481 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	482 pixels \|= planar_to_chunky[context->fetch_tmp[1]];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	483 uint32_t address = mode4_address_map[(d->address + 2) & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	484 pixels \|= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	485 pixels \|= planar_to_chunky[context->vdpmem[address + 1]] << 2;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	486 int x = d->x_pos & 0xFF;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	487 for (int i = 28; i >= 0; i -= 4, x++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	488 {
2503 fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	489 uint8_t pixel = pixels >> i & 0xF;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	490 if (pixel) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	491 if (!context->linebuf[x]) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	492 context->linebuf[x] = pixel;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	493 } else if(
1155 da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	494 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	495 \|\| ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	496 ) {
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	497 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
da6a1f156f24 Fix Mode 4 sprite collision flag Michael Pavone <pavone@retrodev.com> parents: 1154 diff changeset	498 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	499 }
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	500 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	501 x++;
2503 fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	502 if (pixel) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	503 if (!context->linebuf[x]) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	504 context->linebuf[x] = pixel;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!) Michael Pavone <pavone@retrodev.com> parents: 2494 diff changeset	505 } else if(
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	506 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	507 \|\| ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	508 ) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	509 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	510 }
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	511 }
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	512 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	513 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	514 context->sprite_index--;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	515 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	516 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	517
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	518 static uint32_t mode5_sat_address(vdp_context *context)
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	519 {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	520 uint32_t addr = context->regs[REG_SAT] << 9;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	521 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	522 addr &= 0xFFFF;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	523 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	524 if (context->regs[REG_MODE_4] & BIT_H40) {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	525 addr &= 0x1FC00;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	526 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	527 return addr;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	528 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	529
322 8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	530 void vdp_print_sprite_table(vdp_context * context)
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	531 {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	532 if (context->type == VDP_GENESIS && context->regs[REG_MODE_2] & BIT_MODE_5) {
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	533 uint16_t sat_address = mode5_sat_address(context);
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	534 uint16_t current_index = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	535 uint8_t count = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	536 do {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	537 uint16_t address = current_index * 8 + sat_address;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	538 uint16_t cache_address = current_index * 4;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	539 uint8_t height = ((context->sat_cache[cache_address+2] & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	540 uint8_t width = (((context->sat_cache[cache_address+2] >> 2) & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	541 int16_t y = ((context->sat_cache[cache_address] & 0x3) << 8 \| context->sat_cache[cache_address+1]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	542 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 \| context->vdpmem[address + 7]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	543 uint16_t link = context->sat_cache[cache_address+3] & 0x7F;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	544 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	545 uint8_t pri = context->vdpmem[address + 4] >> 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	546 uint16_t pattern = ((context->vdpmem[address + 4] << 8 \| context->vdpmem[address + 5]) & 0x7FF) << 5;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	547 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	548 current_index = link;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	549 count++;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	550 } while (current_index != 0 && count < 80);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	551 } else if (context->type != VDP_TMS9918A && context->regs[REG_MODE_1] & BIT_MODE_4) {
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	552 uint16_t sat_address = (context->regs[REG_SAT] & 0x7E) << 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	553 for (int i = 0; i < 64; i++)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	554 {
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	555 uint8_t y = context->vdpmem[mode4_address_map[sat_address + (i ^ 1)]];
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	556 if (y == 0xD0) {
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	557 break;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	558 }
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	559 uint8_t x = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2 + 1]];
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	560 uint16_t tile_address = context->vdpmem[mode4_address_map[sat_address + 0x80 + i2]] 32
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	561 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	562 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	563 tile_address &= ~32;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	564 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	565 printf("Sprite %d: X=%d, Y=%d, Pat=%X\n", i, x, y, tile_address);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	566 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	567 } else if (context->type != VDP_GENESIS) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	568 uint16_t sat_address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	569 for (int i = 0; i < 32; i++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	570 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	571 uint16_t address = i << 2 \| sat_address;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	572 int16_t y = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	573 if (y == 208) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	574 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	575 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	576 if (y > 192) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	577 y -= 256;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	578 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	579 int16_t x = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	580 uint8_t name = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	581 uint8_t tag = context->vdpmem[mode4_address_map[address] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	582 if (tag & 0x80) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	583 x -= 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	584 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	585 tag &= 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	586 printf("Sprite %d: X=%d, Y=%d, Pat=%X, Color=%X\n", i, x, y, name, tag);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	587 }
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	588 }
322 8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	589 }
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview. Mike Pavone <pavone@retrodev.com> parents: 318 diff changeset	590
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	591 #define VRAM_READ 0 //0000
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	592 #define VRAM_WRITE 1 //0001
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	593 //2 would trigger register write 0010
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	594 #define CRAM_WRITE 3 //0011
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	595 #define VSRAM_READ 4 //0100
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	596 #define VSRAM_WRITE 5//0101
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	597 //6 would trigger regsiter write 0110
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	598 //7 is a mystery //0111
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	599 #define CRAM_READ 8 //1000
2334 57ebbc1ade30 Fix regression in mega-color image demos Michael Pavone <pavone@retrodev.com> parents: 2283 diff changeset	600 //writes go nowhere, acts 8-bit wide like VRAM //1001
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	601 //A would trigger register write 1010
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	602 //B is a mystery 1011
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	603 #define VRAM_READ8 0xC //1100
2334 57ebbc1ade30 Fix regression in mega-color image demos Michael Pavone <pavone@retrodev.com> parents: 2283 diff changeset	604 //writes go nowhere, acts 16-bit wide like VSRAM/CRAM 1101
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	605 //E would trigger register write 1110
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	606 //F is a mystery 1111
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	607
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	608 //Possible theory on how bits work
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	609 //CD0 = Read/Write flag
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	610 //CD2,(CD1\|CD3) = RAM type
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	611 // 00 = VRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	612 // 01 = CRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	613 // 10 = VSRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	614 // 11 = VRAM8
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	615 //Would result in
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	616 // 7 = VRAM8 write
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	617 // 9 = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	618 // B = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	619 // D = VRAM8 write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	620 // F = VRAM8 write alais
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	621
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	622 #define DMA_START 0x20
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	623
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	624 static const char * cd_name(uint8_t cd)
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	625 {
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	626 switch (cd & 0xF)
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	627 {
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	628 case VRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	629 return "VRAM read";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	630 case VRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	631 return "VRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	632 case CRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	633 return "CRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	634 case VSRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	635 return "VSRAM read";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	636 case VSRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	637 return "VSRAM write";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	638 case VRAM_READ8:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	639 return "VRAM read (undocumented 8-bit mode)";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	640 default:
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	641 return "invalid";
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	642 }
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	643 }
ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	644
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	645 void vdp_print_reg_explain(vdp_context * context)
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	646 {
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	647 char * hscroll[] = {"full", "7-line", "cell", "line"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	648 printf("Mode Group\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	649 "00: %.2X \| H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n"
1331 9bba5ff5beb8 Add 128K VRAM bit to VDP register print in debugger Michael Pavone <pavone@retrodev.com> parents: 1325 diff changeset	650 "01: %.2X \| Display %s, V-ints %s, Height: %d, Mode %d, %dK VRAM\n"
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	651 "0B: %.2X \| E-ints %s, V-Scroll: %s, H-Scroll: %s\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	652 "0C: %.2X \| Width: %d, Shadow/Highlight: %s\n",
757 483f7e7926a6 More clang warning cleanup Michael Pavone <pavone@retrodev.com> parents: 748 diff changeset	653 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0,
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	654 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled",
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	655 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled",
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	656 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, context->regs[REG_MODE_1] & BIT_128K_VRAM ? 128 : 64,
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	657 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full",
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	658 hscroll[context->regs[REG_MODE_3] & 0x3],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	659 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled");
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	660 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	661 printf("\nTable Group\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	662 "02: %.2X \| Scroll A Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	663 "03: %.2X \| Window Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	664 "04: %.2X \| Scroll B Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	665 "05: %.2X \| Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	666 "0D: %.2X \| HScroll Data Table: $%.4X\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	667 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	668 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	669 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13,
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	670 context->regs[REG_SAT], mode5_sat_address(context),
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	671 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	672 } else {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	673 printf("\nTable Group\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	674 "02: %.2X \| Background Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	675 "05: %.2X \| Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	676 "06: %.2X \| Sprite Tile Base: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	677 "08: %.2X \| Background X Scroll: %d\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	678 "09: %.2X \| Background Y Scroll: %d\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	679 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0xE) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	680 context->regs[REG_SAT], (context->regs[REG_SAT] & 0x7E) << 7,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	681 context->regs[REG_STILE_BASE], (context->regs[REG_STILE_BASE] & 2) << 11,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	682 context->regs[REG_X_SCROLL], context->regs[REG_X_SCROLL],
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	683 context->regs[REG_Y_SCROLL], context->regs[REG_Y_SCROLL]);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	684
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	685 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	686 char * sizes[] = {"32", "64", "invalid", "128"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	687 printf("\nMisc Group\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	688 "07: %.2X \| Backdrop Color: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	689 "0A: %.2X \| H-Int Counter: %u\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	690 "0F: %.2X \| Auto-increment: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	691 "10: %.2X \| Scroll A/B Size: %sx%s\n",
505 b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment. Michael Pavone <pavone@retrodev.com> parents: 503 diff changeset	692 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR],
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	693 context->regs[REG_HINT], context->regs[REG_HINT],
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	694 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	695 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]);
621 5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	696 char * src_types[] = {"68K", "68K", "Copy", "Fill"};
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	697 printf("\nDMA Group\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	698 "13: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	699 "14: %.2X \| DMA Length: $%.4X words\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	700 "15: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	701 "16: %.2X \|\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	702 "17: %.2X \| DMA Source Address: $%.6X, Type: %s\n",
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	703 context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	704 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 \| context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	705 context->regs[REG_DMASRC_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	706 context->regs[REG_DMASRC_M],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	707 context->regs[REG_DMASRC_H],
629 9089951a1994 Small fix to display of DMA source address in vr debug command Michael Pavone <pavone@retrodev.com> parents: 624 diff changeset	708 context->regs[REG_DMASRC_H] << 17 \| context->regs[REG_DMASRC_M] << 9 \| context->regs[REG_DMASRC_L] << 1,
621 5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes. Michael Pavone <pavone@retrodev.com> parents: 515 diff changeset	709 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]);
1628 3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	710 uint8_t old_flags = context->flags;
3c1661305219 Avoid changing VDP status flags when executing debugger commands Michael Pavone <pavone@retrodev.com> parents: 1454 diff changeset	711 uint8_t old_flags2 = context->flags2;
438 b3cee2fe690b Add address/cd registers to VDP debug message Mike Pavone <pavone@retrodev.com> parents: 437 diff changeset	712 printf("\nInternal Group\n"
b3cee2fe690b Add address/cd registers to VDP debug message Mike Pavone <pavone@retrodev.com> parents: 437 diff changeset	713 "Address: %X\n"
705 ce4046476abc Add description of cd register value to vr debugger command Michael Pavone <pavone@retrodev.com> parents: 699 diff changeset	714 "CD: %X - %s\n"
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	715 "Pending: %s\n"
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	716 "VCounter: %d\n"
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	717 "HCounter: %d\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	718 "VINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	719 "HINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	720 "Status: %X\n",
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	721 context->address, context->cd, cd_name(context->cd),
1150 322d28e6f13c Display both byte and word pending values to better reflect VDP pending state in PBC mode Michael Pavone <pavone@retrodev.com> parents: 1149 diff changeset	722 (context->flags & FLAG_PENDING) ? "word" : (context->flags2 & FLAG2_BYTE_PENDING) ? "byte" : "none",
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	723 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false",
2358 4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	724 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_status(context));
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	725 printf("\nDebug Register: %X \| Output disabled: %s, Force Layer: %d\n", context->test_port,
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	726 (context->test_port & TEST_BIT_DISABLE) ? "true" : "false", context->test_port >> 7 & 3
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	727 );
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	728 }
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	729
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	730 static uint8_t is_active(vdp_context *context)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	731 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	732 return context->state != INACTIVE && (context->regs[REG_MODE_2] & BIT_DISP_EN) != 0;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	733 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	734
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	735 static void scan_sprite_table(uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	736 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	737 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) {
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	738 line += 1;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	739 uint16_t ymask, ymin;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	740 uint8_t height_mult;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	741 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	742 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	743 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	744 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	745 }
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	746 ymask = 0x3FF;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	747 ymin = 256;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	748 height_mult = 16;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	749 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	750 ymask = 0x1FF;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	751 ymin = 128;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	752 height_mult = 8;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	753 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	754 context->sprite_index &= 0x7F;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	755 //TODO: Implement squirelly behavior documented by Kabuto
2230 3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	756 if (context->sprite_index >= MAX_SPRITES_FRAME) {
38 898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	757 context->sprite_index = 0;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	758 return;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior Mike Pavone <pavone@retrodev.com> parents: 37 diff changeset	759 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	760 uint16_t address = context->sprite_index * 4;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	761 line += ymin;
1346 f7ca42e020fd Fix sprite rendering in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1344 diff changeset	762 line &= ymask;
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	763 uint16_t y = ((context->sat_cache[address] & 0x3) << 8 \| context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	764 uint8_t height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
21 72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	765 //printf("Sprite %d \| y: %d, height: %d\n", context->sprite_index, y, height);
72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	766 if (y <= line && line < (y + height)) {
27 aa1c47fab3f1 Fix sprite transparency for overlapping sprites Mike Pavone <pavone@retrodev.com> parents: 26 diff changeset	767 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	768 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	769 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	770 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	771 context->sprite_index = context->sat_cache[address+3] & 0x7F;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	772 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	773 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	774 //TODO: Implement squirelly behavior documented by Kabuto
2230 3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	775 if (context->sprite_index >= MAX_SPRITES_FRAME) {
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	776 context->sprite_index = 0;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	777 return;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	778 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	779 address = context->sprite_index * 4;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	780 y = ((context->sat_cache[address] & 0x3) << 8 \| context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	781 height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
323 8c01b4154480 Properly mask sprite X and Y coordinates Mike Pavone <pavone@retrodev.com> parents: 322 diff changeset	782 //printf("Sprite %d \| y: %d, height: %d\n", context->sprite_index, y, height);
21 72ce60cb1711 Sprites somewhat less broken Mike Pavone <pavone@retrodev.com> parents: 20 diff changeset	783 if (y <= line && line < (y + height)) {
27 aa1c47fab3f1 Fix sprite transparency for overlapping sprites Mike Pavone <pavone@retrodev.com> parents: 26 diff changeset	784 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	785 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	786 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	787 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	788 context->sprite_index = context->sat_cache[address+3] & 0x7F;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	789 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	790 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	791 //TODO: Seems like the overflow flag should be set here if we run out of sprite info slots without hitting the end of the list
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	792 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	793
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	794 static void scan_sprite_table_mode4(vdp_context * context)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	795 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	796 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	797 uint32_t line = context->vcounter;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	798 line &= 0xFF;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	799
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	800 uint32_t sat_address = mode4_address_map[(context->regs[REG_SAT] << 7 & 0x3F00) + context->sprite_index];
1138 25268334a24c Fix Mode 4 sprite table Y scan to account for VRAM byte swapping Michael Pavone <pavone@retrodev.com> parents: 1137 diff changeset	801 uint32_t y = context->vdpmem[sat_address+1];
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	802 uint32_t size = (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) ? 16 : 8;
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	803 uint32_t ysize = size;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	804 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	805 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	806 ysize *= 2;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	807 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	808
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	809 if (y == 0xd0) {
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	810 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	811 return;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	812 } else {
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	813 if (y <= line && line < (y + ysize)) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	814 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	815 context->sprite_index = MAX_SPRITES_FRAME_H32;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	816 context->flags \|= FLAG_DOT_OFLOW;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	817 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	818 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	819 context->sprite_info_list[--(context->slot_counter)].size = size;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	820 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	821 context->sprite_info_list[context->slot_counter].y = y;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	822 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	823 context->sprite_index++;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	824 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	825
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	826 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
1138 25268334a24c Fix Mode 4 sprite table Y scan to account for VRAM byte swapping Michael Pavone <pavone@retrodev.com> parents: 1137 diff changeset	827 y = context->vdpmem[sat_address];
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	828 if (y == 0xd0) {
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	829 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	830 return;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	831 } else {
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	832 if (y <= line && line < (y + ysize)) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	833 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	834 context->sprite_index = MAX_SPRITES_FRAME_H32;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	835 context->flags \|= FLAG_DOT_OFLOW;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	836 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	837 }
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	838 context->sprite_info_list[--(context->slot_counter)].size = size;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	839 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358 3716b90d3470 Fix regression in Mode 4 sprite rendering Michael Pavone <pavone@retrodev.com> parents: 1357 diff changeset	840 context->sprite_info_list[context->slot_counter].y = y;
1122 d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	841 }
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	842 context->sprite_index++;
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	843 }
d4bef26d0977 Implemented Mode 4 sprite list termination Michael Pavone <pavone@retrodev.com> parents: 1121 diff changeset	844 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	845
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	846 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	847 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	848
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	849 static void read_sprite_x(uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	850 {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	851 if (context->cur_slot == context->max_sprites_line) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	852 context->cur_slot = 0;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	853 }
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	854 if (context->cur_slot < context->slot_counter) {
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	855 if (context->sprite_draws) {
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	856 line += 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	857 //in tiles
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	858 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	859 //in pixels
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	860 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	861 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	862 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	863 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	864 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	865 }
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	866 height *= 2;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	867 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	868 uint16_t ymask, ymin;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	869 if (context->double_res) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	870 ymask = 0x3FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	871 ymin = 256;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	872 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	873 ymask = 0x1FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	874 ymin = 128;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	875 }
2230 3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	876 uint8_t index = context->sprite_info_list[context->cur_slot].index;
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	877 if (!(context->regs[REG_MODE_4] & BIT_H40)) {
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	878 index &= MAX_SPRITES_FRAME_H32 - 1;
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	879 }
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode Michael Pavone <pavone@retrodev.com> parents: 2227 diff changeset	880 uint16_t att_addr = mode5_sat_address(context) + index * 8 + 4;
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	881 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) \| context->vdpmem[att_addr+1];
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	882 uint8_t pal_priority = (tileinfo >> 9) & 0x70;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	883 uint8_t row;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	884 uint16_t cache_addr = context->sprite_info_list[context->cur_slot].index * 4;
1346 f7ca42e020fd Fix sprite rendering in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1344 diff changeset	885 line = (line + ymin) & ymask;
1338 3706b683cd48 Fix sprite rendering for negative line. Fixes remaining visual glitch in the Titancade scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1337 diff changeset	886 int16_t y = ((context->sat_cache[cache_addr] << 8 \| context->sat_cache[cache_addr+1]) & ymask)/* - ymin*/;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	887 if (tileinfo & MAP_BIT_V_FLIP) {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	888 row = (y + height - 1) - line;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	889 } else {
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	890 row = line-y;
34 0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test Mike Pavone <pavone@retrodev.com> parents: 32 diff changeset	891 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	892 row &= ymask >> 4;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	893 uint16_t address;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	894 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	895 address = ((tileinfo & 0x3FF) << 6) + row * 4;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	896 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	897 address = ((tileinfo & 0x7FF) << 5) + row * 4;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	898 }
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	899 context->sprite_draws--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	900 context->sprite_draw_list[context->sprite_draws].x_pos = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 \| context->vdpmem[att_addr + 3]) & 0x1FF;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	901 context->sprite_draw_list[context->sprite_draws].address = address;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	902 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	903 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	904 context->sprite_draw_list[context->sprite_draws].width = width;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	905 context->sprite_draw_list[context->sprite_draws].height = height;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	906 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	907 }
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	908 context->cur_slot++;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	909 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	910
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	911 static void read_sprite_x_mode4(vdp_context * context)
427 2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	912 {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	913 if (context->cur_slot >= context->slot_counter) {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	914 uint32_t address = (context->regs[REG_SAT] << 7 & 0x3F00) + 0x80 + context->sprite_info_list[context->cur_slot].index * 2;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	915 address = mode4_address_map[address];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	916 --context->sprite_draws;
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	917 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	918 uint32_t tile_address = context->vdpmem[address] * 32 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	919 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	920 tile_address &= ~32;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	921 }
2204 dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	922 uint16_t y_diff = context->vcounter - context->sprite_info_list[context->cur_slot].y;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	923 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	924 y_diff >>= 1;
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	925 }
dc4268a778bc Implement Mode 4 sprite zooming Michael Pavone <pavone@retrodev.com> parents: 2201 diff changeset	926 tile_address += y_diff * 4;
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	927 context->sprite_draw_list[context->sprite_draws].x_pos = context->vdpmem[address + 1];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	928 context->sprite_draw_list[context->sprite_draws].address = tile_address;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	929 context->cur_slot--;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	930 }
427 2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	931 }
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process Mike Pavone <pavone@retrodev.com> parents: 426 diff changeset	932
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	933 #define VSRAM_DIRTY_BITS 0xF800
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	934
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	935 //rough estimate of slot number at which border display starts
1270 687d3969416b Adjust correspondance between slot number and actual video output to better match video signal measurements and analysis of Outrunners behavior on hardware. Partially fixes ticket:13 Michael Pavone <pavone@retrodev.com> parents: 1269 diff changeset	936 #define BG_START_SLOT 6
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	937
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	938 static void update_color_map(vdp_context *context, uint16_t index, uint16_t value)
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	939 {
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	940 context->colors[index] = context->color_map[value & CRAM_BITS];
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	941 context->colors[index + SHADOW_OFFSET] = context->color_map[(value & CRAM_BITS) \| FBUF_SHADOW];
c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	942 context->colors[index + HIGHLIGHT_OFFSET] = context->color_map[(value & CRAM_BITS) \| FBUF_HILIGHT];
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	943 if (context->type == VDP_GAMEGEAR) {
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	944 context->colors[index + MODE4_OFFSET] = context->color_map[value & 0xFFF];
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	945 } else {
2236 c149c929361c Fix color bug when switching between Game Gear and other Sega systems Michael Pavone <pavone@retrodev.com> parents: 2230 diff changeset	946 context->colors[index + MODE4_OFFSET] = context->color_map[(value & CRAM_BITS) \| FBUF_MODE4];
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	947 }
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	948 }
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	949
1428 2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	950 void write_cram_internal(vdp_context * context, uint16_t addr, uint16_t value)
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	951 {
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	952 context->cram[addr] = value;
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	953 update_color_map(context, addr, value);
1428 2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	954 }
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	955
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	956 static void write_cram(vdp_context * context, uint16_t address, uint16_t value)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	957 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	958 uint16_t addr;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	959 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	960 addr = (address/2) & (CRAM_SIZE-1);
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	961 } else if (context->type == VDP_GAMEGEAR) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	962 addr = (address/2) & 31;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	963 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	964 addr = address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	965 value = (value << 1 & 0xE) \| (value << 2 & 0xE0) \| (value & 0xE00);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	966 }
1428 2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release Michael Pavone <pavone@retrodev.com> parents: 1427 diff changeset	967 write_cram_internal(context, addr, value);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	968
1928 abc89555f2e0 Admit defeat on the "trying to write CRAM dots while output is null issue" for now and just add a null check Mike Pavone <pavone@retrodev.com> parents: 1925 diff changeset	969 if (context->output && context->hslot >= BG_START_SLOT && (
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	970 context->vcounter < context->inactive_start + context->border_bot
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	971 \|\| context->vcounter > 0x200 - context->border_top
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	972 )) {
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	973 uint8_t bg_end_slot = BG_START_SLOT + (context->regs[REG_MODE_4] & BIT_H40) ? LINEBUF_SIZE/2 : (256+HORIZ_BORDER)/2;
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	974 if (context->hslot < bg_end_slot) {
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	975 uint32_t color = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->colors[addr] : context->colors[addr + MODE4_OFFSET];
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	976 context->output[(context->hslot - BG_START_SLOT)*2 + 1] = color;
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	977 }
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	978 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	979 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	980
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	981 static void vdp_advance_dma(vdp_context * context)
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	982 {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	983 context->regs[REG_DMASRC_L] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	984 if (!context->regs[REG_DMASRC_L]) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	985 context->regs[REG_DMASRC_M] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	986 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	987 context->address += context->regs[REG_AUTOINC];
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	988 uint16_t dma_len = ((context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L]) - 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	989 context->regs[REG_DMALEN_H] = dma_len >> 8;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	990 context->regs[REG_DMALEN_L] = dma_len;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	991 if (!dma_len) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	992 context->flags &= ~FLAG_DMA_RUN;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	993 context->cd &= 0xF;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	994 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	995 }
1019 e34334e6c682 Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running Michael Pavone <pavone@retrodev.com> parents: 1001 diff changeset	996
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	997 static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value)
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	998 {
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	999 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1000 if (!(address & 4)) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1001 uint32_t sat_address = mode5_sat_address(context);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1002 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1003 uint16_t cache_address = address - sat_address;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1004 cache_address = (cache_address & 3) \| (cache_address >> 1 & 0x1FC);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1005 context->sat_cache[cache_address] = value >> 8;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1006 context->sat_cache[cache_address^1] = value;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1007 }
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	1008 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	1009 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	1010 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	1011
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1012 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value)
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	1013 {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1014 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1015 if (!(address & 4)) {
1320 df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1319 diff changeset	1016 uint32_t sat_address = mode5_sat_address(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1017 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1018 uint16_t cache_address = address - sat_address;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1019 cache_address = (cache_address & 3) \| (cache_address >> 1 & 0x1FC);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1020 context->sat_cache[cache_address] = value;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1021 }
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	1022 }
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1023 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1024 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1025
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1026 static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value)
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1027 {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1028 address = (address & 0x3FC) \| (address >> 1 & 0xFC01) \| (address >> 9 & 0x2);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1029 address ^= 1;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1030 //TODO: Support an option to actually have 128KB of VRAM
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1031 context->vdpmem[address] = value;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1032 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1033
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1034 static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value)
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1035 {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1036 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	1037 address &= 0xFFFF;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1038 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1039 address = mode4_address_map[address & 0x3FFF];
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	1040 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	1041 context->vdpmem[address] = value;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	1042 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	1043
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1044 #define DMA_FILL 0x80
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1045 #define DMA_COPY 0xC0
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1046 #define DMA_TYPE_MASK 0xC0
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1047 static void external_slot(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1048 {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1049 if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL && context->fifo_read < 0) {
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1050 context->fifo_read = (context->fifo_write-1) & (FIFO_SIZE-1);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1051 fifo_entry * cur = context->fifo + context->fifo_read;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1052 cur->cycle = context->cycles;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1053 cur->address = context->address;
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1054 cur->partial = 1;
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1055 vdp_advance_dma(context);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1056 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1057 fifo_entry * start = context->fifo + context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1058 if (context->fifo_read >= 0 && start->cycle <= context->cycles) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1059 switch (start->cd & 0xF)
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1060 {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1061 case VRAM_WRITE:
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	1062 if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM\|BIT_MODE_5)) == (BIT_128K_VRAM\|BIT_MODE_5)) {
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1063 event_vram_word(context->cycles, start->address, start->value);
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1064 vdp_check_update_sat(context, start->address, start->value);
1319 b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache Michael Pavone <pavone@retrodev.com> parents: 1318 diff changeset	1065 write_vram_word(context, start->address, start->value);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1066 } else {
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1067 uint8_t byte = start->partial == 1 ? start->value >> 8 : start->value;
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1068 uint32_t address = start->address ^ 1;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1069 event_vram_byte(context->cycles, start->address, byte, context->regs[REG_AUTOINC]);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1070 vdp_check_update_sat_byte(context, address, byte);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1071 write_vram_byte(context, address, byte);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1072 if (!start->partial) {
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1073 start->address = address;
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1074 start->partial = 1;
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1075 //skip auto-increment and removal of entry from fifo
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1076 return;
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1077 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1078 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1079 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1080 case CRAM_WRITE: {
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1081 //printf("CRAM Write \| %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1));
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1082 uint16_t val;
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1083 if (start->partial == 3) {
2194 01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1084 if (context->type == VDP_GAMEGEAR) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1085 if (start->address & 1) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1086 val = start->value << 8 \| context->cram_latch;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1087 } else {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1088 context->cram_latch = start->value;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1089 break;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1090 }
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation Michael Pavone <pavone@retrodev.com> parents: 2118 diff changeset	1091 } else if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1092 val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) \| start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1093 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1094 uint16_t address = (context->regs[REG_MODE_2] & BIT_MODE_5) ? start->address >> 1 & (CRAM_SIZE-1) : start->address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1095 val = (context->cram[address] & 0xFF00) \| start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1096 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1097 } else {
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1098 val = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1099 }
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1100 uint8_t buffer[3] = {start->address & 127, val >> 8, val};
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1101 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	1102 write_cram(context, start->address, val);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1103 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1104 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1105 case VSRAM_WRITE:
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	1106 if (((start->address/2) & 63) < context->vsram_size) {
1432 5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	1107 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles);
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	1108 if (start->partial == 3) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1109 if (start->address & 1) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1110 context->vsram[(start->address/2) & 63] &= 0xFF;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1111 context->vsram[(start->address/2) & 63] \|= start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1112 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1113 context->vsram[(start->address/2) & 63] &= 0xFF00;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1114 context->vsram[(start->address/2) & 63] \|= start->value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1115 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1116 } else {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1117 context->vsram[(start->address/2) & 63] = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	1118 }
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1119 uint8_t buffer[3] = {((start->address/2) & 63) + 128, context->vsram[(start->address/2) & 63] >> 8, context->vsram[(start->address/2) & 63]};
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	1120 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1121 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1122
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1123 break;
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1124 default:
2334 57ebbc1ade30 Fix regression in mega-color image demos Michael Pavone <pavone@retrodev.com> parents: 2283 diff changeset	1125 if (!(context->cd & 6) && !start->partial && (context->regs[REG_MODE_2] & (BIT_128K_VRAM\|BIT_MODE_5)) != (BIT_128K_VRAM\|BIT_MODE_5)) {
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1126 start->partial = 1;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1127 return;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1128 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1129 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1130 context->fifo_read = (context->fifo_read+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1131 if (context->fifo_read == context->fifo_write) {
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1132 if ((context->cd & 0x20) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	1133 context->flags \|= FLAG_DMA_RUN;
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	1134 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	1135 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	1136 }
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	1137 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1138 context->fifo_read = -1;
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1139 }
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	1140 } else if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1141 if (context->flags & FLAG_READ_FETCHED) {
998 bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug. Michael Pavone <pavone@retrodev.com> parents: 995 diff changeset	1142 write_vram_byte(context, context->address ^ 1, context->prefetch);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1143
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1144 //Update DMA state
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1145 vdp_advance_dma(context);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1146
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1147 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1148 } else {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1149 context->prefetch = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L] ^ 1];
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1150
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1151 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1152 }
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	1153 } else if (!(context->cd & 1) && !(context->flags & (FLAG_READ_FETCHED\|FLAG_PENDING)) && context->read_latency <= context->cycles) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1154 switch(context->cd & 0xF)
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1155 {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1156 case VRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1157 if (context->flags2 & FLAG2_READ_PENDING) {
2283 6f6f21d0c396 Fix missing address masks on some VRAM reads Michael Pavone <pavone@retrodev.com> parents: 2264 diff changeset	1158 //TODO: 128K VRAM support
6f6f21d0c396 Fix missing address masks on some VRAM reads Michael Pavone <pavone@retrodev.com> parents: 2264 diff changeset	1159 context->prefetch \|= context->vdpmem[(context->address & 0xFFFE) \| 1];
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1160 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1161 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1162 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1163 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1164 } else {
2283 6f6f21d0c396 Fix missing address masks on some VRAM reads Michael Pavone <pavone@retrodev.com> parents: 2264 diff changeset	1165 //TODO: 128K VRAM support
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1166 context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1167 context->flags2 \|= FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1168 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1169 break;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1170 case VRAM_READ8: {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1171 uint32_t address = context->address ^ 1;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1172 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1173 address = mode4_address_map[address & 0x3FFF];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1174 }
2283 6f6f21d0c396 Fix missing address masks on some VRAM reads Michael Pavone <pavone@retrodev.com> parents: 2264 diff changeset	1175 //TODO: 128K VRAM support
2338 bc17ece8dd00 Fix silly regression in SMS mode Michael Pavone <pavone@retrodev.com> parents: 2337 diff changeset	1176 context->prefetch = context->vdpmem[address & 0xFFFF];
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1177 context->prefetch \|= context->fifo[context->fifo_write].value & 0xFF00;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1178 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1179 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1180 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1181 break;
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	1182 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1183 case CRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1184 context->prefetch = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1185 context->prefetch \|= context->fifo[context->fifo_write].value & ~CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1186 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1187 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1188 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1189 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1190 case VSRAM_READ: {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1191 uint16_t address = (context->address /2) & 63;
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	1192 if (address >= context->vsram_size) {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1193 address = 0;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1194 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1195 context->prefetch = context->vsram[address] & VSRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1196 context->prefetch \|= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1197 context->flags \|= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1198 //Should this happen after the prefetch or after the read?
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	1199 increment_address(context);
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1200 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1201 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	1202 }
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1203 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1204 }
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1205
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1206 static void run_dma_src(vdp_context * context, int32_t slot)
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1207 {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1208 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1209 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	1210 if (context->fifo_write == context->fifo_read) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1211 return;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1212 }
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1213 fifo_entry * cur = NULL;
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1214 if (!(context->regs[REG_DMASRC_H] & 0x80))
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	1215 {
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1216 //68K -> VDP
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	1217 if (slot == -1 \|\| !is_refresh(context, slot-1)) {
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1218 cur = context->fifo + context->fifo_write;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	1219 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
478 2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1220 cur->address = context->address;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1221 cur->value = read_dma_value((context->regs[REG_DMASRC_H] << 16) \| (context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L]);
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1222 cur->cd = context->cd;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1223 cur->partial = 0;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1224 if (context->fifo_read < 0) {
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1225 context->fifo_read = context->fifo_write;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1226 }
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all. Mike Pavone <pavone@retrodev.com> parents: 477 diff changeset	1227 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
984 bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing Michael Pavone <pavone@retrodev.com> parents: 983 diff changeset	1228 vdp_advance_dma(context);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	1229 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	1230 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1231 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1232
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1233 #define WINDOW_RIGHT 0x80
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1234 #define WINDOW_DOWN 0x80
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1235
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1236 static void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1237 {
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1238 uint16_t window_line_shift, v_offset_mask, vscroll_shift;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1239 if (context->double_res) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1240 line *= 2;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	1241 if (context->flags2 & FLAG2_EVEN_FIELD) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1242 line++;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1243 }
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1244 window_line_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1245 v_offset_mask = 0xF;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1246 vscroll_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1247 } else {
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1248 window_line_shift = 3;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1249 v_offset_mask = 0x7;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1250 vscroll_shift = 3;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1251 }
2337 0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1252 //TODO: Further research on vscroll latch behavior
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1253 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1254 if (!column) {
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1255 if (context->regs[REG_MODE_4] & BIT_H40) {
2337 0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1256 //Pre MD2VA4, behavior seems to vary from console to console
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1257 //On some consoles it's a stable AND, on some it's always zero and others it's an "unstable" AND
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1258 if (context->vsram_size == MIN_VSRAM_SIZE) {
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1259 // For now just implement the AND behavior
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1260 if (!vsram_off) {
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1261 context->vscroll_latch[0] &= context->vscroll_latch[1];
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1262 context->vscroll_latch[1] = context->vscroll_latch[0];
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1263 }
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1264 } else {
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1265 //MD2VA4 and later use the column 0 value
0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1266 context->vscroll_latch[vsram_off] = context->vsram[vsram_off];
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1267 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1268 } else {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1269 //supposedly it's always forced to 0 in the H32 case
2337 0e3118325c1c Fix first column bug behavior Michael Pavone <pavone@retrodev.com> parents: 2336 diff changeset	1270 //TODO: repeat H40 tests in H32 mode to confirm
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1271 context->vscroll_latch[0] = context->vscroll_latch[1] = 0;
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1272 }
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1273 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	1274 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off];
1344 6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1275 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen Michael Pavone <pavone@retrodev.com> parents: 1343 diff changeset	1276 }
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1277 if (!vsram_off) {
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1278 uint16_t left_col, right_col;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1279 if (context->regs[REG_WINDOW_H] & WINDOW_RIGHT) {
920 e64168bb2b25 Fix calculation of window start column when it's on the right side. This removes graphical glitches in Afterburner 2, Fireshark and Dungeons and Dragons: Warriors of the Eternal Sun and probably others Michael Pavone <pavone@retrodev.com> parents: 884 diff changeset	1280 left_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2 + 2;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1281 right_col = 42;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1282 } else {
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1283 left_col = 0;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1284 right_col = (context->regs[REG_WINDOW_H] & 0x1F) * 2;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1285 if (right_col) {
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1286 right_col += 2;
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1287 }
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1288 }
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1289 uint16_t top_line, bottom_line;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1290 if (context->regs[REG_WINDOW_V] & WINDOW_DOWN) {
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1291 top_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1292 bottom_line = context->double_res ? 481 : 241;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1293 } else {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1294 top_line = 0;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1295 bottom_line = (context->regs[REG_WINDOW_V] & 0x1F) << window_line_shift;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1296 }
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1297 if ((column >= left_col && column < right_col) \|\| (line >= top_line && line < bottom_line)) {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1298 uint16_t address = context->regs[REG_WINDOW] << 10;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1299 uint16_t line_offset, offset, mask;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	1300 if (context->regs[REG_MODE_4] & BIT_H40) {
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1301 address &= 0xF000;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1302 line_offset = (((line) >> vscroll_shift) * 64 * 2) & 0xFFF;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1303 mask = 0x7F;
450 3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty Mike Pavone <pavone@retrodev.com> parents: 438 diff changeset	1304
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1305 } else {
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1306 address &= 0xF800;
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1307 line_offset = (((line) >> vscroll_shift) * 32 * 2) & 0xFFF;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1308 mask = 0x3F;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1309 }
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1310 if (context->double_res) {
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1311 mask <<= 1;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1312 mask \|= 1;
acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1313 }
42 6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane. Mike Pavone <pavone@retrodev.com> parents: 41 diff changeset	1314 offset = address + line_offset + (((column - 2) * 2) & mask);
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1315 context->col_1 = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	1316 //printf("Window \| top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]);
42 6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane. Mike Pavone <pavone@retrodev.com> parents: 41 diff changeset	1317 offset = address + line_offset + (((column - 1) * 2) & mask);
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1318 context->col_2 = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
417 acdd6c5240fe Fix window layer in double res interlace mode Mike Pavone <pavone@retrodev.com> parents: 415 diff changeset	1319 context->v_offset = (line) & v_offset_mask;
41 e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1320 context->flags \|= FLAG_WINDOW;
e591004487bc More correct window support, maybe Mike Pavone <pavone@retrodev.com> parents: 40 diff changeset	1321 return;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1322 } else if (column == right_col) {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1323 context->flags \|= FLAG_WINDOW_EDGE;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1324 context->flags &= ~FLAG_WINDOW;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1325 } else {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1326 context->flags &= ~(FLAG_WINDOW_EDGE\|FLAG_WINDOW);
40 7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1327 }
7368a7071908 Broken window support Mike Pavone <pavone@retrodev.com> parents: 39 diff changeset	1328 }
1290 aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk Michael Pavone <pavone@retrodev.com> parents: 1289 diff changeset	1329 //TODO: Verify behavior for 0x20 case
aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk Michael Pavone <pavone@retrodev.com> parents: 1289 diff changeset	1330 uint16_t vscroll = 0xFF \| (context->regs[REG_SCROLL] & 0x30) << 4;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1331 if (context->double_res) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1332 vscroll <<= 1;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1333 vscroll \|= 1;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1334 }
710 4cd8823f79e3 First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it Michael Pavone <pavone@retrodev.com> parents: 708 diff changeset	1335 vscroll &= context->vscroll_latch[vsram_off] + line;
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1336 context->v_offset = vscroll & v_offset_mask;
26 a7c2b92d8056 Fix management of context->sprite_draws so the sprite layer only draws when it should Mike Pavone <pavone@retrodev.com> parents: 25 diff changeset	1337 //printf("%s \| line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset);
414 51ee0f117365 Fix vscroll calculation in double resultion interlace mode Mike Pavone <pavone@retrodev.com> parents: 413 diff changeset	1338 vscroll >>= vscroll_shift;
1887 bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1339 //TODO: Verify the behavior for a setting of 2
bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1340 static const uint16_t hscroll_masks[] = {0x1F, 0x3F, 0x1F, 0x7F};
2013 dcdad92f84a4 Multiplying by zero and shifting by zero are very different. Fixes regression in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 2010 diff changeset	1341 static const uint16_t v_shifts[] = {6, 7, 16, 8};
1887 bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1342 uint16_t hscroll_mask = hscroll_masks[context->regs[REG_SCROLL] & 0x3];
bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1343 uint16_t v_shift = v_shifts[context->regs[REG_SCROLL] & 0x3];
28 037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1344 uint16_t hscroll, offset;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1345 for (int i = 0; i < 2; i++) {
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1346 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask;
1887 bb3edb4ec605 Small optimization to read_map_scroll Michael Pavone <pavone@retrodev.com> parents: 1886 diff changeset	1347 offset = address + (((vscroll << v_shift) + hscroll*2) & 0x1FFF);
39 3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should Mike Pavone <pavone@retrodev.com> parents: 38 diff changeset	1348 //printf("%s \| line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset);
28 037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1349 uint16_t col_val = (context->vdpmem[offset] << 8) \| context->vdpmem[offset+1];
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1350 if (i) {
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1351 context->col_2 = col_val;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1352 } else {
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1353 context->col_1 = col_val;
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1354 }
037963b4c92d Fix BG plane B render bug Mike Pavone <pavone@retrodev.com> parents: 27 diff changeset	1355 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1356 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1357
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1358 static void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1359 {
25 4d0c20ad815a Fix vertical scroll value for plane B Mike Pavone <pavone@retrodev.com> parents: 24 diff changeset	1360 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1361 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1362
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1363 static void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1364 {
25 4d0c20ad815a Fix vertical scroll value for plane B Mike Pavone <pavone@retrodev.com> parents: 24 diff changeset	1365 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1366 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1367
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1368 static void read_map_mode4(uint16_t column, uint32_t line, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1369 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1370 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1371 //add row
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1372 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1373 if (column < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1374 vscroll += context->regs[REG_Y_SCROLL];
2465 b0408f38f464 Add missing mask to vscroll calculation in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2414 diff changeset	1375 vscroll &= 511;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1376 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1377 if (vscroll > 223) {
2465 b0408f38f464 Add missing mask to vscroll calculation in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 2414 diff changeset	1378 //TODO: support V28 and V30 for SMS2/GG VDPs
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1379 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1380 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1381 address += (vscroll >> 3) * 2 * 32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1382 //add column
1136 52f25c41abdd Fix horizontal scrolling in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1135 diff changeset	1383 address += ((column - (context->hscroll_a >> 3)) & 31) * 2;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1384 //adjust for weird VRAM mapping in Mode 4
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1385 address = mode4_address_map[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1386 context->col_1 = (context->vdpmem[address] << 8) \| context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1387 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1388
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1389 static void render_map(uint16_t col, uint8_t * tmp_buf, uint8_t offset, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1390 {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1391 uint16_t address;
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1392 uint16_t vflip_base;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1393 if (context->double_res) {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1394 address = ((col & 0x3FF) << 6);
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1395 vflip_base = 60;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1396 } else {
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1397 address = ((col & 0x7FF) << 5);
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1398 vflip_base = 28;
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	1399 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1400 if (col & MAP_BIT_V_FLIP) {
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1401 address += vflip_base - 4 * context->v_offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1402 } else {
1032 679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 1029 diff changeset	1403 address += 4 * context->v_offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1404 }
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1405 uint8_t pal_priority = (col >> 9) & 0x70;
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1406 uint32_t bits = ((uint32_t )(&context->vdpmem[address]));
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1407 tmp_buf += offset;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1408 if (col & MAP_BIT_H_FLIP) {
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1409 uint32_t shift = 28;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1410 for (int i = 0; i < 4; i++)
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1411 {
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1412 uint8_t right = pal_priority \| ((bits >> shift) & 0xF);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1413 shift -= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1414 *(tmp_buf++) = pal_priority \| ((bits >> shift) & 0xF);
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1415 shift -= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1416 *(tmp_buf++) = right;
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1417 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1418 } else {
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1419 for (int i = 0; i < 4; i++)
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1420 {
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1421 uint8_t right = pal_priority \| (bits & 0xF);
858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1422 bits >>= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1423 *(tmp_buf++) = pal_priority \| (bits & 0xF);
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1424 bits >>= 4;
1875 3457d338ae25 Small optimization to render_map in VDP code Michael Pavone <pavone@retrodev.com> parents: 1874 diff changeset	1425 *(tmp_buf++) = right;
1653 858d52140375 Small optimization to render_map Michael Pavone <pavone@retrodev.com> parents: 1652 diff changeset	1426 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1427 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1428 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1429
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1430 static void render_map_1(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1431 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1432 render_map(context->col_1, context->tmp_buf_a, context->buf_a_off, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1433 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1434
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1435 static void render_map_2(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1436 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1437 render_map(context->col_2, context->tmp_buf_a, context->buf_a_off+8, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1438 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1439
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1440 static void render_map_3(vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1441 {
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1442 render_map(context->col_1, context->tmp_buf_b, context->buf_b_off, context);
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1443 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1444
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1445 static void fetch_map_mode4(uint16_t col, uint32_t line, vdp_context *context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1446 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1447 //calculate pixel row to fetch
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1448 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1449 if (col < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1450 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1451 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1452 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1453 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1454 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1455 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1456 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1457 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1458 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1459
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1460 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1461 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1462 context->fetch_tmp[1] = context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1463 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1464
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1465 static uint8_t composite_normal(vdp_context context, uint8_t debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1466 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1467 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1468 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1469 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1470 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1471 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1472 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1473 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1474 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1475 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1476 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1477 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1478 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1479 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1480 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1481 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1482 return pixel;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1483 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1484 typedef struct {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1485 uint8_t index, intensity;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1486 } sh_pixel;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1487
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1488 static sh_pixel composite_highlight(vdp_context context, uint8_t debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1489 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1490 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1491 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1492 uint8_t intensity = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1493 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1494 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1495 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1496 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1497 intensity = plane_b & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1498 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1499 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1500 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1501 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1502 intensity \|= plane_a & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1503 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1504 if ((sprite & 0x3F) == 0x3E) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1505 intensity += BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1506 } else if ((sprite & 0x3F) == 0x3F) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1507 intensity = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1508 } else {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1509 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1510 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1511 if ((pixel & 0xF) == 0xE) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1512 intensity = BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1513 } else {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1514 intensity \|= pixel & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1515 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1516 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1517 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1518 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1519 return (sh_pixel){.index = pixel, .intensity = intensity};
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1520 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1521
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1522 static void render_normal(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1523 {
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1524 uint8_t sprite_buf = context->linebuf + col 8;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1525 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1526 memset(dst, 0, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1527 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1528 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1529 debug_dst += 8;
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1530 sprite_buf += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1531 plane_a_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1532 plane_b_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1533 for (int i = 0; i < 8; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1534 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1535 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1536 plane_a = buf_a[plane_a_off & plane_a_mask];
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1537 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1538 (dst++) = composite_normal(context, debug_dst, sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1539 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1540 }
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1541 } else {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1542 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1543 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1544 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1545 plane_a = buf_a[plane_a_off & plane_a_mask];
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1546 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1547 (dst++) = composite_normal(context, debug_dst, sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1548 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1549 }
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1550 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1551 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1552
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1553 static void render_highlight(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1554 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1555 int start = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1556 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1557 memset(dst, SHADOW_OFFSET + (context->regs[REG_BG_COLOR] & 0x3F), 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1558 memset(debug_dst, DBG_SRC_BG \| DBG_SHADOW, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1559 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1560 debug_dst += 8;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1561 start = 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1562 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1563 uint8_t sprite_buf = context->linebuf + col 8 + start;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1564 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1565 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1566 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1567 plane_a = buf_a[plane_a_off & plane_a_mask];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1568 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1569 sprite = *sprite_buf;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1570 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, context->regs[REG_BG_COLOR]);
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1571 uint8_t final_pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1572 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1573 final_pixel = (pixel.index & 0x3F) + HIGHLIGHT_OFFSET;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1574 } else if (pixel.intensity) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1575 final_pixel = pixel.index & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1576 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1577 final_pixel = (pixel.index & 0x3F) + SHADOW_OFFSET;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1578 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1579 debug_dst++;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1580 *(dst++) = final_pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1581 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1582 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1583
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1584 static void render_testreg(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1585 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1586 if (output_disabled) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1587 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1588 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1589 case 0:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1590 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1591 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1592 *(dst++) = 0x3F; //TODO: confirm this on hardware
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1593 *(debug_dst++) = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1594 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1595 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1596 case 1: {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1597 uint8_t sprite_buf = context->linebuf + col 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1598 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1599 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1600 (dst++) = (sprite_buf++) & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1601 *(debug_dst++) = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1602 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1603 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1604 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1605 case 2:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1606 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1607 {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1608 *(dst++) = buf_a[(plane_a_off++) & plane_a_mask] & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1609 *(debug_dst++) = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1610 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1611 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1612 case 3:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1613 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1614 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1615 *(dst++) = context->tmp_buf_b[(plane_b_off++) & SCROLL_BUFFER_MASK] & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1616 *(debug_dst++) = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1617 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1618 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1619 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1620 } else {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1621 int start = 0;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1622 uint8_t sprite_buf = context->linebuf + col 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1623 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1624 //TODO: Confirm how test register interacts with column 0 blanking
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1625 uint8_t pixel = 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1626 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1627 for (int i = 0; i < 8; ++i)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1628 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1629 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1630 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1631 case 1:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1632 pixel &= sprite_buf[i];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1633 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1634 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1635 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1636 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1637 case 2:
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1638 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1639 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1640 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1641 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1642 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1643 case 3:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1644 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1645 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1646 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1647 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1648 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1649 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1650
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1651 *(dst++) = pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1652 *(debug_dst++) = src;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1653 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1654 plane_a_off += 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1655 plane_b_off += 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1656 sprite_buf += 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1657 start = 8;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1658 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1659 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1660 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1661 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1662 plane_a = buf_a[plane_a_off & plane_a_mask];
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1663 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1664 sprite = *sprite_buf;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1665 uint8_t pixel = composite_normal(context, debug_dst, sprite, plane_a, plane_b, 0x3F) & 0x3F;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1666 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1667 {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1668 case 1:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1669 pixel &= sprite;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1670 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1671 *debug_dst = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1672 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1673 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1674 case 2:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1675 pixel &= plane_a;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1676 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1677 *debug_dst = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1678 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1679 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1680 case 3:
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1681 pixel &= plane_b;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1682 if (pixel) {
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1683 *debug_dst = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1684 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1685 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1686 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1687 debug_dst++;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1688 *(dst++) = pixel;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1689 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1690 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1691 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1692
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1693 static void render_testreg_highlight(vdp_context context, int32_t col, uint8_t dst, uint8_t debug_dst, uint8_t buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1694 {
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1695 int start = 0;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1696 uint8_t sprite_buf = context->linebuf + col 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1697 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1698 //TODO: Confirm how test register interacts with column 0 blanking
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1699 uint8_t pixel = 0x3F;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1700 uint8_t src = DBG_SRC_BG \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1701 for (int i = 0; i < 8; ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1702 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1703 switch (test_layer)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1704 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1705 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1706 pixel &= sprite_buf[i];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1707 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1708 src = DBG_SRC_S \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1709 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1710 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1711 case 2:
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1712 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1713 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1714 src = DBG_SRC_A \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1715 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1716 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1717 case 3:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1718 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1719 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1720 src = DBG_SRC_B \| DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1721 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1722 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1723 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1724
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1725 *(dst++) = SHADOW_OFFSET + pixel;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1726 *(debug_dst++) = src;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1727 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1728 plane_a_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1729 plane_b_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1730 sprite_buf += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1731 start = 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1732 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1733 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1734 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1735 uint8_t sprite, plane_a, plane_b;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1736 plane_a = buf_a[plane_a_off & plane_a_mask];
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1737 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1738 sprite = *sprite_buf;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1739 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, 0x3F);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1740 if (output_disabled) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1741 pixel.index = 0x3F;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1742 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1743 pixel.index &= 0x3F;
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1744 }
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1745 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1746 {
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1747 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1748 pixel.index &= sprite;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1749 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1750 *debug_dst = DBG_SRC_S;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1751 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1752 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1753 case 2:
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1754 pixel.index &= plane_a;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1755 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1756 *debug_dst = DBG_SRC_A;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1757 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1758 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1759 case 3:
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1760 pixel.index &= plane_b;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1761 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1762 *debug_dst = DBG_SRC_B;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1763 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1764 break;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1765 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1766 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1767 pixel.index += HIGHLIGHT_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1768 } else if (!pixel.intensity) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1769 pixel.index += SHADOW_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1770 }
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1771 debug_dst++;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1772 *(dst++) = pixel.index;
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1773 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1774 }
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1775
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1776 static void render_map_output(uint32_t line, int32_t col, vdp_context * context)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1777 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1778 uint8_t *dst;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1779 uint8_t *debug_dst;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1780 uint8_t output_disabled = (context->test_port & TEST_BIT_DISABLE) != 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1781 uint8_t test_layer = context->test_port >> 7 & 3;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	1782 if (context->state == PREPARING && !test_layer) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1783 if (col) {
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1784 col -= 2;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1785 dst = context->compositebuf + BORDER_LEFT + col * 8;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1786 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1787 dst = context->compositebuf;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1788 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1789 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1790 context->done_composite = dst + BORDER_LEFT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1791 return;
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	1792 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1793 memset(dst, 0, 16);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1794 context->done_composite = dst + 16;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1795 return;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	1796 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1797 line &= 0xFF;
1180 e2b81a0f8fd8 Undo poorly thought out minor optimization that screwed up rendering Michael Pavone <pavone@retrodev.com> parents: 1179 diff changeset	1798 render_map(context->col_2, context->tmp_buf_b, context->buf_b_off+8, context);
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1799 uint8_t *sprite_buf;
d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1800 uint8_t sprite, plane_a, plane_b;
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1801 int plane_a_off, plane_b_off;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1802 if (col)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1803 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1804 col-=2;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1805 dst = context->compositebuf + BORDER_LEFT + col * 8;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1806 debug_dst = context->layer_debug_buf + BORDER_LEFT + col * 8;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1807
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1808
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1809 uint8_t a_src, src;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1810 uint8_t *buf_a;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1811 int plane_a_mask;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1812 if (context->flags & FLAG_WINDOW) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1813 plane_a_off = context->buf_a_off;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1814 buf_a = context->tmp_buf_a;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1815 a_src = DBG_SRC_W;
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1816 plane_a_mask = SCROLL_BUFFER_MASK;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1817 } else {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1818 if (context->flags & FLAG_WINDOW_EDGE) {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1819 buf_a = context->tmp_buf_a + context->buf_a_off;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1820 plane_a_mask = 15;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1821 plane_a_off = -context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1822 } else {
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1823 plane_a_off = context->buf_a_off - context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1824 plane_a_mask = SCROLL_BUFFER_MASK;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1825 buf_a = context->tmp_buf_a;
a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1826 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1827 a_src = DBG_SRC_A;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1828 }
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1829 plane_a_off &= plane_a_mask;
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	1830 plane_b_off = context->buf_b_off - context->hscroll_b_fine;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1831 //printf("A \| tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7));
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1832
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1833 if (context->regs[REG_MODE_4] & BIT_HILIGHT) {
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1834 if (output_disabled \|\| test_layer) {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1835 render_testreg_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1836 } else {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1837 render_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
722 8f5339961903 Restore the other 2 debug display modes Michael Pavone <pavone@retrodev.com> parents: 720 diff changeset	1838 }
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1839 } else {
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1840 if (output_disabled \|\| test_layer) {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1841 render_testreg(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652 d0a69348add8 Optimized render_map_output a bit Michael Pavone <pavone@retrodev.com> parents: 1649 diff changeset	1842 } else {
2040 a61b47d5489e Fix window bug implementation Michael Pavone <pavone@retrodev.com> parents: 2032 diff changeset	1843 render_normal(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
230 d3266cee02c9 Implemented shadow hilight mode. Mike Pavone <pavone@retrodev.com> parents: 191 diff changeset	1844 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1845 }
1655 3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations Michael Pavone <pavone@retrodev.com> parents: 1653 diff changeset	1846 dst += 16;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1847 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1848 dst = context->compositebuf;
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1849 debug_dst = context->layer_debug_buf;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1850 uint8_t pixel = 0;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1851 if (output_disabled) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1852 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1853 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1854 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1855 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1856 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1857 case 1:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1858 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1859 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1860 dst += BORDER_LEFT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1861 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1862 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1863 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1864 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1865 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1866 i = 0;
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	1867 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine + (16 - BORDER_LEFT);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1868 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1869 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1870 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1871 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK];
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1872 *debug_dst = DBG_SRC_A;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1873 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1874 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1875 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1876 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1877 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1878 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1879 i = 0;
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	1880 uint8_t buf_off = context->buf_b_off - context->hscroll_b_fine + (16 - BORDER_LEFT);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1881 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1882 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1883 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1884 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK];
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	1885 *debug_dst = DBG_SRC_B;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1886 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1887 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1888 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1889 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1890 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1891 memset(dst, pixel, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1892 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878 881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling Michael Pavone <pavone@retrodev.com> parents: 1877 diff changeset	1893 dst += BORDER_LEFT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	1894 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1895 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1896 context->done_composite = dst;
436 e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1897 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy Mike Pavone <pavone@retrodev.com> parents: 427 diff changeset	1898 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1899 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	1900
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1901 static void render_map_mode4(uint32_t line, int32_t col, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1902 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1903 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1904 if (col < 24 \|\| !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1905 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1906 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1907 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1908 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1909 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1910 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1911 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1912 //vflip
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1913 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1914 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1915
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1916 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1917 pixels \|= planar_to_chunky[context->fetch_tmp[1]];
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1918
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1919 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4 + 2];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1920 pixels \|= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1921 pixels \|= planar_to_chunky[context->vdpmem[address+1]] << 2;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1922
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1923 int i, i_inc, i_limit;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1924 if (context->col_1 & 0x200) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1925 //hflip
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1926 i = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1927 i_inc = 4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1928 i_limit = 32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1929 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1930 i = 28;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1931 i_inc = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1932 i_limit = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1933 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1934 uint8_t pal_priority = (context->col_1 >> 7 & 0x10) \| (context->col_1 >> 6 & 0x40);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1935 for (uint8_t *dst = context->tmp_buf_a + context->buf_a_off; i != i_limit; i += i_inc, dst++)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1936 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1937 *dst = (pixels >> i & 0xF) \| pal_priority;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1938 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1939 context->buf_a_off = (context->buf_a_off + 8) & 15;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1940
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1941 uint8_t dst = context->compositebuf + col 8 + BORDER_LEFT;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1942 uint8_t debug_dst = context->layer_debug_buf + col 8 + BORDER_LEFT;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1943 if (context->state == PREPARING) {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1944 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1945 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1946 context->done_composite = dst + 8;
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1947 return;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	1948 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	1949
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1950 if (col \|\| !(context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1951 uint8_t sprite_src = context->linebuf + col 8;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1952 if (context->regs[REG_MODE_1] & BIT_SPRITE_8PX) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1953 sprite_src += 8;
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1954 }
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1955 for (int i = 0; i < 8; i++, sprite_src++)
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1956 {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1957 uint8_t bg_src = context->tmp_buf_a + ((8 + i + col 8 - (context->hscroll_a & 0x7)) & 15);
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1958 if ((bg_src & 0x4F) > 0x40 \|\| !sprite_src) {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1959 //background plane has priority and is opaque or sprite layer is transparent
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1960 uint8_t pixel = *bg_src & 0x1F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1961 *(dst++) = pixel + MODE4_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1962 *(debug_dst++) = pixel ? DBG_SRC_A : DBG_SRC_BG;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1963 } else {
6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1964 //sprite layer is opaque and not covered by high priority BG pixels
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1965 (dst++) = (sprite_src \| 0x10) + MODE4_OFFSET;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1966 *(debug_dst++) = DBG_SRC_S;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1967 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1968 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1969 context->done_composite = dst;
1643 6909c5d0bbb5 Removed old VDP debug functionality Michael Pavone <pavone@retrodev.com> parents: 1642 diff changeset	1970 } else {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1971 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	1972 memset(debug_dst, DBG_SRC_BG, 8);
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	1973 context->done_composite = dst + 8;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1974 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1975 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	1976
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1977 static uint32_t const h40_hsync_cycles[] = {19, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 19};
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1978
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	1979 static void vdp_advance_line(vdp_context *context)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	1980 {
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1981 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1982 static uint32_t last_line = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1983 if (last_line != 0xFFFFFFFF) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1984 uint32_t diff = context->cycles - last_line;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1985 if (diff != MCLKS_LINE) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1986 printf("Line %d took %d cycles\n", context->vcounter, diff);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1987 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1988 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1989 last_line = context->cycles;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	1990 #endif
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1991 uint16_t jump_start, jump_end;
1156 b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	1992 uint8_t is_mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	1993 if (is_mode_5) {
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1155 diff changeset	1994 if (context->flags2 & FLAG2_REGION_PAL) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	1995 if (context->regs[REG_MODE_2] & BIT_PAL) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1996 jump_start = 0x10B;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1997 jump_end = 0x1D2;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1998 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	1999 jump_start = 0x103;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2000 jump_end = 0x1CA;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2001 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2002 } else if (context->regs[REG_MODE_2] & BIT_PAL) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2003 jump_start = 0x100;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2004 jump_end = 0x1FA;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2005 } else {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2006 jump_start = 0xEB;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2007 jump_end = 0x1E5;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2008 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2009 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2010 jump_start = 0xDB;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2011 jump_end = 0x1D5;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2012 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2013
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2014 if (context->enabled_debuggers & (1 << DEBUG_CRAM \| 1 << DEBUG_COMPOSITE)) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2015 uint32_t line = context->vcounter;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2016 if (line >= jump_end) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2017 line -= jump_end - jump_start;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2018 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2019 uint32_t total_lines = (context->flags2 & FLAG2_REGION_PAL) ? 313 : 262;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2020
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2021 if (total_lines - line <= context->border_top) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2022 line -= total_lines - context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2023 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2024 line += context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2025 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2026 if (context->enabled_debuggers & (1 << DEBUG_CRAM)) {
0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2027 uint32_t fb = context->debug_fbs[DEBUG_CRAM] + context->debug_fb_pitch[DEBUG_CRAM] line / sizeof(uint32_t);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2028 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2029 for (int i = 0; i < 64; i++)
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2030 {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2031 for (int x = 0; x < 8; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2032 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2033 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2034 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2035 }
2411 efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2036 } else if (context->type == VDP_GENESIS \|\| (context->regs[REG_MODE_1] & BIT_MODE_4)) {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2037 for (int i = MODE4_OFFSET; i < MODE4_OFFSET+32; i++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2038 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2039 for (int x = 0; x < 16; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2040 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2041 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2042 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2043 }
2411 efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2044 } else if (context->type != VDP_GENESIS) {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2045 uint16_t address = context->regs[REG_COLOR_TABLE] << 6;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2046 for (int i = 0; i < 32; i++, address++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2047 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2048 uint8_t entry = context->vdpmem[mode4_address_map[address] ^ 1];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2049 uint8_t fg = entry >> 4, bg = entry & 0xF;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2050 uint32_t fg_full, bg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2051 if (context->type == VDP_GAMEGEAR) {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2052 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2053 fg_full = context->colors[fg + 16 + MODE4_OFFSET];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2054 bg_full = context->colors[bg + 16 + MODE4_OFFSET];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2055 } else {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2056 fg <<= 1;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2057 fg = (fg & 0xE) \| (fg << 1 & 0x20);
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2058 fg_full = context->color_map[fg \| FBUF_TMS];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2059 bg <<= 1;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2060 bg = (bg & 0xE) \| (bg << 1 & 0x20);
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2061 bg_full = context->color_map[bg \| FBUF_TMS];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2062 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2063 for (int x = 0; x < 8; x++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2064 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2065 *(fb++) = fg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2066 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2067 for (int x = 0; x < 8; x++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2068 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2069 *(fb++) = bg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2070 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	2071 }
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2072 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2073 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2074 if (
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2075 context->enabled_debuggers & (1 << DEBUG_COMPOSITE)
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2076 && line < (context->inactive_start + context->border_bot + context->border_top)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2077 ) {
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2078 uint32_t fb = context->debug_fbs[DEBUG_COMPOSITE] + context->debug_fb_pitch[DEBUG_COMPOSITE] line / sizeof(uint32_t);
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2079 for (int i = 0; i < LINEBUF_SIZE; i++)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2080 {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	2081 *(fb++) = context->debugcolors[context->layer_debug_buf[i]];
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2082 }
1299 da1ffc4026c4 Fix latching of V32 mode bit Michael Pavone <pavone@retrodev.com> parents: 1290 diff changeset	2083 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2084 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2085
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2086 context->vcounter++;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2087 if (context->vcounter == jump_start) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2088 context->vcounter = jump_end;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2089 } else {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2090 context->vcounter &= 0x1FF;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2091 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2092 if (context->state == PREPARING) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2093 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2094 }
1377 e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	2095 if (context->vcounter == 0x1FF) {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	2096 context->flags2 &= ~FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	2097 }
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2098
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2099 if (context->state != ACTIVE) {
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2100 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2101 } else if (context->hint_counter) {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2102 context->hint_counter--;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2103 } else {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2104 context->flags2 \|= FLAG2_HINT_PENDING;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2105 context->pending_hint_start = context->cycles;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2106 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2107 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2108 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2109
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2110 static void vram_debug_mode5(uint32_t fb, uint32_t pitch, vdp_context context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2111 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2112 uint8_t pal = (context->debug_modes[DEBUG_VRAM] % 4) << 4;
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2113 int yshift, ymask, tilesize;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2114 if (context->double_res) {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2115 yshift = 5;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2116 ymask = 0xF;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2117 tilesize = 64;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2118 } else {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2119 yshift = 4;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2120 ymask = 0x7;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2121 tilesize = 32;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2122 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2123 for (int y = 0; y < 512; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2124 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2125 uint32_t line = fb + y pitch / sizeof(uint32_t);
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2126 int row = y >> yshift;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2127 int yoff = y >> 1 & ymask;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2128 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2129 {
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2130 uint16_t address = (row * 64 + col) * tilesize + yoff * 4;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2131 for (int x = 0; x < 4; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2132 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2133 uint8_t byte = context->vdpmem[address++];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2134 uint8_t left = byte >> 4 \| pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2135 uint8_t right = byte & 0xF \| pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2136 *(line++) = context->colors[left];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2137 *(line++) = context->colors[left];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2138 *(line++) = context->colors[right];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2139 *(line++) = context->colors[right];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2140 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2141 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2142 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2143 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2144
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2145 static void vram_debug_mode4(uint32_t fb, uint32_t pitch, vdp_context context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2146 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2147 for (int y = 0; y < 256; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2148 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2149 uint32_t line = fb + y pitch / sizeof(uint32_t);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2150 int row = y >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2151 int yoff = y >> 1 & 7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2152 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2153 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2154 uint8_t pal = (col >= 32) << 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2155 uint16_t address = (row * 32 + (col & 31)) * 32 + yoff * 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2156 uint32_t pixels = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2157 for (int x = 0; x < 4; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2158 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2159 uint8_t byte = context->vdpmem[mode4_address_map[address++]];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2160 pixels \|= planar_to_chunky[byte] << (x ^ 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2161 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2162 for (int x = 0; x < 32; x+=4)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2163 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2164 uint8_t pixel = (pixels >> (28 - x) & 0xF) \| pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2165 *(line++) = context->colors[pixel + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2166 *(line++) = context->colors[pixel + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2167 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2168 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2169 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2170 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2171
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2172 static void vram_debug_tms(uint32_t fb, uint32_t pitch, vdp_context context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2173 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2174 uint8_t pal = ((context->debug_modes[DEBUG_VRAM] % 14) + 2) << 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2175 pal = (pal & 0xE) \| (pal << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2176 for (int y = 0; y < 512; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2177 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2178 uint32_t line = fb + y pitch / sizeof(uint32_t);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2179 int row = y >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2180 int yoff = y >> 1 & 7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2181 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2182 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2183 uint16_t address = (row * 64 + col) * 8 + yoff;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2184 uint8_t byte = context->vdpmem[mode4_address_map[address^1]];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2185 for (int x = 0; x < 8; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2186 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2187 uint16_t pixel = (byte & 0x80) ? pal : 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2188 byte <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2189 *(line++) = context->color_map[pixel \| FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2190 *(line++) = context->color_map[pixel \| FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2191 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2192 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2193 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2194 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2195
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2196
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2197 static void vdp_update_per_frame_debug(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2198 {
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2199 if (context->enabled_debuggers & (1 << DEBUG_PLANE)) {
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2200 uint32_t pitch;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2201 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[DEBUG_PLANE], &pitch);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2202 uint16_t hscroll_mask;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2203 uint16_t v_mul;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2204 uint16_t vscroll_mask = 0x1F \| (context->regs[REG_SCROLL] & 0x30) << 1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2205 switch(context->regs[REG_SCROLL] & 0x3)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2206 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2207 case 0:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2208 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2209 v_mul = 64;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2210 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2211 case 0x1:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2212 hscroll_mask = 0x3F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2213 v_mul = 128;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2214 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2215 case 0x2:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2216 //TODO: Verify this behavior
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2217 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2218 v_mul = 0;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2219 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2220 case 0x3:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2221 hscroll_mask = 0x7F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2222 v_mul = 256;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2223 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2224 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2225 uint16_t table_address;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2226 switch(context->debug_modes[DEBUG_PLANE] % 3)
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2227 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2228 case 0:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2229 table_address = context->regs[REG_SCROLL_A] << 10 & 0xE000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2230 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2231 case 1:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2232 table_address = context->regs[REG_SCROLL_B] << 13 & 0xE000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2233 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2234 case 2:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2235 table_address = context->regs[REG_WINDOW] << 10;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2236 if (context->regs[REG_MODE_4] & BIT_H40) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2237 table_address &= 0xF000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2238 v_mul = 128;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2239 hscroll_mask = 0x3F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2240 } else {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2241 table_address &= 0xF800;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2242 v_mul = 64;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2243 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2244 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2245 vscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2246 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2247 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2248 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR & 0x3F]];
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2249 uint16_t num_rows;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2250 int num_lines;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2251 if (context->double_res) {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2252 num_rows = 64;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2253 num_lines = 16;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2254 } else {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2255 num_rows = 128;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2256 num_lines = 8;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2257 }
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2258 for (uint16_t row = 0; row < num_rows; row++)
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2259 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2260 uint16_t row_address = table_address + (row & vscroll_mask) * v_mul;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2261 for (uint16_t col = 0; col < 128; col++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2262 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2263 uint16_t address = row_address + (col & hscroll_mask) * 2;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2264 //pccv hnnn nnnn nnnn
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2265 //
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2266 uint16_t entry = context->vdpmem[address] << 8 \| context->vdpmem[address + 1];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2267 uint8_t pal = entry >> 9 & 0x30;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2268
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2269 uint32_t dst = fb + (row pitch * num_lines / sizeof(uint32_t)) + col * 8;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2270 if (context->double_res) {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2271 address = (entry & 0x3FF) * 64;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2272 } else {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2273 address = (entry & 0x7FF) * 32;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2274 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2275 int y_diff = 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2276 if (entry & 0x1000) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2277 y_diff = -4;
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2278 address += (num_lines - 1) * 4;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2279 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2280 int x_diff = 1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2281 if (entry & 0x800) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2282 x_diff = -1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2283 address += 3;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2284 }
2381 d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode Michael Pavone <pavone@retrodev.com> parents: 2361 diff changeset	2285 for (int y = 0; y < num_lines; y++)
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2286 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2287 uint16_t trow_address = address;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2288 uint32_t *row_dst = dst;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2289 for (int x = 0; x < 4; x++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2290 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2291 uint8_t byte = context->vdpmem[trow_address];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2292 trow_address += x_diff;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2293 uint8_t left, right;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2294 if (x_diff > 0) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2295 left = byte >> 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2296 right = byte & 0xF;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2297 } else {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2298 left = byte & 0xF;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2299 right = byte >> 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2300 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2301 *(row_dst++) = left ? context->colors[left\|pal] : bg_color;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2302 *(row_dst++) = right ? context->colors[right\|pal] : bg_color;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2303 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2304 address += y_diff;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2305 dst += pitch / sizeof(uint32_t);
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2306 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2307 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2308 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2309 render_framebuffer_updated(context->debug_fb_indices[DEBUG_PLANE], 1024);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2310 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2311
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2312 if (context->enabled_debuggers & (1 << DEBUG_VRAM)) {
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2313 uint32_t pitch;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2314 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[DEBUG_VRAM], &pitch);
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2315 if (context->type == VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2316 vram_debug_mode5(fb, pitch, context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2317 } else if (context->type != VDP_TMS9918A && (context->regs[REG_MODE_1] & BIT_MODE_4)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2318 vram_debug_mode4(fb, pitch, context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2319 } else if (context->type != VDP_GENESIS) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	2320 vram_debug_tms(fb, pitch, context);
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2321 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2322 render_framebuffer_updated(context->debug_fb_indices[DEBUG_VRAM], 1024);
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	2323 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2324
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2325 if (context->enabled_debuggers & (1 << DEBUG_CRAM)) {
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2326 uint32_t starting_line = 512 - 32*4;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2327 uint32_t *line = context->debug_fbs[DEBUG_CRAM]
0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2328 + context->debug_fb_pitch[DEBUG_CRAM] * starting_line / sizeof(uint32_t);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2329 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2330 for (int pal = 0; pal < 4; pal ++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2331 {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2332 uint32_t *cur;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2333 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2334 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2335 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2336 for (int offset = 0; offset < 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2337 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2338 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2339 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2340 (cur++) = context->colors[pal 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2341 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2342 *(cur++) = 0xFF000000;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2343 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2344 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(uint32_t);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2345 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2346 cur = line;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2347 for (int x = 0; x < 512; x++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2348 {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2349 *(cur++) = 0xFF000000;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2350 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2351 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(uint32_t);
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2352 }
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2353 } else {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2354 for (int pal = 0; pal < 2; pal ++)
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2355 {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2356 uint32_t *cur;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2357 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2358 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2359 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2360 for (int offset = MODE4_OFFSET; offset < MODE4_OFFSET + 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2361 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2362 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2363 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2364 (cur++) = context->colors[pal 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2365 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2366 *(cur++) = 0xFF000000;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2367 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2368 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(uint32_t);
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2369 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2370 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2371 for (int x = 0; x < 512; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2372 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2373 *(cur++) = 0xFF000000;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2374 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2375 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(uint32_t);
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2376 }
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2377 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2378 render_framebuffer_updated(context->debug_fb_indices[DEBUG_CRAM], 512);
0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2379 context->debug_fbs[DEBUG_CRAM] = render_get_framebuffer(context->debug_fb_indices[DEBUG_CRAM], &context->debug_fb_pitch[DEBUG_CRAM]);
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	2380 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2381 if (context->enabled_debuggers & (1 << DEBUG_COMPOSITE)) {
0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2382 render_framebuffer_updated(context->debug_fb_indices[DEBUG_COMPOSITE], LINEBUF_SIZE);
0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2383 context->debug_fbs[DEBUG_COMPOSITE] = render_get_framebuffer(context->debug_fb_indices[DEBUG_COMPOSITE], &context->debug_fb_pitch[DEBUG_COMPOSITE]);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2384 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2385 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2386
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2387 void vdp_force_update_framebuffer(vdp_context *context)
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2388 {
1897 59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired Michael Pavone <pavone@retrodev.com> parents: 1894 diff changeset	2389 if (!context->fb) {
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired Michael Pavone <pavone@retrodev.com> parents: 1894 diff changeset	2390 return;
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired Michael Pavone <pavone@retrodev.com> parents: 1894 diff changeset	2391 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2392 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2393
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2394 uint16_t to_fill = lines_max - context->output_lines;
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2395 memset(
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2396 ((char )context->fb) + context->output_pitch context->output_lines,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2397 0,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2398 to_fill * context->output_pitch
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2399 );
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2400 render_framebuffer_updated(context->cur_buffer, context->h40_lines > context->output_lines / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2401 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	2402 vdp_update_per_frame_debug(context);
1629 079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2403 }
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code Michael Pavone <pavone@retrodev.com> parents: 1628 diff changeset	2404
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2405 static void advance_output_line(vdp_context *context)
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2406 {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2407 //This function is kind of gross because of the need to deal with vertical border busting via mode changes
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2408 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2409 uint32_t output_line = context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2410 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2411 //vcounter increment occurs much later in Mode 4
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2412 output_line++;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2413 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2414
1899 789746b1a1b3 Fix crash in OD2 Titancade scene when border is completely cropped by overscan settings Mike Pavone <pavone@retrodev.com> parents: 1897 diff changeset	2415 if (context->output_lines >= lines_max \|\| (!context->pushed_frame && output_line == context->inactive_start + context->border_top)) {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2416 //we've either filled up a full frame or we're at the bottom of screen in the current defined mode + border crop
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2417 if (!headless) {
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	2418 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2419 uint8_t is_even = context->flags2 & FLAG2_EVEN_FIELD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2420 if (context->vcounter <= context->inactive_start && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2421 is_even = !is_even;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2422 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2423 context->cur_buffer = is_even ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2424 context->pushed_frame = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2425 context->fb = NULL;
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2426 }
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2427 vdp_update_per_frame_debug(context);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2428 context->h40_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2429 context->frame++;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2430 context->output_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2431 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2432
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2433 if (output_line < context->inactive_start + context->border_bot) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2434 if (context->output_lines) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2435 output_line = context->output_lines++;//context->border_top + context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2436 } else if (!output_line && !context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2437 //top border is completely cropped so we won't hit the case below
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2438 output_line = 0;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2439 context->output_lines = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2440 context->pushed_frame = 0;
2504 593a4f308335 Fix issue that was causing double frame output in Double Dragon 2 Michael Pavone <pavone@retrodev.com> parents: 2503 diff changeset	2441 } else if (!context->pushed_frame) {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2442 context->output_lines = output_line + 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2443 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2444 } else if (output_line >= 0x200 - context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2445 if (output_line == 0x200 - context->border_top) {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2446 //We're at the top of the display, force context->output_lines to be zero to avoid
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2447 //potential screen rolling if the mode is changed at an inopportune time
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	2448 context->output_lines = 0;
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2449 context->pushed_frame = 0;
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	2450 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2451 output_line = context->output_lines++;//context->vcounter - (0x200 - context->border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2452 } else {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2453 context->output = NULL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2454 return;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2455 }
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2456 if (!context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2457 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2458 }
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2459 output_line += context->top_offset;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2460 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * output_line);
1271 c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes Michael Pavone <pavone@retrodev.com> parents: 1270 diff changeset	2461 #ifdef DEBUG_FB_FILL
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2462 for (int i = 0; i < LINEBUF_SIZE; i++)
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2463 {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2464 context->output[i] = 0xFFFF00FF;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2465 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2466 #endif
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2467 if (context->output && (context->regs[REG_MODE_4] & BIT_H40)) {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2468 context->h40_lines++;
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	2469 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2470 }
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2471
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2472 void vdp_release_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2473 {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2474 if (context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2475 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2476 context->output = context->fb = NULL;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2477 }
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2478 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2479
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2480 void vdp_reacquire_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2481 {
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2482 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2483 if (context->output_lines <= lines_max && context->output_lines > 0) {
1891 179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display Michael Pavone <pavone@retrodev.com> parents: 1888 diff changeset	2484 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1881 55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases Mike Pavone <pavone@retrodev.com> parents: 1878 diff changeset	2485 context->output = (uint32_t )(((char )context->fb) + context->output_pitch * (context->output_lines - 1 + context->top_offset));
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2486 } else {
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2487 context->output = NULL;
1401 b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2488 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2489 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer Michael Pavone <pavone@retrodev.com> parents: 1385 diff changeset	2490
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2491 static void render_border_garbage(vdp_context context, uint32_t address, uint8_t buf, uint8_t buf_off, uint16_t col)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2492 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2493 uint8_t base = col >> 9 & 0x30;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2494 for (int i = 0; i < 4; i++, address++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2495 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2496 uint8_t byte = context->vdpmem[address & 0xFFFF];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2497 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base \| byte >> 4;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2498 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base \| byte & 0xF;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2499 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2500 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2501
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2502 static void draw_right_border(vdp_context *context)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2503 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2504 uint8_t *dst = context->compositebuf + BORDER_LEFT + ((context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2505 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2506 if ((context->test_port & TEST_BIT_DISABLE) != 0) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2507 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2508 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2509 uint8_t test_layer = context->test_port >> 7 & 3;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2510 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2511 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2512 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2513 case 1:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2514 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2515 dst += BORDER_RIGHT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2516 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2517 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2518 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2519 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2520 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2521 i = 0;
1888 bd60e74fd173 Fix regression in H32 from fine scroll optimization Michael Pavone <pavone@retrodev.com> parents: 1887 diff changeset	2522 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2523 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2524 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2525 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2526 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2527 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2528 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2529 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2530 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2531 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2532 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2533 i = 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2534 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2535 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2536 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2537 {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2538 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2539 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2540 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2541 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2542 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2543 } else {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2544 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2545 dst += BORDER_RIGHT;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2546 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2547 context->done_composite = dst;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2548 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2549 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2550 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2551
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2552 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; }
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	2553 #define CHECK_LIMIT if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } context->hslot++; context->cycles += slot_cycles; CHECK_ONLY
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2554 #define OUTPUT_PIXEL(slot) if ((slot) >= BG_START_SLOT) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2555 uint8_t src = context->compositebuf + ((slot) - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2556 uint32_t dst = context->output + ((slot) - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2557 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2558 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2559 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2560 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2561 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2562 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2563 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2564 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2565 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2566 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2567 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2568
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2569 #define OUTPUT_PIXEL_H40(slot) if (slot <= (BG_START_SLOT + LINEBUF_SIZE/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2570 uint8_t src = context->compositebuf + (slot - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2571 uint32_t dst = context->output + (slot - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2572 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2573 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2574 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2575 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2576 }\
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2577 if (slot == (BG_START_SLOT + LINEBUF_SIZE/2)) {\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2578 context->done_composite = NULL;\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2579 } else {\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2580 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2581 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2582 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2583 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2584 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2585 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2586 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2587
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2588 #define OUTPUT_PIXEL_H32(slot) if (slot <= (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2589 uint8_t src = context->compositebuf + (slot - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2590 uint32_t dst = context->output + (slot - BG_START_SLOT) 2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2591 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2592 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2593 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2594 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2595 }\
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2596 if (slot == (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2597 context->done_composite = NULL;\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	2598 } else {\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2599 if ((*src & 0x3F) \| test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2600 (dst++) = context->colors[(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2601 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2602 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2603 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2604 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2605 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2606
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2607 //BG_START_SLOT => dst = 0, src = border
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2608 //BG_START_SLOT + 13/2=6, dst = 6, src = border + comp + 13
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2609 #define OUTPUT_PIXEL_MODE4(slot) if ((slot) >= BG_START_SLOT) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2610 uint8_t src = context->compositebuf + ((slot) - BG_START_SLOT) 2;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2611 uint32_t dst = context->output + ((slot) - BG_START_SLOT) 2;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2612 if ((slot) - BG_START_SLOT < BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2613 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2614 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2615 } else if ((slot) - BG_START_SLOT < (BORDER_LEFT+256)/2){\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2616 if ((slot) - BG_START_SLOT == BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2617 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2618 src++;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2619 } else {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2620 (dst++) = context->colors[(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2621 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2622 (dst++) = context->colors[(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2623 } else if ((slot) - BG_START_SLOT <= (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2624 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2625 if ((slot) - BG_START_SLOT < (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2626 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2627 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2628 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2629 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2630
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2631 #define COLUMN_RENDER_BLOCK(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2632 case startcyc:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2633 OUTPUT_PIXEL(startcyc)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2634 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2635 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2636 case ((startcyc+1)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2637 OUTPUT_PIXEL((startcyc+1)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2638 external_slot(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2639 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2640 case ((startcyc+2)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2641 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2642 render_map_1(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2643 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2644 case ((startcyc+3)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2645 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2646 render_map_2(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2647 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2648 case ((startcyc+4)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2649 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2650 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2651 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2652 case ((startcyc+5)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2653 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2654 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2655 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2656 case ((startcyc+6)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2657 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2658 render_map_3(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2659 CHECK_LIMIT\
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	2660 case ((startcyc+7)&0xFF):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2661 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2662 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2663 CHECK_LIMIT
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2664
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2665 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2666 case startcyc:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2667 OUTPUT_PIXEL(startcyc)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2668 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2669 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2670 case (startcyc+1):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2671 /* refresh, so don't run dma src */\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2672 OUTPUT_PIXEL((startcyc+1)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2673 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2674 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2675 CHECK_ONLY\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2676 case (startcyc+2):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2677 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2678 render_map_1(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2679 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2680 case (startcyc+3):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2681 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2682 render_map_2(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2683 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2684 case (startcyc+4):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2685 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2686 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2687 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2688 case (startcyc+5):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2689 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2690 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2691 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2692 case (startcyc+6):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2693 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2694 render_map_3(context);\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2695 CHECK_LIMIT\
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2696 case (startcyc+7):\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2697 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2698 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2699 CHECK_LIMIT
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2700
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2701 #define COLUMN_RENDER_BLOCK_MODE4(column, startcyc) \
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2702 case startcyc:\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2703 OUTPUT_PIXEL_MODE4(startcyc)\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2704 read_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2705 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2706 case ((startcyc+1)&0xFF):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2707 OUTPUT_PIXEL_MODE4((startcyc+1)&0xFF)\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2708 if (column & 3) {\
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2709 scan_sprite_table_mode4(context);\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2710 } else {\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2711 external_slot(context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2712 }\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2713 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2714 case ((startcyc+2)&0xFF):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2715 OUTPUT_PIXEL_MODE4((startcyc+2)&0xFF)\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2716 fetch_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2717 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2718 case ((startcyc+3)&0xFF):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2719 OUTPUT_PIXEL_MODE4((startcyc+3)&0xFF)\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2720 render_map_mode4(context->vcounter, column, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2721 CHECK_LIMIT
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2722
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2723 #define CHECK_LIMIT_HSYNC(slot) \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2724 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2725 if (slot >= HSYNC_SLOT_H40 && slot < HSYNC_END_H40) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2726 context->cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2727 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2728 context->cycles += slot_cycles;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2729 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2730 if (slot == 182) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2731 context->hslot = 229;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2732 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2733 context->hslot++;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2734 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2735 CHECK_ONLY
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	2736
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2737 #define SPRITE_RENDER_H40(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2738 case slot:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2739 OUTPUT_PIXEL_H40(slot)\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2740 if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2741 advance_output_line(context);\
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2742 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2743 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2744 }\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2745 }\
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2746 if (slot == 168 \|\| slot == 247 \|\| slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2747 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2748 context,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2749 context->sprite_draw_list[context->cur_slot].address,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2750 context->tmp_buf_b,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2751 context->buf_b_off + (slot == 247 ? 0 : 8),\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2752 slot == 247 ? context->col_1 : context->col_2\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2753 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2754 if (slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2755 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2756 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2757 }\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2758 } else if (slot == 243) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2759 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2760 context,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2761 context->sprite_draw_list[context->cur_slot].address,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2762 context->tmp_buf_a,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2763 context->buf_a_off,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2764 context->col_1\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2765 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2766 } else if (slot == 169) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2767 draw_right_border(context);\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	2768 }\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2769 render_sprite_cells( context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2770 scan_sprite_table(context->vcounter, context);\
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	2771 CHECK_LIMIT_HSYNC(slot)
884 252dfd29831d Selecting a second game from the menu now works Michael Pavone <pavone@retrodev.com> parents: 822 diff changeset	2772
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2773 //Note that the line advancement check will fail if BG_START_SLOT is > 6
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2774 //as we're bumping up against the hcounter jump
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2775 #define SPRITE_RENDER_H32(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2776 case slot:\
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	2777 OUTPUT_PIXEL_H32(slot)\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2778 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2779 advance_output_line(context);\
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2780 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2781 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2782 }\
1272 be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame Michael Pavone <pavone@retrodev.com> parents: 1271 diff changeset	2783 }\
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2784 if (slot == 136 \|\| slot == 247 \|\| slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2785 render_border_garbage(\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2786 context,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2787 context->sprite_draw_list[context->cur_slot].address,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2788 context->tmp_buf_b,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2789 context->buf_b_off + (slot == 247 ? 0 : 8),\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2790 slot == 247 ? context->col_1 : context->col_2\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2791 );\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2792 if (slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2793 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2794 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2795 }\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2796 } else if (slot == 137) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2797 draw_right_border(context);\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	2798 }\
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2799 render_sprite_cells( context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2800 scan_sprite_table(context->vcounter, context);\
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	2801 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2802 if (slot == 147) {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2803 context->hslot = 233;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2804 } else {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2805 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2806 }\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2807 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	2808 CHECK_ONLY
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2809
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2810 #define MODE4_CHECK_SLOT_LINE(slot) \
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2811 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2812 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2813 advance_output_line(context);\
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2814 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2815 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2816 }\
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	2817 }\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2818 if ((slot) == 147) {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2819 context->hslot = 233;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2820 } else {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2821 context->hslot++;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2822 }\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2823 context->cycles += slot_cycles;\
1163 b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2824 if ((slot+1) == LINE_CHANGE_MODE4) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2825 vdp_advance_line(context);\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2826 if (context->vcounter == 192) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2827 return;\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2828 }\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases Michael Pavone <pavone@retrodev.com> parents: 1161 diff changeset	2829 }\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2830 CHECK_ONLY
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2831
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2832 #define CALC_SLOT(slot, increment) ((slot+increment) > 147 && (slot+increment) < 233 ? (slot+increment-148+233): (slot+increment))
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2833
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2834 #define SPRITE_RENDER_H32_MODE4(slot) \
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2835 case slot:\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2836 OUTPUT_PIXEL_MODE4(slot)\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2837 read_sprite_x_mode4(context);\
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	2838 MODE4_CHECK_SLOT_LINE(slot)\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2839 case CALC_SLOT(slot, 1):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2840 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 1))\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2841 read_sprite_x_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2842 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot,1))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2843 case CALC_SLOT(slot, 2):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2844 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 2))\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2845 fetch_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2846 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 2))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2847 case CALC_SLOT(slot, 3):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2848 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 3))\
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	2849 render_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2850 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 3))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2851 case CALC_SLOT(slot, 4):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2852 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 4))\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2853 fetch_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2854 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 4))\
c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2855 case CALC_SLOT(slot, 5):\
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	2856 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 5))\
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	2857 render_sprite_cells_mode4(context);\
1161 c2210d586950 A bunch of Mode 4 fixes Michael Pavone <pavone@retrodev.com> parents: 1160 diff changeset	2858 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 5))
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	2859
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	2860 static uint32_t dummy_buffer[LINEBUF_SIZE];
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2861 static void vdp_h40_line(vdp_context * context)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2862 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2863 uint16_t address;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2864 uint32_t mask;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2865 uint32_t const slot_cycles = MCLKS_SLOT_H40;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2866 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2867 uint8_t test_layer = context->test_port >> 7 & 3;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2868
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2869 //165
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2870 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2871 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2872 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2873 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2874 //pretty consistently
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2875 context->vscroll_latch[0] = context->vsram[0];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2876 context->vscroll_latch[1] = context->vsram[1];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2877 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2878 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2879 //166
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2880 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2881 //167
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2882 context->sprite_index = 0x80;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2883 context->slot_counter = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2884 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2885 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2886 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2887 context->tmp_buf_b, context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2888 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2889 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2890 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2891 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2892 //168
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2893 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2894 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2895 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2896 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2897 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2898 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2899 );
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2900
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2901 //Do palette lookup for end of previous line
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2902 uint8_t src = context->compositebuf + (LINE_CHANGE_H40 - BG_START_SLOT) 2;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2903 uint32_t dst = context->output + (LINE_CHANGE_H40 - BG_START_SLOT) 2;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2904 if (context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2905 if (test_layer) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2906 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2907 {
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2908 (dst++) = context->colors[(src++)];
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2909 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2910 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2911 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2912 {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2913 if (*src & 0x3F) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2914 (dst++) = context->colors[(src++)];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2915 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2916 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	2917 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2918 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2919 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2920 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2921 advance_output_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2922 //168-242 (inclusive)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2923 for (int i = 0; i < 28; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2924 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2925 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2926 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2927 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2928 //243
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2929 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2930 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2931 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2932 context->tmp_buf_a,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2933 context->buf_a_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2934 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2935 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2936 //244
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2937 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2938 mask = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2939 if (context->regs[REG_MODE_3] & 0x2) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2940 mask \|= 0xF8;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2941 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2942 if (context->regs[REG_MODE_3] & 0x1) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2943 mask \|= 0x7;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2944 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2945 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2946 address += (context->vcounter & mask) * 4;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2947 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	2948 context->hscroll_a_fine = context->hscroll_a & 0xF;
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2949 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	2950 context->hscroll_b_fine = context->hscroll_b & 0xF;
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2951 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2952 //243-246 inclusive
1877 9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2953 for (int i = 0; i < 3; i++)
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2954 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2955 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2956 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2957 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2958 //247
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2959 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2960 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2961 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2962 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2963 context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2964 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2965 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2966 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2967 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2968 //248
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2969 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2970 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2971 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2972 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2973 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2974 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2975 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2976 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2977 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2978 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2979 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2980 //250
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2981 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2982 scan_sprite_table(context->vcounter, context);
1877 9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2983 //251
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2984 scan_sprite_table(context->vcounter, context);//Just a guess
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2985 //252
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	2986 scan_sprite_table(context->vcounter, context);//Just a guess
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2987 //254
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2988 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2989 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2990 //255
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2991 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2992 context->flags \|= FLAG_DOT_OFLOW;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2993 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2994 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2995 //0
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2996 scan_sprite_table(context->vcounter, context);//Just a guess
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2997 //seems like the sprite table scan fills a shift register
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2998 //values are FIFO, but unused slots precede used slots
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	2999 //so we set cur_slot to slot_counter and let it wrap around to
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3000 //the beginning of the list
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3001 context->cur_slot = context->slot_counter;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3002 context->sprite_x_offset = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3003 context->sprite_draws = MAX_SPRITES_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3004 //background planes and layer compositing
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3005 for (int col = 0; col < 42; col+=2)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3006 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3007 read_map_scroll_a(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3008 render_map_1(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3009 render_map_2(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3010 read_map_scroll_b(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3011 render_map_3(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3012 render_map_output(context->vcounter, col, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3013 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3014 //sprite rendering phase 2
1877 9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization Michael Pavone <pavone@retrodev.com> parents: 1875 diff changeset	3015 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3016 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3017 read_sprite_x(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3018 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3019 //163
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3020 context->cur_slot = MAX_SPRITES_LINE-1;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3021 memset(context->linebuf, 0, LINEBUF_SIZE);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3022 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3023 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3024 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3025 context->tmp_buf_a, context->buf_a_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3026 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3027 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3028 context->flags &= ~FLAG_MASKED;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3029 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3030 //164
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3031 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3032 context,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3033 context->sprite_draw_list[context->cur_slot].address,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3034 context->tmp_buf_a, context->buf_a_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3035 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3036 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3037 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3038 context->cycles += MCLKS_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3039 vdp_advance_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3040 src = context->compositebuf;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3041 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3042 return;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3043 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3044 dst = context->output;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3045 if (test_layer) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3046 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3047 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3048 (dst++) = context->colors[(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3049 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3050 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3051 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3052 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3053 if (*src & 0x3F) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3054 (dst++) = context->colors[(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3055 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3056 (dst++) = context->colors[((src++) & 0xC0) \| bgindex];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3057 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3058 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3059 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3060 }
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	3061 static void vdp_h40(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3062 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3063 uint16_t address;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3064 uint32_t mask;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3065 uint32_t const slot_cycles = MCLKS_SLOT_H40;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3066 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3067 uint8_t test_layer = context->test_port >> 7 & 3;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3068 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3069 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3070 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3071 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3072 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3073 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3074 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3075 for (;;)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3076 {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3077 case 165:
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3078 //only consider doing a line at a time if the FIFO is empty, there are no pending reads and there is no DMA running
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	3079 if (context->fifo_read == -1 && !(context->flags & FLAG_DMA_RUN) && ((context->cd & 1) \|\| (context->flags & FLAG_READ_FETCHED))) {
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3080 while (target_cycles - context->cycles >= MCLKS_LINE && context->state != PREPARING && context->vcounter != context->inactive_start) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3081 vdp_h40_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3082 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3083 CHECK_ONLY
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3084 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3085 //This shouldn't happen normally, but it can theoretically
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3086 //happen when doing border busting
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3087 context->output = dummy_buffer;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	3088 }
1874 cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well Michael Pavone <pavone@retrodev.com> parents: 1873 diff changeset	3089 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3090 OUTPUT_PIXEL(165)
1432 5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3091 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3092 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3093 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3094 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3095 //pretty consistently
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3096 context->vscroll_latch[0] = context->vsram[0];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3097 context->vscroll_latch[1] = context->vsram[1];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position Michael Pavone <pavone@retrodev.com> parents: 1431 diff changeset	3098 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3099 if (context->state == PREPARING) {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3100 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3101 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3102 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3103 }
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3104 CHECK_LIMIT
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3105 case 166:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3106 OUTPUT_PIXEL(166)
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3107 if (context->state == PREPARING) {
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3108 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3109 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3110 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3111 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3112 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3113 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3114 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3115 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3116 }
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3117 CHECK_LIMIT
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3118 //sprite attribute table scan starts
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3119 case 167:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3120 OUTPUT_PIXEL(167)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3121 context->sprite_index = 0x80;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3122 context->slot_counter = 0;
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3123 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3124 context,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3125 context->sprite_draw_list[context->cur_slot].address,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3126 context->tmp_buf_b, context->buf_b_off,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3127 context->col_1
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3128 );
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3129 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3130 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3131 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3132 SPRITE_RENDER_H40(168)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3133 SPRITE_RENDER_H40(169)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3134 SPRITE_RENDER_H40(170)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3135 SPRITE_RENDER_H40(171)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3136 SPRITE_RENDER_H40(172)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3137 SPRITE_RENDER_H40(173)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3138 SPRITE_RENDER_H40(174)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3139 SPRITE_RENDER_H40(175)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3140 SPRITE_RENDER_H40(176)
1365 6dd2c3edd0b5 Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2 Michael Pavone <pavone@retrodev.com> parents: 1362 diff changeset	3141 SPRITE_RENDER_H40(177)//End of border?
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3142 SPRITE_RENDER_H40(178)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3143 SPRITE_RENDER_H40(179)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3144 SPRITE_RENDER_H40(180)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3145 SPRITE_RENDER_H40(181)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3146 SPRITE_RENDER_H40(182)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3147 SPRITE_RENDER_H40(229)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3148 //!HSYNC asserted
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3149 SPRITE_RENDER_H40(230)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3150 SPRITE_RENDER_H40(231)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3151 case 232:
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3152 external_slot(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3153 CHECK_LIMIT_HSYNC(232)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3154 SPRITE_RENDER_H40(233)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3155 SPRITE_RENDER_H40(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3156 SPRITE_RENDER_H40(235)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3157 SPRITE_RENDER_H40(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3158 SPRITE_RENDER_H40(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3159 SPRITE_RENDER_H40(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3160 SPRITE_RENDER_H40(239)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3161 SPRITE_RENDER_H40(240)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3162 SPRITE_RENDER_H40(241)
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3163 SPRITE_RENDER_H40(242)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3164 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3165 case 244:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3166 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3167 mask = 0;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3168 if (context->regs[REG_MODE_3] & 0x2) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3169 mask \|= 0xF8;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3170 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3171 if (context->regs[REG_MODE_3] & 0x1) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3172 mask \|= 0x7;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3173 }
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3174 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3175 address += (context->vcounter & mask) * 4;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3176 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	3177 context->hscroll_a_fine = context->hscroll_a & 0xF;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3178 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	3179 context->hscroll_b_fine = context->hscroll_b & 0xF;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3180 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
924 1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period Michael Pavone <pavone@retrodev.com> parents: 923 diff changeset	3181 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3182 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3183 context->cycles += h40_hsync_cycles[14];
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3184 CHECK_ONLY //provides "garbage" for border when plane A selected
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3185 //!HSYNC high
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3186 SPRITE_RENDER_H40(245)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3187 SPRITE_RENDER_H40(246)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3188 SPRITE_RENDER_H40(247) //provides "garbage" for border when plane B selected
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3189 SPRITE_RENDER_H40(248) //provides "garbage" for border when plane B selected
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3190 case 249:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3191 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3192 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3193 SPRITE_RENDER_H40(250)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3194 case 251:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3195 render_map_1(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3196 scan_sprite_table(context->vcounter, context);//Just a guess
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3197 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3198 case 252:
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3199 render_map_2(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3200 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3201 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3202 case 253:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3203 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3204 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3205 SPRITE_RENDER_H40(254)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3206 case 255:
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3207 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3208 context->flags \|= FLAG_DOT_OFLOW;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3209 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3210 render_map_3(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3211 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3212 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3213 case 0:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3214 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3215 scan_sprite_table(context->vcounter, context);//Just a guess
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3216 //seems like the sprite table scan fills a shift register
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3217 //values are FIFO, but unused slots precede used slots
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3218 //so we set cur_slot to slot_counter and let it wrap around to
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3219 //the beginning of the list
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3220 context->cur_slot = context->slot_counter;
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	3221 context->sprite_x_offset = 0;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3222 context->sprite_draws = MAX_SPRITES_LINE;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3223 CHECK_LIMIT
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3224 COLUMN_RENDER_BLOCK(2, 1)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3225 COLUMN_RENDER_BLOCK(4, 9)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3226 COLUMN_RENDER_BLOCK(6, 17)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3227 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3228 COLUMN_RENDER_BLOCK(10, 33)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3229 COLUMN_RENDER_BLOCK(12, 41)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3230 COLUMN_RENDER_BLOCK(14, 49)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3231 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3232 COLUMN_RENDER_BLOCK(18, 65)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3233 COLUMN_RENDER_BLOCK(20, 73)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3234 COLUMN_RENDER_BLOCK(22, 81)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3235 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3236 COLUMN_RENDER_BLOCK(26, 97)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3237 COLUMN_RENDER_BLOCK(28, 105)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3238 COLUMN_RENDER_BLOCK(30, 113)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3239 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3240 COLUMN_RENDER_BLOCK(34, 129)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3241 COLUMN_RENDER_BLOCK(36, 137)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3242 COLUMN_RENDER_BLOCK(38, 145)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3243 COLUMN_RENDER_BLOCK_REFRESH(40, 153)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3244 case 161:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3245 OUTPUT_PIXEL(161)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3246 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3247 CHECK_LIMIT
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3248 case 162:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3249 OUTPUT_PIXEL(162)
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3250 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3251 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3252 //sprite render to line buffer starts
1157 d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements Michael Pavone <pavone@retrodev.com> parents: 1156 diff changeset	3253 case 163:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3254 OUTPUT_PIXEL(163)
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3255 context->cur_slot = MAX_SPRITES_LINE-1;
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3256 memset(context->linebuf, 0, LINEBUF_SIZE);
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3257 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3258 context,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3259 context->sprite_draw_list[context->cur_slot].address,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3260 context->tmp_buf_a, context->buf_a_off,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3261 context->col_1
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3262 );
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3263 context->flags &= ~FLAG_MASKED;
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3264 render_sprite_cells(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3265 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3266 case 164:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3267 OUTPUT_PIXEL(164)
1337 d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3268 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3269 context,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3270 context->sprite_draw_list[context->cur_slot].address,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3271 context->tmp_buf_a, context->buf_a_off + 8,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3272 context->col_2
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now Michael Pavone <pavone@retrodev.com> parents: 1335 diff changeset	3273 );
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3274 render_sprite_cells(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3275 if (context->flags & FLAG_DMA_RUN) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3276 run_dma_src(context, -1);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3277 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3278 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3279 context->cycles += slot_cycles;
922 913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot Michael Pavone <pavone@retrodev.com> parents: 921 diff changeset	3280 vdp_advance_line(context);
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	3281 CHECK_ONLY
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3282 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3283 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3284 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3285 context->cycles += slot_cycles;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3286 return;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3287 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3288 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3289
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	3290 static void vdp_h32(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3291 {
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3292 uint16_t address;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3293 uint32_t mask;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3294 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3295 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3296 uint8_t test_layer = context->test_port >> 7 & 3;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3297 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3298 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3299 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3300 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3301 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3302 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3303 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3304 for (;;)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3305 {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3306 case 133:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3307 OUTPUT_PIXEL(133)
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3308 if (context->state == PREPARING) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3309 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3310 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3311 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3312 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3313 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3314 case 134:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3315 OUTPUT_PIXEL(134)
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	3316 if (context->state == PREPARING) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3317 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3318 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3319 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3320 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3321 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3322 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3323 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3324 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	3325 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3326 CHECK_LIMIT
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3327 //sprite attribute table scan starts
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3328 case 135:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3329 OUTPUT_PIXEL(135)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3330 context->sprite_index = 0x80;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3331 context->slot_counter = 0;
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3332 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3333 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3334 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3335 context->tmp_buf_b, context->buf_b_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3336 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3337 );
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3338 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3339 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3340 CHECK_LIMIT
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3341 SPRITE_RENDER_H32(136)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3342 SPRITE_RENDER_H32(137)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3343 SPRITE_RENDER_H32(138)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3344 SPRITE_RENDER_H32(139)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3345 SPRITE_RENDER_H32(140)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3346 SPRITE_RENDER_H32(141)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3347 SPRITE_RENDER_H32(142)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3348 SPRITE_RENDER_H32(143)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3349 SPRITE_RENDER_H32(144)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3350 case 145:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3351 OUTPUT_PIXEL(145)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3352 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3353 CHECK_LIMIT
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3354 SPRITE_RENDER_H32(146)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3355 SPRITE_RENDER_H32(147)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3356 SPRITE_RENDER_H32(233)
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3357 SPRITE_RENDER_H32(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3358 SPRITE_RENDER_H32(235)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3359 //HSYNC start
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3360 SPRITE_RENDER_H32(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3361 SPRITE_RENDER_H32(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3362 SPRITE_RENDER_H32(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3363 SPRITE_RENDER_H32(239)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3364 SPRITE_RENDER_H32(240)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3365 SPRITE_RENDER_H32(241)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3366 SPRITE_RENDER_H32(242)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3367 case 243:
1422 2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3368 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3369 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3370 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3371 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3372 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3373 //to confirm that one way or another
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3374 context->vscroll_latch[0] = context->vsram[0];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3375 context->vscroll_latch[1] = context->vsram[1];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2 Michael Pavone <pavone@retrodev.com> parents: 1401 diff changeset	3376 }
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3377 external_slot(context);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3378 //provides "garbage" for border when plane A selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3379 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3380 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3381 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3382 context->tmp_buf_a,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3383 context->buf_a_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3384 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3385 );
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3386 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3387 case 244:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3388 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3389 mask = 0;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3390 if (context->regs[REG_MODE_3] & 0x2) {
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3391 mask \|= 0xF8;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3392 }
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3393 if (context->regs[REG_MODE_3] & 0x1) {
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3394 mask \|= 0x7;
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3395 }
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3396 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3397 address += (context->vcounter & mask) * 4;
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3398 context->hscroll_a = context->vdpmem[address] << 8 \| context->vdpmem[address+1];
1885 4178ce857e87 Calculate fine scroll once per line for a small speedup Michael Pavone <pavone@retrodev.com> parents: 1884 diff changeset	3399 context->hscroll_a_fine = context->hscroll_a & 0xF;
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3400 context->hscroll_b = context->vdpmem[address+2] << 8 \| context->vdpmem[address+3];
1888 bd60e74fd173 Fix regression in H32 from fine scroll optimization Michael Pavone <pavone@retrodev.com> parents: 1887 diff changeset	3401 context->hscroll_b_fine = context->hscroll_b & 0xF;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3402 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3403 CHECK_LIMIT //provides "garbage" for border when plane A selected
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3404 SPRITE_RENDER_H32(245)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3405 SPRITE_RENDER_H32(246)
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3406 SPRITE_RENDER_H32(247) //provides "garbage" for border when plane B selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3407 SPRITE_RENDER_H32(248) //provides "garbage" for border when plane B selected
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3408 //!HSYNC high
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3409 case 249:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3410 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3411 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3412 SPRITE_RENDER_H32(250)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3413 case 251:
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3414 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3415 context->flags \|= FLAG_DOT_OFLOW;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3416 }
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3417 render_map_1(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3418 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3419 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3420 case 252:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3421 render_map_2(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3422 scan_sprite_table(context->vcounter, context);//Just a guess
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3423 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3424 case 253:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3425 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3426 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3427 case 254:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3428 render_sprite_cells(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3429 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3430 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3431 case 255:
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3432 render_map_3(context);
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3433 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3434 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3435 case 0:
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3436 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3437 scan_sprite_table(context->vcounter, context);//Just a guess
37 cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3438 //reverse context slot counter so it counts the number of sprite slots
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3439 //filled rather than the number of available slots
cd59519b26d9 Initial H32 mode support Mike Pavone <pavone@retrodev.com> parents: 36 diff changeset	3440 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	3441 context->cur_slot = context->slot_counter;
1873 041a381b9f0d Fix regression in sprite rendering in H32 mode Michael Pavone <pavone@retrodev.com> parents: 1871 diff changeset	3442 context->sprite_x_offset = 0;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3443 context->sprite_draws = MAX_SPRITES_LINE_H32;
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3444 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3445 COLUMN_RENDER_BLOCK(2, 1)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3446 COLUMN_RENDER_BLOCK(4, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3447 COLUMN_RENDER_BLOCK(6, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3448 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3449 COLUMN_RENDER_BLOCK(10, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3450 COLUMN_RENDER_BLOCK(12, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3451 COLUMN_RENDER_BLOCK(14, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3452 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3453 COLUMN_RENDER_BLOCK(18, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3454 COLUMN_RENDER_BLOCK(20, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3455 COLUMN_RENDER_BLOCK(22, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3456 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3457 COLUMN_RENDER_BLOCK(26, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3458 COLUMN_RENDER_BLOCK(28, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3459 COLUMN_RENDER_BLOCK(30, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3460 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3461 case 129:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3462 OUTPUT_PIXEL(129)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3463 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3464 CHECK_LIMIT
1269 ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1267 diff changeset	3465 case 130: {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3466 OUTPUT_PIXEL(130)
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3467 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3468 CHECK_LIMIT
1269 ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1267 diff changeset	3469 }
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3470 //sprite render to line buffer starts
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3471 case 131:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3472 OUTPUT_PIXEL(131)
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3473 context->cur_slot = MAX_SPRITES_LINE_H32-1;
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3474 memset(context->linebuf, 0, LINEBUF_SIZE);
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3475 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3476 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3477 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3478 context->tmp_buf_a, context->buf_a_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3479 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3480 );
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	3481 context->flags &= ~FLAG_MASKED;
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3482 render_sprite_cells(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3483 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3484 case 132:
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3485 OUTPUT_PIXEL(132)
1378 71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3486 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3487 context,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3488 context->sprite_draw_list[context->cur_slot].address,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3489 context->tmp_buf_a, context->buf_a_off + 8,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3490 context->col_2
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering Michael Pavone <pavone@retrodev.com> parents: 1377 diff changeset	3491 );
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3492 render_sprite_cells(context);
1173 d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3493 if (context->flags & FLAG_DMA_RUN) {
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3494 run_dma_src(context, -1);
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3495 }
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3496 context->hslot++;
d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3497 context->cycles += slot_cycles;
923 8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40 Michael Pavone <pavone@retrodev.com> parents: 922 diff changeset	3498 vdp_advance_line(context);
1173 d0f67c59b756 Fix H32 inconsistency Michael Pavone <pavone@retrodev.com> parents: 1172 diff changeset	3499 CHECK_ONLY
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	3500 }
822 ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3501 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3502 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others Michael Pavone <pavone@retrodev.com> parents: 771 diff changeset	3503 context->cycles += MCLKS_SLOT_H32;
503 eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	3504 }
eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	3505 }
eee6be465c47 Small optimization for H40 mode Mike Pavone <pavone@retrodev.com> parents: 499 diff changeset	3506
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3507 static void vdp_h32_mode4(vdp_context * context, uint32_t target_cycles)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3508 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3509 uint16_t address;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3510 uint32_t mask;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3511 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3512 uint8_t bgindex = 0x10 \| (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	3513 uint8_t test_layer = context->test_port >> 7 & 3;
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3514 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3515 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3516 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3517 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	3518 }
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3519 switch(context->hslot)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3520 {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3521 for (;;)
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3522 {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3523 //sprite rendering starts
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3524 SPRITE_RENDER_H32_MODE4(137)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3525 SPRITE_RENDER_H32_MODE4(143)
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3526 case 234:
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3527 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3528 CHECK_LIMIT
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3529 case 235:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3530 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3531 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3532 //!HSYNC low
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3533 case 236:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3534 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3535 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3536 case 237:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3537 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3538 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3539 case 238:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3540 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3541 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3542 SPRITE_RENDER_H32_MODE4(239)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3543 SPRITE_RENDER_H32_MODE4(245)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3544 case 251:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3545 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3546 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3547 case 252:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3548 external_slot(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3549 if (context->regs[REG_MODE_1] & BIT_HSCRL_LOCK && context->vcounter < 16) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3550 context->hscroll_a = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3551 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3552 context->hscroll_a = context->regs[REG_X_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3553 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3554 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3555 case 253:
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3556 context->sprite_index = 0;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3557 context->slot_counter = MAX_DRAWS_H32_MODE4;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3558 scan_sprite_table_mode4(context);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3559 CHECK_LIMIT
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3560 case 254:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3561 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3562 CHECK_LIMIT
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3563 case 255:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3564 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3565 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3566 case 0: {
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3567 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3568 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3569 }
1135 8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3570 case 1:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures Michael Pavone <pavone@retrodev.com> parents: 1134 diff changeset	3571 scan_sprite_table_mode4(context);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3572 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3573 case 2:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3574 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3575 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3576 case 3:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3577 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3578 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3579 case 4: {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3580 scan_sprite_table_mode4(context);
1121 1913f9c28003 Less broken Mode 4 implementation Michael Pavone <pavone@retrodev.com> parents: 1120 diff changeset	3581 context->buf_a_off = 8;
1913f9c28003 Less broken Mode 4 implementation Michael Pavone <pavone@retrodev.com> parents: 1120 diff changeset	3582 memset(context->tmp_buf_a, 0, 8);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3583 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3584 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3585 COLUMN_RENDER_BLOCK_MODE4(0, 5)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3586 COLUMN_RENDER_BLOCK_MODE4(1, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3587 COLUMN_RENDER_BLOCK_MODE4(2, 13)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3588 COLUMN_RENDER_BLOCK_MODE4(3, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3589 COLUMN_RENDER_BLOCK_MODE4(4, 21)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3590 COLUMN_RENDER_BLOCK_MODE4(5, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3591 COLUMN_RENDER_BLOCK_MODE4(6, 29)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3592 COLUMN_RENDER_BLOCK_MODE4(7, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3593 COLUMN_RENDER_BLOCK_MODE4(8, 37)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3594 COLUMN_RENDER_BLOCK_MODE4(9, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3595 COLUMN_RENDER_BLOCK_MODE4(10, 45)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3596 COLUMN_RENDER_BLOCK_MODE4(11, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3597 COLUMN_RENDER_BLOCK_MODE4(12, 53)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3598 COLUMN_RENDER_BLOCK_MODE4(13, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3599 COLUMN_RENDER_BLOCK_MODE4(14, 61)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3600 COLUMN_RENDER_BLOCK_MODE4(15, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3601 COLUMN_RENDER_BLOCK_MODE4(16, 69)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3602 COLUMN_RENDER_BLOCK_MODE4(17, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3603 COLUMN_RENDER_BLOCK_MODE4(18, 77)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3604 COLUMN_RENDER_BLOCK_MODE4(19, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3605 COLUMN_RENDER_BLOCK_MODE4(20, 85)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3606 COLUMN_RENDER_BLOCK_MODE4(21, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3607 COLUMN_RENDER_BLOCK_MODE4(22, 93)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3608 COLUMN_RENDER_BLOCK_MODE4(23, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3609 COLUMN_RENDER_BLOCK_MODE4(24, 101)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3610 COLUMN_RENDER_BLOCK_MODE4(25, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3611 COLUMN_RENDER_BLOCK_MODE4(26, 109)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3612 COLUMN_RENDER_BLOCK_MODE4(27, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3613 COLUMN_RENDER_BLOCK_MODE4(28, 117)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3614 COLUMN_RENDER_BLOCK_MODE4(29, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3615 COLUMN_RENDER_BLOCK_MODE4(30, 125)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3616 COLUMN_RENDER_BLOCK_MODE4(31, 129)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3617 case 133:
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3618 OUTPUT_PIXEL_MODE4(133)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3619 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3620 CHECK_LIMIT
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3621 case 134:
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3622 OUTPUT_PIXEL_MODE4(134)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3623 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3624 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3625 case 135:
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3626 OUTPUT_PIXEL_MODE4(135)
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3627 external_slot(context);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3628 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3629 case 136: {
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	3630 OUTPUT_PIXEL_MODE4(136)
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3631 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3632 //set things up for sprite rendering in the next slot
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3633 memset(context->linebuf, 0, LINEBUF_SIZE);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3634 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	3635 context->sprite_draws = MAX_DRAWS_H32_MODE4;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3636 CHECK_LIMIT
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	3637 }}
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3638 default:
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3639 context->hslot++;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3640 context->cycles += MCLKS_SLOT_H32;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3641 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3642 }
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	3643
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3644
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3645 static void tms_fetch_pattern_name(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3646 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3647 uint16_t address = context->regs[REG_SCROLL_A] << 10 & 0x3C00;
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3648 if (context->regs[REG_MODE_2] & BIT_M1) {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3649 //Text mode
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3650 address \|= (context->vcounter >> 3) * 40;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3651 address += (context->hslot - 4) / 3;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3652 } else {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3653 //Graphics/Multicolor
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3654 address \|= context->vcounter << 2 & 0x03E0;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3655 address \|= context->hslot >> 2;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3656 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3657 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3658 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3659 context->col_1 = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3660 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3661
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3662 static void tms_fetch_color(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3663 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3664 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3665 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3666 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3667 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3668 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3669 uint16_t address = context->regs[REG_COLOR_TABLE] << 6;
2411 efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger Michael Pavone <pavone@retrodev.com> parents: 2385 diff changeset	3670 if (context->regs[REG_MODE_1] & BIT_M3) {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3671 //Graphics II
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3672 uint16_t upper_vcounter_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3673 uint16_t pattern_name_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3674 if (context->type > VDP_SMS2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3675 //SMS1 and TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3676 upper_vcounter_mask = address & 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3677 pattern_name_mask = (address & 0x07C0) \| 0x0038;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3678 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3679 //SMS2 and Game Gear
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3680 upper_vcounter_mask = 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3681 pattern_name_mask = 0x07F8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3682 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3683 address &= 0x2000;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3684 address \|= context->vcounter << 5 & upper_vcounter_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3685 address \|= context->col_1 << 3 & pattern_name_mask;
2258 a28e1042f4de Fix a few of the most glaring TMS9918A issues Michael Pavone <pavone@retrodev.com> parents: 2257 diff changeset	3686 address \|= context->vcounter & 7;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3687 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3688 address \|= context->col_1 >> 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3689 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3690 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3691 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3692 context->col_2 = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3693 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3694
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3695 static void tms_fetch_pattern_value(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3696 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3697 uint16_t address = context->regs[REG_PATTERN_GEN] << 11 & 0x3800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3698 if (context->regs[REG_MODE_1] & BIT_M3) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3699 //Graphics II
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3700 uint16_t mask = context->type > VDP_SMS2 ? address & 0x1800 : 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3701 address &= 0x2000;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3702 address \|= context->vcounter << 5 & mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3703 }
2414 dc05f1805921 Fix out of bound read from mode4_address_map in TMS modes Michael Pavone <pavone@retrodev.com> parents: 2411 diff changeset	3704 address \|= context->col_1 << 3 & 0x7F8;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3705 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3706 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3707 address \|= context->vcounter >> 2 & 0x3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3708 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3709 address \|= context->vcounter & 0x7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3710 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3711
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3712 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3713 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3714 uint8_t value = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3715 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3716 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3717 context->tmp_buf_a[0] = 0xF0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3718 context->tmp_buf_b[0] = value;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3719 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3720 context->tmp_buf_a[0] = value;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3721 context->tmp_buf_b[0] = context->col_2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3722 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3723 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3724
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3725 static void tms_sprite_scan(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3726 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3727 if (context->sprite_draws > 4 \|\| context->sprite_index == 32) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3728 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3729 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3730 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3731 address \|= context->sprite_index << 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3732 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3733 uint8_t y = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3734 if (y == 208) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3735 context->sprite_index = 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3736 context->sprite_info_list[4].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3737 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3738 uint8_t diff = context->vcounter + 1 - y;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3739 uint8_t size = 8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3740 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3741 size *= 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3742 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3743 if (context->regs[REG_MODE_2] & BIT_SPRITE_ZM) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3744 size *= 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3745 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3746 if (diff < size) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3747 context->sprite_info_list[context->sprite_draws++].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3748 if (context->sprite_draws == 5) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3749 context->flags \|= FLAG_DOT_OFLOW;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3750 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3751 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3752 context->sprite_info_list[4].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3753 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3754 context->sprite_index++;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3755 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3756
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3757 static void tms_sprite_vert(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3758 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3759 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3760 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3761 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3762 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3763 address \|= context->sprite_info_list[context->sprite_index].index << 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3764 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3765 context->sprite_info_list[context->sprite_index].y = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3766 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3767
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3768 static void tms_sprite_horiz(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3769 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3770 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3771 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3772 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3773 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3774 address \|= context->sprite_info_list[context->sprite_index].index << 2 \| 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3775 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3776 context->sprite_draw_list[context->sprite_index].x_pos = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3777 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3778
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3779 static void tms_sprite_name(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3780 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3781 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3782 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3783 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3784 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3785 address \|= context->sprite_info_list[context->sprite_index].index << 2 \| 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3786 address = context->vdpmem[mode4_address_map[address] ^ 1] << 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3787 address \|= context->regs[REG_STILE_BASE] << 11 & 0x3800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3788 uint8_t diff = context->vcounter + 1 - context->sprite_info_list[context->sprite_index].y;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3789 address += diff;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3790 context->sprite_draw_list[context->sprite_index].address = address;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3791 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3792
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3793 static void tms_sprite_tag(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3794 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3795 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3796 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3797 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3798 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3799 address \|= context->sprite_info_list[context->sprite_index].index << 2 \| 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3800 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3801 uint8_t tag = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3802 if (tag & 0x80) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3803 //early clock flag
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3804 context->sprite_draw_list[context->sprite_index].x_pos -= 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3805 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3806 context->sprite_draw_list[context->sprite_index].pal_priority = tag & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3807 context->col_1 = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3808 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3809
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3810 static void tms_sprite_pattern1(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3811 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3812 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3813 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3814 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3815 context->col_1 = context->vdpmem[mode4_address_map[context->sprite_draw_list[context->sprite_index].address] ^ 1] << 8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3816 context->sprite_draw_list[context->sprite_index].address += 16;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3817 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3818
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3819 static void tms_sprite_pattern2(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3820 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3821 if (context->sprite_index >= 4 \|\| context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3822 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3823 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3824 uint16_t pixels = context->col_1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3825 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3826 pixels \|= context->vdpmem[mode4_address_map[context->sprite_draw_list[context->sprite_index].address] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3827 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3828 context->sprite_draw_list[context->sprite_index++].address = pixels;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3829 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3830
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3831 static uint8_t tms_sprite_clock(vdp_context *context, int16_t offset)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3832 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3833 int16_t x = context->hslot << 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3834 if (x > 294) {
2259 425b44fd7bf1 Fix TMS9918A sprite horizontal position Michael Pavone <pavone@retrodev.com> parents: 2258 diff changeset	3835 x -= 512 + 8;
425b44fd7bf1 Fix TMS9918A sprite horizontal position Michael Pavone <pavone@retrodev.com> parents: 2258 diff changeset	3836 } else {
425b44fd7bf1 Fix TMS9918A sprite horizontal position Michael Pavone <pavone@retrodev.com> parents: 2258 diff changeset	3837 x -= 8;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3838 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3839 x += offset;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3840 uint8_t output = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3841 for (int i = 0; i < 4; i++) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3842 if (x >= context->sprite_draw_list[i].x_pos) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3843 if (context->sprite_draw_list[i].address & 0x8000) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3844 if (output) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3845 context->flags2 \|= FLAG2_SPRITE_COLLIDE;
2258 a28e1042f4de Fix a few of the most glaring TMS9918A issues Michael Pavone <pavone@retrodev.com> parents: 2257 diff changeset	3846 } else {
a28e1042f4de Fix a few of the most glaring TMS9918A issues Michael Pavone <pavone@retrodev.com> parents: 2257 diff changeset	3847 output = context->sprite_draw_list[i].pal_priority;
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3848 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3849 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3850 context->sprite_draw_list[i].address <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3851 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3852 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3853 return output;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3854 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3855
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3856 static void tms_border(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3857 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3858 if (context->hslot < (256 + BORDER_LEFT - (BORDER_LEFT-8))/2 \|\| context->hslot > 256-32) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3859 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3860 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3861 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3862 if (!context->output) {
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3863 if ((context->hslot * 2 - 6 + BORDER_LEFT) == (256 + BORDER_LEFT + BORDER_RIGHT)) {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3864 advance_output_line(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3865 }
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3866 if (!context->output) {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3867 return;
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3868 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3869 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3870 uint32_t color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3871 if (context->type == VDP_GAMEGEAR) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3872 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3873 color = context->colors[(context->regs[REG_BG_COLOR] & 0xF) + 16 + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3874 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3875 color = context->regs[REG_BG_COLOR] << 1 & 0x1E;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3876 color = (color & 0xE) \| (color << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3877 color = context->color_map[color \| FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3878 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3879 if (context->hslot == (520 - BORDER_LEFT) / 2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3880 context->output[0] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3881 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3882 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3883 if (context->hslot < (256 + BORDER_LEFT + BORDER_RIGHT - (BORDER_LEFT - 8)) / 2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3884 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3885 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3886 if ((context->hslot * 2 - 6 + BORDER_LEFT) == (256 + BORDER_LEFT + BORDER_RIGHT)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3887 advance_output_line(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3888 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3889 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3890 int slot = (context->hslot - (520 - BORDER_LEFT) / 2) * 2 - 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3891 context->output[slot] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3892 context->output[slot + 1] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3893 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3894 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3895
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3896 static void tms_composite(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3897 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3898 if (context->state == PREPARING) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3899 tms_border(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3900 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3901 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3902 uint8_t color = tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3903 if (!context->output) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3904 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3905 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3906 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3907 uint8_t pattern = context->tmp_buf_a[0] & 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3908 context->tmp_buf_a[0] <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3909 if (!color) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3910 uint8_t fg,bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3911 if (context->regs[REG_MODE_2] & BIT_M1) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3912 //Text mode uses TC and BD colors
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3913 fg = context->regs[REG_BG_COLOR] >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3914 bg = context->regs[REG_BG_COLOR] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3915 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3916 fg = context->tmp_buf_b[0] >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3917 bg = context->tmp_buf_b[0] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3918 if (!bg) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3919 bg = context->regs[REG_BG_COLOR] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3920 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3921 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3922 color = pattern ? fg : bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3923 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3924 //TODO: composite debug output
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3925 if (context->type == VDP_GAMEGEAR) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3926 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3927 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = context->colors[color + 16 + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3928 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3929 color <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3930 color = (color & 0xE) \| (color << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3931 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = context->color_map[color \| FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3932 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3933 color = tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3934 pattern = context->tmp_buf_a[0] & 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3935 context->tmp_buf_a[0] <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3936 if (!color) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3937 uint8_t fg,bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3938 if (context->regs[REG_MODE_2] & BIT_M1) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3939 //Text mode uses TC and BD colors
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3940 fg = context->regs[REG_BG_COLOR] >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3941 bg = context->regs[REG_BG_COLOR] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3942 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3943 fg = context->tmp_buf_b[0] >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3944 bg = context->tmp_buf_b[0] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3945 if (!bg) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3946 bg = context->regs[REG_BG_COLOR] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3947 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3948 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3949 color = pattern ? fg : bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3950 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3951 //TODO: composite debug output
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3952 if (context->type == VDP_GAMEGEAR) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3953 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3954 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = context->colors[color + 16 + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3955 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3956 color <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3957 color = (color & 0xE) \| (color << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3958 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = context->color_map[color \| FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3959 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3960 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3961
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	3962 #define TMS_OUTPUT(slot) if ((slot) < 4 \|\| (slot) > (256 + BORDER_LEFT - 8) / 2) { tms_border(context); } else { tms_composite(context); }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3963 #define TMS_OUTPUT_RIGHT(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3964 if ((slot) < (256 + BORDER_LEFT - (BORDER_LEFT - 8))/2) {\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3965 tms_composite(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3966 } else if ((slot < (256 + BORDER_LEFT + BORDER_RIGHT -(BORDER_LEFT - 8))/2)) {\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3967 tms_border(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3968 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3969 #define TMS_CHECK_LIMIT context->hslot++; context->cycles += MCLKS_SLOT_H32; if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3970 #define TMS_GRAPHICS_PATTERN_CPU_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3971 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3972 TMS_OUTPUT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3973 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3974 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3975 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3976 TMS_OUTPUT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3977 external_slot(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3978 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3979 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3980 TMS_OUTPUT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3981 tms_fetch_color(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3982 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3983 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3984 TMS_OUTPUT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3985 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3986 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3987
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3988 #define TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3989 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3990 TMS_OUTPUT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3991 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3992 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3993 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3994 TMS_OUTPUT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3995 tms_sprite_scan(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3996 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3997 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3998 TMS_OUTPUT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	3999 tms_fetch_color(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4000 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4001 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4002 TMS_OUTPUT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4003 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4004 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4005
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4006 #define TMS_SPRITE_SCAN_SLOT(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4007 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4008 if (context->hslot >= (520 - BORDER_LEFT) / 2) { tms_border(context); }\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4009 tms_sprite_scan(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4010 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4011
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4012 #define TMS_SPRITE_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4013 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4014 TMS_OUTPUT_RIGHT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4015 tms_sprite_vert(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4016 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4017 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4018 TMS_OUTPUT_RIGHT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4019 tms_sprite_horiz(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4020 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4021 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4022 TMS_OUTPUT_RIGHT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4023 tms_sprite_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4024 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4025 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4026 TMS_OUTPUT_RIGHT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4027 tms_sprite_tag(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4028 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4029 case slot+4:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4030 TMS_OUTPUT_RIGHT(slot+4)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4031 tms_sprite_pattern1(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4032 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4033 case slot+5:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4034 TMS_OUTPUT_RIGHT(slot+5)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4035 tms_sprite_pattern2(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4036 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4037
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4038 static void vdp_tms_graphics(vdp_context * context, uint32_t target_cycles)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4039 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4040 switch (context->hslot)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4041 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4042 for (;;)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4043 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4044 TMS_GRAPHICS_PATTERN_CPU_BLOCK(0)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4045 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(4)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4046 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(8)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4047 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(12)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4048 TMS_GRAPHICS_PATTERN_CPU_BLOCK(16)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4049 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(20)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4050 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(24)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4051 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(28)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4052 TMS_GRAPHICS_PATTERN_CPU_BLOCK(32)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4053 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(36)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4054 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(40)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4055 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(44)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4056 TMS_GRAPHICS_PATTERN_CPU_BLOCK(48)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4057 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(52)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4058 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(56)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4059 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(60)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4060 TMS_GRAPHICS_PATTERN_CPU_BLOCK(64)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4061 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(68)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4062 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(72)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4063 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(76)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4064 TMS_GRAPHICS_PATTERN_CPU_BLOCK(80)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4065 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(84)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4066 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(88)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4067 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(92)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4068 TMS_GRAPHICS_PATTERN_CPU_BLOCK(96)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4069 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(100)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4070 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(104)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4071 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(108)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4072 TMS_GRAPHICS_PATTERN_CPU_BLOCK(112)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4073 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(116)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4074 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(120)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4075 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(124)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4076 case 128:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4077 tms_composite(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4078 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4079 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4080 case 129:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4081 tms_composite(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4082 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4083 context->sprite_index = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4084 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4085
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4086 TMS_SPRITE_BLOCK(130)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4087 TMS_SPRITE_BLOCK(136)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4088 case 142:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4089 tms_sprite_vert(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4090 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4091 case 143:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4092 tms_sprite_horiz(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4093 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4094 case 145:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4095 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4096 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4097 case 146:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4098 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4099 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4100 case 147:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4101 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4102 context->hslot = 233;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4103 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4104 if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4105 case 233:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4106 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4107 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4108 case 234:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4109 tms_sprite_name(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4110 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4111 case 235:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4112 tms_sprite_tag(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4113 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4114 case 236:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4115 tms_sprite_pattern1(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4116 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4117 case 237:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4118 tms_sprite_pattern2(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4119 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4120 TMS_SPRITE_BLOCK(238)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4121 case 244:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4122 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4123 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4124 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4125 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4126 case 245:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4127 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4128 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4129 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4130 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4131 case 246:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4132 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4133 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4134 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4135 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4136 case 247:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4137 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4138 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4139 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4140 vdp_advance_line(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4141 context->sprite_index = context->sprite_draws = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4142 if (context->vcounter == 192) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4143 context->state = INACTIVE;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4144 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4145 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4146 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4147 TMS_SPRITE_SCAN_SLOT(248)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4148 TMS_SPRITE_SCAN_SLOT(249)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4149 TMS_SPRITE_SCAN_SLOT(250)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4150 TMS_SPRITE_SCAN_SLOT(251)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4151 TMS_SPRITE_SCAN_SLOT(252)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4152 TMS_SPRITE_SCAN_SLOT(253)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4153 TMS_SPRITE_SCAN_SLOT(254)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4154 TMS_SPRITE_SCAN_SLOT(255)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4155 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4156 default:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4157 context->hslot++;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4158 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4159 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4160 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4161
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4162 #define TMS_TEXT_OUTPUT(slot) if ((slot) < 8) { tms_border(context); } else { tms_composite(context); }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4163 #define TMS_TEXT_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4164 case slot:\
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4165 TMS_TEXT_OUTPUT(slot)\
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4166 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4167 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4168 case slot+1:\
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4169 TMS_TEXT_OUTPUT(slot+1)\
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4170 external_slot(context);\
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4171 TMS_CHECK_LIMIT \
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4172 case slot+2:\
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4173 TMS_TEXT_OUTPUT(slot+2)\
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4174 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4175 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4176
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4177 static void vdp_tms_text(vdp_context * context, uint32_t target_cycles)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4178 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4179 switch (context->hslot)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4180 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4181 for (;;)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4182 {
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4183 case 0:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4184 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4185 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4186 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4187 case 1:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4188 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4189 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4190 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4191 case 2:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4192 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4193 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4194 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4195 case 3:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4196 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4197 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4198 TMS_CHECK_LIMIT
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4199 case 4:
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4200 tms_border(context);
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4201 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4202 TMS_CHECK_LIMIT
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4203 TMS_TEXT_BLOCK(5)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4204 TMS_TEXT_BLOCK(8)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4205 TMS_TEXT_BLOCK(11)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4206 TMS_TEXT_BLOCK(14)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4207 TMS_TEXT_BLOCK(17)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4208 TMS_TEXT_BLOCK(20)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4209 TMS_TEXT_BLOCK(23)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4210 TMS_TEXT_BLOCK(26)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4211 TMS_TEXT_BLOCK(29)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4212 TMS_TEXT_BLOCK(32)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4213 TMS_TEXT_BLOCK(35)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4214 TMS_TEXT_BLOCK(38)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4215 TMS_TEXT_BLOCK(41)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4216 TMS_TEXT_BLOCK(44)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4217 TMS_TEXT_BLOCK(47)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4218 TMS_TEXT_BLOCK(50)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4219 TMS_TEXT_BLOCK(53)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4220 TMS_TEXT_BLOCK(56)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4221 TMS_TEXT_BLOCK(59)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4222 TMS_TEXT_BLOCK(62)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4223 TMS_TEXT_BLOCK(65)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4224 TMS_TEXT_BLOCK(68)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4225 TMS_TEXT_BLOCK(71)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4226 TMS_TEXT_BLOCK(74)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4227 TMS_TEXT_BLOCK(77)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4228 TMS_TEXT_BLOCK(80)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4229 TMS_TEXT_BLOCK(83)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4230 TMS_TEXT_BLOCK(86)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4231 TMS_TEXT_BLOCK(89)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4232 TMS_TEXT_BLOCK(92)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4233 TMS_TEXT_BLOCK(95)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4234 TMS_TEXT_BLOCK(98)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4235 TMS_TEXT_BLOCK(101)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4236 TMS_TEXT_BLOCK(104)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4237 TMS_TEXT_BLOCK(107)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4238 TMS_TEXT_BLOCK(110)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4239 TMS_TEXT_BLOCK(113)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4240 TMS_TEXT_BLOCK(116)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4241 TMS_TEXT_BLOCK(119)
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4242 TMS_TEXT_BLOCK(122)
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4243 case 125:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4244 tms_composite(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4245 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4246 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4247 case 126:
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4248 tms_composite(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4249 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4250 TMS_CHECK_LIMIT
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4251 case 127:
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4252 tms_composite(context);
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4253 external_slot(context);
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4254 TMS_CHECK_LIMIT
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4255 default:
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4256 while (context->hslot < 139)
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4257 {
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4258 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4259 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4260 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4261 }
3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4262 while (context->hslot < 147)
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4263 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4264 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4265 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4266 }
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4267 if (context->hslot == 147) {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4268 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4269 context->hslot = 233;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4270 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4271 if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4272 }
2260 3f155bc13183 Less broken TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2259 diff changeset	4273 while (context->hslot > 147) {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4274 if (context->hslot >= 233) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4275 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4276 if (context->hslot + 1 == LINE_CHANGE_MODE4) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4277 vdp_advance_line(context);
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4278 if (context->vcounter == 192) {
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4279 context->state = INACTIVE;
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4280 return;
c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4281 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4282 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4283 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4284 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4285 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4286 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4287 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4288 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4289
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4290 static void inactive_test_output(vdp_context *context, uint8_t is_h40, uint8_t test_layer)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4291 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4292 uint8_t max_slot = is_h40 ? 169 : 136;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4293 if (context->hslot > max_slot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4294 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4295 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4296 uint8_t dst = context->compositebuf + (context->hslot >> 3) SCROLL_BUFFER_DRAW;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4297 int32_t len;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4298 uint32_t src_off;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4299 if (context->hslot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4300 dst -= SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4301 src_off = 0;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4302 len = context->hslot == max_slot ? BORDER_RIGHT : SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4303 } else {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4304 src_off = SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4305 len = BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4306 }
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4307 uint8_t *src = NULL;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4308 if (test_layer == 2) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4309 //plane A
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	4310 src_off += context->buf_a_off - (context->hscroll_a & 0xF);
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4311 src = context->tmp_buf_a;
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	4312 } else if (test_layer == 3){
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4313 //plane B
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	4314 src_off += context->buf_b_off - (context->hscroll_b & 0xF);
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4315 src = context->tmp_buf_b;
1369 3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	4316 } else {
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2 Michael Pavone <pavone@retrodev.com> parents: 1368 diff changeset	4317 //sprite layer
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4318 memset(dst, 0, len);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4319 dst += len;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4320 len = 0;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4321 }
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4322 if (src) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4323 for (; len >=0; len--, dst++, src_off++)
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4324 {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4325 *dst = src[src_off & SCROLL_BUFFER_MASK] & 0x3F;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4326 }
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4327 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4328 context->done_composite = dst;
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4329 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4330 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4331 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4332
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4333 static void check_switch_inactive(vdp_context *context, uint8_t is_h40)
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4334 {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4335 //technically the second hcounter check should be different for H40, but this is probably close enough for now
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4336 if (context->state == ACTIVE && context->vcounter == context->inactive_start && (context->hslot >= (is_h40 ? 167 : 135) \|\| context->hslot < 133)) {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4337 context->state = INACTIVE;
2010 19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line Mike Pavone <pavone@retrodev.com> parents: 2009 diff changeset	4338 context->cur_slot = MAX_SPRITES_LINE-1;
19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line Mike Pavone <pavone@retrodev.com> parents: 2009 diff changeset	4339 context->sprite_x_offset = 0;
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4340 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4341 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4342
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4343 static void vdp_inactive(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4344 {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4345 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4346 uint8_t index_reset_value, max_draws, max_sprites;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4347 uint16_t vint_line, active_line;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4348
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4349 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4350 if (is_h40) {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4351 latch_slot = 165;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	4352 buf_clear_slot = 163;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	4353 index_reset_slot = 167;
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	4354 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4355 max_draws = MAX_SPRITES_LINE-1;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4356 max_sprites = MAX_SPRITES_LINE;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4357 index_reset_value = 0x80;
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	4358 vint_slot = VINT_SLOT_H40;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4359 line_change = LINE_CHANGE_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4360 jump_start = 182;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4361 jump_dest = 229;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4362 } else {
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	4363 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	4364 max_draws = MAX_SPRITES_LINE_H32-1;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4365 max_sprites = MAX_SPRITES_LINE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4366 buf_clear_slot = 128;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4367 index_reset_slot = 132;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4368 index_reset_value = 0x80;
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	4369 vint_slot = VINT_SLOT_H32;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4370 line_change = LINE_CHANGE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4371 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4372 jump_dest = 233;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4373 latch_slot = 243;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4374 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4375 vint_line = context->inactive_start;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4376 active_line = 0x1FF;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4377 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4378 latch_slot = 220;
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4379 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4380 } else {
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4381 latch_slot = 220;
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	4382 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4383 max_draws = MAX_DRAWS_H32_MODE4;
1278 34d3cb05014d Fix VDP buffer overrun that was causing sprite flickering in some games Michael Pavone <pavone@retrodev.com> parents: 1273 diff changeset	4384 max_sprites = 8;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4385 buf_clear_slot = 136;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4386 index_reset_slot = 253;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4387 index_reset_value = 0;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4388 vint_line = context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4389 vint_slot = VINT_SLOT_MODE4;
1177 67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency Michael Pavone <pavone@retrodev.com> parents: 1175 diff changeset	4390 line_change = LINE_CHANGE_MODE4;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4391 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4392 jump_dest = 233;
2263 a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	4393 if ((context->regs[REG_MODE_1] & BIT_MODE_4) \|\| context->type != VDP_GENESIS) {
1380 9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode Michael Pavone <pavone@retrodev.com> parents: 1378 diff changeset	4394 active_line = 0x1FF;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4395 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4396 //never active unless either mode 4 or mode 5 is turned on
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4397 active_line = 0x200;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4398 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4399 }
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	4400 uint32_t *dst;
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	4401 uint8_t *debug_dst;
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	4402 if (context->output && context->hslot >= BG_START_SLOT && context->hslot <= bg_end_slot) {
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	4403 dst = context->output + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	4404 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	4405 } else {
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	4406 dst = NULL;
cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	4407 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4408
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4409 uint8_t test_layer = context->test_port >> 7 & 3;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4410
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4411 while(context->cycles < target_cycles)
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4412 {
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4413 check_switch_inactive(context, is_h40);
1834 304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work Michael Pavone <pavone@retrodev.com> parents: 1821 diff changeset	4414 if (context->hslot == BG_START_SLOT && context->output) {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4415 dst = context->output + (context->hslot - BG_START_SLOT) * 2;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	4416 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4417 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4418 //this will need some tweaking to properly interact with 128K mode,
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4419 //but this should be good enough for now
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4420 context->serial_address += 1024;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4421 if (test_layer) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4422 switch (context->hslot & 7)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4423 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4424 case 3:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4425 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4426 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4427 case 4:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4428 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4429 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4430 case 7:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4431 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4432 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4433 case 0:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4434 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off+8, context->col_2);
1871 e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	4435 break;
e75b788caedd Fix debug register output regression in border region Michael Pavone <pavone@retrodev.com> parents: 1869 diff changeset	4436 case 1:
1339 35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4437 inactive_test_output(context, is_h40, test_layer);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4438 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4439 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1338 diff changeset	4440 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4441
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4442 if (context->hslot == buf_clear_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4443 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4444 context->cur_slot = max_draws;
2263 a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	4445 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) \|\| context->type == VDP_GENESIS) {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4446 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4447 context->sprite_draws = MAX_DRAWS_H32_MODE4;
2263 a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	4448 } else {
a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	4449 context->sprite_draws = 0;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4450 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4451 memset(context->linebuf, 0, LINEBUF_SIZE);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4452 } else if (context->hslot == index_reset_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4453 context->sprite_index = index_reset_value;
1335 26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2. Michael Pavone <pavone@retrodev.com> parents: 1334 diff changeset	4454 context->slot_counter = mode_5 ? 0 : max_sprites;
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4455 } else if (context->hslot == latch_slot) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4456 //it seems unlikely to me that vscroll actually gets latched when the display is off
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4457 //but it's the only straightforward way to reconcile what I'm seeing between Skitchin
1454 a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4458 //(which seems to expect vscroll to be latched early) and the intro of Gunstar Heroes
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4459 //(which disables the display and ends up with garbage if vscroll is latched during that period)
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4460 //without it. Some more tests are definitely needed
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4461 context->vscroll_latch[0] = context->vsram[0];
a664bade4b29 Fix minor graphical regression in Gunstar Heroes Michael Pavone <pavone@retrodev.com> parents: 1437 diff changeset	4462 context->vscroll_latch[1] = context->vsram[1];
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4463 } else if (context->vcounter == vint_line && context->hslot == vint_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4464 context->flags2 \|= FLAG2_VINT_PENDING;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4465 context->pending_vint_start = context->cycles;
1436 40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	4466 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
40c3be9f1af7 Fix timing of VDP ODD flag toggle Michael Pavone <pavone@retrodev.com> parents: 1432 diff changeset	4467 context->flags2 ^= FLAG2_EVEN_FIELD;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4468 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4469
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4470 if (dst) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4471 uint8_t bg_index;
1894 55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window Michael Pavone <pavone@retrodev.com> parents: 1891 diff changeset	4472 uint32_t bg_color;
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4473 if (mode_5) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4474 bg_index = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4475 bg_color = context->colors[bg_index];
2263 a98b2d0de2f1 Fix TMS9918A first line sprite bug Michael Pavone <pavone@retrodev.com> parents: 2260 diff changeset	4476 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) \|\| context->type != VDP_GENESIS) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4477 bg_index = 0x10 + (context->regs[REG_BG_COLOR] & 0xF);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4478 bg_color = context->colors[MODE4_OFFSET + bg_index];
1913 2c742812bcbb Fix regression at the very start of The Revenge of Shinobi Michael Pavone <pavone@retrodev.com> parents: 1906 diff changeset	4479 } else {
2264 c7781cc950e9 Fix TMS9918A text mode Michael Pavone <pavone@retrodev.com> parents: 2263 diff changeset	4480 bg_color = context->color_map[0];
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4481 }
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4482 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4483 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4484 if (!(pixel & 0x3F \| test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4485 pixel = pixel & 0xC0 \| bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4486 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4487 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4488 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4489 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4490 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4491 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4492 } else {
1343 033dda2d4598 Fix transition from active to inactive display Michael Pavone <pavone@retrodev.com> parents: 1342 diff changeset	4493 *(dst++) = bg_color;
1644 cf4e387a8db6 Populate layer debug buffer during inactive display Michael Pavone <pavone@retrodev.com> parents: 1643 diff changeset	4494 *(debug_dst++) = DBG_SRC_BG;
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4495 }
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	4496 if (context->hslot != bg_end_slot) {
1821 4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4497 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4498 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4499 if (!(pixel & 0x3F \| test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4500 pixel = pixel & 0xC0 \| bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4501 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4502 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4503 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4504 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4505 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4506 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4507 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4508 *(dst++) = bg_color;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4509 *(debug_dst++) = DBG_SRC_BG;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition Michael Pavone <pavone@retrodev.com> parents: 1785 diff changeset	4510 }
1267 3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill Michael Pavone <pavone@retrodev.com> parents: 1191 diff changeset	4511 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4512 }
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	4513 if (context->hslot == bg_end_slot) {
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	4514 advance_output_line(context);
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	4515 dst = NULL;
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	4516 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4517
1183 8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	4518 if (!is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	4519 external_slot(context);
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	4520 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	4521 run_dma_src(context, context->hslot);
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	4522 }
8d8c71ebbbce CRAM contention artifact emulation Michael Pavone <pavone@retrodev.com> parents: 1180 diff changeset	4523 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4524
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4525 if (is_h40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4526 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4527 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40];
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4528 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4529 context->cycles += MCLKS_SLOT_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4530 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4531 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4532 context->cycles += MCLKS_SLOT_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4533 }
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4534 if (context->hslot == jump_start) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4535 context->hslot = jump_dest;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4536 } else {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4537 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	4538 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4539 if (context->hslot == line_change) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4540 vdp_advance_line(context);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4541 if (context->vcounter == active_line) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4542 context->state = PREPARING;
2241 48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	4543 memset(context->compositebuf, 0, sizeof(context->compositebuf));
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4544 return;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4545 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4546 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4547 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4548 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4549
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4550 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles)
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4551 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	4552 uint8_t is_h40 = context->regs[REG_MODE_4] & BIT_H40;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	4553 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4554 while(context->cycles < target_cycles)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4555 {
1362 83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf Michael Pavone <pavone@retrodev.com> parents: 1361 diff changeset	4556 check_switch_inactive(context, is_h40);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4557
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4558 if (is_active(context)) {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4559 if (mode_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4560 if (is_h40) {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4561 vdp_h40(context, target_cycles);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4562 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4563 vdp_h32(context, target_cycles);
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4564 }
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4565 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4566 vdp_h32_mode4(context, target_cycles);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4567 } else if (context->regs[REG_MODE_2] & BIT_M1) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4568 vdp_tms_text(context, target_cycles);
330 57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	4569 } else {
2257 1e626d0ecf9c WIP SG-1000/TMS9918A mode support Michael Pavone <pavone@retrodev.com> parents: 2244 diff changeset	4570 vdp_tms_graphics(context, target_cycles);
330 57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	4571 }
57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode Mike Pavone <pavone@retrodev.com> parents: 329 diff changeset	4572 } else {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	4573 vdp_inactive(context, target_cycles, is_h40, mode_5);
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4574 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4575 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4576 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4577
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4578 void vdp_run_context(vdp_context *context, uint32_t target_cycles)
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4579 {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4580 //TODO: Deal with H40 hsync shenanigans
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4581 uint32_t slot_cyc = context->regs[REG_MODE_4] & BIT_H40 ? 15 : 19;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4582 if (target_cycles < slot_cyc) {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4583 //avoid overflow
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4584 return;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4585 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4586 vdp_run_context_full(context, target_cycles - slot_cyc);
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4587 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4588
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4589 uint32_t vdp_run_to_vblank(vdp_context * context)
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4590 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	4591 uint32_t old_frame = context->frame;
e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	4592 while (context->frame == old_frame) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4593 vdp_run_context_full(context, context->cycles + MCLKS_LINE);
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	4594 }
20 f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4595 return context->cycles;
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4596 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer Mike Pavone <pavone@retrodev.com> parents: diff changeset	4597
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4598 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles)
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4599 {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4600 for(;;) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4601 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L];
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4602 if (!dmalen) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4603 dmalen = 0x10000;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4604 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4605 uint32_t min_dma_complete = dmalen * (context->regs[REG_MODE_4] & BIT_H40 ? 16 : 20);
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	4606 if (
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4607 (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	4608 \|\| (((context->cd & 0xF) == VRAM_WRITE) && !(context->regs[REG_MODE_2] & BIT_128K_VRAM))) {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4609 //DMA copies take twice as long to complete since they require a read and a write
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4610 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word
1321 0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1320 diff changeset	4611 //unless 128KB mode is enabled
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4612 min_dma_complete *= 2;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4613 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4614 min_dma_complete += context->cycles;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4615 if (target_cycles < min_dma_complete) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4616 vdp_run_context_full(context, target_cycles);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4617 return;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4618 } else {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4619 vdp_run_context_full(context, min_dma_complete);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4620 if (!(context->flags & FLAG_DMA_RUN)) {
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4621 return;
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4622 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4623 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4624 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4625 }
108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4626
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4627 static uint16_t get_ext_vcounter(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4628 {
1437 da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	4629 uint16_t line= context->vcounter;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	4630 if (context->regs[REG_MODE_4] & BIT_INTERLACE) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	4631 if (context->double_res) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	4632 line <<= 1;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	4633 } else {
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	4634 line &= 0x1FE;
da72344af3ff Fix external v counter when normal resolution interlace mode is active Michael Pavone <pavone@retrodev.com> parents: 1436 diff changeset	4635 }
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4636 if (line & 0x100) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4637 line \|= 1;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4638 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4639 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4640 return line << 8;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4641 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4642
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4643 void vdp_latch_hv(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4644 {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4645 context->hv_latch = context->hslot \| get_ext_vcounter(context);
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4646 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4647
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4648 uint16_t vdp_hv_counter_read(vdp_context * context)
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4649 {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4650 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4651 return context->hv_latch;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4652 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4653 uint16_t hv;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4654 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4655 hv = context->hslot;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4656 } else {
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4657 hv = context->hv_latch & 0xFF;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4658 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4659 hv \|= get_ext_vcounter(context);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	4660
1154 c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4661 return hv;
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4662 }
c83ec07ddbac Implemented Mode 4 H conter latching Michael Pavone <pavone@retrodev.com> parents: 1153 diff changeset	4663
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4664 void vdp_reg_write(vdp_context *context, uint16_t reg, uint16_t value)
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4665 {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4666 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4667 if (reg < (mode_5 ? VDP_REGS : 0xB)) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4668 //printf("register %d set to %X\n", reg, value & 0xFF);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4669 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4670 vdp_latch_hv(context);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4671 } else if (reg == REG_BG_COLOR) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4672 value &= 0x3F;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4673 } else if (reg == REG_MODE_2 && context->type != VDP_GENESIS) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4674 // only the Genesis VDP does anything with this bit
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4675 // so just clear it to prevent Mode 5 selection if we're not emulating that chip
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4676 value &= ~BIT_MODE_5;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4677 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4678 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4679 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4680 }*/
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4681 uint8_t buffer[2] = {reg, value};
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4682 event_log(EVENT_VDP_REG, context->cycles, sizeof(buffer), buffer);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4683 context->regs[reg] = value;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4684 if (reg == REG_MODE_1 \|\| reg == REG_MODE_2 \|\| reg == REG_MODE_4) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4685 update_video_params(context);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4686 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4687 } else if (reg == REG_KMOD_CTRL) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4688 if (!(value & 0xFF)) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4689 context->system->enter_debugger = 1;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4690 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4691 } else if (reg == REG_KMOD_MSG) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4692 char c = value;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4693 if (c) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4694 context->kmod_buffer_length++;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4695 if ((context->kmod_buffer_length + 1) > context->kmod_buffer_storage) {
2494 b62580dc6f30 Fix kmod buffer storage bug Michael Pavone <pavone@retrodev.com> parents: 2473 diff changeset	4696 context->kmod_buffer_storage = context->kmod_buffer_storage ? context->kmod_buffer_storage * 2 : 128;
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4697 context->kmod_msg_buffer = realloc(context->kmod_msg_buffer, context->kmod_buffer_storage);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4698 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4699 context->kmod_msg_buffer[context->kmod_buffer_length - 1] = c;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4700 } else if (context->kmod_buffer_length) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4701 context->kmod_msg_buffer[context->kmod_buffer_length] = 0;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4702 if (is_stdout_enabled()) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4703 init_terminal();
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4704 printf("KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4705 } else {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4706 // GDB remote debugging is enabled, use stderr instead
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4707 fprintf(stderr, "KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4708 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4709 context->kmod_buffer_length = 0;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4710 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4711 } else if (reg == REG_KMOD_TIMER) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4712 if (!(value & 0x80)) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4713 if (is_stdout_enabled()) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4714 init_terminal();
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4715 printf("KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4716 } else {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4717 // GDB remote debugging is enabled, use stderr instead
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4718 fprintf(stderr, "KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4719 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4720 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4721 if (value & 0xC0) {
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4722 context->timer_start_cycle = context->cycles;
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4723 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4724 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4725 }
04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4726
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4727 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4728 {
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4729 //printf("control port write: %X at %d\n", value, context->cycles);
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	4730 if (context->flags & FLAG_DMA_RUN) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	4731 return -1;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	4732 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4733 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4734 context->address_latch = value << 14 & 0x1C000;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4735 context->address = (context->address & 0x3FFF) \| context->address_latch;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4736 //It seems like the DMA enable bit doesn't so much enable DMA so much
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4737 //as it enables changing CD5 from control port writes
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4738 if (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4739 context->cd = (context->cd & 0x3) \| ((value >> 2) & ~0x3 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4740 } else {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4741 context->cd = (context->cd & 0x23) \| ((value >> 2) & ~0x23 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4742 }
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4743 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4744 //Should these be taken care of here or after the first write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4745 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4746 context->flags2 &= ~FLAG2_READ_PENDING;
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4747 if (!(context->cd & 1)) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4748 context->read_latency = cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4749 }
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	4750 //printf("New Address: %X, New CD: %X\n", context->address, context->cd);
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	4751 if (context->cd & 0x20) {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	4752 //
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	4753 if((context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4754 //DMA copy or 68K -> VDP, transfer starts immediately
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	4755 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) \| context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot);
1191 8dc50e50ced6 Remove accidentally committed debug logging Michael Pavone <pavone@retrodev.com> parents: 1189 diff changeset	4756 if (!(context->regs[REG_DMASRC_H] & 0x80)) {
8dc50e50ced6 Remove accidentally committed debug logging Michael Pavone <pavone@retrodev.com> parents: 1189 diff changeset	4757 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) \| (context->regs[REG_DMASRC_M] << 9) \| (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 \| context->regs[REG_DMALEN_L]);
1289 6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	4758 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	4759 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	4760 //only captures are from a direct color DMA demo which will generally start DMA at a very specific point in display so other values are plausible
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM Michael Pavone <pavone@retrodev.com> parents: 1285 diff changeset	4761 //sticking with 3 slots for now until I can do some more captures
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4762 vdp_run_context_full(context, context->cycles + 12 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5));
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4763 vdp_dma_started();
1285 76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation Michael Pavone <pavone@retrodev.com> parents: 1278 diff changeset	4764 context->flags \|= FLAG_DMA_RUN;
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4765 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4766 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4767 }
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4768 return 1;
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	4769 } else {
1285 76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation Michael Pavone <pavone@retrodev.com> parents: 1278 diff changeset	4770 context->flags \|= FLAG_DMA_RUN;
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4771 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4772 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4773 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	4774 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) \| context->regs[REG_DMASRC_L]);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4775 }
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	4776 } else {
453 b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements. Mike Pavone <pavone@retrodev.com> parents: 452 diff changeset	4777 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd);
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4778 }
63 a6dd5b7a971b Add FPS counter to console output Mike Pavone <pavone@retrodev.com> parents: 58 diff changeset	4779 }
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4780 } else {
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4781 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4782 context->address = context->address_latch \| (value & 0x3FFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4783 context->cd = (context->cd & 0x3C) \| (value >> 14);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4784 if ((value & 0xC000) == 0x8000) {
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4785 //Register write
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4786 uint16_t reg = (value >> 8) & 0x1F;
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4787 if (context->reg_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4788 context->reg_hook(context, reg, value);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4789 }
2359 04d29635d238 Support for arrays in debugger language Michael Pavone <pavone@retrodev.com> parents: 2358 diff changeset	4790 vdp_reg_write(context, reg, value);
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4791 } else if (mode_5) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4792 context->flags \|= FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4793 //Should these be taken care of here or after the second write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4794 //context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4795 //context->flags2 &= ~FLAG2_READ_PENDING;
1120 e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4796 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4797 context->flags &= ~FLAG_READ_FETCHED;
e9369d6f0101 Somewhat broken implementation of Mode 4 Michael Pavone <pavone@retrodev.com> parents: 1117 diff changeset	4798 context->flags2 &= ~FLAG2_READ_PENDING;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4799 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4800 }
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4801 return 0;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4802 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4803
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4804 void vdp_control_port_write_pbc(vdp_context *context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4805 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4806 if (context->flags2 & FLAG2_BYTE_PENDING) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4807 uint16_t full_val = value << 8 \| context->pending_byte;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4808 context->flags2 &= ~FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4809 //TODO: Deal with fact that Vbus->VDP DMA doesn't do anything in PBC mode
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4810 vdp_control_port_write(context, full_val, context->cycles);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	4811 if (context->cd == VRAM_READ) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	4812 context->cd = VRAM_READ8;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	4813 }
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4814 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4815 context->pending_byte = value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4816 context->flags2 \|= FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4817 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4818 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4819
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	4820 int vdp_data_port_write(vdp_context * context, uint16_t value)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4821 {
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4822 //printf("data port write: %X at %d\n", value, context->cycles);
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	4823 if (context->flags & FLAG_DMA_RUN && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	4824 return -1;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	4825 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4826 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4827 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4828 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4829 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4830 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4831 }
109 004dd46e0a97 COmment out fifo full debug printf Mike Pavone <pavone@retrodev.com> parents: 108 diff changeset	4832 /*if (context->fifo_cur == context->fifo_end) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4833 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
109 004dd46e0a97 COmment out fifo full debug printf Mike Pavone <pavone@retrodev.com> parents: 108 diff changeset	4834 }*/
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	4835 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
460 788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	4836 context->flags &= ~FLAG_DMA_RUN;
788ba843a731 Implement FIFO latency and improve DMA accuracy Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	4837 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4838 while (context->fifo_write == context->fifo_read) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4839 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4840 }
2361 3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4841 if (context->data_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4842 context->data_hook(context, value);
3350b3c8faa8 Initial implementation of VDP register write breakpoints Michael Pavone <pavone@retrodev.com> parents: 2359 diff changeset	4843 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4844 fifo_entry * cur = context->fifo + context->fifo_write;
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4845 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4846 cur->address = context->address;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4847 cur->value = value;
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4848 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4849 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4850 } else {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4851 cur->cd = (context->cd & 2) \| 1;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4852 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4853 cur->partial = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4854 if (context->fifo_read < 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4855 context->fifo_read = context->fifo_write;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4856 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4857 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	4858 increment_address(context);
149 139e5dcd6aa3 Make writes to control and data port block when DMA is in progress Mike Pavone <pavone@retrodev.com> parents: 143 diff changeset	4859 return 0;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4860 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4861
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4862 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4863 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4864 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4865 context->flags &= ~FLAG_PENDING;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4866 //Should these be cleared here?
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4867 context->flags &= ~FLAG_READ_FETCHED;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4868 context->flags2 &= ~FLAG2_READ_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4869 }
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4870 context->flags2 &= ~FLAG2_BYTE_PENDING;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4871 /*if (context->fifo_cur == context->fifo_end) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4872 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4873 }*/
1637 95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order Michael Pavone <pavone@retrodev.com> parents: 1634 diff changeset	4874 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4875 context->flags &= ~FLAG_DMA_RUN;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4876 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4877 while (context->fifo_write == context->fifo_read) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4878 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4879 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4880 fifo_entry * cur = context->fifo + context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4881 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4882 cur->address = context->address;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4883 cur->value = value;
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4884 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4885 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4886 } else {
2473 cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	4887 if ((context->cd & 3) == CRAM_WRITE) {
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	4888 cur->cd = CRAM_WRITE;
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	4889 } else {
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	4890 cur->cd = VRAM_WRITE;
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe Michael Pavone <pavone@retrodev.com> parents: 2465 diff changeset	4891 }
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	4892 }
1333 69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2 Michael Pavone <pavone@retrodev.com> parents: 1331 diff changeset	4893 cur->partial = 3;
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4894 if (context->fifo_read < 0) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4895 context->fifo_read = context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4896 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4897 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151 681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode Michael Pavone <pavone@retrodev.com> parents: 1150 diff changeset	4898 increment_address(context);
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4899 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4900
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	4901 void vdp_test_port_write(vdp_context * context, uint16_t value)
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	4902 {
1318 bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support Michael Pavone <pavone@retrodev.com> parents: 1315 diff changeset	4903 context->test_port = value;
470 541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	4904 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM. Mike Pavone <pavone@retrodev.com> parents: 467 diff changeset	4905
2358 4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	4906 uint16_t vdp_status(vdp_context *context)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4907 {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4908 //Bits 15-10 are not fixed like Charles MacDonald's doc suggests, but instead open bus values that reflect 68K prefetch
1117 928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful. Michael Pavone <pavone@retrodev.com> parents: 1106 diff changeset	4909 uint16_t value = context->system->get_open_bus_value(context->system) & 0xFC00;
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4910 if (context->fifo_read < 0) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4911 value \|= 0x200;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4912 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	4913 if (context->fifo_read == context->fifo_write) {
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4914 value \|= 0x100;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4915 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4916 if (context->flags2 & FLAG2_VINT_PENDING) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	4917 value \|= 0x80;
36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	4918 }
494 8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4919 if (context->flags & FLAG_DOT_OFLOW) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4920 value \|= 0x40;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4921 }
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4922 if (context->flags2 & FLAG2_SPRITE_COLLIDE) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4923 value \|= 0x20;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags Mike Pavone <pavone@retrodev.com> parents: 481 diff changeset	4924 }
1077 1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode. Michael Pavone <pavone@retrodev.com> parents: 1076 diff changeset	4925 if ((context->regs[REG_MODE_4] & BIT_INTERLACE) && !(context->flags2 & FLAG2_EVEN_FIELD)) {
413 36fbbced25c2 Initial work on interlace Mike Pavone <pavone@retrodev.com> parents: 337 diff changeset	4926 value \|= 0x10;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4927 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4928 uint32_t slot = context->hslot;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	4929 if (!is_active(context)) {
318 789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	4930 value \|= 0x8;
789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	4931 }
622 b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4932 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4933 if (slot < HBLANK_END_H40 \|\| slot > HBLANK_START_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4934 value \|= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4935 }
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4936 } else {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4937 if (slot < HBLANK_END_H32 \|\| slot > HBLANK_START_H32) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4938 value \|= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though Michael Pavone <pavone@retrodev.com> parents: 621 diff changeset	4939 }
318 789f2f5f2277 Implement hblank flag in status register Mike Pavone <pavone@retrodev.com> parents: 317 diff changeset	4940 }
983 14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing. Michael Pavone <pavone@retrodev.com> parents: 981 diff changeset	4941 if (context->cd & 0x20) {
141 576f55711d8d Fix DMA in progress flag in VDP status register Mike Pavone <pavone@retrodev.com> parents: 138 diff changeset	4942 value \|= 0x2;
75 108e587165c0 Implement DMA (untested) Mike Pavone <pavone@retrodev.com> parents: 65 diff changeset	4943 }
714 e29bc2918f69 Fix VDP status register PAL bit based on observations of the Titan Overdrive demo Michael Pavone <pavone@retrodev.com> parents: 711 diff changeset	4944 if (context->flags2 & FLAG2_REGION_PAL) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4945 value \|= 0x1;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	4946 }
2358 4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	4947 return value;
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	4948 }
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	4949
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	4950 uint16_t vdp_control_port_read(vdp_context * context)
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	4951 {
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	4952 uint16_t value = vdp_status(context);
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	4953 context->flags &= ~(FLAG_DOT_OFLOW\|FLAG_PENDING);
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support Michael Pavone <pavone@retrodev.com> parents: 2338 diff changeset	4954 context->flags2 &= ~(FLAG2_SPRITE_COLLIDE\|FLAG2_BYTE_PENDING);
459 c49ecf575784 Revert change to VBLANK flag timing based on new direct color DMA test Mike Pavone <pavone@retrodev.com> parents: 454 diff changeset	4955 //printf("status read at cycle %d returned %X\n", context->cycles, value);
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4956 return value;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4957 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4958
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4959 uint16_t vdp_data_port_read(vdp_context * context, uint32_t *cpu_cycle, uint32_t cpu_divider)
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4960 {
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4961 if (context->flags & FLAG_PENDING) {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	4962 context->flags &= ~FLAG_PENDING;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4963 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4964 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4965 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4966 }
138 aa3e1bb338c9 Fix VDP reads Mike Pavone <pavone@retrodev.com> parents: 137 diff changeset	4967 if (context->cd & 1) {
991 f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes Michael Pavone <pavone@retrodev.com> parents: 984 diff changeset	4968 warning("Read from VDP data port while writes are configured, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
1998 0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4969 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4970 return context->prefetch;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4971 }
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4972 switch (context->cd)
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4973 {
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4974 case VRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4975 case VSRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4976 case CRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4977 case VRAM_READ8:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4978 break;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4979 default:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4980 warning("Read from VDP data port with invalid source, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4981 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup Mike Pavone <pavone@retrodev.com> parents: 1997 diff changeset	4982 return context->prefetch;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4983 }
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4984 uint32_t starting_cycle = context->cycles;
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4985 while (!(context->flags & FLAG_READ_FETCHED)) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	4986 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	4987 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	4988 context->flags &= ~FLAG_READ_FETCHED;
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4989 //TODO: Make some logic analyzer captures to better characterize what's happening with read latency here
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4990 if (context->cycles != starting_cycle) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4991 uint32_t delta = context->cycles - *cpu_cycle;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4992 uint32_t cpu_delta = delta / cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4993 if (delta % cpu_divider) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4994 cpu_delta++;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4995 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4996 cpu_cycle += cpu_delta cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4997 if (*cpu_cycle - context->cycles < 2) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4998 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	4999 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5000 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5001 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5002 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5003 context->read_latency = cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5004 }
980 928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM Michael Pavone <pavone@retrodev.com> parents: 953 diff changeset	5005 return context->prefetch;
54 3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5006 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working Mike Pavone <pavone@retrodev.com> parents: 43 diff changeset	5007
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	5008 uint8_t vdp_data_port_read_pbc(vdp_context * context)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	5009 {
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5010 context->flags &= ~(FLAG_PENDING \| FLAG_READ_FETCHED);
1153 2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1152 diff changeset	5011 context->flags2 &= ~FLAG2_BYTE_PENDING;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5012
1152 ddbb61be6119 Fix to pass a couple more tests in VDPTEST.sms Michael Pavone <pavone@retrodev.com> parents: 1151 diff changeset	5013 context->cd = VRAM_READ8;
1149 6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	5014 return context->prefetch;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	5015 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions Michael Pavone <pavone@retrodev.com> parents: 1138 diff changeset	5016
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	5017 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction)
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	5018 {
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	5019 context->cycles -= deduction;
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5020 if (context->pending_vint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5021 context->pending_vint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5022 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5023 context->pending_vint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5024 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5025 if (context->pending_hint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5026 context->pending_hint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5027 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5028 context->pending_hint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5029 }
471 f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5030 if (context->fifo_read >= 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5031 int32_t idx = context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5032 do {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5033 if (context->fifo[idx].cycle >= deduction) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5034 context->fifo[idx].cycle -= deduction;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5035 } else {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5036 context->fifo[idx].cycle = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5037 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5038 idx = (idx+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly Mike Pavone <pavone@retrodev.com> parents: 470 diff changeset	5039 } while(idx != context->fifo_write);
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	5040 }
2227 eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5041 if (context->read_latency >= deduction) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5042 context->read_latency -= deduction;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5043 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5044 context->read_latency = 0;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM Michael Pavone <pavone@retrodev.com> parents: 2223 diff changeset	5045 }
65 aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	5046 }
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame. Mike Pavone <pavone@retrodev.com> parents: 63 diff changeset	5047
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	5048 static uint32_t vdp_cycles_hslot_wrap_h40(vdp_context * context)
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5049 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5050 if (context->hslot < 183) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5051 return MCLKS_LINE - context->hslot * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5052 } else if (context->hslot < HSYNC_END_H40) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5053 uint32_t before_hsync = context->hslot < HSYNC_SLOT_H40 ? (HSYNC_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40 : 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5054 uint32_t hsync = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5055 for (int i = context->hslot <= HSYNC_SLOT_H40 ? 0 : context->hslot - HSYNC_SLOT_H40; i < sizeof(h40_hsync_cycles)/sizeof(uint32_t); i++)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5056 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5057 hsync += h40_hsync_cycles[i];
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5058 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5059 uint32_t after_hsync = (256- HSYNC_END_H40) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5060 return before_hsync + hsync + after_hsync;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5061 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5062 return (256-context->hslot) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5063 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5064 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5065
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	5066 static uint32_t vdp_cycles_next_line(vdp_context * context)
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5067 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5068 if (context->regs[REG_MODE_4] & BIT_H40) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5069 //TODO: Handle "illegal" Mode 4/H40 combo
647 5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events Michael Pavone <pavone@retrodev.com> parents: 629 diff changeset	5070 if (context->hslot < LINE_CHANGE_H40) {
697 7f96bd1cb1be Sync fixes and logging to fix more sync issues Michael Pavone <pavone@retrodev.com> parents: 680 diff changeset	5071 return (LINE_CHANGE_H40 - context->hslot) * MCLKS_SLOT_H40;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5072 } else {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5073 return vdp_cycles_hslot_wrap_h40(context) + LINE_CHANGE_H40 * MCLKS_SLOT_H40;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5074 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5075 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5076 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5077 if (context->hslot < LINE_CHANGE_H32) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5078 return (LINE_CHANGE_H32 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5079 } else if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5080 return MCLKS_LINE - (context->hslot - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5081 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5082 return (256-context->hslot + LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5083 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5084 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5085 if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5086 return (148 - context->hslot + LINE_CHANGE_MODE4 - 233) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5087 } else if (context->hslot < LINE_CHANGE_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5088 return (LINE_CHANGE_MODE4 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5089 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5090 return MCLKS_LINE - (context->hslot - LINE_CHANGE_MODE4) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5091 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5092 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5093 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5094 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5095
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5096 static void get_jump_params(vdp_context context, uint32_t jump_start, uint32_t *jump_dst)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5097 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5098 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5099 if (context->flags2 & FLAG2_REGION_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5100 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5101 *jump_start = 0x10B;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5102 *jump_dst = 0x1D2;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5103 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5104 *jump_start = 0x103;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5105 *jump_dst = 0x1CA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5106 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5107 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5108 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5109 *jump_start = 0x100;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5110 *jump_dst = 0x1FA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5111 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5112 *jump_start = 0xEB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5113 *jump_dst = 0x1E5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5114 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5115 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5116 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5117 *jump_start = 0xDB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5118 *jump_dst = 0x1D5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5119 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5120 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5121
1102 c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code Michael Pavone <pavone@retrodev.com> parents: 1077 diff changeset	5122 static uint32_t vdp_cycles_to_line(vdp_context * context, uint32_t target)
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5123 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5124 uint32_t jump_start, jump_dst;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5125 get_jump_params(context, &jump_start, &jump_dst);
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5126 uint32_t lines;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5127 if (context->vcounter < target) {
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5128 if (target < jump_start \|\| context->vcounter > jump_start) {
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5129 lines = target - context->vcounter;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5130 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5131 lines = jump_start - context->vcounter + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5132 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5133 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5134 if (context->vcounter < jump_start) {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	5135 lines = jump_start - context->vcounter + 512 - jump_dst;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5136 } else {
718 eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse. Michael Pavone <pavone@retrodev.com> parents: 717 diff changeset	5137 lines = 512 - context->vcounter;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5138 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5139 if (target < jump_start) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5140 lines += target;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5141 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5142 lines += jump_start + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5143 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5144 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5145 return MCLKS_LINE * (lines - 1) + vdp_cycles_next_line(context);
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5146 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5147
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	5148 uint32_t vdp_cycles_to_frame_end(vdp_context * context)
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	5149 {
1167 e758ddbf0624 Initial work on emulating top and bottom border area Michael Pavone <pavone@retrodev.com> parents: 1163 diff changeset	5150 return context->cycles + vdp_cycles_to_line(context, context->inactive_start);
680 4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	5151 }
4996369f1463 Some small synchronization improvements that do not seem to fix anything Michael Pavone <pavone@retrodev.com> parents: 678 diff changeset	5152
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5153 uint32_t vdp_next_hint(vdp_context * context)
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5154 {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	5155 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5156 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5157 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5158 if (context->flags2 & FLAG2_HINT_PENDING) {
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5159 return context->pending_hint_start;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5160 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5161 uint32_t hint_line;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5162 if (context->state != ACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5163 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5164 if (hint_line > context->inactive_start) {
724 2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display Michael Pavone <pavone@retrodev.com> parents: 722 diff changeset	5165 return 0xFFFFFFFF;
2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display Michael Pavone <pavone@retrodev.com> parents: 722 diff changeset	5166 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5167 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5168 hint_line = context->vcounter + context->hint_counter + 1;
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5169 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5170 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5171 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5172 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5173 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5174 }
1366 c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	5175 if (hint_line >= context->vcounter) {
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	5176 //Next interrupt is for a line in the next frame that
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	5177 //is higher than the line we're on now so just passing
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	5178 //that line number to vdp_cycles_to_line will yield the wrong
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	5179 //result
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5180 return context->cycles + vdp_cycles_to_line(context, 0) + hint_line * MCLKS_LINE;
1366 c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games Michael Pavone <pavone@retrodev.com> parents: 1365 diff changeset	5181 }
1325 58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5182 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5183 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5184 uint32_t jump_start, jump_dst;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5185 get_jump_params(context, &jump_start, &jump_dst);
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5186 if (hint_line >= jump_start && context->vcounter < jump_dst) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5187 hint_line = (hint_line + jump_dst - jump_start) & 0x1FF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5188 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5189 if (hint_line < context->vcounter && hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5190 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5191 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right Michael Pavone <pavone@retrodev.com> parents: 1322 diff changeset	5192 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5193 }
1371 5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack Michael Pavone <pavone@retrodev.com> parents: 1369 diff changeset	5194 return context->cycles + vdp_cycles_to_line(context, hint_line);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5195 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5196
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5197 static uint32_t vdp_next_vint_real(vdp_context * context)
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5198 {
327 1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug Mike Pavone <pavone@retrodev.com> parents: 323 diff changeset	5199 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) {
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5200 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5201 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5202 if (context->flags2 & FLAG2_VINT_PENDING) {
717 22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation. Michael Pavone <pavone@retrodev.com> parents: 714 diff changeset	5203 return context->pending_vint_start;
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5204 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5205
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5206
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5207 return vdp_next_vint_z80(context);
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5208 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5209
1171 43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5210 uint32_t vdp_next_vint(vdp_context *context)
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5211 {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5212 uint32_t ret = vdp_next_vint_real(context);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5213 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5214 static uint32_t last = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5215 if (last != ret) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5216 printf("vdp_next_vint is %d at frame %d, line %d, hslot %d\n", ret, context->frame, context->vcounter, context->hslot);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5217 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5218 last = ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5219 #endif
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5220 return ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5221 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code. Michael Pavone <pavone@retrodev.com> parents: 1170 diff changeset	5222
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	5223 uint32_t vdp_next_vint_z80(vdp_context * context)
f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	5224 {
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5225 uint16_t vint_line = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->inactive_start : context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5226 if (context->vcounter == vint_line) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5227 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5228 if (context->regs[REG_MODE_4] & BIT_H40) {
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5229 if (context->hslot >= LINE_CHANGE_H40 \|\| context->hslot <= VINT_SLOT_H40) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5230 uint32_t cycles = context->cycles;
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5231 if (context->hslot >= LINE_CHANGE_H40) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5232 if (context->hslot < 183) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5233 cycles += (183 - context->hslot) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5234 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5235
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5236 if (context->hslot < HSYNC_SLOT_H40) {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5237 cycles += (HSYNC_SLOT_H40 - (context->hslot >= 229 ? context->hslot : 229)) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5238 }
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5239 for (int slot = context->hslot <= HSYNC_SLOT_H40 ? HSYNC_SLOT_H40 : context->hslot; slot < HSYNC_END_H40; slot++ )
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5240 {
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5241 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5242 }
0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5243 cycles += (256 - (context->hslot > HSYNC_END_H40 ? context->hslot : HSYNC_END_H40)) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5244 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5245
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5246 cycles += (VINT_SLOT_H40 - (context->hslot >= LINE_CHANGE_H40 ? 0 : context->hslot)) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5247 return cycles;
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	5248 }
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5249 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	5250 if (context->hslot >= LINE_CHANGE_H32 \|\| context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	5251 if (context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	5252 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32;
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	5253 } else if (context->hslot < 233) {
500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	5254 return context->cycles + (VINT_SLOT_H32 + 256 - 233 + 148 - context->hslot) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5255 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	5256 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5257 }
995 2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see. Michael Pavone <pavone@retrodev.com> parents: 991 diff changeset	5258 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5259 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5260 } else {
1177 67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency Michael Pavone <pavone@retrodev.com> parents: 1175 diff changeset	5261 if (context->hslot >= LINE_CHANGE_MODE4) {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5262 return context->cycles + (VINT_SLOT_MODE4 + 256 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5263 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5264 if (context->hslot <= VINT_SLOT_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5265 return context->cycles + (VINT_SLOT_MODE4 - context->hslot) * MCLKS_SLOT_H32;
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5266 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5267 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5268 }
1169 82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182 Michael Pavone <pavone@retrodev.com> parents: 1168 diff changeset	5269 int32_t cycles_to_vint = vdp_cycles_to_line(context, vint_line);
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5270 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5271 if (context->regs[REG_MODE_4] & BIT_H40) {
1175 0e0386fa795c Fix H40 VInt inconsistency Michael Pavone <pavone@retrodev.com> parents: 1174 diff changeset	5272 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5273 } else {
1174 500d8deea802 Fix H32 VInt timing inconsistency Michael Pavone <pavone@retrodev.com> parents: 1173 diff changeset	5274 cycles_to_vint += (VINT_SLOT_H32 + 256 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5275 }
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	5276 } else {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5277 cycles_to_vint += (256 - LINE_CHANGE_MODE4 + VINT_SLOT_MODE4) * MCLKS_SLOT_H32;
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	5278 }
623 66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes Michael Pavone <pavone@retrodev.com> parents: 622 diff changeset	5279 return context->cycles + cycles_to_vint;
333 f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	5280 }
f16136a3835d Update Z80 vint timing Mike Pavone <pavone@retrodev.com> parents: 332 diff changeset	5281
1377 e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5282 uint32_t vdp_next_nmi(vdp_context *context)
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5283 {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5284 if (!(context->flags2 & FLAG2_PAUSE)) {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5285 return 0xFFFFFFFF;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5286 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5287 return context->cycles + vdp_cycles_to_line(context, 0x1FF);
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5288 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5289
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5290 void vdp_pbc_pause(vdp_context *context)
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5291 {
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5292 context->flags2 \|= FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5293 }
e587f16e7d3d Implemented SMS pause button Michael Pavone <pavone@retrodev.com> parents: 1371 diff changeset	5294
953 08346262990b Remove the int number argument to vdp_int_ack since it is no longer used Michael Pavone <pavone@retrodev.com> parents: 952 diff changeset	5295 void vdp_int_ack(vdp_context * context)
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5296 {
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5297 //CPU interrupt acknowledge is only used in Mode 5
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5298 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5299 //Apparently the VDP interrupt controller is not very smart
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5300 //Instead of paying attention to what interrupt is being acknowledged it just
1160 5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5301 //clears the pending flag for whatever interrupt it is currently asserted
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5302 //which may be different from the interrupt it was asserting when the 68k
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5303 //started the interrupt process. The window for this is narrow and depends
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5304 //on the latency between the int enable register write and the interrupt being
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5305 //asserted, but Fatal Rewind depends on this due to some buggy code
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5306 if ((context->flags2 & FLAG2_VINT_PENDING) && (context->regs[REG_MODE_2] & BIT_VINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5307 context->flags2 &= ~FLAG2_VINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5308 } else if((context->flags2 & FLAG2_HINT_PENDING) && (context->regs[REG_MODE_1] & BIT_HINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5309 context->flags2 &= ~FLAG2_HINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests Michael Pavone <pavone@retrodev.com> parents: 1157 diff changeset	5310 }
317 e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5311 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5312 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port. Mike Pavone <pavone@retrodev.com> parents: 291 diff changeset	5313
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	5314 #define VDP_STATE_VERSION 3
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5315 void vdp_serialize(vdp_context context, serialize_buffer buf)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5316 {
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5317 save_int8(buf, VDP_STATE_VERSION);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5318 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5319 save_buffer8(buf, context->vdpmem, VRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5320 save_buffer16(buf, context->cram, CRAM_SIZE);
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	5321 save_buffer16(buf, context->vsram, MAX_VSRAM_SIZE);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5322 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5323 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5324 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5325 save_int8(buf, context->regs[i]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5326 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5327 save_int32(buf, context->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5328 save_int32(buf, context->serial_address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5329 save_int8(buf, context->cd);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5330 uint8_t fifo_size;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5331 if (context->fifo_read < 0) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5332 fifo_size = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5333 } else if (context->fifo_write > context->fifo_read) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5334 fifo_size = context->fifo_write - context->fifo_read;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5335 } else {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5336 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5337 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5338 save_int8(buf, fifo_size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5339 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5340 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5341 fifo_entry *entry = context->fifo + cur;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5342 cur = (cur + 1) & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5343 save_int32(buf, entry->cycle);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5344 save_int32(buf, entry->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5345 save_int16(buf, entry->value);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5346 save_int8(buf, entry->cd);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5347 save_int8(buf, entry->partial);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5348 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5349 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5350 save_int16(buf, context->flags2 << 8 \| context->flags);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5351 save_int32(buf, context->frame);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5352 save_int16(buf, context->vcounter);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5353 save_int8(buf, context->hslot);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5354 save_int16(buf, context->hv_latch);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5355 save_int8(buf, context->state);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5356 save_int16(buf, context->hscroll_a);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5357 save_int16(buf, context->hscroll_b);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5358 save_int16(buf, context->vscroll_latch[0]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5359 save_int16(buf, context->vscroll_latch[1]);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5360 save_int16(buf, context->col_1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5361 save_int16(buf, context->col_2);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5362 save_int16(buf, context->test_port);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5363 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5364 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5365 save_int8(buf, context->buf_a_off);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5366 save_int8(buf, context->buf_b_off);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5367 //FIXME: Sprite rendering state is currently a mess
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5368 save_int8(buf, context->sprite_index);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5369 save_int8(buf, context->sprite_draws);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5370 save_int8(buf, context->slot_counter);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5371 save_int8(buf, context->cur_slot);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5372 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5373 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5374 sprite_draw *draw = context->sprite_draw_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5375 save_int16(buf, draw->address);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5376 save_int16(buf, draw->x_pos);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5377 save_int8(buf, draw->pal_priority);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5378 save_int8(buf, draw->h_flip);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5379 save_int8(buf, draw->width);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5380 save_int8(buf, draw->height);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5381 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5382 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5383 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5384 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5385 save_int8(buf, info->size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5386 save_int8(buf, info->index);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5387 save_int16(buf, info->y);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5388 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5389 save_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5390
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5391 save_int32(buf, context->cycles);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5392 save_int32(buf, context->pending_vint_start);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5393 save_int32(buf, context->pending_hint_start);
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	5394 save_int32(buf, context->address_latch);
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5395 //was cd_latch, for compatibility with older builds that expect it
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5396 save_int8(buf, context->cd);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5397 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5398
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5399 void vdp_deserialize(deserialize_buffer buf, void vcontext)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5400 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5401 vdp_context *context = vcontext;
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5402 uint8_t version = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5403 uint8_t vramk;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5404 if (version == 64) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5405 vramk = version;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5406 version = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5407 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5408 vramk = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5409 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5410 if (version > VDP_STATE_VERSION) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5411 warning("Save state has VDP version %d, but this build only understands versions %d and lower", version, VDP_STATE_VERSION);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5412 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5413 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5414 if ((vramk * 1024) > VRAM_SIZE) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5415 buf->cur_pos += (vramk * 1024) - VRAM_SIZE;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5416 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5417 load_buffer16(buf, context->cram, CRAM_SIZE);
1431 030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	5418 for (int i = 0; i < CRAM_SIZE; i++)
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	5419 {
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	5420 update_color_map(context, i, context->cram[i]);
030b40139de9 Update VDP color map when loading a native save state Michael Pavone <pavone@retrodev.com> parents: 1428 diff changeset	5421 }
1906 2d462aa78349 Make VDP VSRAM capacity respect model selection Michael Pavone <pavone@retrodev.com> parents: 1899 diff changeset	5422 load_buffer16(buf, context->vsram, version > 1 ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE);
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5423 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5424 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5425 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5426 context->regs[i] = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5427 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5428 context->address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5429 context->serial_address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5430 context->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5431 uint8_t fifo_size = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5432 if (fifo_size > FIFO_SIZE) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5433 fatal_error("Invalid fifo size %d", fifo_size);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5434 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5435 if (fifo_size) {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5436 context->fifo_read = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5437 context->fifo_write = fifo_size & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5438 for (int i = 0; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5439 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5440 fifo_entry *entry = context->fifo + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5441 entry->cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5442 entry->address = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5443 entry->value = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5444 entry->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5445 entry->partial = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5446 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5447 } else {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5448 context->fifo_read = -1;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5449 context->fifo_write = 0;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5450 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5451 uint16_t flags = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5452 context->flags2 = flags >> 8;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5453 context->flags = flags;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5454 context->frame = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5455 context->vcounter = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5456 context->hslot = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5457 context->hv_latch = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5458 context->state = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5459 context->hscroll_a = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5460 context->hscroll_b = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5461 context->vscroll_latch[0] = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5462 context->vscroll_latch[1] = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5463 context->col_1 = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5464 context->col_2 = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5465 context->test_port = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5466 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5467 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5468 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5469 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5470 context->sprite_index = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5471 context->sprite_draws = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5472 context->slot_counter = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5473 context->cur_slot = load_int8(buf);
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5474 if (version == 0) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5475 int cur_draw = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5476 for (int i = 0; i < MAX_SPRITES_LINE * 2; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5477 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5478 if (cur_draw < MAX_SPRITES_LINE) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5479 sprite_draw *last = cur_draw ? context->sprite_draw_list + cur_draw - 1 : NULL;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5480 sprite_draw *draw = context->sprite_draw_list + cur_draw++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5481 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5482 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5483 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5484 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5485 draw->width = 1;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5486 draw->height = 8;
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5487
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5488 if (last && last->width < 4 && last->h_flip == draw->h_flip && last->pal_priority == draw->pal_priority) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5489 int adjust_x = draw->x_pos + draw->h_flip ? -8 : 8;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5490 int height = draw->address - last->address /4;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5491 if (last->x_pos == adjust_x && (
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5492 (last->width > 1 && height == last->height) \|\|
1866 84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5493 (last->width == 1 && (height == 8 \|\| height == 16 \|\| height == 24 \|\| height == 32))
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5494 )) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5495 //current draw appears to be part of the same sprite as the last one, combine it
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5496 cur_draw--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5497 last->width++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5498 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5499 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5500 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5501 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5502 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5503 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5504 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5505 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5506 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5507 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5508 for (int i = 0; i < MAX_SPRITES_LINE; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5509 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5510 sprite_draw *draw = context->sprite_draw_list + i;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5511 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5512 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5513 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5514 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5515 draw->width = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5516 draw->height = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd Michael Pavone <pavone@retrodev.com> parents: 1834 diff changeset	5517 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5518 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5519 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5520 {
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5521 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5522 info->size = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5523 info->index = load_int8(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5524 info->y = load_int16(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5525 }
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5526 load_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5527
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5528 context->cycles = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5529 context->pending_vint_start = load_int32(buf);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5530 context->pending_hint_start = load_int32(buf);
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	5531 if (version > 2) {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	5532 context->address_latch = load_int32(buf);
2223 1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5533 //was cd_latch, no longer used
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST Michael Pavone <pavone@retrodev.com> parents: 2205 diff changeset	5534 load_int8(buf);
1925 039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	5535 } else {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	5536 context->address_latch = context->address;
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes Michael Pavone <pavone@retrodev.com> parents: 1917 diff changeset	5537 }
1427 4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5538 update_video_params(context);
4e5797b3935a WIP - New savestate format Michael Pavone <pavone@retrodev.com> parents: 1422 diff changeset	5539 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5540
1649 b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5541 static vdp_context *current_vdp;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5542 static void vdp_debug_window_close(uint8_t which)
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5543 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5544 //TODO: remove need for current_vdp global, and find the VDP via current_system instead
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5545 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
1649 b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5546 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5547 if (current_vdp->enabled_debuggers & (1 << i) && which == current_vdp->debug_fb_indices[i]) {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5548 vdp_toggle_debug_view(current_vdp, i);
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5549 break;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5550 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5551 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5552 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5553
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5554 void vdp_toggle_debug_view(vdp_context *context, uint8_t debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5555 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5556 if (context->enabled_debuggers & 1 << debug_type) {
1642 c6b2c0f8cc61 Implemented support for toggling off a debug view Michael Pavone <pavone@retrodev.com> parents: 1641 diff changeset	5557 render_destroy_window(context->debug_fb_indices[debug_type]);
c6b2c0f8cc61 Implemented support for toggling off a debug view Michael Pavone <pavone@retrodev.com> parents: 1641 diff changeset	5558 context->enabled_debuggers &= ~(1 << debug_type);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5559 } else {
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	5560 uint32_t width,height;
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	5561 uint8_t fetch_immediately = 0;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5562 char *caption;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5563 switch(debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5564 {
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5565 case DEBUG_PLANE:
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5566 caption = "BlastEm - VDP Plane Debugger";
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	5567 width = height = 1024;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	5568 break;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5569 case DEBUG_VRAM:
1634 e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	5570 caption = "BlastEm - VDP VRAM Debugger";
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	5571 width = 1024;
e397766c3028 Added VRAM debug window Michael Pavone <pavone@retrodev.com> parents: 1632 diff changeset	5572 height = 512;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5573 break;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5574 case DEBUG_CRAM:
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	5575 caption = "BlastEm - VDP CRAM Debugger";
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	5576 width = 512;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	5577 height = 512;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	5578 fetch_immediately = 1;
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	5579 break;
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5580 case DEBUG_COMPOSITE:
1641 bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	5581 caption = "BlastEm - VDP Plane Composition Debugger";
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	5582 width = LINEBUF_SIZE;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	5583 height = context->inactive_start + context->border_top + context->border_bot;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	5584 fetch_immediately = 1;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window Michael Pavone <pavone@retrodev.com> parents: 1640 diff changeset	5585 break;
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5586 default:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5587 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5588 }
1649 b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5589 current_vdp = context;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar Michael Pavone <pavone@retrodev.com> parents: 1644 diff changeset	5590 context->debug_fb_indices[debug_type] = render_create_window(caption, width, height, vdp_debug_window_close);
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5591 if (context->debug_fb_indices[debug_type]) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5592 context->enabled_debuggers \|= 1 << debug_type;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5593 }
1638 f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	5594 if (fetch_immediately) {
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	5595 context->debug_fbs[debug_type] = render_get_framebuffer(context->debug_fb_indices[debug_type], &context->debug_fb_pitch[debug_type]);
f27142c48567 Initial stab at CRAM debug in a detached window Michael Pavone <pavone@retrodev.com> parents: 1637 diff changeset	5596 }
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5597 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5598 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5599
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5600 void vdp_inc_debug_mode(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5601 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5602 uint8_t active = render_get_active_framebuffer();
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5603 if (active < FRAMEBUFFER_USER_START) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5604 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5605 }
2243 0d1d5dccdd28 Initial implementation of oscilloscope debug view Michael Pavone <pavone@retrodev.com> parents: 2236 diff changeset	5606 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
1631 c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5607 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5608 if (context->enabled_debuggers & (1 << i) && context->debug_fb_indices[i] == active) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5609 context->debug_modes[i]++;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5610 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5611 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5612 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally Michael Pavone <pavone@retrodev.com> parents: 1629 diff changeset	5613 }
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5614
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5615 void vdp_replay_event(vdp_context context, uint8_t event, event_reader reader)
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5616 {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5617 uint32_t address;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5618 deserialize_buffer *buffer = &reader->buffer;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5619 switch (event)
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5620 {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5621 case EVENT_VRAM_BYTE:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	5622 reader_ensure_data(reader, 3);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5623 address = load_int16(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5624 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5625 case EVENT_VRAM_BYTE_DELTA:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	5626 reader_ensure_data(reader, 2);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5627 address = reader->last_byte_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5628 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5629 case EVENT_VRAM_BYTE_ONE:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	5630 reader_ensure_data(reader, 1);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5631 address = reader->last_byte_address + 1;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5632 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5633 case EVENT_VRAM_BYTE_AUTO:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	5634 reader_ensure_data(reader, 1);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5635 address = reader->last_byte_address + context->regs[REG_AUTOINC];
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5636 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5637 case EVENT_VRAM_WORD:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	5638 reader_ensure_data(reader, 4);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5639 address = load_int8(buffer) << 16;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5640 address \|= load_int16(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5641 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5642 case EVENT_VRAM_WORD_DELTA:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	5643 reader_ensure_data(reader, 3);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5644 address = reader->last_word_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5645 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5646 case EVENT_VDP_REG:
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	5647 case EVENT_VDP_INTRAM:
1957 ba06346611a1 Fix some netplay issues Mike Pavone <pavone@retrodev.com> parents: 1956 diff changeset	5648 reader_ensure_data(reader, event == EVENT_VDP_REG ? 2 : 3);
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5649 address = load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5650 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5651 }
2118 c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching Michael Pavone <pavone@retrodev.com> parents: 2040 diff changeset	5652
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5653 switch (event)
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5654 {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5655 case EVENT_VDP_REG: {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5656 uint8_t value = load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5657 context->regs[address] = value;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5658 if (address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5659 context->double_res = (value & (BIT_INTERLACE \| BIT_DOUBLE_RES)) == (BIT_INTERLACE \| BIT_DOUBLE_RES);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5660 if (!context->double_res) {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5661 context->flags2 &= ~FLAG2_EVEN_FIELD;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5662 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5663 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5664 if (address == REG_MODE_1 \|\| address == REG_MODE_2 \|\| address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5665 update_video_params(context);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5666 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5667 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5668 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5669 case EVENT_VRAM_BYTE:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5670 case EVENT_VRAM_BYTE_DELTA:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5671 case EVENT_VRAM_BYTE_ONE:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5672 case EVENT_VRAM_BYTE_AUTO: {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5673 uint8_t byte = load_int8(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5674 reader->last_byte_address = address;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5675 vdp_check_update_sat_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5676 write_vram_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5677 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5678 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5679 case EVENT_VRAM_WORD:
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5680 case EVENT_VRAM_WORD_DELTA: {
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5681 uint16_t value = load_int16(buffer);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5682 reader->last_word_address = address;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5683 vdp_check_update_sat(context, address, value);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5684 write_vram_word(context, address, value);
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5685 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5686 }
1956 275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	5687 case EVENT_VDP_INTRAM:
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	5688 if (address < 128) {
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	5689 write_cram(context, address, load_int16(buffer));
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	5690 } else {
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	5691 context->vsram[address&63] = load_int16(buffer);
275f1c4bdb25 Netplay protocol size optimization Michael Pavone <pavone@retrodev.com> parents: 1946 diff changeset	5692 }
1946 c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5693 break;
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5694 }
c3c62dbf1ceb WIP netplay support Michael Pavone <pavone@retrodev.com> parents: 1929 diff changeset	5695 }

Mercurial > repos > blastem

annotate vdp.c @ 2507:aa888682faa0