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Fix minor regression in Overdrive 2
author Michael Pavone <pavone@retrodev.com>
date Tue, 28 Jan 2025 23:33:43 -0800
parents e5de445e2cf0
children 882ceef923e0
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*
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2 Copyright 2013 Michael Pavone
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3 This file is part of BlastEm.
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
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5 */
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6 #include "vdp.h"
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7 #include "blastem.h"
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8 #include <stdlib.h>
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9 #include <string.h>
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10 #include "render.h"
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11 #include "util.h"
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12 #include "event_log.h"
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13 #include "terminal.h"
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14
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15 #define NTSC_INACTIVE_START 224
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16 #define PAL_INACTIVE_START 240
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17 #define MODE4_INACTIVE_START 192
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18 #define BUF_BIT_PRIORITY 0x40
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19 #define MAP_BIT_PRIORITY 0x8000
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20 #define MAP_BIT_H_FLIP 0x800
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21 #define MAP_BIT_V_FLIP 0x1000
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22
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
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23 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1)
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24 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2)
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3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
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25
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26 #define MCLKS_SLOT_H40 16
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27 #define MCLKS_SLOT_H32 20
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28 #define VINT_SLOT_H40 0 //21 slots before HSYNC, 16 during, 10 after
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29 #define VINT_SLOT_H32 0 //old value was 23, but recent tests suggest the actual value is close to the H40 one
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30 #define VINT_SLOT_MODE4 4
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31 #define HSYNC_SLOT_H40 230
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32 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17)
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33 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results
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34 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results
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35 #define HBLANK_START_H32 233 //should be 147 according to Nemesis which is very different from my test ROM result
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36 #define HBLANK_END_H32 0 //should be 5 according to Nemesis, but 0 seems to fit better with my test ROM results
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37 #define LINE_CHANGE_H40 165
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38 #define LINE_CHANGE_H32 133
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39 #define LINE_CHANGE_MODE4 248
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40 #define VBLANK_START_H40 (LINE_CHANGE_H40+2)
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41 #define VBLANK_START_H32 (LINE_CHANGE_H32+2)
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42 #define FIFO_LATENCY 3
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43 #define READ_LATENCY 3
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44
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45 #define BORDER_TOP_V24 27
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46 #define BORDER_TOP_V28 11
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47 #define BORDER_TOP_V24_PAL 54
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48 #define BORDER_TOP_V28_PAL 38
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49 #define BORDER_TOP_V30_PAL 30
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50
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51 #define BORDER_BOT_V24 24
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52 #define BORDER_BOT_V28 8
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53 #define BORDER_BOT_V24_PAL 48
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54 #define BORDER_BOT_V28_PAL 32
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55 #define BORDER_BOT_V30_PAL 24
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56
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57 enum {
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58 INACTIVE = 0,
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59 PREPARING, //used for line 0x1FF
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60 ACTIVE
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61 };
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62
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63 uint16_t mode4_address_map[0x4000];
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64 static uint32_t planar_to_chunky[256];
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65 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255};
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66
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67 static uint8_t debug_base[][3] = {
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68 {127, 127, 127}, //BG
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69 {0, 0, 127}, //A
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70 {127, 0, 0}, //Window
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71 {0, 127, 0}, //B
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72 {127, 0, 127} //Sprites
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73 };
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74
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75 static uint32_t calc_crop(uint32_t crop, uint32_t border)
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76 {
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77 return crop >= border ? 0 : border - crop;
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78 }
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79
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80 static void update_video_params(vdp_context *context)
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81 {
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82 uint32_t top_crop = render_overscan_top();
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83 uint32_t bot_crop = render_overscan_bot();
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84 uint32_t border_top;
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85 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
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86 if (context->regs[REG_MODE_2] & BIT_PAL) {
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87 if (context->flags2 & FLAG2_REGION_PAL) {
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88 context->inactive_start = PAL_INACTIVE_START;
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89 border_top = BORDER_TOP_V30_PAL;
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90 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V30_PAL);
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91 } else {
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92 //the behavior here is rather weird and needs more investigation
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93 context->inactive_start = 0xF0;
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94 border_top = 1;
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95 context->border_bot = calc_crop(bot_crop, 3);
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96 }
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97 } else {
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98 context->inactive_start = NTSC_INACTIVE_START;
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99 if (context->flags2 & FLAG2_REGION_PAL) {
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100 border_top = BORDER_TOP_V28_PAL;
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101 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28_PAL);
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102 } else {
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103 border_top = BORDER_TOP_V28;
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104 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28);
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105 }
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106 }
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107 if (context->regs[REG_MODE_4] & BIT_H40) {
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108 context->max_sprites_frame = MAX_SPRITES_FRAME;
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109 context->max_sprites_line = MAX_SPRITES_LINE;
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110 } else {
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diff changeset
111 context->max_sprites_frame = MAX_SPRITES_FRAME_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
112 context->max_sprites_line = MAX_SPRITES_LINE_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
113 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
114 if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
115 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
116 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
117 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
118 } else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
119 context->state = PREPARING;
2567
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
120 if (!context->done_composite) {
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
121 memset(context->compositebuf, 0, sizeof(context->compositebuf));
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
122 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
123 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
124 }
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
125 } else {
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
126 context->inactive_start = MODE4_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
127 if (context->flags2 & FLAG2_REGION_PAL) {
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
128 border_top = BORDER_TOP_V24_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
129 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24_PAL);
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
130 } else {
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
131 border_top = BORDER_TOP_V24;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
132 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24);
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
133 }
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
134 if (!(context->regs[REG_MODE_1] & BIT_MODE_4) && context->type == VDP_GENESIS){
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
135 context->state = INACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
136 } else if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
137 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
138 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
139 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
140 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
141 else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
142 context->state = PREPARING;
2567
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
143 if (!context->done_composite) {
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
144 memset(context->compositebuf, 0, sizeof(context->compositebuf));
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
145 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
146 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
147 }
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
148 }
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
149 context->border_top = calc_crop(top_crop, border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
150 context->top_offset = border_top - context->border_top;
2385
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state
Michael Pavone <pavone@retrodev.com>
parents: 2381
diff changeset
151 context->double_res = (context->regs[REG_MODE_4] & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES);
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state
Michael Pavone <pavone@retrodev.com>
parents: 2381
diff changeset
152 if (!context->double_res) {
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state
Michael Pavone <pavone@retrodev.com>
parents: 2381
diff changeset
153 context->flags2 &= ~FLAG2_EVEN_FIELD;
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state
Michael Pavone <pavone@retrodev.com>
parents: 2381
diff changeset
154 }
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
155 }
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
156
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
157 static uint8_t static_table_init_done;
426
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
158
2194
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
159 vdp_context *init_vdp_context(uint8_t region_pal, uint8_t has_max_vsram, uint8_t type)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
160 {
1640
3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers
Michael Pavone <pavone@retrodev.com>
parents: 1639
diff changeset
161 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE);
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 503
diff changeset
162 if (headless) {
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
163 context->fb = malloc(512 * LINEBUF_SIZE * sizeof(uint32_t));
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
164 context->output_pitch = LINEBUF_SIZE * sizeof(uint32_t);
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 503
diff changeset
165 } else {
1436
40c3be9f1af7 Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents: 1432
diff changeset
166 context->cur_buffer = FRAMEBUFFER_ODD;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
167 context->fb = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch);
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 503
diff changeset
168 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
169 context->sprite_draws = MAX_SPRITES_LINE;
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
170 context->fifo_write = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
171 context->fifo_read = -1;
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
172 context->regs[REG_HINT] = context->hint_counter = 0xFF;
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
173 context->vsram_size = has_max_vsram ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE;
2194
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
174 context->type = type;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
175 uint8_t b,g,r,index;
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
176 for (uint16_t color = 0; color < (1 << 12); color++) {
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
177 if (type == VDP_GAMEGEAR) {
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
178 b = (color >> 8 & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
179 g = (color >> 4 & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
180 r = (color & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
181 } else {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
182 switch (color & FBUF_MASK)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
183 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
184 case FBUF_SHADOW:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
185 b = levels[(color >> 9) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
186 g = levels[(color >> 5) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
187 r = levels[(color >> 1) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
188 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
189 case FBUF_HILIGHT:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
190 b = levels[((color >> 9) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
191 g = levels[((color >> 5) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
192 r = levels[((color >> 1) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
193 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
194 case FBUF_MODE4:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
195 //TODO: Mode 4 has a separate DAC tap so this isn't quite correct
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
196 //TODO: blue channel has one of its taps offest on SMS1 and MD
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
197 b = levels[(color >> 4 & 0xC) | (color >> 6 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
198 g = levels[(color >> 2 & 0x8) | (color >> 1 & 0x4) | (color >> 4 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
199 r = levels[(color << 1 & 0xC) | (color >> 1 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
200 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
201 case FBUF_TMS:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
202 index = color >> 1 & 0x7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
203 index |= color >> 2 & 0x8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
204 if (type == VDP_TMS9918A) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
205 switch (index)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
206 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
207 case 0:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
208 case 1:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
209 r = g = b = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
210 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
211 case 2:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
212 r = 0x21; g = 0xC8; b = 0x42;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
213 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
214 case 3:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
215 r = 0x5E; g = 0xDC; b = 0x78;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
216 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
217 case 4:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
218 r = 0x54; g = 0x55; b = 0xED;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
219 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
220 case 5:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
221 r = 0x7D; g = 0x76; b = 0xFC;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
222 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
223 case 6:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
224 r = 0xD4; g = 0x52; b = 0x4D;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
225 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
226 case 7:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
227 r = 0x42; g = 0xEB; b = 0xF5;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
228 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
229 case 8:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
230 r = 0xFC; g = 0x55; b = 0x54;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
231 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
232 case 9:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
233 r = 0xFF; g = 0x79; b = 0x78;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
234 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
235 case 10:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
236 r = 0xD4; g = 0xC1; b = 0x54;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
237 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
238 case 11:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
239 r = 0xE6; g = 0xCE; b = 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
240 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
241 case 12:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
242 r = 0x21; g = 0xB0; b = 0x3B;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
243 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
244 case 13:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
245 r = 0xC9; g = 0x5B; b = 0xBA;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
246 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
247 case 14:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
248 r = g = b = 0xCC;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
249 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
250 case 15:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
251 r = g = b = 0xFF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
252 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
253 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
254 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
255 static const uint8_t tms_to_sms[] = {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
256 0x00, 0x00, 0x08, 0x0C, 0x10, 0x30, 0x01, 0x3C, 0x02, 0x03, 0x05, 0x0F, 0x04, 0x33, 0x15, 0x3F
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
257 };
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
258 index = tms_to_sms[index] << 1;
2258
a28e1042f4de Fix a few of the most glaring TMS9918A issues
Michael Pavone <pavone@retrodev.com>
parents: 2257
diff changeset
259 index = (index & 0xE) | (index << 1 & 0xE0);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
260 //TODO: Mode 4 has a separate DAC tap so this isn't quite correct
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
261 //TODO: blue channel has one of its taps offest on SMS1 and MD
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
262 b = levels[(index >> 4 & 0xC) | (index >> 6 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
263 g = levels[(index >> 2 & 0x8) | (index >> 1 & 0x4) | (index >> 4 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
264 r = levels[(index << 1 & 0xC) | (index >> 1 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
265 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
266 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
267 default:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
268 b = levels[(color >> 8) & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
269 g = levels[(color >> 4) & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
270 r = levels[color & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
271 }
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
272 }
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
273 context->color_map[color] = render_map_color(r, g, b);
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
274 }
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 503
diff changeset
275
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
276 if (!static_table_init_done) {
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
277
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
278 for (uint16_t mode4_addr = 0; mode4_addr < 0x4000; mode4_addr++)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
279 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
280 uint16_t mode5_addr = mode4_addr & 0x3DFD;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
281 mode5_addr |= mode4_addr << 8 & 0x200;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
282 mode5_addr |= mode4_addr >> 8 & 2;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
283 mode4_address_map[mode4_addr] = mode5_addr;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
284 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
285 for (uint32_t planar = 0; planar < 256; planar++)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
286 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
287 uint32_t chunky = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
288 for (int bit = 7; bit >= 0; bit--)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
289 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
290 chunky = chunky << 4;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
291 chunky |= planar >> bit & 1;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
292 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
293 planar_to_chunky[planar] = chunky;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
294 }
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
295 static_table_init_done = 1;
426
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
296 }
437
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
297 for (uint8_t color = 0; color < (1 << (3 + 1 + 1 + 1)); color++)
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
298 {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
299 uint8_t src = color & DBG_SRC_MASK;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
300 if (src > DBG_SRC_S) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
301 context->debugcolors[color] = 0;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
302 } else {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
303 uint8_t r,g,b;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
304 b = debug_base[src][0];
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
305 g = debug_base[src][1];
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
306 r = debug_base[src][2];
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
307 if (color & DBG_PRIORITY)
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
308 {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
309 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
310 b += 48;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
311 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
312 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
313 g += 48;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
314 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
315 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
316 r += 48;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
317 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
318 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
319 if (color & DBG_SHADOW) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
320 b /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
321 g /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
322 r /=2 ;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
323 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
324 if (color & DBG_HILIGHT) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
325 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
326 b += 72;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
327 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
328 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
329 g += 72;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
330 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
331 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
332 r += 72;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
333 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
334 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
335 context->debugcolors[color] = render_map_color(r, g, b);
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
336 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
337 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
338 if (region_pal) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
339 context->flags2 |= FLAG2_REGION_PAL;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
340 }
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
341 update_video_params(context);
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
342 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * context->border_top);
1640
3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers
Michael Pavone <pavone@retrodev.com>
parents: 1639
diff changeset
343 return context;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
344 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
345
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
346 void vdp_free(vdp_context *context)
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
347 {
2030
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
348 if (headless) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
349 free(context->fb);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
350 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
351 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
2030
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
352 {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
353 if (context->enabled_debuggers & (1 << i)) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
354 vdp_toggle_debug_view(context, i);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
355 }
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
356 }
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
357 free(context);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
358 }
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
359
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
360 static int is_refresh(vdp_context * context, uint32_t slot)
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
361 {
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
362 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
363 return slot == 250 || slot == 26 || slot == 59 || slot == 90 || slot == 122 || slot == 154;
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
364 } else {
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
365 //TODO: Figure out which slots are refresh when display is off in 32-cell mode
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
366 //These numbers are guesses based on H40 numbers
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
367 return slot == 243 || slot == 19 || slot == 51 || slot == 83 || slot == 115;
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
368 //The numbers below are the refresh slots during active display
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
369 //return (slot == 29 || slot == 61 || slot == 93 || slot == 125);
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
370 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
371 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
372
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
373 static void increment_address(vdp_context *context)
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
374 {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
375 context->address += context->regs[REG_AUTOINC];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
376 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
377 context->address++;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
378 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
379 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
380
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
381 static void render_sprite_cells(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
382 {
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
383 if (context->cur_slot < 0) {
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
384 //should this be 16 in H32?
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
385 context->cur_slot += 32;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
386 }
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
387 if (context->cur_slot >= MAX_SPRITES_LINE) {
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
388 context->cur_slot--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
389 return;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
390 }
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
391 sprite_draw * d = context->sprite_draw_list + context->cur_slot;
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
392 uint16_t address = d->address;
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
393 address += context->sprite_x_offset * d->height * 4;
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
394 context->serial_address = address;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
395 if (d->x_pos) {
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
396 uint16_t dir;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
397 int16_t x;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
398 if (d->h_flip) {
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
399 x = d->x_pos + 7 + 8 * (d->width - context->sprite_x_offset - 1);
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
400 dir = -1;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
401 } else {
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
402 x = d->x_pos + context->sprite_x_offset * 8;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
403 dir = 1;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
404 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
405 context->flags |= FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
406 if (!(context->flags & FLAG_MASKED)) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
407 x -= 128;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
408 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x);
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
409 uint8_t collide = 0;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
410 if (x >= 8 && x < 312) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
411 //sprite is fully visible
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
412 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
413 uint8_t pixel = context->vdpmem[address] >> 4;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
414 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
415 context->linebuf[x] = pixel | d->pal_priority;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
416 } else {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
417 collide |= pixel;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
418 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
419 x += dir;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
420 pixel = context->vdpmem[address] & 0xF;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
421 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
422 context->linebuf[x] = pixel | d->pal_priority;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
423 } else {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
424 collide |= pixel;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
425 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
426 x += dir;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
427 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
428 } else if (x > -8 && x < 327) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
429 //sprite is partially visible
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
430 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
431 if (x >= 0 && x < 320) {
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
432 uint8_t pixel = context->vdpmem[address] >> 4;
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
433 if (!(context->linebuf[x] & 0xF)) {
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
434 context->linebuf[x] = pixel | d->pal_priority;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
435 } else {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
436 collide |= pixel;
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
437 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
438 }
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
439 x += dir;
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
440 if (x >= 0 && x < 320) {
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
441 uint8_t pixel = context->vdpmem[address] & 0xF;
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
442 if (!(context->linebuf[x] & 0xF)) {
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
443 context->linebuf[x] = pixel | d->pal_priority;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
444 } else {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
445 collide |= pixel;
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
446 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
447 }
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
448 x += dir;
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
449 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
450 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
451 if (collide) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
452 context->flags2 |= FLAG2_SPRITE_COLLIDE;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
453 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
454 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
455 } else if (context->flags & FLAG_CAN_MASK) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
456 context->flags |= FLAG_MASKED;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
457 context->flags &= ~FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
458 }
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
459
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
460 context->sprite_x_offset++;
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
461 if (context->sprite_x_offset == d->width) {
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
462 d->x_pos = 0;
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
463 context->sprite_x_offset = 0;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
464 context->cur_slot--;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
465 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
466 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
467
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
468 static void fetch_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
469 {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
470 if (context->sprite_index >= context->sprite_draws) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
471 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
472 uint32_t address = mode4_address_map[d->address & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
473 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
474 context->fetch_tmp[1] = context->vdpmem[address + 1];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
475 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
476 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
477
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
478 static void render_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
479 {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
480 if (context->sprite_index >= context->sprite_draws) {
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
481 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
482 if (context->type == VDP_SMS && context->sprite_index < 4) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
483 zoom = 0;
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
484 }
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
485 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
486 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
487 pixels |= planar_to_chunky[context->fetch_tmp[1]];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
488 uint32_t address = mode4_address_map[(d->address + 2) & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
489 pixels |= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
490 pixels |= planar_to_chunky[context->vdpmem[address + 1]] << 2;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
491 int x = d->x_pos & 0xFF;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
492 for (int i = 28; i >= 0; i -= 4, x++)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
493 {
2503
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
494 uint8_t pixel = pixels >> i & 0xF;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
495 if (pixel) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
496 if (!context->linebuf[x]) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
497 context->linebuf[x] = pixel;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
498 } else if(
1155
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
499 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
500 || ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
501 ) {
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
502 context->flags2 |= FLAG2_SPRITE_COLLIDE;
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
503 }
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
504 }
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
505 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
506 x++;
2503
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
507 if (pixel) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
508 if (!context->linebuf[x]) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
509 context->linebuf[x] = pixel;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
510 } else if(
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
511 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
512 || ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
513 ) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
514 context->flags2 |= FLAG2_SPRITE_COLLIDE;
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
515 }
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
516 }
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
517 }
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
518 }
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
519 context->sprite_index--;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
520 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
521 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
522
1320
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
523 static uint32_t mode5_sat_address(vdp_context *context)
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
524 {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
525 uint32_t addr = context->regs[REG_SAT] << 9;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
526 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
527 addr &= 0xFFFF;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
528 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
529 if (context->regs[REG_MODE_4] & BIT_H40) {
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
530 addr &= 0x1FC00;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
531 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
532 return addr;
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
533 }
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
534
322
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 318
diff changeset
535 void vdp_print_sprite_table(vdp_context * context)
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 318
diff changeset
536 {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
537 if (context->type == VDP_GENESIS && context->regs[REG_MODE_2] & BIT_MODE_5) {
1320
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
538 uint16_t sat_address = mode5_sat_address(context);
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
539 uint16_t current_index = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
540 uint8_t count = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
541 do {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
542 uint16_t address = current_index * 8 + sat_address;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
543 uint16_t cache_address = current_index * 4;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
544 uint8_t height = ((context->sat_cache[cache_address+2] & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
545 uint8_t width = (((context->sat_cache[cache_address+2] >> 2) & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
546 int16_t y = ((context->sat_cache[cache_address] & 0x3) << 8 | context->sat_cache[cache_address+1]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
547 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 | context->vdpmem[address + 7]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
548 uint16_t link = context->sat_cache[cache_address+3] & 0x7F;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
549 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
550 uint8_t pri = context->vdpmem[address + 4] >> 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
551 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
552 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
553 current_index = link;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
554 count++;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
555 } while (current_index != 0 && count < 80);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
556 } else if (context->type != VDP_TMS9918A && context->regs[REG_MODE_1] & BIT_MODE_4) {
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
557 uint16_t sat_address = (context->regs[REG_SAT] & 0x7E) << 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
558 for (int i = 0; i < 64; i++)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
559 {
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
560 uint8_t y = context->vdpmem[mode4_address_map[sat_address + (i ^ 1)]];
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
561 if (y == 0xD0) {
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
562 break;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
563 }
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
564 uint8_t x = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2 + 1]];
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
565 uint16_t tile_address = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2]] * 32
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
566 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
567 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
568 tile_address &= ~32;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
569 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
570 printf("Sprite %d: X=%d, Y=%d, Pat=%X\n", i, x, y, tile_address);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
571 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
572 } else if (context->type != VDP_GENESIS) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
573 uint16_t sat_address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
574 for (int i = 0; i < 32; i++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
575 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
576 uint16_t address = i << 2 | sat_address;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
577 int16_t y = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
578 if (y == 208) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
579 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
580 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
581 if (y > 192) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
582 y -= 256;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
583 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
584 int16_t x = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
585 uint8_t name = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
586 uint8_t tag = context->vdpmem[mode4_address_map[address] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
587 if (tag & 0x80) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
588 x -= 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
589 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
590 tag &= 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
591 printf("Sprite %d: X=%d, Y=%d, Pat=%X, Color=%X\n", i, x, y, name, tag);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
592 }
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
593 }
322
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 318
diff changeset
594 }
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 318
diff changeset
595
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
596 #define VRAM_READ 0 //0000
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
597 #define VRAM_WRITE 1 //0001
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
598 //2 would trigger register write 0010
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
599 #define CRAM_WRITE 3 //0011
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
600 #define VSRAM_READ 4 //0100
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
601 #define VSRAM_WRITE 5//0101
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
602 //6 would trigger regsiter write 0110
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
603 //7 is a mystery //0111
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
604 #define CRAM_READ 8 //1000
2334
57ebbc1ade30 Fix regression in mega-color image demos
Michael Pavone <pavone@retrodev.com>
parents: 2283
diff changeset
605 //writes go nowhere, acts 8-bit wide like VRAM //1001
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
606 //A would trigger register write 1010
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
607 //B is a mystery 1011
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
608 #define VRAM_READ8 0xC //1100
2334
57ebbc1ade30 Fix regression in mega-color image demos
Michael Pavone <pavone@retrodev.com>
parents: 2283
diff changeset
609 //writes go nowhere, acts 16-bit wide like VSRAM/CRAM 1101
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
610 //E would trigger register write 1110
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
611 //F is a mystery 1111
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
612
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
613 //Possible theory on how bits work
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
614 //CD0 = Read/Write flag
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
615 //CD2,(CD1|CD3) = RAM type
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
616 // 00 = VRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
617 // 01 = CRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
618 // 10 = VSRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
619 // 11 = VRAM8
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
620 //Would result in
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
621 // 7 = VRAM8 write
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
622 // 9 = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
623 // B = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
624 // D = VRAM8 write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
625 // F = VRAM8 write alais
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
626
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
627 #define DMA_START 0x20
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
628
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
629 static const char * cd_name(uint8_t cd)
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
630 {
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
631 switch (cd & 0xF)
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
632 {
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
633 case VRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
634 return "VRAM read";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
635 case VRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
636 return "VRAM write";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
637 case CRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
638 return "CRAM write";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
639 case VSRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
640 return "VSRAM read";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
641 case VSRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
642 return "VSRAM write";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
643 case VRAM_READ8:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
644 return "VRAM read (undocumented 8-bit mode)";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
645 default:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
646 return "invalid";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
647 }
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
648 }
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
649
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
650 void vdp_print_reg_explain(vdp_context * context)
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
651 {
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
652 char * hscroll[] = {"full", "7-line", "cell", "line"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
653 printf("**Mode Group**\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
654 "00: %.2X | H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n"
1331
9bba5ff5beb8 Add 128K VRAM bit to VDP register print in debugger
Michael Pavone <pavone@retrodev.com>
parents: 1325
diff changeset
655 "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d, %dK VRAM\n"
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
656 "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
657 "0C: %.2X | Width: %d, Shadow/Highlight: %s\n",
757
483f7e7926a6 More clang warning cleanup
Michael Pavone <pavone@retrodev.com>
parents: 748
diff changeset
658 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0,
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
659 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled",
450
3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents: 438
diff changeset
660 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled",
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
661 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, context->regs[REG_MODE_1] & BIT_128K_VRAM ? 128 : 64,
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
662 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full",
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
663 hscroll[context->regs[REG_MODE_3] & 0x3],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
664 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled");
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
665 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
666 printf("\n**Table Group**\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
667 "02: %.2X | Scroll A Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
668 "03: %.2X | Window Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
669 "04: %.2X | Scroll B Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
670 "05: %.2X | Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
671 "0D: %.2X | HScroll Data Table: $%.4X\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
672 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
673 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
674 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13,
1320
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
675 context->regs[REG_SAT], mode5_sat_address(context),
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
676 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
677 } else {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
678 printf("\n**Table Group**\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
679 "02: %.2X | Background Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
680 "05: %.2X | Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
681 "06: %.2X | Sprite Tile Base: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
682 "08: %.2X | Background X Scroll: %d\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
683 "09: %.2X | Background Y Scroll: %d\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
684 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0xE) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
685 context->regs[REG_SAT], (context->regs[REG_SAT] & 0x7E) << 7,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
686 context->regs[REG_STILE_BASE], (context->regs[REG_STILE_BASE] & 2) << 11,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
687 context->regs[REG_X_SCROLL], context->regs[REG_X_SCROLL],
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
688 context->regs[REG_Y_SCROLL], context->regs[REG_Y_SCROLL]);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
689
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
690 }
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
691 char * sizes[] = {"32", "64", "invalid", "128"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
692 printf("\n**Misc Group**\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
693 "07: %.2X | Backdrop Color: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
694 "0A: %.2X | H-Int Counter: %u\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
695 "0F: %.2X | Auto-increment: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
696 "10: %.2X | Scroll A/B Size: %sx%s\n",
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 503
diff changeset
697 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR],
450
3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents: 438
diff changeset
698 context->regs[REG_HINT], context->regs[REG_HINT],
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
699 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
700 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]);
621
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
701 char * src_types[] = {"68K", "68K", "Copy", "Fill"};
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
702 printf("\n**DMA Group**\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
703 "13: %.2X |\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
704 "14: %.2X | DMA Length: $%.4X words\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
705 "15: %.2X |\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
706 "16: %.2X |\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
707 "17: %.2X | DMA Source Address: $%.6X, Type: %s\n",
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
708 context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
709 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
710 context->regs[REG_DMASRC_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
711 context->regs[REG_DMASRC_M],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
712 context->regs[REG_DMASRC_H],
629
9089951a1994 Small fix to display of DMA source address in vr debug command
Michael Pavone <pavone@retrodev.com>
parents: 624
diff changeset
713 context->regs[REG_DMASRC_H] << 17 | context->regs[REG_DMASRC_M] << 9 | context->regs[REG_DMASRC_L] << 1,
621
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
714 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]);
1628
3c1661305219 Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents: 1454
diff changeset
715 uint8_t old_flags = context->flags;
3c1661305219 Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents: 1454
diff changeset
716 uint8_t old_flags2 = context->flags2;
438
b3cee2fe690b Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
717 printf("\n**Internal Group**\n"
b3cee2fe690b Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
718 "Address: %X\n"
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
719 "CD: %X - %s\n"
647
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents: 629
diff changeset
720 "Pending: %s\n"
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents: 629
diff changeset
721 "VCounter: %d\n"
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
722 "HCounter: %d\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
723 "VINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
724 "HINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
725 "Status: %X\n",
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
726 context->address, context->cd, cd_name(context->cd),
1150
322d28e6f13c Display both byte and word pending values to better reflect VDP pending state in PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1149
diff changeset
727 (context->flags & FLAG_PENDING) ? "word" : (context->flags2 & FLAG2_BYTE_PENDING) ? "byte" : "none",
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
728 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false",
2358
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
729 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_status(context));
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
730 printf("\nDebug Register: %X | Output disabled: %s, Force Layer: %d\n", context->test_port,
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
731 (context->test_port & TEST_BIT_DISABLE) ? "true" : "false", context->test_port >> 7 & 3
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
732 );
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
733 }
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
734
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
735 static uint8_t is_active(vdp_context *context)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
736 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
737 return context->state != INACTIVE && (context->regs[REG_MODE_2] & BIT_DISP_EN) != 0;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
738 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
739
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
740 static void scan_sprite_table(uint32_t line, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
741 {
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
742 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line) {
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
743 line += 1;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
744 uint16_t ymask, ymin;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
745 uint8_t height_mult;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
746 if (context->double_res) {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
747 line *= 2;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
748 if (context->flags2 & FLAG2_EVEN_FIELD) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
749 line++;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
750 }
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
751 ymask = 0x3FF;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
752 ymin = 256;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
753 height_mult = 16;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
754 } else {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
755 ymask = 0x1FF;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
756 ymin = 128;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
757 height_mult = 8;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
758 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
759 context->sprite_index &= 0x7F;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
760 //TODO: Implement squirelly behavior documented by Kabuto
2230
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
761 if (context->sprite_index >= MAX_SPRITES_FRAME) {
38
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents: 37
diff changeset
762 context->sprite_index = 0;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents: 37
diff changeset
763 return;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents: 37
diff changeset
764 }
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
765 uint16_t address = context->sprite_index * 4;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
766 line += ymin;
1346
f7ca42e020fd Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1344
diff changeset
767 line &= ymask;
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
768 uint16_t y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
769 uint8_t height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
21
72ce60cb1711 Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
770 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height);
72ce60cb1711 Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
771 if (y <= line && line < (y + height)) {
27
aa1c47fab3f1 Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents: 26
diff changeset
772 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
773 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358
3716b90d3470 Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1357
diff changeset
774 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
775 }
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
776 context->sprite_index = context->sat_cache[address+3] & 0x7F;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
777 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
778 {
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
779 //TODO: Implement squirelly behavior documented by Kabuto
2230
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
780 if (context->sprite_index >= MAX_SPRITES_FRAME) {
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
781 context->sprite_index = 0;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
782 return;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
783 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
784 address = context->sprite_index * 4;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
785 y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
786 height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
323
8c01b4154480 Properly mask sprite X and Y coordinates
Mike Pavone <pavone@retrodev.com>
parents: 322
diff changeset
787 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height);
21
72ce60cb1711 Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
788 if (y <= line && line < (y + height)) {
27
aa1c47fab3f1 Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents: 26
diff changeset
789 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
790 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358
3716b90d3470 Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1357
diff changeset
791 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
792 }
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
793 context->sprite_index = context->sat_cache[address+3] & 0x7F;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
794 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
795 }
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
796 //TODO: Seems like the overflow flag should be set here if we run out of sprite info slots without hitting the end of the list
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
797 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
798
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
799 static void scan_sprite_table_mode4(vdp_context * context)
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
800 {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
801 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
802 int16_t line = context->vcounter;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
803 line &= 0xFF;
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
804 if (line > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
805 line -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
806 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
807
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
808 uint32_t sat_address = mode4_address_map[(context->regs[REG_SAT] << 7 & 0x3F00) + context->sprite_index];
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
809 int16_t y = context->vdpmem[sat_address+1];
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
810 uint32_t size = (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) ? 16 : 8;
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
811 int16_t ysize = size;
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
812 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
813 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
814 ysize *= 2;
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
815 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
816
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
817 if (y == 0xd0) {
1122
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
818 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
819 return;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
820 } else {
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
821 if (y > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
822 y -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
823 }
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
824 if (y <= line && line < (y + ysize)) {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
825 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
826 context->sprite_index = MAX_SPRITES_FRAME_H32;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
827 context->flags |= FLAG_DOT_OFLOW;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
828 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
829 }
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
830 context->sprite_info_list[--(context->slot_counter)].size = size;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
831 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358
3716b90d3470 Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1357
diff changeset
832 context->sprite_info_list[context->slot_counter].y = y;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
833 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
834 context->sprite_index++;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
835 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
836
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
837 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
1138
25268334a24c Fix Mode 4 sprite table Y scan to account for VRAM byte swapping
Michael Pavone <pavone@retrodev.com>
parents: 1137
diff changeset
838 y = context->vdpmem[sat_address];
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
839 if (y == 0xd0) {
1122
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
840 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
841 return;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
842 } else {
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
843 if (y > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
844 y -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
845 }
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
846 if (y <= line && line < (y + ysize)) {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
847 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
848 context->sprite_index = MAX_SPRITES_FRAME_H32;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
849 context->flags |= FLAG_DOT_OFLOW;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
850 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
851 }
1122
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
852 context->sprite_info_list[--(context->slot_counter)].size = size;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
853 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358
3716b90d3470 Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1357
diff changeset
854 context->sprite_info_list[context->slot_counter].y = y;
1122
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
855 }
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
856 context->sprite_index++;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
857 }
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
858 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
859
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
860 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
861 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
862
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
863 static void read_sprite_x(uint32_t line, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
864 {
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
865 if (context->cur_slot == context->max_sprites_line) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
866 context->cur_slot = 0;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
867 }
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
868 if (context->cur_slot < context->slot_counter) {
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
869 if (context->sprite_draws) {
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
870 line += 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
871 //in tiles
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
872 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
873 //in pixels
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
874 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
875 if (context->double_res) {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
876 line *= 2;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
877 if (context->flags2 & FLAG2_EVEN_FIELD) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
878 line++;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
879 }
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
880 height *= 2;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
881 }
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
882 uint16_t ymask, ymin;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
883 if (context->double_res) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
884 ymask = 0x3FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
885 ymin = 256;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
886 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
887 ymask = 0x1FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
888 ymin = 128;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
889 }
2230
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
890 uint8_t index = context->sprite_info_list[context->cur_slot].index;
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
891 if (!(context->regs[REG_MODE_4] & BIT_H40)) {
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
892 index &= MAX_SPRITES_FRAME_H32 - 1;
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
893 }
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
894 uint16_t att_addr = mode5_sat_address(context) + index * 8 + 4;
450
3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents: 438
diff changeset
895 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1];
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
896 uint8_t pal_priority = (tileinfo >> 9) & 0x70;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
897 uint8_t row;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
898 uint16_t cache_addr = context->sprite_info_list[context->cur_slot].index * 4;
1346
f7ca42e020fd Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1344
diff changeset
899 line = (line + ymin) & ymask;
1338
3706b683cd48 Fix sprite rendering for negative line. Fixes remaining visual glitch in the Titancade scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1337
diff changeset
900 int16_t y = ((context->sat_cache[cache_addr] << 8 | context->sat_cache[cache_addr+1]) & ymask)/* - ymin*/;
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
901 if (tileinfo & MAP_BIT_V_FLIP) {
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
902 row = (y + height - 1) - line;
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
903 } else {
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
904 row = line-y;
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
905 }
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
906 row &= ymask >> 4;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
907 uint16_t address;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
908 if (context->double_res) {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
909 address = ((tileinfo & 0x3FF) << 6) + row * 4;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
910 } else {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
911 address = ((tileinfo & 0x7FF) << 5) + row * 4;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
912 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
913 context->sprite_draws--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
914 context->sprite_draw_list[context->sprite_draws].x_pos = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 | context->vdpmem[att_addr + 3]) & 0x1FF;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
915 context->sprite_draw_list[context->sprite_draws].address = address;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
916 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
917 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
918 context->sprite_draw_list[context->sprite_draws].width = width;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
919 context->sprite_draw_list[context->sprite_draws].height = height;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
920 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
921 }
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
922 context->cur_slot++;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
923 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
924
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
925 static void read_sprite_x_mode4(vdp_context * context)
427
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
926 {
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
927 if (context->cur_slot >= context->slot_counter) {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
928 uint32_t address = (context->regs[REG_SAT] << 7 & 0x3F00) + 0x80 + context->sprite_info_list[context->cur_slot].index * 2;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
929 address = mode4_address_map[address];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
930 --context->sprite_draws;
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
931 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
932 uint32_t tile_address = context->vdpmem[address] * 32 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
933 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
934 tile_address &= ~32;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
935 }
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
936 int16_t line = context->vcounter & 0xFF;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
937 if (context->vcounter > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
938 line -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
939 }
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
940 uint16_t y_diff = line - context->sprite_info_list[context->cur_slot].y;
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
941 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
942 y_diff >>= 1;
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
943 }
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
944 tile_address += y_diff * 4;
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
945 context->sprite_draw_list[context->sprite_draws].x_pos = context->vdpmem[address + 1];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
946 context->sprite_draw_list[context->sprite_draws].address = tile_address;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
947 context->cur_slot--;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
948 }
427
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
949 }
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
950
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
951 #define VSRAM_DIRTY_BITS 0xF800
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
952
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
953 //rough estimate of slot number at which border display starts
1270
687d3969416b Adjust correspondance between slot number and actual video output to better match video signal measurements and analysis of Outrunners behavior on hardware. Partially fixes ticket:13
Michael Pavone <pavone@retrodev.com>
parents: 1269
diff changeset
954 #define BG_START_SLOT 6
1183
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
955
1431
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
956 static void update_color_map(vdp_context *context, uint16_t index, uint16_t value)
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
957 {
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
958 context->colors[index] = context->color_map[value & CRAM_BITS];
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
959 context->colors[index + SHADOW_OFFSET] = context->color_map[(value & CRAM_BITS) | FBUF_SHADOW];
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
960 context->colors[index + HIGHLIGHT_OFFSET] = context->color_map[(value & CRAM_BITS) | FBUF_HILIGHT];
2194
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
961 if (context->type == VDP_GAMEGEAR) {
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
962 context->colors[index + MODE4_OFFSET] = context->color_map[value & 0xFFF];
2194
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
963 } else {
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
964 context->colors[index + MODE4_OFFSET] = context->color_map[(value & CRAM_BITS) | FBUF_MODE4];
2194
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
965 }
1431
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
966 }
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
967
1428
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
968 void write_cram_internal(vdp_context * context, uint16_t addr, uint16_t value)
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
969 {
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
970 context->cram[addr] = value;
1431
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
971 update_color_map(context, addr, value);
1428
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
972 }
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
973
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
974 static void write_cram(vdp_context * context, uint16_t address, uint16_t value)
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
975 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
976 uint16_t addr;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
977 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
978 addr = (address/2) & (CRAM_SIZE-1);
2194
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
979 } else if (context->type == VDP_GAMEGEAR) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
980 addr = (address/2) & 31;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
981 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
982 addr = address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
983 value = (value << 1 & 0xE) | (value << 2 & 0xE0) | (value & 0xE00);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
984 }
1428
2540c05520f2 New savestates are working. New config file option for selecting format states will be saved in. Mostly complete, needs a little more work before release
Michael Pavone <pavone@retrodev.com>
parents: 1427
diff changeset
985 write_cram_internal(context, addr, value);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
986
1928
abc89555f2e0 Admit defeat on the "trying to write CRAM dots while output is null issue" for now and just add a null check
Mike Pavone <pavone@retrodev.com>
parents: 1925
diff changeset
987 if (context->output && context->hslot >= BG_START_SLOT && (
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
988 context->vcounter < context->inactive_start + context->border_bot
1183
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
989 || context->vcounter > 0x200 - context->border_top
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
990 )) {
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
991 uint8_t bg_end_slot = BG_START_SLOT + (context->regs[REG_MODE_4] & BIT_H40) ? LINEBUF_SIZE/2 : (256+HORIZ_BORDER)/2;
1183
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
992 if (context->hslot < bg_end_slot) {
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
993 uint32_t color = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->colors[addr] : context->colors[addr + MODE4_OFFSET];
1183
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
994 context->output[(context->hslot - BG_START_SLOT)*2 + 1] = color;
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
995 }
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
996 }
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
997 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
998
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
999 static void vdp_advance_dma(vdp_context * context)
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1000 {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1001 context->regs[REG_DMASRC_L] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1002 if (!context->regs[REG_DMASRC_L]) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1003 context->regs[REG_DMASRC_M] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1004 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1005 context->address += context->regs[REG_AUTOINC];
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1006 uint16_t dma_len = ((context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]) - 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1007 context->regs[REG_DMALEN_H] = dma_len >> 8;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1008 context->regs[REG_DMALEN_L] = dma_len;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1009 if (!dma_len) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1010 context->flags &= ~FLAG_DMA_RUN;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1011 context->cd &= 0xF;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1012 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1013 }
1019
e34334e6c682 Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running
Michael Pavone <pavone@retrodev.com>
parents: 1001
diff changeset
1014
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1015 static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value)
1319
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1016 {
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1017 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1018 if (!(address & 4)) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1019 uint32_t sat_address = mode5_sat_address(context);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1020 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1021 uint16_t cache_address = address - sat_address;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1022 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1023 context->sat_cache[cache_address] = value >> 8;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1024 context->sat_cache[cache_address^1] = value;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1025 }
1319
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1026 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1027 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1028 }
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1029
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1030 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value)
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
1031 {
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1032 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1033 if (!(address & 4)) {
1320
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
1034 uint32_t sat_address = mode5_sat_address(context);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1035 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1036 uint16_t cache_address = address - sat_address;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1037 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1038 context->sat_cache[cache_address] = value;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1039 }
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
1040 }
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1041 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1042 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1043
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1044 static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value)
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1045 {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1046 address = (address & 0x3FC) | (address >> 1 & 0xFC01) | (address >> 9 & 0x2);
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1047 address ^= 1;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1048 //TODO: Support an option to actually have 128KB of VRAM
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1049 context->vdpmem[address] = value;
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1050 }
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1051
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1052 static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value)
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1053 {
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1054 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
1319
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1055 address &= 0xFFFF;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1056 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1057 address = mode4_address_map[address & 0x3FFF];
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
1058 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
1059 context->vdpmem[address] = value;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
1060 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
1061
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1062 #define DMA_FILL 0x80
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1063 #define DMA_COPY 0xC0
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1064 #define DMA_TYPE_MASK 0xC0
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1065 static void external_slot(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1066 {
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1067 if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL && context->fifo_read < 0) {
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1068 context->fifo_read = (context->fifo_write-1) & (FIFO_SIZE-1);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1069 fifo_entry * cur = context->fifo + context->fifo_read;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1070 cur->cycle = context->cycles;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1071 cur->address = context->address;
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1072 cur->partial = 1;
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1073 vdp_advance_dma(context);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1074 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1075 fifo_entry * start = context->fifo + context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1076 if (context->fifo_read >= 0 && start->cycle <= context->cycles) {
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1077 switch (start->cd & 0xF)
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1078 {
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1079 case VRAM_WRITE:
1319
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1080 if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM|BIT_MODE_5)) == (BIT_128K_VRAM|BIT_MODE_5)) {
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1081 event_vram_word(context->cycles, start->address, start->value);
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1082 vdp_check_update_sat(context, start->address, start->value);
1319
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1083 write_vram_word(context, start->address, start->value);
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1084 } else {
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1085 uint8_t byte = start->partial == 1 ? start->value >> 8 : start->value;
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1086 uint32_t address = start->address ^ 1;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1087 event_vram_byte(context->cycles, start->address, byte, context->regs[REG_AUTOINC]);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1088 vdp_check_update_sat_byte(context, address, byte);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1089 write_vram_byte(context, address, byte);
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1090 if (!start->partial) {
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1091 start->address = address;
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1092 start->partial = 1;
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1093 //skip auto-increment and removal of entry from fifo
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1094 return;
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1095 }
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1096 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1097 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1098 case CRAM_WRITE: {
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1099 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1));
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1100 uint16_t val;
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1101 if (start->partial == 3) {
2194
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1102 if (context->type == VDP_GAMEGEAR) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1103 if (start->address & 1) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1104 val = start->value << 8 | context->cram_latch;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1105 } else {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1106 context->cram_latch = start->value;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1107 break;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1108 }
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1109 } else if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1110 val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) | start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1111 } else {
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1112 uint16_t address = (context->regs[REG_MODE_2] & BIT_MODE_5) ? start->address >> 1 & (CRAM_SIZE-1) : start->address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1113 val = (context->cram[address] & 0xFF00) | start->value;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1114 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1115 } else {
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1116 val = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1117 }
1956
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
1118 uint8_t buffer[3] = {start->address & 127, val >> 8, val};
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
1119 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1120 write_cram(context, start->address, val);
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1121 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1122 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1123 case VSRAM_WRITE:
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
1124 if (((start->address/2) & 63) < context->vsram_size) {
1432
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
1125 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles);
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1126 if (start->partial == 3) {
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1127 if (start->address & 1) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1128 context->vsram[(start->address/2) & 63] &= 0xFF;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1129 context->vsram[(start->address/2) & 63] |= start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1130 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1131 context->vsram[(start->address/2) & 63] &= 0xFF00;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1132 context->vsram[(start->address/2) & 63] |= start->value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1133 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1134 } else {
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1135 context->vsram[(start->address/2) & 63] = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1136 }
1956
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
1137 uint8_t buffer[3] = {((start->address/2) & 63) + 128, context->vsram[(start->address/2) & 63] >> 8, context->vsram[(start->address/2) & 63]};
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
1138 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1139 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1140
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1141 break;
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1142 default:
2334
57ebbc1ade30 Fix regression in mega-color image demos
Michael Pavone <pavone@retrodev.com>
parents: 2283
diff changeset
1143 if (!(context->cd & 6) && !start->partial && (context->regs[REG_MODE_2] & (BIT_128K_VRAM|BIT_MODE_5)) != (BIT_128K_VRAM|BIT_MODE_5)) {
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1144 start->partial = 1;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1145 return;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1146 }
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1147 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1148 context->fifo_read = (context->fifo_read+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1149 if (context->fifo_read == context->fifo_write) {
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1150 if ((context->cd & 0x20) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
983
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
1151 context->flags |= FLAG_DMA_RUN;
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
1152 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
1153 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
1154 }
983
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
1155 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1156 context->fifo_read = -1;
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1157 }
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1158 } else if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY) {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1159 if (context->flags & FLAG_READ_FETCHED) {
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
1160 write_vram_byte(context, context->address ^ 1, context->prefetch);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1161
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1162 //Update DMA state
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1163 vdp_advance_dma(context);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1164
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1165 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1166 } else {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1167 context->prefetch = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L] ^ 1];
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1168
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1169 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1170 }
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1171 } else if (!(context->cd & 1) && !(context->flags & (FLAG_READ_FETCHED|FLAG_PENDING)) && context->read_latency <= context->cycles) {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1172 switch(context->cd & 0xF)
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1173 {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1174 case VRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1175 if (context->flags2 & FLAG2_READ_PENDING) {
2283
6f6f21d0c396 Fix missing address masks on some VRAM reads
Michael Pavone <pavone@retrodev.com>
parents: 2264
diff changeset
1176 //TODO: 128K VRAM support
6f6f21d0c396 Fix missing address masks on some VRAM reads
Michael Pavone <pavone@retrodev.com>
parents: 2264
diff changeset
1177 context->prefetch |= context->vdpmem[(context->address & 0xFFFE) | 1];
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1178 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1179 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1180 //Should this happen after the prefetch or after the read?
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
1181 increment_address(context);
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1182 } else {
2283
6f6f21d0c396 Fix missing address masks on some VRAM reads
Michael Pavone <pavone@retrodev.com>
parents: 2264
diff changeset
1183 //TODO: 128K VRAM support
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1184 context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1185 context->flags2 |= FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1186 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1187 break;
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1188 case VRAM_READ8: {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1189 uint32_t address = context->address ^ 1;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1190 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1191 address = mode4_address_map[address & 0x3FFF];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1192 }
2283
6f6f21d0c396 Fix missing address masks on some VRAM reads
Michael Pavone <pavone@retrodev.com>
parents: 2264
diff changeset
1193 //TODO: 128K VRAM support
2338
bc17ece8dd00 Fix silly regression in SMS mode
Michael Pavone <pavone@retrodev.com>
parents: 2337
diff changeset
1194 context->prefetch = context->vdpmem[address & 0xFFFF];
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1195 context->prefetch |= context->fifo[context->fifo_write].value & 0xFF00;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1196 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1197 //Should this happen after the prefetch or after the read?
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
1198 increment_address(context);
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1199 break;
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1200 }
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1201 case CRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1202 context->prefetch = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1203 context->prefetch |= context->fifo[context->fifo_write].value & ~CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1204 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1205 //Should this happen after the prefetch or after the read?
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
1206 increment_address(context);
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1207 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1208 case VSRAM_READ: {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1209 uint16_t address = (context->address /2) & 63;
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
1210 if (address >= context->vsram_size) {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1211 address = 0;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1212 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1213 context->prefetch = context->vsram[address] & VSRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1214 context->prefetch |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1215 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1216 //Should this happen after the prefetch or after the read?
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
1217 increment_address(context);
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1218 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1219 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1220 }
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1221 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1222 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1223
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1224 static void run_dma_src(vdp_context * context, int32_t slot)
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1225 {
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
1226 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
1227 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1228 if (context->fifo_write == context->fifo_read) {
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1229 return;
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1230 }
478
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1231 fifo_entry * cur = NULL;
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1232 if (!(context->regs[REG_DMASRC_H] & 0x80))
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1233 {
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1234 //68K -> VDP
924
1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents: 923
diff changeset
1235 if (slot == -1 || !is_refresh(context, slot-1)) {
478
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1236 cur = context->fifo + context->fifo_write;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
1237 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
478
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1238 cur->address = context->address;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1239 cur->value = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]);
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1240 cur->cd = context->cd;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1241 cur->partial = 0;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1242 if (context->fifo_read < 0) {
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1243 context->fifo_read = context->fifo_write;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1244 }
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1245 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1246 vdp_advance_dma(context);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
1247 }
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
1248 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1249 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1250
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1251 #define WINDOW_RIGHT 0x80
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1252 #define WINDOW_DOWN 0x80
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1253
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1254 static void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1255 {
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1256 uint16_t window_line_shift, v_offset_mask, vscroll_shift;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1257 if (context->double_res) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1258 line *= 2;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
1259 if (context->flags2 & FLAG2_EVEN_FIELD) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1260 line++;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1261 }
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1262 window_line_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1263 v_offset_mask = 0xF;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1264 vscroll_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1265 } else {
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1266 window_line_shift = 3;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1267 v_offset_mask = 0x7;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1268 vscroll_shift = 3;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1269 }
2337
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1270 //TODO: Further research on vscroll latch behavior
1422
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
1271 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
1272 if (!column) {
1344
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1273 if (context->regs[REG_MODE_4] & BIT_H40) {
2337
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1274 //Pre MD2VA4, behavior seems to vary from console to console
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1275 //On some consoles it's a stable AND, on some it's always zero and others it's an "unstable" AND
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1276 if (context->vsram_size == MIN_VSRAM_SIZE) {
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1277 // For now just implement the AND behavior
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1278 if (!vsram_off) {
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1279 context->vscroll_latch[0] &= context->vscroll_latch[1];
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1280 context->vscroll_latch[1] = context->vscroll_latch[0];
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1281 }
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1282 } else {
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1283 //MD2VA4 and later use the column 0 value
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1284 context->vscroll_latch[vsram_off] = context->vsram[vsram_off];
1344
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1285 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1286 } else {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1287 //supposedly it's always forced to 0 in the H32 case
2337
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1288 //TODO: repeat H40 tests in H32 mode to confirm
1344
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1289 context->vscroll_latch[0] = context->vscroll_latch[1] = 0;
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1290 }
1422
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
1291 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
1292 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off];
1344
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1293 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1294 }
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1295 if (!vsram_off) {
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1296 uint16_t left_col, right_col;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1297 if (context->window_h_latch & WINDOW_RIGHT) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1298 left_col = (context->window_h_latch & 0x1F) * 2 + 2;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1299 right_col = 42;
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1300 } else {
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1301 left_col = 0;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1302 right_col = (context->window_h_latch & 0x1F) * 2;
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1303 if (right_col) {
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1304 right_col += 2;
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1305 }
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1306 }
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1307 uint16_t top_line, bottom_line;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1308 if (context->window_v_latch & WINDOW_DOWN) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1309 top_line = (context->window_v_latch & 0x1F) << window_line_shift;
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1310 bottom_line = context->double_res ? 481 : 241;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1311 } else {
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1312 top_line = 0;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1313 bottom_line = (context->window_v_latch & 0x1F) << window_line_shift;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1314 }
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1315 if ((column >= left_col && column < right_col) || (line >= top_line && line < bottom_line)) {
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1316 uint16_t address = context->regs[REG_WINDOW] << 10;
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1317 uint16_t line_offset, offset, mask;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
1318 if (context->regs[REG_MODE_4] & BIT_H40) {
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1319 address &= 0xF000;
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1320 line_offset = (((line) >> vscroll_shift) * 64 * 2) & 0xFFF;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1321 mask = 0x7F;
450
3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents: 438
diff changeset
1322
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1323 } else {
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1324 address &= 0xF800;
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1325 line_offset = (((line) >> vscroll_shift) * 32 * 2) & 0xFFF;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1326 mask = 0x3F;
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1327 }
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1328 if (context->double_res) {
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1329 mask <<= 1;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1330 mask |= 1;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1331 }
42
6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents: 41
diff changeset
1332 offset = address + line_offset + (((column - 2) * 2) & mask);
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1333 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1];
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
1334 //printf("Window | top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]);
42
6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents: 41
diff changeset
1335 offset = address + line_offset + (((column - 1) * 2) & mask);
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1336 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1];
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1337 context->v_offset = (line) & v_offset_mask;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1338 context->flags |= FLAG_WINDOW;
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1339 return;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1340 } else if (column == right_col) {
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1341 context->flags |= FLAG_WINDOW_EDGE;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1342 context->flags &= ~FLAG_WINDOW;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1343 } else {
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1344 context->flags &= ~(FLAG_WINDOW_EDGE|FLAG_WINDOW);
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1345 }
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1346 }
1290
aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents: 1289
diff changeset
1347 //TODO: Verify behavior for 0x20 case
aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents: 1289
diff changeset
1348 uint16_t vscroll = 0xFF | (context->regs[REG_SCROLL] & 0x30) << 4;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1349 if (context->double_res) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1350 vscroll <<= 1;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1351 vscroll |= 1;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1352 }
710
4cd8823f79e3 First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
Michael Pavone <pavone@retrodev.com>
parents: 708
diff changeset
1353 vscroll &= context->vscroll_latch[vsram_off] + line;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1354 context->v_offset = vscroll & v_offset_mask;
26
a7c2b92d8056 Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents: 25
diff changeset
1355 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset);
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1356 vscroll >>= vscroll_shift;
1887
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1357 //TODO: Verify the behavior for a setting of 2
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1358 static const uint16_t hscroll_masks[] = {0x1F, 0x3F, 0x1F, 0x7F};
2013
dcdad92f84a4 Multiplying by zero and shifting by zero are very different. Fixes regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2010
diff changeset
1359 static const uint16_t v_shifts[] = {6, 7, 16, 8};
1887
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1360 uint16_t hscroll_mask = hscroll_masks[context->regs[REG_SCROLL] & 0x3];
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1361 uint16_t v_shift = v_shifts[context->regs[REG_SCROLL] & 0x3];
28
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1362 uint16_t hscroll, offset;
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1363 for (int i = 0; i < 2; i++) {
39
3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents: 38
diff changeset
1364 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask;
1887
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1365 offset = address + (((vscroll << v_shift) + hscroll*2) & 0x1FFF);
39
3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents: 38
diff changeset
1366 //printf("%s | line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset);
28
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1367 uint16_t col_val = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1];
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1368 if (i) {
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1369 context->col_2 = col_val;
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1370 } else {
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1371 context->col_1 = col_val;
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1372 }
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1373 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1374 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1375
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1376 static void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1377 {
25
4d0c20ad815a Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents: 24
diff changeset
1378 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1379 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1380
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1381 static void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1382 {
25
4d0c20ad815a Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents: 24
diff changeset
1383 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1384 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1385
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1386 static void read_map_mode4(uint16_t column, uint32_t line, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1387 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1388 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1389 //add row
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1390 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1391 if (column < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1392 vscroll += context->regs[REG_Y_SCROLL];
2465
b0408f38f464 Add missing mask to vscroll calculation in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2414
diff changeset
1393 vscroll &= 511;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1394 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1395 if (vscroll > 223) {
2465
b0408f38f464 Add missing mask to vscroll calculation in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2414
diff changeset
1396 //TODO: support V28 and V30 for SMS2/GG VDPs
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1397 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1398 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1399 address += (vscroll >> 3) * 2 * 32;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1400 //add column
1136
52f25c41abdd Fix horizontal scrolling in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1135
diff changeset
1401 address += ((column - (context->hscroll_a >> 3)) & 31) * 2;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1402 //adjust for weird VRAM mapping in Mode 4
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1403 address = mode4_address_map[address];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1404 context->col_1 = (context->vdpmem[address] << 8) | context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1405 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1406
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1407 static void render_map(uint16_t col, uint8_t * tmp_buf, uint8_t offset, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1408 {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1409 uint16_t address;
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1410 uint16_t vflip_base;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1411 if (context->double_res) {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1412 address = ((col & 0x3FF) << 6);
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1413 vflip_base = 60;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1414 } else {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1415 address = ((col & 0x7FF) << 5);
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1416 vflip_base = 28;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1417 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1418 if (col & MAP_BIT_V_FLIP) {
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1419 address += vflip_base - 4 * context->v_offset;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1420 } else {
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1421 address += 4 * context->v_offset;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1422 }
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1423 uint8_t pal_priority = (col >> 9) & 0x70;
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1424 uint32_t bits = *((uint32_t *)(&context->vdpmem[address]));
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1425 tmp_buf += offset;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1426 if (col & MAP_BIT_H_FLIP) {
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1427 uint32_t shift = 28;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1428 for (int i = 0; i < 4; i++)
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1429 {
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1430 uint8_t right = pal_priority | ((bits >> shift) & 0xF);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1431 shift -= 4;
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1432 *(tmp_buf++) = pal_priority | ((bits >> shift) & 0xF);
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1433 shift -= 4;
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1434 *(tmp_buf++) = right;
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1435 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1436 } else {
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1437 for (int i = 0; i < 4; i++)
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1438 {
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1439 uint8_t right = pal_priority | (bits & 0xF);
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1440 bits >>= 4;
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1441 *(tmp_buf++) = pal_priority | (bits & 0xF);
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1442 bits >>= 4;
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1443 *(tmp_buf++) = right;
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1444 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1445 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1446 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1447
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1448 static void render_map_1(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1449 {
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1450 render_map(context->col_1, context->tmp_buf_a, context->buf_a_off, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1451 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1452
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1453 static void render_map_2(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1454 {
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1455 render_map(context->col_2, context->tmp_buf_a, context->buf_a_off+8, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1456 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1457
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1458 static void render_map_3(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1459 {
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1460 render_map(context->col_1, context->tmp_buf_b, context->buf_b_off, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1461 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1462
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1463 static void fetch_map_mode4(uint16_t col, uint32_t line, vdp_context *context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1464 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1465 //calculate pixel row to fetch
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1466 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1467 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1468 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1469 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1470 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1471 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1472 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1473 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1474 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1475 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1476 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1477
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1478 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1479 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1480 context->fetch_tmp[1] = context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1481 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1482
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1483 static uint8_t composite_normal(vdp_context *context, uint8_t *debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1484 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1485 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1486 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1487 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1488 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1489 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1490 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1491 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1492 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1493 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1494 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1495 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1496 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1497 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1498 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1499 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1500 return pixel;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1501 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1502 typedef struct {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1503 uint8_t index, intensity;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1504 } sh_pixel;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1505
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1506 static sh_pixel composite_highlight(vdp_context *context, uint8_t *debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1507 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1508 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1509 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1510 uint8_t intensity = 0;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1511 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1512 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1513 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1514 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1515 intensity = plane_b & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1516 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1517 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1518 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1519 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1520 intensity |= plane_a & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1521 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1522 if ((sprite & 0x3F) == 0x3E) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1523 intensity += BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1524 } else if ((sprite & 0x3F) == 0x3F) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1525 intensity = 0;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1526 } else {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1527 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1528 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1529 if ((pixel & 0xF) == 0xE) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1530 intensity = BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1531 } else {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1532 intensity |= pixel & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1533 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1534 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1535 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1536 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1537 return (sh_pixel){.index = pixel, .intensity = intensity};
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1538 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1539
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1540 static void render_normal(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, uint8_t *buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1541 {
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1542 uint8_t *sprite_buf = context->linebuf + col * 8;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1543 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1544 memset(dst, 0, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1545 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1546 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1547 debug_dst += 8;
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1548 sprite_buf += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1549 plane_a_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1550 plane_b_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1551 for (int i = 0; i < 8; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1552 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1553 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1554 plane_a = buf_a[plane_a_off & plane_a_mask];
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1555 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1556 *(dst++) = composite_normal(context, debug_dst, *sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1557 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1558 }
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1559 } else {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1560 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1561 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1562 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1563 plane_a = buf_a[plane_a_off & plane_a_mask];
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1564 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1565 *(dst++) = composite_normal(context, debug_dst, *sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1566 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1567 }
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1568 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1569 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1570
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1571 static void render_highlight(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, uint8_t *buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1572 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1573 int start = 0;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1574 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1575 memset(dst, SHADOW_OFFSET + (context->regs[REG_BG_COLOR] & 0x3F), 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1576 memset(debug_dst, DBG_SRC_BG | DBG_SHADOW, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1577 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1578 debug_dst += 8;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1579 start = 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1580 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1581 uint8_t *sprite_buf = context->linebuf + col * 8 + start;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1582 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1583 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1584 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1585 plane_a = buf_a[plane_a_off & plane_a_mask];
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1586 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1587 sprite = *sprite_buf;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1588 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, context->regs[REG_BG_COLOR]);
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1589 uint8_t final_pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1590 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1591 final_pixel = (pixel.index & 0x3F) + HIGHLIGHT_OFFSET;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1592 } else if (pixel.intensity) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1593 final_pixel = pixel.index & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1594 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1595 final_pixel = (pixel.index & 0x3F) + SHADOW_OFFSET;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1596 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1597 debug_dst++;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1598 *(dst++) = final_pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1599 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1600 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1601
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1602 static void render_testreg(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, uint8_t *buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1603 {
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1604 uint8_t pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1605 if (output_disabled) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1606 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1607 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1608 case 0:
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1609 pixel = context->regs[REG_BG_COLOR] & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1610 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1611 {
2509
1102372feaee Remove old TODO
Michael Pavone <pavone@retrodev.com>
parents: 2508
diff changeset
1612 *(dst++) = pixel; //Behavior confirmed on hardware by vladikcomper
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1613 *(debug_dst++) = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1614 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1615 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1616 case 1: {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1617 uint8_t *sprite_buf = context->linebuf + col * 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1618 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1619 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1620 *(dst++) = *(sprite_buf++) & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1621 *(debug_dst++) = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1622 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1623 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1624 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1625 case 2:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1626 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1627 {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1628 *(dst++) = buf_a[(plane_a_off++) & plane_a_mask] & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1629 *(debug_dst++) = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1630 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1631 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1632 case 3:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1633 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1634 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1635 *(dst++) = context->tmp_buf_b[(plane_b_off++) & SCROLL_BUFFER_MASK] & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1636 *(debug_dst++) = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1637 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1638 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1639 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1640 } else {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1641 int start = 0;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1642 uint8_t *sprite_buf = context->linebuf + col * 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1643 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1644 //TODO: Confirm how test register interacts with column 0 blanking
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1645 pixel = 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1646 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1647 for (int i = 0; i < 8; ++i)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1648 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1649 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1650 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1651 case 1:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1652 pixel &= sprite_buf[i];
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1653 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1654 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1655 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1656 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1657 case 2:
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1658 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1659 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1660 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1661 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1662 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1663 case 3:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1664 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1665 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1666 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1667 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1668 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1669 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1670
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1671 *(dst++) = pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1672 *(debug_dst++) = src;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1673 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1674 plane_a_off += 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1675 plane_b_off += 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1676 sprite_buf += 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1677 start = 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1678 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1679 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1680 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1681 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1682 plane_a = buf_a[plane_a_off & plane_a_mask];
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1683 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1684 sprite = *sprite_buf;
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1685 pixel = composite_normal(context, debug_dst, sprite, plane_a, plane_b, 0x3F) & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1686 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1687 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1688 case 1:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1689 pixel &= sprite;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1690 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1691 *debug_dst = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1692 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1693 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1694 case 2:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1695 pixel &= plane_a;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1696 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1697 *debug_dst = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1698 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1699 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1700 case 3:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1701 pixel &= plane_b;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1702 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1703 *debug_dst = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1704 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1705 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1706 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1707 debug_dst++;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1708 *(dst++) = pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1709 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1710 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1711 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1712
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1713 static void render_testreg_highlight(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, uint8_t *buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1714 {
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1715 int start = 0;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1716 uint8_t *sprite_buf = context->linebuf + col * 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1717 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1718 //TODO: Confirm how test register interacts with column 0 blanking
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1719 uint8_t pixel = 0x3F;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1720 uint8_t src = DBG_SRC_BG | DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1721 for (int i = 0; i < 8; ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1722 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1723 switch (test_layer)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1724 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1725 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1726 pixel &= sprite_buf[i];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1727 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1728 src = DBG_SRC_S | DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1729 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1730 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1731 case 2:
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1732 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1733 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1734 src = DBG_SRC_A | DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1735 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1736 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1737 case 3:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1738 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1739 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1740 src = DBG_SRC_B | DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1741 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1742 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1743 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1744
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1745 *(dst++) = SHADOW_OFFSET + pixel;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1746 *(debug_dst++) = src;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1747 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1748 plane_a_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1749 plane_b_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1750 sprite_buf += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1751 start = 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1752 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1753 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1754 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1755 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1756 plane_a = buf_a[plane_a_off & plane_a_mask];
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1757 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1758 sprite = *sprite_buf;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1759 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, 0x3F);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1760 if (output_disabled) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1761 pixel.index = 0x3F;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1762 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1763 pixel.index &= 0x3F;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1764 }
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1765 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1766 {
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1767 case 0:
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1768 if (output_disabled) {
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1769 pixel.index &= context->regs[REG_BG_COLOR];
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1770 *debug_dst = DBG_SRC_BG;
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1771 }
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1772 break;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1773 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1774 pixel.index &= sprite;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1775 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1776 *debug_dst = DBG_SRC_S;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1777 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1778 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1779 case 2:
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1780 pixel.index &= plane_a;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1781 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1782 *debug_dst = DBG_SRC_A;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1783 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1784 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1785 case 3:
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1786 pixel.index &= plane_b;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1787 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1788 *debug_dst = DBG_SRC_B;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1789 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1790 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1791 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1792 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1793 pixel.index += HIGHLIGHT_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1794 } else if (!pixel.intensity) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1795 pixel.index += SHADOW_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1796 }
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1797 debug_dst++;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1798 *(dst++) = pixel.index;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1799 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1800 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1801
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1802 static void render_map_output(uint32_t line, int32_t col, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1803 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1804 uint8_t *dst;
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1805 uint8_t *debug_dst;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1806 uint8_t output_disabled = (context->test_port & TEST_BIT_DISABLE) != 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1807 uint8_t test_layer = context->test_port >> 7 & 3;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
1808 if (context->state == PREPARING && !test_layer) {
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
1809 if (col) {
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1810 col -= 2;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1811 dst = context->compositebuf + BORDER_LEFT + col * 8;
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
1812 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1813 dst = context->compositebuf;
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
1814 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1815 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1816 context->done_composite = dst + BORDER_LEFT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1817 return;
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
1818 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1819 memset(dst, 0, 16);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1820 context->done_composite = dst + 16;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
1821 return;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
1822 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
1823 line &= 0xFF;
1180
e2b81a0f8fd8 Undo poorly thought out minor optimization that screwed up rendering
Michael Pavone <pavone@retrodev.com>
parents: 1179
diff changeset
1824 render_map(context->col_2, context->tmp_buf_b, context->buf_b_off+8, context);
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1825 uint8_t *sprite_buf;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1826 uint8_t sprite, plane_a, plane_b;
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1827 int plane_a_off, plane_b_off;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1828 if (col)
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1829 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1830 col-=2;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1831 dst = context->compositebuf + BORDER_LEFT + col * 8;
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1832 debug_dst = context->layer_debug_buf + BORDER_LEFT + col * 8;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1833
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1834
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1835 uint8_t a_src, src;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1836 uint8_t *buf_a;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1837 int plane_a_mask;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1838 if (context->flags & FLAG_WINDOW) {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1839 plane_a_off = context->buf_a_off;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1840 buf_a = context->tmp_buf_a;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1841 a_src = DBG_SRC_W;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1842 plane_a_mask = SCROLL_BUFFER_MASK;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1843 } else {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1844 if (context->flags & FLAG_WINDOW_EDGE) {
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1845 buf_a = context->tmp_buf_a + context->buf_a_off;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1846 plane_a_mask = 15;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1847 plane_a_off = -context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1848 } else {
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1849 plane_a_off = context->buf_a_off - context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1850 plane_a_mask = SCROLL_BUFFER_MASK;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1851 buf_a = context->tmp_buf_a;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1852 }
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1853 a_src = DBG_SRC_A;
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1854 }
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1855 plane_a_off &= plane_a_mask;
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
1856 plane_b_off = context->buf_b_off - context->hscroll_b_fine;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1857 //printf("A | tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7));
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1858
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1859 if (context->regs[REG_MODE_4] & BIT_HILIGHT) {
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1860 if (output_disabled || test_layer) {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1861 render_testreg_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1862 } else {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1863 render_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
722
8f5339961903 Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents: 720
diff changeset
1864 }
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1865 } else {
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1866 if (output_disabled || test_layer) {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1867 render_testreg(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1868 } else {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1869 render_normal(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
230
d3266cee02c9 Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents: 191
diff changeset
1870 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1871 }
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1872 dst += 16;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1873 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1874 dst = context->compositebuf;
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1875 debug_dst = context->layer_debug_buf;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1876 uint8_t pixel = 0;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1877 if (output_disabled) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1878 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1879 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1880 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1881 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1882 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1883 case 1:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1884 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1885 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1886 dst += BORDER_LEFT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1887 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1888 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1889 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1890 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1891 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1892 i = 0;
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
1893 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine + (16 - BORDER_LEFT);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1894 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1895 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1896 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1897 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK];
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1898 *debug_dst = DBG_SRC_A;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1899 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1900 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1901 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1902 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1903 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1904 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1905 i = 0;
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
1906 uint8_t buf_off = context->buf_b_off - context->hscroll_b_fine + (16 - BORDER_LEFT);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1907 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1908 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1909 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1910 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK];
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1911 *debug_dst = DBG_SRC_B;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1912 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1913 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1914 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1915 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1916 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1917 memset(dst, pixel, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1918 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1919 dst += BORDER_LEFT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1920 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1921 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1922 context->done_composite = dst;
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1923 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1924 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1925 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1926
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1927 static void render_map_mode4(uint32_t line, int32_t col, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1928 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1929 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1930 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1931 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1932 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1933 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1934 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1935 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1936 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1937 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1938 //vflip
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1939 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1940 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1941
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1942 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1943 pixels |= planar_to_chunky[context->fetch_tmp[1]];
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1944
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1945 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4 + 2];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1946 pixels |= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1947 pixels |= planar_to_chunky[context->vdpmem[address+1]] << 2;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1948
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1949 int i, i_inc, i_limit;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1950 if (context->col_1 & 0x200) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1951 //hflip
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1952 i = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1953 i_inc = 4;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1954 i_limit = 32;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1955 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1956 i = 28;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1957 i_inc = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1958 i_limit = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1959 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1960 uint8_t pal_priority = (context->col_1 >> 7 & 0x10) | (context->col_1 >> 6 & 0x40);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1961 for (uint8_t *dst = context->tmp_buf_a + context->buf_a_off; i != i_limit; i += i_inc, dst++)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1962 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1963 *dst = (pixels >> i & 0xF) | pal_priority;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1964 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1965 context->buf_a_off = (context->buf_a_off + 8) & 15;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1966
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1967 uint8_t *dst = context->compositebuf + col * 8 + BORDER_LEFT;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1968 uint8_t *debug_dst = context->layer_debug_buf + col * 8 + BORDER_LEFT;
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
1969 if (context->state == PREPARING) {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
1970 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1971 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1972 context->done_composite = dst + 8;
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
1973 return;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
1974 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1975
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1976 if (col || !(context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1977 uint8_t *sprite_src = context->linebuf + col * 8;
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1978 if (context->regs[REG_MODE_1] & BIT_SPRITE_8PX) {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1979 sprite_src += 8;
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1980 }
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1981 for (int i = 0; i < 8; i++, sprite_src++)
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1982 {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1983 uint8_t *bg_src = context->tmp_buf_a + ((8 + i + col * 8 - (context->hscroll_a & 0x7)) & 15);
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1984 if ((*bg_src & 0x4F) > 0x40 || !*sprite_src) {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1985 //background plane has priority and is opaque or sprite layer is transparent
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1986 uint8_t pixel = *bg_src & 0x1F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1987 *(dst++) = pixel + MODE4_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1988 *(debug_dst++) = pixel ? DBG_SRC_A : DBG_SRC_BG;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1989 } else {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1990 //sprite layer is opaque and not covered by high priority BG pixels
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1991 *(dst++) = (*sprite_src | 0x10) + MODE4_OFFSET;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1992 *(debug_dst++) = DBG_SRC_S;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1993 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1994 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1995 context->done_composite = dst;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1996 } else {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
1997 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
1998 memset(debug_dst, DBG_SRC_BG, 8);
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1999 context->done_composite = dst + 8;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2000 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2001 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2002
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
2003 static uint32_t const h40_hsync_cycles[] = {19, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 19};
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2004
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
2005 static void vdp_advance_line(vdp_context *context)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2006 {
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2007 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2008 static uint32_t last_line = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2009 if (last_line != 0xFFFFFFFF) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2010 uint32_t diff = context->cycles - last_line;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2011 if (diff != MCLKS_LINE) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2012 printf("Line %d took %d cycles\n", context->vcounter, diff);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2013 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2014 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2015 last_line = context->cycles;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2016 #endif
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2017 uint16_t jump_start, jump_end;
1156
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1155
diff changeset
2018 uint8_t is_mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1155
diff changeset
2019 if (is_mode_5) {
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1155
diff changeset
2020 if (context->flags2 & FLAG2_REGION_PAL) {
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2021 if (context->regs[REG_MODE_2] & BIT_PAL) {
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2022 jump_start = 0x10B;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2023 jump_end = 0x1D2;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2024 } else {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2025 jump_start = 0x103;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2026 jump_end = 0x1CA;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2027 }
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2028 } else if (context->regs[REG_MODE_2] & BIT_PAL) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2029 jump_start = 0x100;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2030 jump_end = 0x1FA;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2031 } else {
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2032 jump_start = 0xEB;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2033 jump_end = 0x1E5;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2034 }
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2035 } else {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2036 jump_start = 0xDB;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2037 jump_end = 0x1D5;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2038 }
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2039
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2040 if (context->enabled_debuggers & (1 << DEBUG_CRAM | 1 << DEBUG_COMPOSITE)) {
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2041 uint32_t line = context->vcounter;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2042 if (line >= jump_end) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2043 line -= jump_end - jump_start;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2044 }
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2045 uint32_t total_lines = (context->flags2 & FLAG2_REGION_PAL) ? 313 : 262;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2046
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2047 if (total_lines - line <= context->border_top) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2048 line -= total_lines - context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2049 } else {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2050 line += context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2051 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2052 if (context->enabled_debuggers & (1 << DEBUG_CRAM)) {
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2053 uint32_t *fb = context->debug_fbs[DEBUG_CRAM] + context->debug_fb_pitch[DEBUG_CRAM] * line / sizeof(uint32_t);
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2054 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2055 for (int i = 0; i < 64; i++)
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2056 {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2057 for (int x = 0; x < 8; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2058 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2059 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2060 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2061 }
2411
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2062 } else if (context->type == VDP_GENESIS || (context->regs[REG_MODE_1] & BIT_MODE_4)) {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2063 for (int i = MODE4_OFFSET; i < MODE4_OFFSET+32; i++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2064 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2065 for (int x = 0; x < 16; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2066 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2067 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2068 }
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2069 }
2411
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2070 } else if (context->type != VDP_GENESIS) {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2071 uint16_t address = context->regs[REG_COLOR_TABLE] << 6;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2072 for (int i = 0; i < 32; i++, address++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2073 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2074 uint8_t entry = context->vdpmem[mode4_address_map[address] ^ 1];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2075 uint8_t fg = entry >> 4, bg = entry & 0xF;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2076 uint32_t fg_full, bg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2077 if (context->type == VDP_GAMEGEAR) {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2078 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2079 fg_full = context->colors[fg + 16 + MODE4_OFFSET];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2080 bg_full = context->colors[bg + 16 + MODE4_OFFSET];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2081 } else {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2082 fg <<= 1;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2083 fg = (fg & 0xE) | (fg << 1 & 0x20);
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2084 fg_full = context->color_map[fg | FBUF_TMS];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2085 bg <<= 1;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2086 bg = (bg & 0xE) | (bg << 1 & 0x20);
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2087 bg_full = context->color_map[bg | FBUF_TMS];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2088 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2089 for (int x = 0; x < 8; x++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2090 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2091 *(fb++) = fg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2092 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2093 for (int x = 0; x < 8; x++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2094 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2095 *(fb++) = bg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2096 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2097 }
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2098 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2099 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2100 if (
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2101 context->enabled_debuggers & (1 << DEBUG_COMPOSITE)
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2102 && line < (context->inactive_start + context->border_bot + context->border_top)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2103 ) {
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2104 uint32_t *fb = context->debug_fbs[DEBUG_COMPOSITE] + context->debug_fb_pitch[DEBUG_COMPOSITE] * line / sizeof(uint32_t);
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2105 if (is_mode_5) {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2106 uint32_t left, right;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2107 uint16_t top_line, bottom_line;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2108 if (context->window_v_latch & WINDOW_DOWN) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2109 top_line = ((context->window_v_latch & 0x1F) << 3) + context->border_top;
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2110 bottom_line = context->inactive_start + context->border_top;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2111 } else {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2112 top_line = context->border_top;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2113 bottom_line = ((context->window_v_latch & 0x1F) << 3) + context->border_top;
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2114 }
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2115 if (line >= top_line && line < bottom_line) {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2116 left = 0;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2117 right = 320 + BORDER_LEFT + BORDER_RIGHT;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2118 } else if (context->window_h_latch & WINDOW_RIGHT) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2119 left = (context->window_h_latch & 0x1F) * 16 + BORDER_LEFT;
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2120 right = 320 + BORDER_LEFT + BORDER_RIGHT;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2121 } else {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2122 left = 0;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2123 right = (context->window_h_latch & 0x1F) * 16 + BORDER_LEFT;
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2124 }
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2125 for (uint32_t i = left; i < right; i++)
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2126 {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2127 uint8_t src = context->layer_debug_buf[i] & DBG_SRC_MASK;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2128 if (src == DBG_SRC_A) {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2129 context->layer_debug_buf[i] &= ~DBG_SRC_MASK;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2130 context->layer_debug_buf[i] |= DBG_SRC_W;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2131 }
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2132 }
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2133 }
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2134 for (int i = 0; i < LINEBUF_SIZE; i++)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2135 {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2136 *(fb++) = context->debugcolors[context->layer_debug_buf[i]];
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2137 }
1299
da1ffc4026c4 Fix latching of V32 mode bit
Michael Pavone <pavone@retrodev.com>
parents: 1290
diff changeset
2138 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2139 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2140
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2141 context->vcounter++;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2142 if (is_mode_5) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2143 context->window_h_latch = context->regs[REG_WINDOW_H];
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2144 context->window_v_latch = context->regs[REG_WINDOW_V];
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2145 }
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2146 if (context->vcounter == jump_start) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2147 context->vcounter = jump_end;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2148 } else {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2149 context->vcounter &= 0x1FF;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2150 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2151 if (context->state == PREPARING) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2152 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2153 }
1377
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
2154 if (context->vcounter == 0x1FF) {
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
2155 context->flags2 &= ~FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
2156 }
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2157
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2158 if (context->state != ACTIVE) {
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2159 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2160 } else if (context->hint_counter) {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2161 context->hint_counter--;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2162 } else {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2163 context->flags2 |= FLAG2_HINT_PENDING;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2164 context->pending_hint_start = context->cycles;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2165 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2166 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2167 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2168
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2169 static void vram_debug_mode5(uint32_t *fb, uint32_t pitch, vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2170 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2171 uint8_t pal = (context->debug_modes[DEBUG_VRAM] % 4) << 4;
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2172 int yshift, ymask, tilesize;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2173 if (context->double_res) {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2174 yshift = 5;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2175 ymask = 0xF;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2176 tilesize = 64;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2177 } else {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2178 yshift = 4;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2179 ymask = 0x7;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2180 tilesize = 32;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2181 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2182 for (int y = 0; y < 512; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2183 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2184 uint32_t *line = fb + y * pitch / sizeof(uint32_t);
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2185 int row = y >> yshift;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2186 int yoff = y >> 1 & ymask;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2187 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2188 {
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2189 uint16_t address = (row * 64 + col) * tilesize + yoff * 4;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2190 for (int x = 0; x < 4; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2191 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2192 uint8_t byte = context->vdpmem[address++];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2193 uint8_t left = byte >> 4 | pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2194 uint8_t right = byte & 0xF | pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2195 *(line++) = context->colors[left];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2196 *(line++) = context->colors[left];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2197 *(line++) = context->colors[right];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2198 *(line++) = context->colors[right];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2199 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2200 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2201 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2202 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2203
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2204 static void vram_debug_mode4(uint32_t *fb, uint32_t pitch, vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2205 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2206 for (int y = 0; y < 256; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2207 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2208 uint32_t *line = fb + y * pitch / sizeof(uint32_t);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2209 int row = y >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2210 int yoff = y >> 1 & 7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2211 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2212 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2213 uint8_t pal = (col >= 32) << 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2214 uint16_t address = (row * 32 + (col & 31)) * 32 + yoff * 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2215 uint32_t pixels = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2216 for (int x = 0; x < 4; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2217 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2218 uint8_t byte = context->vdpmem[mode4_address_map[address++]];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2219 pixels |= planar_to_chunky[byte] << (x ^ 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2220 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2221 for (int x = 0; x < 32; x+=4)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2222 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2223 uint8_t pixel = (pixels >> (28 - x) & 0xF) | pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2224 *(line++) = context->colors[pixel + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2225 *(line++) = context->colors[pixel + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2226 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2227 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2228 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2229 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2230
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2231 static void vram_debug_tms(uint32_t *fb, uint32_t pitch, vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2232 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2233 uint8_t pal = ((context->debug_modes[DEBUG_VRAM] % 14) + 2) << 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2234 pal = (pal & 0xE) | (pal << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2235 for (int y = 0; y < 512; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2236 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2237 uint32_t *line = fb + y * pitch / sizeof(uint32_t);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2238 int row = y >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2239 int yoff = y >> 1 & 7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2240 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2241 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2242 uint16_t address = (row * 64 + col) * 8 + yoff;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2243 uint8_t byte = context->vdpmem[mode4_address_map[address^1]];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2244 for (int x = 0; x < 8; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2245 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2246 uint16_t pixel = (byte & 0x80) ? pal : 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2247 byte <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2248 *(line++) = context->color_map[pixel | FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2249 *(line++) = context->color_map[pixel | FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2250 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2251 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2252 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2253 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2254
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2255
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2256 static void vdp_update_per_frame_debug(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2257 {
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2258 if (context->enabled_debuggers & (1 << DEBUG_PLANE)) {
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2259 uint32_t pitch;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2260 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[DEBUG_PLANE], &pitch);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2261 uint16_t hscroll_mask;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2262 uint16_t v_mul;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2263 uint16_t vscroll_mask = 0x1F | (context->regs[REG_SCROLL] & 0x30) << 1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2264 switch(context->regs[REG_SCROLL] & 0x3)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2265 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2266 case 0:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2267 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2268 v_mul = 64;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2269 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2270 case 0x1:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2271 hscroll_mask = 0x3F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2272 v_mul = 128;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2273 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2274 case 0x2:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2275 //TODO: Verify this behavior
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2276 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2277 v_mul = 0;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2278 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2279 case 0x3:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2280 hscroll_mask = 0x7F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2281 v_mul = 256;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2282 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2283 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2284 uint16_t table_address;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2285 switch(context->debug_modes[DEBUG_PLANE] % 3)
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2286 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2287 case 0:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2288 table_address = context->regs[REG_SCROLL_A] << 10 & 0xE000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2289 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2290 case 1:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2291 table_address = context->regs[REG_SCROLL_B] << 13 & 0xE000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2292 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2293 case 2:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2294 table_address = context->regs[REG_WINDOW] << 10;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2295 if (context->regs[REG_MODE_4] & BIT_H40) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2296 table_address &= 0xF000;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2297 v_mul = 128;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2298 hscroll_mask = 0x3F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2299 } else {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2300 table_address &= 0xF800;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2301 v_mul = 64;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2302 hscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2303 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2304 vscroll_mask = 0x1F;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2305 break;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2306 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2307 uint32_t bg_color = context->colors[context->regs[REG_BG_COLOR & 0x3F]];
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2308 uint16_t num_rows;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2309 int num_lines;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2310 if (context->double_res) {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2311 num_rows = 64;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2312 num_lines = 16;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2313 } else {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2314 num_rows = 128;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2315 num_lines = 8;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2316 }
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2317 for (uint16_t row = 0; row < num_rows; row++)
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2318 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2319 uint16_t row_address = table_address + (row & vscroll_mask) * v_mul;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2320 for (uint16_t col = 0; col < 128; col++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2321 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2322 uint16_t address = row_address + (col & hscroll_mask) * 2;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2323 //pccv hnnn nnnn nnnn
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2324 //
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2325 uint16_t entry = context->vdpmem[address] << 8 | context->vdpmem[address + 1];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2326 uint8_t pal = entry >> 9 & 0x30;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2327
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2328 uint32_t *dst = fb + (row * pitch * num_lines / sizeof(uint32_t)) + col * 8;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2329 if (context->double_res) {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2330 address = (entry & 0x3FF) * 64;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2331 } else {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2332 address = (entry & 0x7FF) * 32;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2333 }
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2334 int y_diff = 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2335 if (entry & 0x1000) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2336 y_diff = -4;
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2337 address += (num_lines - 1) * 4;
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2338 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2339 int x_diff = 1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2340 if (entry & 0x800) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2341 x_diff = -1;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2342 address += 3;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2343 }
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2344 for (int y = 0; y < num_lines; y++)
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2345 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2346 uint16_t trow_address = address;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2347 uint32_t *row_dst = dst;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2348 for (int x = 0; x < 4; x++)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2349 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2350 uint8_t byte = context->vdpmem[trow_address];
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2351 trow_address += x_diff;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2352 uint8_t left, right;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2353 if (x_diff > 0) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2354 left = byte >> 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2355 right = byte & 0xF;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2356 } else {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2357 left = byte & 0xF;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2358 right = byte >> 4;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2359 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2360 *(row_dst++) = left ? context->colors[left|pal] : bg_color;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2361 *(row_dst++) = right ? context->colors[right|pal] : bg_color;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2362 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2363 address += y_diff;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2364 dst += pitch / sizeof(uint32_t);
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2365 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2366 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2367 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2368 render_framebuffer_updated(context->debug_fb_indices[DEBUG_PLANE], 1024);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2369 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2370
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2371 if (context->enabled_debuggers & (1 << DEBUG_VRAM)) {
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
2372 uint32_t pitch;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2373 uint32_t *fb = render_get_framebuffer(context->debug_fb_indices[DEBUG_VRAM], &pitch);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2374 if (context->type == VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2375 vram_debug_mode5(fb, pitch, context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2376 } else if (context->type != VDP_TMS9918A && (context->regs[REG_MODE_1] & BIT_MODE_4)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2377 vram_debug_mode4(fb, pitch, context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2378 } else if (context->type != VDP_GENESIS) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2379 vram_debug_tms(fb, pitch, context);
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
2380 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2381 render_framebuffer_updated(context->debug_fb_indices[DEBUG_VRAM], 1024);
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
2382 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2383
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2384 if (context->enabled_debuggers & (1 << DEBUG_CRAM)) {
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2385 uint32_t starting_line = 512 - 32*4;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2386 uint32_t *line = context->debug_fbs[DEBUG_CRAM]
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2387 + context->debug_fb_pitch[DEBUG_CRAM] * starting_line / sizeof(uint32_t);
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2388 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2389 for (int pal = 0; pal < 4; pal ++)
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2390 {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2391 uint32_t *cur;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2392 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2393 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2394 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2395 for (int offset = 0; offset < 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2396 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2397 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2398 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2399 *(cur++) = context->colors[pal * 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2400 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2401 *(cur++) = 0xFF000000;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2402 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2403 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(uint32_t);
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2404 }
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2405 cur = line;
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2406 for (int x = 0; x < 512; x++)
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2407 {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2408 *(cur++) = 0xFF000000;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2409 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2410 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(uint32_t);
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2411 }
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2412 } else {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2413 for (int pal = 0; pal < 2; pal ++)
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2414 {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2415 uint32_t *cur;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2416 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2417 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2418 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2419 for (int offset = MODE4_OFFSET; offset < MODE4_OFFSET + 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2420 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2421 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2422 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2423 *(cur++) = context->colors[pal * 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2424 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2425 *(cur++) = 0xFF000000;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2426 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2427 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(uint32_t);
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2428 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2429 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2430 for (int x = 0; x < 512; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2431 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2432 *(cur++) = 0xFF000000;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2433 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2434 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(uint32_t);
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2435 }
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2436 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2437 render_framebuffer_updated(context->debug_fb_indices[DEBUG_CRAM], 512);
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2438 context->debug_fbs[DEBUG_CRAM] = render_get_framebuffer(context->debug_fb_indices[DEBUG_CRAM], &context->debug_fb_pitch[DEBUG_CRAM]);
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2439 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2440 if (context->enabled_debuggers & (1 << DEBUG_COMPOSITE)) {
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2441 render_framebuffer_updated(context->debug_fb_indices[DEBUG_COMPOSITE], LINEBUF_SIZE);
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2442 context->debug_fbs[DEBUG_COMPOSITE] = render_get_framebuffer(context->debug_fb_indices[DEBUG_COMPOSITE], &context->debug_fb_pitch[DEBUG_COMPOSITE]);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2443 }
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2444 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2445
1629
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2446 void vdp_force_update_framebuffer(vdp_context *context)
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2447 {
1897
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired
Michael Pavone <pavone@retrodev.com>
parents: 1894
diff changeset
2448 if (!context->fb) {
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired
Michael Pavone <pavone@retrodev.com>
parents: 1894
diff changeset
2449 return;
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired
Michael Pavone <pavone@retrodev.com>
parents: 1894
diff changeset
2450 }
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2451 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2452
1629
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2453 uint16_t to_fill = lines_max - context->output_lines;
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2454 memset(
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2455 ((char *)context->fb) + context->output_pitch * context->output_lines,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2456 0,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2457 to_fill * context->output_pitch
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2458 );
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2459 render_framebuffer_updated(context->cur_buffer, context->h40_lines > context->output_lines / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2460 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2461 vdp_update_per_frame_debug(context);
1629
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2462 }
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2463
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2464 static void advance_output_line(vdp_context *context)
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2465 {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2466 //This function is kind of gross because of the need to deal with vertical border busting via mode changes
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2467 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2468 uint32_t output_line = context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2469 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2470 //vcounter increment occurs much later in Mode 4
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2471 output_line++;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2472 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2473
1899
789746b1a1b3 Fix crash in OD2 Titancade scene when border is completely cropped by overscan settings
Mike Pavone <pavone@retrodev.com>
parents: 1897
diff changeset
2474 if (context->output_lines >= lines_max || (!context->pushed_frame && output_line == context->inactive_start + context->border_top)) {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2475 //we've either filled up a full frame or we're at the bottom of screen in the current defined mode + border crop
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2476 if (!headless) {
1436
40c3be9f1af7 Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents: 1432
diff changeset
2477 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2478 uint8_t is_even = context->flags2 & FLAG2_EVEN_FIELD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2479 if (context->vcounter <= context->inactive_start && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2480 is_even = !is_even;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2481 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2482 context->cur_buffer = is_even ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2483 context->pushed_frame = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2484 context->fb = NULL;
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2485 }
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2486 vdp_update_per_frame_debug(context);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2487 context->h40_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2488 context->frame++;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2489 context->output_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2490 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2491
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2492 if (output_line < context->inactive_start + context->border_bot) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2493 if (context->output_lines) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2494 output_line = context->output_lines++;//context->border_top + context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2495 } else if (!output_line && !context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2496 //top border is completely cropped so we won't hit the case below
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2497 output_line = 0;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2498 context->output_lines = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2499 context->pushed_frame = 0;
2504
593a4f308335 Fix issue that was causing double frame output in Double Dragon 2
Michael Pavone <pavone@retrodev.com>
parents: 2503
diff changeset
2500 } else if (!context->pushed_frame) {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2501 context->output_lines = output_line + 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2502 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2503 } else if (output_line >= 0x200 - context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2504 if (output_line == 0x200 - context->border_top) {
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2505 //We're at the top of the display, force context->output_lines to be zero to avoid
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2506 //potential screen rolling if the mode is changed at an inopportune time
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2507 context->output_lines = 0;
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2508 context->pushed_frame = 0;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
2509 }
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2510 output_line = context->output_lines++;//context->vcounter - (0x200 - context->border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2511 } else {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2512 context->output = NULL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2513 return;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2514 }
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2515 if (!context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2516 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2517 }
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2518 output_line += context->top_offset;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2519 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * output_line);
1271
c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents: 1270
diff changeset
2520 #ifdef DEBUG_FB_FILL
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2521 for (int i = 0; i < LINEBUF_SIZE; i++)
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2522 {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2523 context->output[i] = 0xFFFF00FF;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2524 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2525 #endif
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2526 if (context->output && (context->regs[REG_MODE_4] & BIT_H40)) {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2527 context->h40_lines++;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
2528 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2529 }
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2530
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2531 void vdp_release_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2532 {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2533 if (context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2534 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2535 context->output = context->fb = NULL;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2536 }
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2537 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2538
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2539 void vdp_reacquire_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2540 {
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2541 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2542 if (context->output_lines <= lines_max && context->output_lines > 0) {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2543 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2544 context->output = (uint32_t *)(((char *)context->fb) + context->output_pitch * (context->output_lines - 1 + context->top_offset));
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2545 } else {
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2546 context->output = NULL;
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2547 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2548 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2549
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2550 static void render_border_garbage(vdp_context *context, uint32_t address, uint8_t *buf, uint8_t buf_off, uint16_t col)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2551 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2552 uint8_t base = col >> 9 & 0x30;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2553 for (int i = 0; i < 4; i++, address++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2554 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2555 uint8_t byte = context->vdpmem[address & 0xFFFF];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2556 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte >> 4;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2557 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte & 0xF;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2558 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2559 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2560
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2561 static void draw_right_border(vdp_context *context)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2562 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2563 uint8_t *dst = context->compositebuf + BORDER_LEFT + ((context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2564 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2565 if ((context->test_port & TEST_BIT_DISABLE) != 0) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2566 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2567 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2568 uint8_t test_layer = context->test_port >> 7 & 3;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2569 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2570 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2571 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2572 case 1:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2573 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2574 dst += BORDER_RIGHT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2575 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2576 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2577 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2578 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2579 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2580 i = 0;
1888
bd60e74fd173 Fix regression in H32 from fine scroll optimization
Michael Pavone <pavone@retrodev.com>
parents: 1887
diff changeset
2581 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2582 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2583 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2584 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2585 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2586 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2587 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2588 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2589 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2590 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2591 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2592 i = 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2593 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2594 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2595 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2596 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2597 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2598 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2599 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2600 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2601 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2602 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2603 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2604 dst += BORDER_RIGHT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2605 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2606 context->done_composite = dst;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2607 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2608 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2609 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2610
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2611 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; }
924
1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents: 923
diff changeset
2612 #define CHECK_LIMIT if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } context->hslot++; context->cycles += slot_cycles; CHECK_ONLY
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2613 #define OUTPUT_PIXEL(slot) if ((slot) >= BG_START_SLOT) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2614 uint8_t *src = context->compositebuf + ((slot) - BG_START_SLOT) *2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2615 uint32_t *dst = context->output + ((slot) - BG_START_SLOT) *2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2616 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2617 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2618 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2619 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2620 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2621 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2622 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2623 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2624 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2625 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2626 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2627
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2628 #define OUTPUT_PIXEL_H40(slot) if (slot <= (BG_START_SLOT + LINEBUF_SIZE/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2629 uint8_t *src = context->compositebuf + (slot - BG_START_SLOT) *2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2630 uint32_t *dst = context->output + (slot - BG_START_SLOT) *2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2631 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2632 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2633 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2634 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2635 }\
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2636 if (slot == (BG_START_SLOT + LINEBUF_SIZE/2)) {\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2637 context->done_composite = NULL;\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2638 } else {\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2639 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2640 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2641 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2642 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2643 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2644 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2645 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2646
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2647 #define OUTPUT_PIXEL_H32(slot) if (slot <= (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2648 uint8_t *src = context->compositebuf + (slot - BG_START_SLOT) *2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2649 uint32_t *dst = context->output + (slot - BG_START_SLOT) *2;\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2650 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2651 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2652 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2653 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2654 }\
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2655 if (slot == (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2656 context->done_composite = NULL;\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2657 } else {\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2658 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2659 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2660 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2661 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2662 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2663 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2664 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2665
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2666 //BG_START_SLOT => dst = 0, src = border
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2667 //BG_START_SLOT + 13/2=6, dst = 6, src = border + comp + 13
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2668 #define OUTPUT_PIXEL_MODE4(slot) if ((slot) >= BG_START_SLOT) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2669 uint8_t *src = context->compositebuf + ((slot) - BG_START_SLOT) *2;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2670 uint32_t *dst = context->output + ((slot) - BG_START_SLOT) *2;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2671 if ((slot) - BG_START_SLOT < BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2672 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2673 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2674 } else if ((slot) - BG_START_SLOT < (BORDER_LEFT+256)/2){\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2675 if ((slot) - BG_START_SLOT == BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2676 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2677 src++;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2678 } else {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2679 *(dst++) = context->colors[*(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2680 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2681 *(dst++) = context->colors[*(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2682 } else if ((slot) - BG_START_SLOT <= (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2683 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2684 if ((slot) - BG_START_SLOT < (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2685 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2686 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2687 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2688 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2689
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2690 #define COLUMN_RENDER_BLOCK(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2691 case startcyc:\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2692 OUTPUT_PIXEL(startcyc)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2693 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2694 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
2695 case ((startcyc+1)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2696 OUTPUT_PIXEL((startcyc+1)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2697 external_slot(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2698 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
2699 case ((startcyc+2)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2700 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2701 render_map_1(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2702 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
2703 case ((startcyc+3)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2704 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2705 render_map_2(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2706 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
2707 case ((startcyc+4)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2708 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2709 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2710 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
2711 case ((startcyc+5)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2712 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2713 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2714 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
2715 case ((startcyc+6)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2716 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2717 render_map_3(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2718 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
2719 case ((startcyc+7)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2720 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2721 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2722 CHECK_LIMIT
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2723
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2724 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2725 case startcyc:\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2726 OUTPUT_PIXEL(startcyc)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2727 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2728 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2729 case (startcyc+1):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2730 /* refresh, so don't run dma src */\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2731 OUTPUT_PIXEL((startcyc+1)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2732 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2733 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2734 CHECK_ONLY\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2735 case (startcyc+2):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2736 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2737 render_map_1(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2738 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2739 case (startcyc+3):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2740 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2741 render_map_2(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2742 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2743 case (startcyc+4):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2744 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2745 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2746 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2747 case (startcyc+5):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2748 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2749 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2750 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2751 case (startcyc+6):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2752 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2753 render_map_3(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2754 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2755 case (startcyc+7):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2756 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2757 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2758 CHECK_LIMIT
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2759
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2760 #define COLUMN_RENDER_BLOCK_MODE4(column, startcyc) \
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2761 case startcyc:\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2762 OUTPUT_PIXEL_MODE4(startcyc)\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2763 read_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2764 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2765 case ((startcyc+1)&0xFF):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2766 OUTPUT_PIXEL_MODE4((startcyc+1)&0xFF)\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
2767 if (column & 3) {\
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
2768 scan_sprite_table_mode4(context);\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2769 } else {\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2770 external_slot(context);\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2771 }\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2772 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2773 case ((startcyc+2)&0xFF):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2774 OUTPUT_PIXEL_MODE4((startcyc+2)&0xFF)\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2775 fetch_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2776 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2777 case ((startcyc+3)&0xFF):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2778 OUTPUT_PIXEL_MODE4((startcyc+3)&0xFF)\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2779 render_map_mode4(context->vcounter, column, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2780 CHECK_LIMIT
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2781
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2782 #define CHECK_LIMIT_HSYNC(slot) \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2783 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2784 if (slot >= HSYNC_SLOT_H40 && slot < HSYNC_END_H40) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2785 context->cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2786 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2787 context->cycles += slot_cycles;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2788 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2789 if (slot == 182) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2790 context->hslot = 229;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2791 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2792 context->hslot++;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2793 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2794 CHECK_ONLY
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
2795
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2796 #define SPRITE_RENDER_H40(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2797 case slot:\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2798 OUTPUT_PIXEL_H40(slot)\
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2799 if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2800 advance_output_line(context);\
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2801 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2802 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2803 }\
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2804 }\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2805 render_sprite_cells( context);\
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2806 if (slot == 168 || slot == 247 || slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2807 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2808 context,\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2809 context->serial_address,\
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2810 context->tmp_buf_b,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2811 context->buf_b_off + (slot == 247 ? 0 : 8),\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2812 slot == 247 ? context->col_1 : context->col_2\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2813 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2814 if (slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2815 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2816 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2817 }\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2818 } else if (slot == 243) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2819 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2820 context,\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2821 context->serial_address,\
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2822 context->tmp_buf_a,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2823 context->buf_a_off,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2824 context->col_1\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2825 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2826 } else if (slot == 169) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2827 draw_right_border(context);\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2828 }\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2829 scan_sprite_table(context->vcounter, context);\
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2830 CHECK_LIMIT_HSYNC(slot)
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
2831
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2832 //Note that the line advancement check will fail if BG_START_SLOT is > 6
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2833 //as we're bumping up against the hcounter jump
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2834 #define SPRITE_RENDER_H32(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2835 case slot:\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2836 OUTPUT_PIXEL_H32(slot)\
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2837 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2838 advance_output_line(context);\
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2839 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2840 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2841 }\
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2842 }\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2843 render_sprite_cells( context);\
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2844 if (slot == 136 || slot == 247 || slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2845 render_border_garbage(\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2846 context,\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2847 context->serial_address,\
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2848 context->tmp_buf_b,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2849 context->buf_b_off + (slot == 247 ? 0 : 8),\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2850 slot == 247 ? context->col_1 : context->col_2\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2851 );\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2852 if (slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2853 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2854 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2855 }\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2856 } else if (slot == 137) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2857 draw_right_border(context);\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
2858 }\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2859 scan_sprite_table(context->vcounter, context);\
924
1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents: 923
diff changeset
2860 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2861 if (slot == 147) {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2862 context->hslot = 233;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2863 } else {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2864 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2865 }\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2866 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2867 CHECK_ONLY
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2868
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2869 #define MODE4_CHECK_SLOT_LINE(slot) \
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2870 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
2871 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
2872 advance_output_line(context);\
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2873 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2874 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2875 }\
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
2876 }\
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2877 if ((slot) == 147) {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2878 context->hslot = 233;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2879 } else {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2880 context->hslot++;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2881 }\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2882 context->cycles += slot_cycles;\
1163
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
2883 if ((slot+1) == LINE_CHANGE_MODE4) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
2884 vdp_advance_line(context);\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
2885 if (context->vcounter == 192) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
2886 return;\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
2887 }\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
2888 }\
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2889 CHECK_ONLY
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2890
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2891 #define CALC_SLOT(slot, increment) ((slot+increment) > 147 && (slot+increment) < 233 ? (slot+increment-148+233): (slot+increment))
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2892
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2893 #define SPRITE_RENDER_H32_MODE4(slot) \
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2894 case slot:\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2895 OUTPUT_PIXEL_MODE4(slot)\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
2896 read_sprite_x_mode4(context);\
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
2897 MODE4_CHECK_SLOT_LINE(slot)\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2898 case CALC_SLOT(slot, 1):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2899 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 1))\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
2900 read_sprite_x_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2901 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot,1))\
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2902 case CALC_SLOT(slot, 2):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2903 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 2))\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2904 fetch_sprite_cells_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2905 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 2))\
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2906 case CALC_SLOT(slot, 3):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2907 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 3))\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2908 render_sprite_cells_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2909 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 3))\
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2910 case CALC_SLOT(slot, 4):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2911 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 4))\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
2912 fetch_sprite_cells_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2913 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 4))\
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2914 case CALC_SLOT(slot, 5):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2915 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 5))\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
2916 render_sprite_cells_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
2917 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 5))
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2918
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2919 static uint32_t dummy_buffer[LINEBUF_SIZE];
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2920 static void vdp_h40_line(vdp_context * context)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2921 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2922 uint16_t address;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2923 uint32_t mask;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2924 uint32_t const slot_cycles = MCLKS_SLOT_H40;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2925 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2926 uint8_t test_layer = context->test_port >> 7 & 3;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2927
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2928 //165
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2929 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2930 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2931 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2932 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2933 //pretty consistently
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2934 context->vscroll_latch[0] = context->vsram[0];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2935 context->vscroll_latch[1] = context->vsram[1];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2936 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2937 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2938 //166
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2939 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2940 //167
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2941 context->sprite_index = 0x80;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2942 context->slot_counter = 0;
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2943 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2944 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2945 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2946 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2947 context->tmp_buf_b, context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2948 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2949 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2950 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2951 //168
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2952 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2953 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2954 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2955 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2956 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2957 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2958 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2959 );
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2960 scan_sprite_table(context->vcounter, context);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2961
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2962 //Do palette lookup for end of previous line
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2963 uint8_t *src = context->compositebuf + (LINE_CHANGE_H40 - BG_START_SLOT) *2;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2964 uint32_t *dst = context->output + (LINE_CHANGE_H40 - BG_START_SLOT) *2;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2965 if (context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2966 if (test_layer) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2967 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2968 {
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2969 *(dst++) = context->colors[*(src++)];
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2970 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2971 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2972 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2973 {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2974 if (*src & 0x3F) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2975 *(dst++) = context->colors[*(src++)];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2976 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2977 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2978 }
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2979 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2980 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2981 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2982 advance_output_line(context);
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2983 //169-242 (inclusive)
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2984 for (int i = 0; i < 27; i++)
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2985 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2986 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2987 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2988 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2989 //243
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2990 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2991 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2992 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2993 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2994 context->tmp_buf_a,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2995 context->buf_a_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2996 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2997 );
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
2998 scan_sprite_table(context->vcounter, context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
2999 //244
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3000 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3001 mask = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3002 if (context->regs[REG_MODE_3] & 0x2) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3003 mask |= 0xF8;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3004 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3005 if (context->regs[REG_MODE_3] & 0x1) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3006 mask |= 0x7;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3007 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3008 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3009 address += (context->vcounter & mask) * 4;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3010 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
3011 context->hscroll_a_fine = context->hscroll_a & 0xF;
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3012 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
3013 context->hscroll_b_fine = context->hscroll_b & 0xF;
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3014 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3015 //243-246 inclusive
1877
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3016 for (int i = 0; i < 3; i++)
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3017 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3018 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3019 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3020 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3021 //247
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3022 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3023 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3024 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3025 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3026 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3027 context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3028 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3029 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3030 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3031 //248
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3032
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3033 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3034 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3035 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3036 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3037 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3038 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3039 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3040 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3041 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3042 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3043 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3044 //250
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3045 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3046 scan_sprite_table(context->vcounter, context);
1877
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3047 //251
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3048 scan_sprite_table(context->vcounter, context);//Just a guess
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3049 //252
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3050 scan_sprite_table(context->vcounter, context);//Just a guess
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3051 //254
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3052 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3053 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3054 //255
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3055 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3056 context->flags |= FLAG_DOT_OFLOW;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3057 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3058 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3059 //0
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3060 scan_sprite_table(context->vcounter, context);//Just a guess
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3061 //seems like the sprite table scan fills a shift register
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3062 //values are FIFO, but unused slots precede used slots
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3063 //so we set cur_slot to slot_counter and let it wrap around to
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3064 //the beginning of the list
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3065 context->cur_slot = context->slot_counter;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3066 context->sprite_x_offset = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3067 context->sprite_draws = MAX_SPRITES_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3068 //background planes and layer compositing
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3069 for (int col = 0; col < 42; col+=2)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3070 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3071 read_map_scroll_a(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3072 render_map_1(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3073 render_map_2(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3074 read_map_scroll_b(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3075 render_map_3(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3076 render_map_output(context->vcounter, col, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3077 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3078 //sprite rendering phase 2
1877
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3079 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3080 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3081 read_sprite_x(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3082 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3083 //163
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3084 context->cur_slot = MAX_SPRITES_LINE-1;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3085 memset(context->linebuf, 0, LINEBUF_SIZE);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3086 context->flags &= ~FLAG_MASKED;
2564
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3087 while (context->sprite_draws) {
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3088 context->sprite_draws--;
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3089 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
2563
f51d750b4d06 Fix sprite overflow regression in Super Hang-On and other games
Michael Pavone <pavone@retrodev.com>
parents: 2559
diff changeset
3090 }
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3091 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3092 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3093 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3094 context->serial_address,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3095 context->tmp_buf_a, context->buf_a_off,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3096 context->col_1
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3097 );
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3098 //164
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3099 render_sprite_cells(context);
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3100 render_border_garbage(
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3101 context,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3102 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3103 context->tmp_buf_a, context->buf_a_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3104 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3105 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3106 context->cycles += MCLKS_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3107 vdp_advance_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3108 src = context->compositebuf;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3109 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3110 return;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3111 }
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3112 dst = context->output;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3113 if (test_layer) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3114 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3115 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3116 *(dst++) = context->colors[*(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3117 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3118 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3119 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3120 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3121 if (*src & 0x3F) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3122 *(dst++) = context->colors[*(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3123 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3124 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3125 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3126 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3127 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3128 }
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
3129 static void vdp_h40(vdp_context * context, uint32_t target_cycles)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3130 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3131 uint16_t address;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3132 uint32_t mask;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3133 uint32_t const slot_cycles = MCLKS_SLOT_H40;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3134 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3135 uint8_t test_layer = context->test_port >> 7 & 3;
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3136 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3137 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3138 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3139 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3140 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3141 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3142 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3143 for (;;)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3144 {
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3145 case 165:
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3146 //only consider doing a line at a time if the FIFO is empty, there are no pending reads and there is no DMA running
1925
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
3147 if (context->fifo_read == -1 && !(context->flags & FLAG_DMA_RUN) && ((context->cd & 1) || (context->flags & FLAG_READ_FETCHED))) {
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3148 while (target_cycles - context->cycles >= MCLKS_LINE && context->state != PREPARING && context->vcounter != context->inactive_start) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3149 vdp_h40_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3150 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3151 CHECK_ONLY
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3152 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3153 //This shouldn't happen normally, but it can theoretically
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3154 //happen when doing border busting
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3155 context->output = dummy_buffer;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3156 }
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3157 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3158 OUTPUT_PIXEL(165)
1432
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3159 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3160 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3161 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3162 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3163 //pretty consistently
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3164 context->vscroll_latch[0] = context->vsram[0];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3165 context->vscroll_latch[1] = context->vsram[1];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3166 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
3167 if (context->state == PREPARING) {
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3168 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3169 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3170 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3171 }
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3172 CHECK_LIMIT
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3173 case 166:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3174 OUTPUT_PIXEL(166)
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
3175 if (context->state == PREPARING) {
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3176 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3177 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3178 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3179 }
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3180 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3181 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3182 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3183 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3184 }
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3185 CHECK_LIMIT
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3186 //sprite attribute table scan starts
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3187 case 167:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3188 OUTPUT_PIXEL(167)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3189 context->sprite_index = 0x80;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3190 context->slot_counter = 0;
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3191 render_sprite_cells(context);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3192 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3193 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3194 context->serial_address,
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3195 context->tmp_buf_b, context->buf_b_off,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3196 context->col_1
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3197 );
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3198 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3199 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3200 SPRITE_RENDER_H40(168)
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3201 SPRITE_RENDER_H40(169)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3202 SPRITE_RENDER_H40(170)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3203 SPRITE_RENDER_H40(171)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3204 SPRITE_RENDER_H40(172)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3205 SPRITE_RENDER_H40(173)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3206 SPRITE_RENDER_H40(174)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3207 SPRITE_RENDER_H40(175)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3208 SPRITE_RENDER_H40(176)
1365
6dd2c3edd0b5 Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2
Michael Pavone <pavone@retrodev.com>
parents: 1362
diff changeset
3209 SPRITE_RENDER_H40(177)//End of border?
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3210 SPRITE_RENDER_H40(178)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3211 SPRITE_RENDER_H40(179)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3212 SPRITE_RENDER_H40(180)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3213 SPRITE_RENDER_H40(181)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3214 SPRITE_RENDER_H40(182)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3215 SPRITE_RENDER_H40(229)
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3216 //!HSYNC asserted
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3217 SPRITE_RENDER_H40(230)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3218 SPRITE_RENDER_H40(231)
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3219 case 232:
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3220 external_slot(context);
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3221 CHECK_LIMIT_HSYNC(232)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3222 SPRITE_RENDER_H40(233)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3223 SPRITE_RENDER_H40(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3224 SPRITE_RENDER_H40(235)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3225 SPRITE_RENDER_H40(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3226 SPRITE_RENDER_H40(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3227 SPRITE_RENDER_H40(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3228 SPRITE_RENDER_H40(239)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3229 SPRITE_RENDER_H40(240)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3230 SPRITE_RENDER_H40(241)
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3231 SPRITE_RENDER_H40(242)
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3232 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3233 case 244:
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3234 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3235 mask = 0;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3236 if (context->regs[REG_MODE_3] & 0x2) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3237 mask |= 0xF8;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3238 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3239 if (context->regs[REG_MODE_3] & 0x1) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3240 mask |= 0x7;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3241 }
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3242 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3243 address += (context->vcounter & mask) * 4;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3244 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
3245 context->hscroll_a_fine = context->hscroll_a & 0xF;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3246 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
3247 context->hscroll_b_fine = context->hscroll_b & 0xF;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3248 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
924
1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents: 923
diff changeset
3249 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3250 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3251 context->cycles += h40_hsync_cycles[14];
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3252 CHECK_ONLY //provides "garbage" for border when plane A selected
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3253 //!HSYNC high
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3254 SPRITE_RENDER_H40(245)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3255 SPRITE_RENDER_H40(246)
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3256 SPRITE_RENDER_H40(247) //provides "garbage" for border when plane B selected
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3257 SPRITE_RENDER_H40(248) //provides "garbage" for border when plane B selected
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3258 case 249:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3259 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3260 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3261 SPRITE_RENDER_H40(250)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3262 case 251:
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3263 render_map_1(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3264 scan_sprite_table(context->vcounter, context);//Just a guess
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3265 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3266 case 252:
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3267 render_map_2(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3268 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3269 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3270 case 253:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3271 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3272 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3273 SPRITE_RENDER_H40(254)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3274 case 255:
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3275 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3276 context->flags |= FLAG_DOT_OFLOW;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3277 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3278 render_map_3(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3279 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3280 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3281 case 0:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3282 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3283 scan_sprite_table(context->vcounter, context);//Just a guess
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3284 //seems like the sprite table scan fills a shift register
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3285 //values are FIFO, but unused slots precede used slots
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3286 //so we set cur_slot to slot_counter and let it wrap around to
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3287 //the beginning of the list
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3288 context->cur_slot = context->slot_counter;
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
3289 context->sprite_x_offset = 0;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3290 context->sprite_draws = MAX_SPRITES_LINE;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3291 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3292 COLUMN_RENDER_BLOCK(2, 1)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3293 COLUMN_RENDER_BLOCK(4, 9)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3294 COLUMN_RENDER_BLOCK(6, 17)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3295 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3296 COLUMN_RENDER_BLOCK(10, 33)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3297 COLUMN_RENDER_BLOCK(12, 41)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3298 COLUMN_RENDER_BLOCK(14, 49)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3299 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3300 COLUMN_RENDER_BLOCK(18, 65)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3301 COLUMN_RENDER_BLOCK(20, 73)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3302 COLUMN_RENDER_BLOCK(22, 81)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3303 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3304 COLUMN_RENDER_BLOCK(26, 97)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3305 COLUMN_RENDER_BLOCK(28, 105)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3306 COLUMN_RENDER_BLOCK(30, 113)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3307 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3308 COLUMN_RENDER_BLOCK(34, 129)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3309 COLUMN_RENDER_BLOCK(36, 137)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3310 COLUMN_RENDER_BLOCK(38, 145)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3311 COLUMN_RENDER_BLOCK_REFRESH(40, 153)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3312 case 161:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3313 OUTPUT_PIXEL(161)
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3314 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3315 CHECK_LIMIT
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3316 case 162:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3317 OUTPUT_PIXEL(162)
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3318 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3319 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3320 //sprite render to line buffer starts
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3321 case 163:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3322 OUTPUT_PIXEL(163)
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3323 context->cur_slot = MAX_SPRITES_LINE-1;
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3324 memset(context->linebuf, 0, LINEBUF_SIZE);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3325 context->flags &= ~FLAG_MASKED;
2564
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3326 while (context->sprite_draws) {
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3327 context->sprite_draws--;
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3328 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
2563
f51d750b4d06 Fix sprite overflow regression in Super Hang-On and other games
Michael Pavone <pavone@retrodev.com>
parents: 2559
diff changeset
3329 }
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3330 render_sprite_cells(context);
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3331 render_border_garbage(
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3332 context,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3333 context->serial_address,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3334 context->tmp_buf_a, context->buf_a_off,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3335 context->col_1
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3336 );
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3337 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3338 case 164:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3339 OUTPUT_PIXEL(164)
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3340 render_sprite_cells(context);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3341 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3342 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3343 context->serial_address,
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3344 context->tmp_buf_a, context->buf_a_off + 8,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3345 context->col_2
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3346 );
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3347 if (context->flags & FLAG_DMA_RUN) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3348 run_dma_src(context, -1);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3349 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3350 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3351 context->cycles += slot_cycles;
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3352 vdp_advance_line(context);
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3353 CHECK_ONLY
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3354 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3355 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3356 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3357 context->cycles += slot_cycles;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3358 return;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3359 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3360 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3361
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
3362 static void vdp_h32(vdp_context * context, uint32_t target_cycles)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3363 {
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3364 uint16_t address;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3365 uint32_t mask;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3366 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3367 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3368 uint8_t test_layer = context->test_port >> 7 & 3;
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3369 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3370 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3371 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3372 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3373 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3374 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3375 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3376 for (;;)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3377 {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3378 case 133:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3379 OUTPUT_PIXEL(133)
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
3380 if (context->state == PREPARING) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3381 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3382 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3383 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3384 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3385 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3386 case 134:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3387 OUTPUT_PIXEL(134)
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
3388 if (context->state == PREPARING) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3389 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3390 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3391 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3392 }
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3393 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3394 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3395 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3396 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3397 }
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3398 CHECK_LIMIT
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3399 //sprite attribute table scan starts
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3400 case 135:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3401 OUTPUT_PIXEL(135)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3402 context->sprite_index = 0x80;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3403 context->slot_counter = 0;
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3404 render_sprite_cells(context);
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3405 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3406 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3407 context->serial_address,
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3408 context->tmp_buf_b, context->buf_b_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3409 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3410 );
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3411 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3412 CHECK_LIMIT
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3413 SPRITE_RENDER_H32(136)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3414 SPRITE_RENDER_H32(137)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3415 SPRITE_RENDER_H32(138)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3416 SPRITE_RENDER_H32(139)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3417 SPRITE_RENDER_H32(140)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3418 SPRITE_RENDER_H32(141)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3419 SPRITE_RENDER_H32(142)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3420 SPRITE_RENDER_H32(143)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3421 SPRITE_RENDER_H32(144)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3422 case 145:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3423 OUTPUT_PIXEL(145)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3424 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3425 CHECK_LIMIT
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3426 SPRITE_RENDER_H32(146)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3427 SPRITE_RENDER_H32(147)
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3428 SPRITE_RENDER_H32(233)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3429 SPRITE_RENDER_H32(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3430 SPRITE_RENDER_H32(235)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3431 //HSYNC start
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3432 SPRITE_RENDER_H32(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3433 SPRITE_RENDER_H32(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3434 SPRITE_RENDER_H32(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3435 SPRITE_RENDER_H32(239)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3436 SPRITE_RENDER_H32(240)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3437 SPRITE_RENDER_H32(241)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3438 SPRITE_RENDER_H32(242)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3439 case 243:
1422
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
3440 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
3441 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
3442 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
3443 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
3444 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
3445 //to confirm that one way or another
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
3446 context->vscroll_latch[0] = context->vsram[0];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
3447 context->vscroll_latch[1] = context->vsram[1];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
3448 }
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3449 external_slot(context);
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3450 //provides "garbage" for border when plane A selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3451 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3452 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3453 context->serial_address,
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3454 context->tmp_buf_a,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3455 context->buf_a_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3456 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3457 );
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3458 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3459 case 244:
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3460 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3461 mask = 0;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3462 if (context->regs[REG_MODE_3] & 0x2) {
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3463 mask |= 0xF8;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3464 }
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3465 if (context->regs[REG_MODE_3] & 0x1) {
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3466 mask |= 0x7;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3467 }
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3468 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3469 address += (context->vcounter & mask) * 4;
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3470 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
3471 context->hscroll_a_fine = context->hscroll_a & 0xF;
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3472 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3];
1888
bd60e74fd173 Fix regression in H32 from fine scroll optimization
Michael Pavone <pavone@retrodev.com>
parents: 1887
diff changeset
3473 context->hscroll_b_fine = context->hscroll_b & 0xF;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3474 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3475 CHECK_LIMIT //provides "garbage" for border when plane A selected
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3476 SPRITE_RENDER_H32(245)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3477 SPRITE_RENDER_H32(246)
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3478 SPRITE_RENDER_H32(247) //provides "garbage" for border when plane B selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3479 SPRITE_RENDER_H32(248) //provides "garbage" for border when plane B selected
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3480 //!HSYNC high
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3481 case 249:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3482 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3483 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3484 SPRITE_RENDER_H32(250)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3485 case 251:
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3486 if (context->cur_slot >= 0 && context->sprite_draw_list[context->cur_slot].x_pos) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3487 context->flags |= FLAG_DOT_OFLOW;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3488 }
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3489 render_map_1(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3490 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3491 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3492 case 252:
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3493 render_map_2(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3494 scan_sprite_table(context->vcounter, context);//Just a guess
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3495 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3496 case 253:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3497 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3498 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3499 case 254:
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3500 render_sprite_cells(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3501 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3502 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3503 case 255:
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3504 render_map_3(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3505 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3506 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3507 case 0:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3508 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3509 scan_sprite_table(context->vcounter, context);//Just a guess
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3510 //reverse context slot counter so it counts the number of sprite slots
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3511 //filled rather than the number of available slots
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
3512 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3513 context->cur_slot = context->slot_counter;
1873
041a381b9f0d Fix regression in sprite rendering in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 1871
diff changeset
3514 context->sprite_x_offset = 0;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3515 context->sprite_draws = MAX_SPRITES_LINE_H32;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3516 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3517 COLUMN_RENDER_BLOCK(2, 1)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3518 COLUMN_RENDER_BLOCK(4, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3519 COLUMN_RENDER_BLOCK(6, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3520 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3521 COLUMN_RENDER_BLOCK(10, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3522 COLUMN_RENDER_BLOCK(12, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3523 COLUMN_RENDER_BLOCK(14, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3524 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3525 COLUMN_RENDER_BLOCK(18, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3526 COLUMN_RENDER_BLOCK(20, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3527 COLUMN_RENDER_BLOCK(22, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3528 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3529 COLUMN_RENDER_BLOCK(26, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3530 COLUMN_RENDER_BLOCK(28, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3531 COLUMN_RENDER_BLOCK(30, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3532 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3533 case 129:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3534 OUTPUT_PIXEL(129)
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3535 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3536 CHECK_LIMIT
1269
ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1267
diff changeset
3537 case 130: {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3538 OUTPUT_PIXEL(130)
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3539 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3540 CHECK_LIMIT
1269
ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1267
diff changeset
3541 }
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3542 //sprite render to line buffer starts
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3543 case 131:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3544 OUTPUT_PIXEL(131)
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3545 context->cur_slot = MAX_SPRITES_LINE_H32-1;
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3546 memset(context->linebuf, 0, LINEBUF_SIZE);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3547 context->flags &= ~FLAG_MASKED;
2564
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3548 while (context->sprite_draws) {
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3549 context->sprite_draws--;
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3550 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
2563
f51d750b4d06 Fix sprite overflow regression in Super Hang-On and other games
Michael Pavone <pavone@retrodev.com>
parents: 2559
diff changeset
3551 }
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3552 render_sprite_cells(context);
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3553 render_border_garbage(
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3554 context,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3555 context->serial_address,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3556 context->tmp_buf_a, context->buf_a_off,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3557 context->col_1
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3558 );
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3559 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3560 case 132:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3561 OUTPUT_PIXEL(132)
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3562 render_sprite_cells(context);
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3563 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3564 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3565 context->serial_address,
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3566 context->tmp_buf_a, context->buf_a_off + 8,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3567 context->col_2
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3568 );
1173
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
3569 if (context->flags & FLAG_DMA_RUN) {
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
3570 run_dma_src(context, -1);
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
3571 }
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
3572 context->hslot++;
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
3573 context->cycles += slot_cycles;
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
3574 vdp_advance_line(context);
1173
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
3575 CHECK_ONLY
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3576 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3577 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3578 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3579 context->cycles += MCLKS_SLOT_H32;
503
eee6be465c47 Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 499
diff changeset
3580 }
eee6be465c47 Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 499
diff changeset
3581 }
eee6be465c47 Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 499
diff changeset
3582
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3583 static void vdp_h32_mode4(vdp_context * context, uint32_t target_cycles)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3584 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3585 uint16_t address;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3586 uint32_t mask;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3587 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3588 uint8_t bgindex = 0x10 | (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3589 uint8_t test_layer = context->test_port >> 7 & 3;
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3590 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3591 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3592 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3593 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3594 }
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3595 switch(context->hslot)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3596 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3597 for (;;)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3598 {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3599 //sprite rendering starts
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3600 SPRITE_RENDER_H32_MODE4(137)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3601 SPRITE_RENDER_H32_MODE4(143)
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3602 case 234:
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3603 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3604 CHECK_LIMIT
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3605 case 235:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3606 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3607 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3608 //!HSYNC low
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3609 case 236:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3610 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3611 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3612 case 237:
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3613 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3614 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3615 case 238:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3616 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3617 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3618 SPRITE_RENDER_H32_MODE4(239)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3619 SPRITE_RENDER_H32_MODE4(245)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3620 case 251:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3621 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3622 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3623 case 252:
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3624 external_slot(context);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3625 if (context->regs[REG_MODE_1] & BIT_HSCRL_LOCK && context->vcounter < 16) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3626 context->hscroll_a = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3627 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3628 context->hscroll_a = context->regs[REG_X_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3629 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3630 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3631 case 253:
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3632 context->sprite_index = 0;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3633 context->slot_counter = MAX_DRAWS_H32_MODE4;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3634 scan_sprite_table_mode4(context);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3635 CHECK_LIMIT
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3636 case 254:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3637 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3638 CHECK_LIMIT
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3639 case 255:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3640 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3641 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
3642 case 0: {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3643 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3644 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
3645 }
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3646 case 1:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3647 scan_sprite_table_mode4(context);
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3648 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3649 case 2:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3650 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3651 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3652 case 3:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3653 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3654 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
3655 case 4: {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3656 scan_sprite_table_mode4(context);
1121
1913f9c28003 Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents: 1120
diff changeset
3657 context->buf_a_off = 8;
1913f9c28003 Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents: 1120
diff changeset
3658 memset(context->tmp_buf_a, 0, 8);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3659 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
3660 }
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3661 COLUMN_RENDER_BLOCK_MODE4(0, 5)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3662 COLUMN_RENDER_BLOCK_MODE4(1, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3663 COLUMN_RENDER_BLOCK_MODE4(2, 13)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3664 COLUMN_RENDER_BLOCK_MODE4(3, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3665 COLUMN_RENDER_BLOCK_MODE4(4, 21)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3666 COLUMN_RENDER_BLOCK_MODE4(5, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3667 COLUMN_RENDER_BLOCK_MODE4(6, 29)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3668 COLUMN_RENDER_BLOCK_MODE4(7, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3669 COLUMN_RENDER_BLOCK_MODE4(8, 37)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3670 COLUMN_RENDER_BLOCK_MODE4(9, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3671 COLUMN_RENDER_BLOCK_MODE4(10, 45)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3672 COLUMN_RENDER_BLOCK_MODE4(11, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3673 COLUMN_RENDER_BLOCK_MODE4(12, 53)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3674 COLUMN_RENDER_BLOCK_MODE4(13, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3675 COLUMN_RENDER_BLOCK_MODE4(14, 61)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3676 COLUMN_RENDER_BLOCK_MODE4(15, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3677 COLUMN_RENDER_BLOCK_MODE4(16, 69)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3678 COLUMN_RENDER_BLOCK_MODE4(17, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3679 COLUMN_RENDER_BLOCK_MODE4(18, 77)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3680 COLUMN_RENDER_BLOCK_MODE4(19, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3681 COLUMN_RENDER_BLOCK_MODE4(20, 85)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3682 COLUMN_RENDER_BLOCK_MODE4(21, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3683 COLUMN_RENDER_BLOCK_MODE4(22, 93)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3684 COLUMN_RENDER_BLOCK_MODE4(23, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3685 COLUMN_RENDER_BLOCK_MODE4(24, 101)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3686 COLUMN_RENDER_BLOCK_MODE4(25, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3687 COLUMN_RENDER_BLOCK_MODE4(26, 109)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3688 COLUMN_RENDER_BLOCK_MODE4(27, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3689 COLUMN_RENDER_BLOCK_MODE4(28, 117)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3690 COLUMN_RENDER_BLOCK_MODE4(29, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3691 COLUMN_RENDER_BLOCK_MODE4(30, 125)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3692 COLUMN_RENDER_BLOCK_MODE4(31, 129)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3693 case 133:
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3694 OUTPUT_PIXEL_MODE4(133)
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3695 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3696 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3697 case 134:
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3698 OUTPUT_PIXEL_MODE4(134)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3699 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3700 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3701 case 135:
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3702 OUTPUT_PIXEL_MODE4(135)
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3703 external_slot(context);
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3704 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
3705 case 136: {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3706 OUTPUT_PIXEL_MODE4(136)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3707 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3708 //set things up for sprite rendering in the next slot
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3709 memset(context->linebuf, 0, LINEBUF_SIZE);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3710 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3711 context->sprite_draws = MAX_DRAWS_H32_MODE4;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3712 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
3713 }}
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3714 default:
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3715 context->hslot++;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3716 context->cycles += MCLKS_SLOT_H32;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3717 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3718 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3719
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3720
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3721 static void tms_fetch_pattern_name(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3722 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3723 uint16_t address = context->regs[REG_SCROLL_A] << 10 & 0x3C00;
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3724 if (context->regs[REG_MODE_2] & BIT_M1) {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3725 //Text mode
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3726 address |= (context->vcounter >> 3) * 40;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3727 address += (context->hslot - 4) / 3;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3728 } else {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3729 //Graphics/Multicolor
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3730 address |= context->vcounter << 2 & 0x03E0;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3731 address |= context->hslot >> 2;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3732 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3733 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3734 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3735 context->col_1 = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3736 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3737
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3738 static void tms_fetch_color(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3739 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3740 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3741 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3742 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3743 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3744 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3745 uint16_t address = context->regs[REG_COLOR_TABLE] << 6;
2411
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
3746 if (context->regs[REG_MODE_1] & BIT_M3) {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3747 //Graphics II
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3748 uint16_t upper_vcounter_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3749 uint16_t pattern_name_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3750 if (context->type > VDP_SMS2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3751 //SMS1 and TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3752 upper_vcounter_mask = address & 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3753 pattern_name_mask = (address & 0x07C0) | 0x0038;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3754 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3755 //SMS2 and Game Gear
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3756 upper_vcounter_mask = 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3757 pattern_name_mask = 0x07F8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3758 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3759 address &= 0x2000;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3760 address |= context->vcounter << 5 & upper_vcounter_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3761 address |= context->col_1 << 3 & pattern_name_mask;
2258
a28e1042f4de Fix a few of the most glaring TMS9918A issues
Michael Pavone <pavone@retrodev.com>
parents: 2257
diff changeset
3762 address |= context->vcounter & 7;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3763 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3764 address |= context->col_1 >> 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3765 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3766 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3767 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3768 context->col_2 = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3769 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3770
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3771 static void tms_fetch_pattern_value(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3772 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3773 uint16_t address = context->regs[REG_PATTERN_GEN] << 11 & 0x3800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3774 if (context->regs[REG_MODE_1] & BIT_M3) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3775 //Graphics II
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3776 uint16_t mask = context->type > VDP_SMS2 ? address & 0x1800 : 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3777 address &= 0x2000;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3778 address |= context->vcounter << 5 & mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3779 }
2414
dc05f1805921 Fix out of bound read from mode4_address_map in TMS modes
Michael Pavone <pavone@retrodev.com>
parents: 2411
diff changeset
3780 address |= context->col_1 << 3 & 0x7F8;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3781 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3782 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3783 address |= context->vcounter >> 2 & 0x3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3784 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3785 address |= context->vcounter & 0x7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3786 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3787
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3788 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3789 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3790 uint8_t value = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3791 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3792 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3793 context->tmp_buf_a[0] = 0xF0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3794 context->tmp_buf_b[0] = value;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3795 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3796 context->tmp_buf_a[0] = value;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3797 context->tmp_buf_b[0] = context->col_2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3798 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3799 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3800
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3801 static void tms_sprite_scan(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3802 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3803 if (context->sprite_draws > 4 || context->sprite_index == 32) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3804 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3805 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3806 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3807 address |= context->sprite_index << 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3808 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3809 uint8_t y = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3810 if (y == 208) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3811 context->sprite_index = 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3812 context->sprite_info_list[4].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3813 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3814 uint8_t diff = context->vcounter + 1 - y;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3815 uint8_t size = 8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3816 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3817 size *= 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3818 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3819 if (context->regs[REG_MODE_2] & BIT_SPRITE_ZM) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3820 size *= 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3821 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3822 if (diff < size) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3823 context->sprite_info_list[context->sprite_draws++].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3824 if (context->sprite_draws == 5) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3825 context->flags |= FLAG_DOT_OFLOW;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3826 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3827 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3828 context->sprite_info_list[4].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3829 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3830 context->sprite_index++;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3831 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3832
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3833 static void tms_sprite_vert(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3834 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3835 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3836 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3837 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3838 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3839 address |= context->sprite_info_list[context->sprite_index].index << 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3840 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3841 context->sprite_info_list[context->sprite_index].y = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3842 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3843
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3844 static void tms_sprite_horiz(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3845 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3846 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3847 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3848 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3849 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3850 address |= context->sprite_info_list[context->sprite_index].index << 2 | 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3851 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3852 context->sprite_draw_list[context->sprite_index].x_pos = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3853 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3854
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3855 static void tms_sprite_name(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3856 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3857 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3858 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3859 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3860 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3861 address |= context->sprite_info_list[context->sprite_index].index << 2 | 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3862 address = context->vdpmem[mode4_address_map[address] ^ 1] << 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3863 address |= context->regs[REG_STILE_BASE] << 11 & 0x3800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3864 uint8_t diff = context->vcounter + 1 - context->sprite_info_list[context->sprite_index].y;
2513
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
3865 if (context->regs[REG_MODE_2] & BIT_SPRITE_ZM) {
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
3866 diff >>= 1;
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
3867 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3868 address += diff;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3869 context->sprite_draw_list[context->sprite_index].address = address;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3870 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3871
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3872 static void tms_sprite_tag(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3873 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3874 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3875 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3876 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3877 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3878 address |= context->sprite_info_list[context->sprite_index].index << 2 | 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3879 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3880 uint8_t tag = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3881 if (tag & 0x80) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3882 //early clock flag
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3883 context->sprite_draw_list[context->sprite_index].x_pos -= 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3884 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3885 context->sprite_draw_list[context->sprite_index].pal_priority = tag & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3886 context->col_1 = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3887 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3888
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3889 static void tms_sprite_pattern1(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3890 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3891 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3892 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3893 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3894 context->col_1 = context->vdpmem[mode4_address_map[context->sprite_draw_list[context->sprite_index].address] ^ 1] << 8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3895 context->sprite_draw_list[context->sprite_index].address += 16;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3896 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3897
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3898 static void tms_sprite_pattern2(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3899 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3900 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3901 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3902 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3903 uint16_t pixels = context->col_1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3904 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3905 pixels |= context->vdpmem[mode4_address_map[context->sprite_draw_list[context->sprite_index].address] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3906 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3907 context->sprite_draw_list[context->sprite_index++].address = pixels;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3908 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3909
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3910 static uint8_t tms_sprite_clock(vdp_context *context, int16_t offset)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3911 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3912 int16_t x = context->hslot << 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3913 if (x > 294) {
2259
425b44fd7bf1 Fix TMS9918A sprite horizontal position
Michael Pavone <pavone@retrodev.com>
parents: 2258
diff changeset
3914 x -= 512 + 8;
425b44fd7bf1 Fix TMS9918A sprite horizontal position
Michael Pavone <pavone@retrodev.com>
parents: 2258
diff changeset
3915 } else {
425b44fd7bf1 Fix TMS9918A sprite horizontal position
Michael Pavone <pavone@retrodev.com>
parents: 2258
diff changeset
3916 x -= 8;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3917 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3918 x += offset;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3919 uint8_t output = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3920 for (int i = 0; i < 4; i++) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3921 if (x >= context->sprite_draw_list[i].x_pos) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3922 if (context->sprite_draw_list[i].address & 0x8000) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3923 if (output) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3924 context->flags2 |= FLAG2_SPRITE_COLLIDE;
2258
a28e1042f4de Fix a few of the most glaring TMS9918A issues
Michael Pavone <pavone@retrodev.com>
parents: 2257
diff changeset
3925 } else {
a28e1042f4de Fix a few of the most glaring TMS9918A issues
Michael Pavone <pavone@retrodev.com>
parents: 2257
diff changeset
3926 output = context->sprite_draw_list[i].pal_priority;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3927 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3928 }
2513
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
3929 if (!(context->regs[REG_MODE_2] & BIT_SPRITE_SZ) || ((x - context->sprite_draw_list[i].x_pos) & 1)) {
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
3930 context->sprite_draw_list[i].address <<= 1;
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
3931 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3932 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3933 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3934 return output;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3935 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3936
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3937 static void tms_border(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3938 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3939 if (context->hslot < (256 + BORDER_LEFT - (BORDER_LEFT-8))/2 || context->hslot > 256-32) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3940 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3941 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3942 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3943 if (!context->output) {
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3944 if ((context->hslot * 2 - 6 + BORDER_LEFT) == (256 + BORDER_LEFT + BORDER_RIGHT)) {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3945 advance_output_line(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3946 }
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3947 if (!context->output) {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3948 return;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
3949 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3950 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3951 uint32_t color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3952 if (context->type == VDP_GAMEGEAR) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3953 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3954 color = context->colors[(context->regs[REG_BG_COLOR] & 0xF) + 16 + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3955 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3956 color = context->regs[REG_BG_COLOR] << 1 & 0x1E;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3957 color = (color & 0xE) | (color << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3958 color = context->color_map[color | FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3959 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3960 if (context->hslot == (520 - BORDER_LEFT) / 2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3961 context->output[0] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3962 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3963 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3964 if (context->hslot < (256 + BORDER_LEFT + BORDER_RIGHT - (BORDER_LEFT - 8)) / 2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3965 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3966 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3967 if ((context->hslot * 2 - 6 + BORDER_LEFT) == (256 + BORDER_LEFT + BORDER_RIGHT)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3968 advance_output_line(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3969 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3970 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3971 int slot = (context->hslot - (520 - BORDER_LEFT) / 2) * 2 - 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3972 context->output[slot] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3973 context->output[slot + 1] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3974 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3975 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3976
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3977 static void tms_composite(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3978 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3979 if (context->state == PREPARING) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3980 tms_border(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3981 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3982 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3983 uint8_t color = tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3984 if (!context->output) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3985 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3986 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3987 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3988 uint8_t pattern = context->tmp_buf_a[0] & 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3989 context->tmp_buf_a[0] <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3990 if (!color) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3991 uint8_t fg,bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3992 if (context->regs[REG_MODE_2] & BIT_M1) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3993 //Text mode uses TC and BD colors
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3994 fg = context->regs[REG_BG_COLOR] >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3995 bg = context->regs[REG_BG_COLOR] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3996 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3997 fg = context->tmp_buf_b[0] >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3998 bg = context->tmp_buf_b[0] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
3999 if (!bg) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4000 bg = context->regs[REG_BG_COLOR] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4001 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4002 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4003 color = pattern ? fg : bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4004 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4005 //TODO: composite debug output
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4006 if (context->type == VDP_GAMEGEAR) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4007 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4008 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = context->colors[color + 16 + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4009 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4010 color <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4011 color = (color & 0xE) | (color << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4012 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = context->color_map[color | FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4013 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4014 color = tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4015 pattern = context->tmp_buf_a[0] & 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4016 context->tmp_buf_a[0] <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4017 if (!color) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4018 uint8_t fg,bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4019 if (context->regs[REG_MODE_2] & BIT_M1) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4020 //Text mode uses TC and BD colors
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4021 fg = context->regs[REG_BG_COLOR] >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4022 bg = context->regs[REG_BG_COLOR] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4023 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4024 fg = context->tmp_buf_b[0] >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4025 bg = context->tmp_buf_b[0] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4026 if (!bg) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4027 bg = context->regs[REG_BG_COLOR] & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4028 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4029 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4030 color = pattern ? fg : bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4031 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4032 //TODO: composite debug output
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4033 if (context->type == VDP_GAMEGEAR) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4034 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4035 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = context->colors[color + 16 + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4036 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4037 color <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4038 color = (color & 0xE) | (color << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4039 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = context->color_map[color | FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4040 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4041 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4042
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4043 #define TMS_OUTPUT(slot) if ((slot) < 4 || (slot) > (256 + BORDER_LEFT - 8) / 2) { tms_border(context); } else { tms_composite(context); }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4044 #define TMS_OUTPUT_RIGHT(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4045 if ((slot) < (256 + BORDER_LEFT - (BORDER_LEFT - 8))/2) {\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4046 tms_composite(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4047 } else if ((slot < (256 + BORDER_LEFT + BORDER_RIGHT -(BORDER_LEFT - 8))/2)) {\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4048 tms_border(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4049 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4050 #define TMS_CHECK_LIMIT context->hslot++; context->cycles += MCLKS_SLOT_H32; if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4051 #define TMS_GRAPHICS_PATTERN_CPU_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4052 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4053 TMS_OUTPUT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4054 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4055 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4056 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4057 TMS_OUTPUT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4058 external_slot(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4059 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4060 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4061 TMS_OUTPUT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4062 tms_fetch_color(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4063 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4064 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4065 TMS_OUTPUT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4066 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4067 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4068
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4069 #define TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4070 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4071 TMS_OUTPUT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4072 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4073 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4074 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4075 TMS_OUTPUT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4076 tms_sprite_scan(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4077 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4078 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4079 TMS_OUTPUT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4080 tms_fetch_color(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4081 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4082 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4083 TMS_OUTPUT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4084 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4085 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4086
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4087 #define TMS_SPRITE_SCAN_SLOT(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4088 case slot:\
2513
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4089 if (context->hslot >= (520 - BORDER_LEFT) / 2) {\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4090 tms_border(context);\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4091 } else {\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4092 tms_sprite_clock(context, 0);\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4093 tms_sprite_clock(context, 1);\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4094 }\
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4095 tms_sprite_scan(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4096 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4097
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4098 #define TMS_SPRITE_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4099 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4100 TMS_OUTPUT_RIGHT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4101 tms_sprite_vert(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4102 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4103 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4104 TMS_OUTPUT_RIGHT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4105 tms_sprite_horiz(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4106 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4107 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4108 TMS_OUTPUT_RIGHT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4109 tms_sprite_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4110 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4111 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4112 TMS_OUTPUT_RIGHT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4113 tms_sprite_tag(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4114 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4115 case slot+4:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4116 TMS_OUTPUT_RIGHT(slot+4)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4117 tms_sprite_pattern1(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4118 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4119 case slot+5:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4120 TMS_OUTPUT_RIGHT(slot+5)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4121 tms_sprite_pattern2(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4122 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4123
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4124 static void vdp_tms_graphics(vdp_context * context, uint32_t target_cycles)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4125 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4126 switch (context->hslot)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4127 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4128 for (;;)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4129 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4130 TMS_GRAPHICS_PATTERN_CPU_BLOCK(0)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4131 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(4)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4132 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(8)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4133 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(12)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4134 TMS_GRAPHICS_PATTERN_CPU_BLOCK(16)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4135 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(20)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4136 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(24)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4137 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(28)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4138 TMS_GRAPHICS_PATTERN_CPU_BLOCK(32)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4139 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(36)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4140 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(40)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4141 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(44)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4142 TMS_GRAPHICS_PATTERN_CPU_BLOCK(48)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4143 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(52)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4144 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(56)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4145 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(60)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4146 TMS_GRAPHICS_PATTERN_CPU_BLOCK(64)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4147 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(68)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4148 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(72)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4149 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(76)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4150 TMS_GRAPHICS_PATTERN_CPU_BLOCK(80)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4151 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(84)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4152 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(88)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4153 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(92)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4154 TMS_GRAPHICS_PATTERN_CPU_BLOCK(96)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4155 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(100)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4156 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(104)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4157 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(108)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4158 TMS_GRAPHICS_PATTERN_CPU_BLOCK(112)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4159 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(116)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4160 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(120)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4161 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(124)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4162 case 128:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4163 tms_composite(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4164 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4165 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4166 case 129:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4167 tms_composite(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4168 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4169 context->sprite_index = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4170 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4171
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4172 TMS_SPRITE_BLOCK(130)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4173 TMS_SPRITE_BLOCK(136)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4174 case 142:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4175 tms_sprite_vert(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4176 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4177 case 143:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4178 tms_sprite_horiz(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4179 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4180 case 145:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4181 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4182 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4183 case 146:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4184 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4185 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4186 case 147:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4187 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4188 context->hslot = 233;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4189 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4190 if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4191 case 233:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4192 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4193 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4194 case 234:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4195 tms_sprite_name(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4196 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4197 case 235:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4198 tms_sprite_tag(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4199 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4200 case 236:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4201 tms_sprite_pattern1(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4202 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4203 case 237:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4204 tms_sprite_pattern2(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4205 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4206 TMS_SPRITE_BLOCK(238)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4207 case 244:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4208 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4209 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4210 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4211 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4212 case 245:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4213 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4214 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4215 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4216 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4217 case 246:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4218 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4219 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4220 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4221 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4222 case 247:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4223 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4224 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4225 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4226 vdp_advance_line(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4227 context->sprite_index = context->sprite_draws = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4228 if (context->vcounter == 192) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4229 context->state = INACTIVE;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4230 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4231 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4232 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4233 TMS_SPRITE_SCAN_SLOT(248)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4234 TMS_SPRITE_SCAN_SLOT(249)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4235 TMS_SPRITE_SCAN_SLOT(250)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4236 TMS_SPRITE_SCAN_SLOT(251)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4237 TMS_SPRITE_SCAN_SLOT(252)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4238 TMS_SPRITE_SCAN_SLOT(253)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4239 TMS_SPRITE_SCAN_SLOT(254)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4240 TMS_SPRITE_SCAN_SLOT(255)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4241 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4242 default:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4243 context->hslot++;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4244 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4245 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4246 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4247
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4248 #define TMS_TEXT_OUTPUT(slot) if ((slot) < 8) { tms_border(context); } else { tms_composite(context); }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4249 #define TMS_TEXT_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4250 case slot:\
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4251 TMS_TEXT_OUTPUT(slot)\
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4252 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4253 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4254 case slot+1:\
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4255 TMS_TEXT_OUTPUT(slot+1)\
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4256 external_slot(context);\
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4257 TMS_CHECK_LIMIT \
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4258 case slot+2:\
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4259 TMS_TEXT_OUTPUT(slot+2)\
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4260 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4261 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4262
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4263 static void vdp_tms_text(vdp_context * context, uint32_t target_cycles)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4264 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4265 switch (context->hslot)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4266 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4267 for (;;)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4268 {
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4269 case 0:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4270 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4271 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4272 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4273 case 1:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4274 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4275 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4276 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4277 case 2:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4278 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4279 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4280 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4281 case 3:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4282 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4283 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4284 TMS_CHECK_LIMIT
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4285 case 4:
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4286 tms_border(context);
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4287 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4288 TMS_CHECK_LIMIT
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4289 TMS_TEXT_BLOCK(5)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4290 TMS_TEXT_BLOCK(8)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4291 TMS_TEXT_BLOCK(11)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4292 TMS_TEXT_BLOCK(14)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4293 TMS_TEXT_BLOCK(17)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4294 TMS_TEXT_BLOCK(20)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4295 TMS_TEXT_BLOCK(23)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4296 TMS_TEXT_BLOCK(26)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4297 TMS_TEXT_BLOCK(29)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4298 TMS_TEXT_BLOCK(32)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4299 TMS_TEXT_BLOCK(35)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4300 TMS_TEXT_BLOCK(38)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4301 TMS_TEXT_BLOCK(41)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4302 TMS_TEXT_BLOCK(44)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4303 TMS_TEXT_BLOCK(47)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4304 TMS_TEXT_BLOCK(50)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4305 TMS_TEXT_BLOCK(53)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4306 TMS_TEXT_BLOCK(56)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4307 TMS_TEXT_BLOCK(59)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4308 TMS_TEXT_BLOCK(62)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4309 TMS_TEXT_BLOCK(65)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4310 TMS_TEXT_BLOCK(68)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4311 TMS_TEXT_BLOCK(71)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4312 TMS_TEXT_BLOCK(74)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4313 TMS_TEXT_BLOCK(77)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4314 TMS_TEXT_BLOCK(80)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4315 TMS_TEXT_BLOCK(83)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4316 TMS_TEXT_BLOCK(86)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4317 TMS_TEXT_BLOCK(89)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4318 TMS_TEXT_BLOCK(92)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4319 TMS_TEXT_BLOCK(95)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4320 TMS_TEXT_BLOCK(98)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4321 TMS_TEXT_BLOCK(101)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4322 TMS_TEXT_BLOCK(104)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4323 TMS_TEXT_BLOCK(107)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4324 TMS_TEXT_BLOCK(110)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4325 TMS_TEXT_BLOCK(113)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4326 TMS_TEXT_BLOCK(116)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4327 TMS_TEXT_BLOCK(119)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4328 TMS_TEXT_BLOCK(122)
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4329 case 125:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4330 tms_composite(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4331 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4332 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4333 case 126:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4334 tms_composite(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4335 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4336 TMS_CHECK_LIMIT
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4337 case 127:
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4338 tms_composite(context);
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4339 external_slot(context);
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4340 TMS_CHECK_LIMIT
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4341 default:
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4342 while (context->hslot < 139)
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4343 {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4344 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4345 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4346 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4347 }
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4348 while (context->hslot < 147)
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4349 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4350 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4351 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4352 }
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4353 if (context->hslot == 147) {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4354 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4355 context->hslot = 233;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4356 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4357 if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4358 }
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4359 while (context->hslot > 147) {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4360 if (context->hslot >= 233) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4361 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4362 if (context->hslot + 1 == LINE_CHANGE_MODE4) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4363 vdp_advance_line(context);
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4364 if (context->vcounter == 192) {
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4365 context->state = INACTIVE;
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4366 return;
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4367 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4368 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4369 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4370 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4371 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4372 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4373 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4374 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4375
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4376 static void inactive_test_output(vdp_context *context, uint8_t is_h40, uint8_t test_layer)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4377 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4378 uint8_t max_slot = is_h40 ? 169 : 136;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4379 if (context->hslot > max_slot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4380 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4381 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4382 uint8_t *dst = context->compositebuf + (context->hslot >> 3) * SCROLL_BUFFER_DRAW;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4383 int32_t len;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4384 uint32_t src_off;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4385 if (context->hslot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4386 dst -= SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4387 src_off = 0;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4388 len = context->hslot == max_slot ? BORDER_RIGHT : SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4389 } else {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4390 src_off = SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4391 len = BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4392 }
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4393 uint8_t *src = NULL;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4394 if (test_layer == 2) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4395 //plane A
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
4396 src_off += context->buf_a_off - (context->hscroll_a & 0xF);
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4397 src = context->tmp_buf_a;
1369
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents: 1368
diff changeset
4398 } else if (test_layer == 3){
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4399 //plane B
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
4400 src_off += context->buf_b_off - (context->hscroll_b & 0xF);
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4401 src = context->tmp_buf_b;
1369
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents: 1368
diff changeset
4402 } else {
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents: 1368
diff changeset
4403 //sprite layer
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4404 memset(dst, 0, len);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4405 dst += len;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4406 len = 0;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4407 }
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4408 if (src) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4409 for (; len >=0; len--, dst++, src_off++)
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4410 {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4411 *dst = src[src_off & SCROLL_BUFFER_MASK] & 0x3F;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4412 }
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4413 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4414 context->done_composite = dst;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4415 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4416 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4417 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4418
1362
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4419 static void check_switch_inactive(vdp_context *context, uint8_t is_h40)
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4420 {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4421 //technically the second hcounter check should be different for H40, but this is probably close enough for now
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4422 if (context->state == ACTIVE && context->vcounter == context->inactive_start && (context->hslot >= (is_h40 ? 167 : 135) || context->hslot < 133)) {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4423 context->state = INACTIVE;
2010
19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line
Mike Pavone <pavone@retrodev.com>
parents: 2009
diff changeset
4424 context->cur_slot = MAX_SPRITES_LINE-1;
19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line
Mike Pavone <pavone@retrodev.com>
parents: 2009
diff changeset
4425 context->sprite_x_offset = 0;
1362
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4426 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4427 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4428
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4429 static void vdp_inactive(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4430 {
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4431 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4432 uint8_t index_reset_value, max_draws, max_sprites;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4433 uint16_t vint_line, active_line;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4434
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4435 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4436 if (is_h40) {
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4437 latch_slot = 165;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
4438 buf_clear_slot = 163;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
4439 index_reset_slot = 167;
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
4440 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
4441 max_draws = MAX_SPRITES_LINE-1;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4442 max_sprites = MAX_SPRITES_LINE;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4443 index_reset_value = 0x80;
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
4444 vint_slot = VINT_SLOT_H40;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4445 line_change = LINE_CHANGE_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4446 jump_start = 182;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4447 jump_dest = 229;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4448 } else {
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
4449 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
4450 max_draws = MAX_SPRITES_LINE_H32-1;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4451 max_sprites = MAX_SPRITES_LINE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4452 buf_clear_slot = 128;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4453 index_reset_slot = 132;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4454 index_reset_value = 0x80;
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
4455 vint_slot = VINT_SLOT_H32;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4456 line_change = LINE_CHANGE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4457 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4458 jump_dest = 233;
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4459 latch_slot = 243;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
4460 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4461 vint_line = context->inactive_start;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4462 active_line = 0x1FF;
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4463 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4464 latch_slot = 220;
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4465 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
4466 } else {
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4467 latch_slot = 220;
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
4468 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4469 max_draws = MAX_DRAWS_H32_MODE4;
1278
34d3cb05014d Fix VDP buffer overrun that was causing sprite flickering in some games
Michael Pavone <pavone@retrodev.com>
parents: 1273
diff changeset
4470 max_sprites = 8;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4471 buf_clear_slot = 136;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4472 index_reset_slot = 253;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4473 index_reset_value = 0;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4474 vint_line = context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4475 vint_slot = VINT_SLOT_MODE4;
1177
67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents: 1175
diff changeset
4476 line_change = LINE_CHANGE_MODE4;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4477 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4478 jump_dest = 233;
2263
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
4479 if ((context->regs[REG_MODE_1] & BIT_MODE_4) || context->type != VDP_GENESIS) {
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
4480 active_line = 0x1FF;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
4481 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
4482 //never active unless either mode 4 or mode 5 is turned on
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
4483 active_line = 0x200;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
4484 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
4485 }
1644
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
4486 uint32_t *dst;
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
4487 uint8_t *debug_dst;
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
4488 if (context->output && context->hslot >= BG_START_SLOT && context->hslot <= bg_end_slot) {
1644
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
4489 dst = context->output + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
4490 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
4491 } else {
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
4492 dst = NULL;
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
4493 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4494
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4495 uint8_t test_layer = context->test_port >> 7 & 3;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4496
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4497 while(context->cycles < target_cycles)
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4498 {
1362
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4499 check_switch_inactive(context, is_h40);
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4500 if (context->hslot == BG_START_SLOT && context->output) {
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4501 dst = context->output + (context->hslot - BG_START_SLOT) * 2;
1644
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
4502 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4503 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4504 //this will need some tweaking to properly interact with 128K mode,
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4505 //but this should be good enough for now
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4506 context->serial_address += 1024;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4507 if (test_layer) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4508 switch (context->hslot & 7)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4509 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4510 case 3:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4511 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4512 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4513 case 4:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4514 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4515 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4516 case 7:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4517 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4518 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4519 case 0:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4520 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off+8, context->col_2);
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
4521 break;
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
4522 case 1:
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4523 inactive_test_output(context, is_h40, test_layer);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4524 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4525 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4526 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4527
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4528 if (context->hslot == buf_clear_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4529 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4530 context->cur_slot = max_draws;
2263
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
4531 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) || context->type == VDP_GENESIS) {
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4532 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4533 context->sprite_draws = MAX_DRAWS_H32_MODE4;
2263
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
4534 } else {
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
4535 context->sprite_draws = 0;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4536 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4537 memset(context->linebuf, 0, LINEBUF_SIZE);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4538 } else if (context->hslot == index_reset_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4539 context->sprite_index = index_reset_value;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
4540 context->slot_counter = mode_5 ? 0 : max_sprites;
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4541 } else if (context->hslot == latch_slot) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4542 //it seems unlikely to me that vscroll actually gets latched when the display is off
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4543 //but it's the only straightforward way to reconcile what I'm seeing between Skitchin
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4544 //(which seems to expect vscroll to be latched early) and the intro of Gunstar Heroes
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4545 //(which disables the display and ends up with garbage if vscroll is latched during that period)
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4546 //without it. Some more tests are definitely needed
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4547 context->vscroll_latch[0] = context->vsram[0];
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
4548 context->vscroll_latch[1] = context->vsram[1];
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4549 } else if (context->vcounter == vint_line && context->hslot == vint_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4550 context->flags2 |= FLAG2_VINT_PENDING;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4551 context->pending_vint_start = context->cycles;
1436
40c3be9f1af7 Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents: 1432
diff changeset
4552 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
40c3be9f1af7 Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents: 1432
diff changeset
4553 context->flags2 ^= FLAG2_EVEN_FIELD;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4554 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4555
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4556 if (dst) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4557 uint8_t bg_index;
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
4558 uint32_t bg_color;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4559 if (mode_5) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4560 bg_index = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4561 bg_color = context->colors[bg_index];
2263
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
4562 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) || context->type != VDP_GENESIS) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4563 bg_index = 0x10 + (context->regs[REG_BG_COLOR] & 0xF);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4564 bg_color = context->colors[MODE4_OFFSET + bg_index];
1913
2c742812bcbb Fix regression at the very start of The Revenge of Shinobi
Michael Pavone <pavone@retrodev.com>
parents: 1906
diff changeset
4565 } else {
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
4566 bg_color = context->color_map[0];
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4567 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4568 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4569 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4570 if (!(pixel & 0x3F | test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4571 pixel = pixel & 0xC0 | bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4572 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4573 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4574 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4575 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4576 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4577 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4578 } else {
1343
033dda2d4598 Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1342
diff changeset
4579 *(dst++) = bg_color;
1644
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
4580 *(debug_dst++) = DBG_SRC_BG;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4581 }
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
4582 if (context->hslot != bg_end_slot) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4583 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4584 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4585 if (!(pixel & 0x3F | test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4586 pixel = pixel & 0xC0 | bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4587 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4588 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4589 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4590 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4591 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4592 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4593 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4594 *(dst++) = bg_color;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4595 *(debug_dst++) = DBG_SRC_BG;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4596 }
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
4597 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4598 }
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
4599 if (context->hslot == bg_end_slot) {
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
4600 advance_output_line(context);
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
4601 dst = NULL;
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
4602 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4603
1183
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
4604 if (!is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
4605 external_slot(context);
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
4606 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
4607 run_dma_src(context, context->hslot);
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
4608 }
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
4609 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4610
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4611 if (is_h40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4612 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4613 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40];
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4614 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4615 context->cycles += MCLKS_SLOT_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4616 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4617 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4618 context->cycles += MCLKS_SLOT_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4619 }
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
4620 if (context->hslot == jump_start) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
4621 context->hslot = jump_dest;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
4622 } else {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
4623 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
4624 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4625 if (context->hslot == line_change) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4626 vdp_advance_line(context);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4627 if (context->vcounter == active_line) {
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
4628 context->state = PREPARING;
2567
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
4629 if (!context->done_composite) {
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
4630 memset(context->compositebuf, 0, sizeof(context->compositebuf));
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
4631 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4632 return;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4633 }
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4634 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4635 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4636 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4637
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4638 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4639 {
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
4640 uint8_t is_h40 = context->regs[REG_MODE_4] & BIT_H40;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
4641 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4642 while(context->cycles < target_cycles)
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4643 {
1362
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
4644 check_switch_inactive(context, is_h40);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4645
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
4646 if (is_active(context)) {
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4647 if (mode_5) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4648 if (is_h40) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4649 vdp_h40(context, target_cycles);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4650 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4651 vdp_h32(context, target_cycles);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4652 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4653 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4654 vdp_h32_mode4(context, target_cycles);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4655 } else if (context->regs[REG_MODE_2] & BIT_M1) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4656 vdp_tms_text(context, target_cycles);
330
57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 329
diff changeset
4657 } else {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4658 vdp_tms_graphics(context, target_cycles);
330
57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 329
diff changeset
4659 }
57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 329
diff changeset
4660 } else {
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
4661 vdp_inactive(context, target_cycles, is_h40, mode_5);
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
4662 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4663 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4664 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4665
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4666 void vdp_run_context(vdp_context *context, uint32_t target_cycles)
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4667 {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4668 //TODO: Deal with H40 hsync shenanigans
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4669 uint32_t slot_cyc = context->regs[REG_MODE_4] & BIT_H40 ? 15 : 19;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4670 if (target_cycles < slot_cyc) {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4671 //avoid overflow
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4672 return;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4673 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4674 vdp_run_context_full(context, target_cycles - slot_cyc);
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4675 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4676
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4677 uint32_t vdp_run_to_vblank(vdp_context * context)
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4678 {
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
4679 uint32_t old_frame = context->frame;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
4680 while (context->frame == old_frame) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4681 vdp_run_context_full(context, context->cycles + MCLKS_LINE);
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
4682 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4683 return context->cycles;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4684 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4685
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4686 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles)
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4687 {
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4688 for(;;) {
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4689 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L];
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4690 if (!dmalen) {
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4691 dmalen = 0x10000;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4692 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
4693 uint32_t min_dma_complete = dmalen * (context->regs[REG_MODE_4] & BIT_H40 ? 16 : 20);
1321
0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1320
diff changeset
4694 if (
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4695 (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY
1321
0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1320
diff changeset
4696 || (((context->cd & 0xF) == VRAM_WRITE) && !(context->regs[REG_MODE_2] & BIT_128K_VRAM))) {
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4697 //DMA copies take twice as long to complete since they require a read and a write
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4698 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word
1321
0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1320
diff changeset
4699 //unless 128KB mode is enabled
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4700 min_dma_complete *= 2;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4701 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4702 min_dma_complete += context->cycles;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4703 if (target_cycles < min_dma_complete) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4704 vdp_run_context_full(context, target_cycles);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4705 return;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4706 } else {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4707 vdp_run_context_full(context, min_dma_complete);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4708 if (!(context->flags & FLAG_DMA_RUN)) {
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4709 return;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4710 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4711 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4712 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4713 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4714
1154
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4715 static uint16_t get_ext_vcounter(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4716 {
1437
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
4717 uint16_t line= context->vcounter;
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
4718 if (context->regs[REG_MODE_4] & BIT_INTERLACE) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
4719 if (context->double_res) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
4720 line <<= 1;
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
4721 } else {
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
4722 line &= 0x1FE;
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
4723 }
1154
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4724 if (line & 0x100) {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4725 line |= 1;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4726 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4727 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4728 return line << 8;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4729 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4730
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4731 void vdp_latch_hv(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4732 {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4733 context->hv_latch = context->hslot | get_ext_vcounter(context);
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4734 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4735
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4736 uint16_t vdp_hv_counter_read(vdp_context * context)
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4737 {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4738 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4739 return context->hv_latch;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4740 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4741 uint16_t hv;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4742 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4743 hv = context->hslot;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4744 } else {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4745 hv = context->hv_latch & 0xFF;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4746 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4747 hv |= get_ext_vcounter(context);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
4748
1154
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4749 return hv;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4750 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
4751
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4752 void vdp_reg_write(vdp_context *context, uint16_t reg, uint16_t value)
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4753 {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4754 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4755 if (reg < (mode_5 ? VDP_REGS : 0xB)) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4756 //printf("register %d set to %X\n", reg, value & 0xFF);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4757 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4758 vdp_latch_hv(context);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4759 } else if (reg == REG_BG_COLOR) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4760 value &= 0x3F;
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4761 } else if (reg == REG_MODE_2 && context->type != VDP_GENESIS) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4762 // only the Genesis VDP does anything with this bit
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4763 // so just clear it to prevent Mode 5 selection if we're not emulating that chip
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4764 value &= ~BIT_MODE_5;
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4765 }
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4766 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4767 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4768 }*/
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4769 uint8_t buffer[2] = {reg, value};
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4770 event_log(EVENT_VDP_REG, context->cycles, sizeof(buffer), buffer);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4771 context->regs[reg] = value;
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4772 if (reg == REG_MODE_1 || reg == REG_MODE_2 || reg == REG_MODE_4) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4773 update_video_params(context);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4774 }
2559
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4775 } else if (context->type == VDP_GENESIS) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4776 // Apparently Bart vs. the Space Mutants for SMS/GG writes to the timer KMOD timer register
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4777 // Probably need to add some sort of config toggle for KMOD registers generally, but this is a quick fix
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4778 if (reg == REG_KMOD_CTRL) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4779 if (!(value & 0xFF)) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4780 context->system->enter_debugger = 1;
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4781 }
2559
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4782 } else if (reg == REG_KMOD_MSG) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4783 char c = value;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4784 if (c) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4785 context->kmod_buffer_length++;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4786 if ((context->kmod_buffer_length + 1) > context->kmod_buffer_storage) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4787 context->kmod_buffer_storage = context->kmod_buffer_storage ? context->kmod_buffer_storage * 2 : 128;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4788 context->kmod_msg_buffer = realloc(context->kmod_msg_buffer, context->kmod_buffer_storage);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4789 }
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4790 context->kmod_msg_buffer[context->kmod_buffer_length - 1] = c;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4791 } else if (context->kmod_buffer_length) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4792 context->kmod_msg_buffer[context->kmod_buffer_length] = 0;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4793 if (is_stdout_enabled()) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4794 init_terminal();
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4795 printf("KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4796 } else {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4797 // GDB remote debugging is enabled, use stderr instead
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4798 fprintf(stderr, "KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4799 }
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4800 context->kmod_buffer_length = 0;
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4801 }
2559
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4802 } else if (reg == REG_KMOD_TIMER) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4803 if (!(value & 0x80)) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4804 if (is_stdout_enabled()) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4805 init_terminal();
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4806 printf("KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4807 } else {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4808 // GDB remote debugging is enabled, use stderr instead
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4809 fprintf(stderr, "KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4810 }
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4811 }
2559
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4812 if (value & 0xC0) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4813 context->timer_start_cycle = context->cycles;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
4814 }
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4815 }
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4816 }
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4817 }
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4818
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
4819 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4820 {
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4821 //printf("control port write: %X at %d\n", value, context->cycles);
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 143
diff changeset
4822 if (context->flags & FLAG_DMA_RUN) {
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 143
diff changeset
4823 return -1;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 143
diff changeset
4824 }
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4825 if (context->flags & FLAG_PENDING) {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4826 context->address_latch = value << 14 & 0x1C000;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4827 context->address = (context->address & 0x3FFF) | context->address_latch;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4828 //It seems like the DMA enable bit doesn't so much enable DMA so much
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4829 //as it enables changing CD5 from control port writes
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4830 if (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4831 context->cd = (context->cd & 0x3) | ((value >> 2) & ~0x3 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4832 } else {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4833 context->cd = (context->cd & 0x23) | ((value >> 2) & ~0x23 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4834 }
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4835 context->flags &= ~FLAG_PENDING;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4836 //Should these be taken care of here or after the first write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4837 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4838 context->flags2 &= ~FLAG2_READ_PENDING;
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
4839 if (!(context->cd & 1)) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
4840 context->read_latency = cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
4841 }
453
b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents: 452
diff changeset
4842 //printf("New Address: %X, New CD: %X\n", context->address, context->cd);
983
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
4843 if (context->cd & 0x20) {
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
4844 //
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
4845 if((context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4846 //DMA copy or 68K -> VDP, transfer starts immediately
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
4847 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot);
1191
8dc50e50ced6 Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents: 1189
diff changeset
4848 if (!(context->regs[REG_DMASRC_H] & 0x80)) {
8dc50e50ced6 Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents: 1189
diff changeset
4849 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]);
1289
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents: 1285
diff changeset
4850 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents: 1285
diff changeset
4851 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents: 1285
diff changeset
4852 //only captures are from a direct color DMA demo which will generally start DMA at a very specific point in display so other values are plausible
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents: 1285
diff changeset
4853 //sticking with 3 slots for now until I can do some more captures
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4854 vdp_run_context_full(context, context->cycles + 12 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5));
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4855 vdp_dma_started();
1285
76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents: 1278
diff changeset
4856 context->flags |= FLAG_DMA_RUN;
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4857 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4858 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4859 }
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4860 return 1;
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
4861 } else {
1285
76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents: 1278
diff changeset
4862 context->flags |= FLAG_DMA_RUN;
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4863 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4864 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4865 }
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
4866 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4867 }
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
4868 } else {
453
b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents: 452
diff changeset
4869 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4870 }
63
a6dd5b7a971b Add FPS counter to console output
Mike Pavone <pavone@retrodev.com>
parents: 58
diff changeset
4871 }
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4872 } else {
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4873 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4874 context->address = context->address_latch | (value & 0x3FFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4875 context->cd = (context->cd & 0x3C) | (value >> 14);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4876 if ((value & 0xC000) == 0x8000) {
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4877 //Register write
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4878 uint16_t reg = (value >> 8) & 0x1F;
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4879 if (context->reg_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4880 context->reg_hook(context, reg, value);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4881 }
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
4882 vdp_reg_write(context, reg, value);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4883 } else if (mode_5) {
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4884 context->flags |= FLAG_PENDING;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4885 //Should these be taken care of here or after the second write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4886 //context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4887 //context->flags2 &= ~FLAG2_READ_PENDING;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4888 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4889 context->flags &= ~FLAG_READ_FETCHED;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4890 context->flags2 &= ~FLAG2_READ_PENDING;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4891 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4892 }
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
4893 return 0;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4894 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4895
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4896 void vdp_control_port_write_pbc(vdp_context *context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4897 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4898 if (context->flags2 & FLAG2_BYTE_PENDING) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4899 uint16_t full_val = value << 8 | context->pending_byte;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4900 context->flags2 &= ~FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4901 //TODO: Deal with fact that Vbus->VDP DMA doesn't do anything in PBC mode
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
4902 vdp_control_port_write(context, full_val, context->cycles);
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
4903 if (context->cd == VRAM_READ) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
4904 context->cd = VRAM_READ8;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
4905 }
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4906 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4907 context->pending_byte = value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4908 context->flags2 |= FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4909 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4910 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4911
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 143
diff changeset
4912 int vdp_data_port_write(vdp_context * context, uint16_t value)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4913 {
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4914 //printf("data port write: %X at %d\n", value, context->cycles);
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
4915 if (context->flags & FLAG_DMA_RUN && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 143
diff changeset
4916 return -1;
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 143
diff changeset
4917 }
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4918 if (context->flags & FLAG_PENDING) {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4919 context->flags &= ~FLAG_PENDING;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4920 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4921 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4922 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
4923 }
109
004dd46e0a97 COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents: 108
diff changeset
4924 /*if (context->fifo_cur == context->fifo_end) {
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4925 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
109
004dd46e0a97 COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents: 108
diff changeset
4926 }*/
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
4927 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
4928 context->flags &= ~FLAG_DMA_RUN;
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
4929 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4930 while (context->fifo_write == context->fifo_read) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4931 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4932 }
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4933 if (context->data_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4934 context->data_hook(context, value);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
4935 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4936 fifo_entry * cur = context->fifo + context->fifo_write;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
4937 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4938 cur->address = context->address;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4939 cur->value = value;
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4940 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4941 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4942 } else {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4943 cur->cd = (context->cd & 2) | 1;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4944 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4945 cur->partial = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4946 if (context->fifo_read < 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4947 context->fifo_read = context->fifo_write;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4948 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
4949 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
4950 increment_address(context);
149
139e5dcd6aa3 Make writes to control and data port block when DMA is in progress
Mike Pavone <pavone@retrodev.com>
parents: 143
diff changeset
4951 return 0;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4952 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4953
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4954 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4955 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4956 if (context->flags & FLAG_PENDING) {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
4957 context->flags &= ~FLAG_PENDING;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4958 //Should these be cleared here?
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4959 context->flags &= ~FLAG_READ_FETCHED;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4960 context->flags2 &= ~FLAG2_READ_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4961 }
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4962 context->flags2 &= ~FLAG2_BYTE_PENDING;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4963 /*if (context->fifo_cur == context->fifo_end) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4964 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4965 }*/
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
4966 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4967 context->flags &= ~FLAG_DMA_RUN;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4968 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4969 while (context->fifo_write == context->fifo_read) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
4970 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4971 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4972 fifo_entry * cur = context->fifo + context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4973 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4974 cur->address = context->address;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4975 cur->value = value;
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4976 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4977 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4978 } else {
2473
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
4979 if ((context->cd & 3) == CRAM_WRITE) {
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
4980 cur->cd = CRAM_WRITE;
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
4981 } else {
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
4982 cur->cd = VRAM_WRITE;
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
4983 }
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
4984 }
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
4985 cur->partial = 3;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4986 if (context->fifo_read < 0) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4987 context->fifo_read = context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4988 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4989 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
4990 increment_address(context);
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4991 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
4992
470
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
4993 void vdp_test_port_write(vdp_context * context, uint16_t value)
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
4994 {
1318
bfdd450e7dea Initial work on handling the 128KB VRAM mode bit and some basic prep work for VDP test register support
Michael Pavone <pavone@retrodev.com>
parents: 1315
diff changeset
4995 context->test_port = value;
470
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
4996 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
4997
2358
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
4998 uint16_t vdp_status(vdp_context *context)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
4999 {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5000 //Bits 15-10 are not fixed like Charles MacDonald's doc suggests, but instead open bus values that reflect 68K prefetch
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5001 uint16_t value = context->system->get_open_bus_value(context->system) & 0xFC00;
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5002 if (context->fifo_read < 0) {
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5003 value |= 0x200;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5004 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5005 if (context->fifo_read == context->fifo_write) {
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5006 value |= 0x100;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5007 }
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5008 if (context->flags2 & FLAG2_VINT_PENDING) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
5009 value |= 0x80;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
5010 }
494
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5011 if (context->flags & FLAG_DOT_OFLOW) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5012 value |= 0x40;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5013 }
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5014 if (context->flags2 & FLAG2_SPRITE_COLLIDE) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5015 value |= 0x20;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5016 }
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
5017 if ((context->regs[REG_MODE_4] & BIT_INTERLACE) && !(context->flags2 & FLAG2_EVEN_FIELD)) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
5018 value |= 0x10;
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5019 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5020 uint32_t slot = context->hslot;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5021 if (!is_active(context)) {
318
789f2f5f2277 Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents: 317
diff changeset
5022 value |= 0x8;
789f2f5f2277 Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents: 317
diff changeset
5023 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5024 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5025 if (slot < HBLANK_END_H40 || slot > HBLANK_START_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5026 value |= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5027 }
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5028 } else {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5029 if (slot < HBLANK_END_H32 || slot > HBLANK_START_H32) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5030 value |= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5031 }
318
789f2f5f2277 Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents: 317
diff changeset
5032 }
983
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
5033 if (context->cd & 0x20) {
141
576f55711d8d Fix DMA in progress flag in VDP status register
Mike Pavone <pavone@retrodev.com>
parents: 138
diff changeset
5034 value |= 0x2;
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5035 }
714
e29bc2918f69 Fix VDP status register PAL bit based on observations of the Titan Overdrive demo
Michael Pavone <pavone@retrodev.com>
parents: 711
diff changeset
5036 if (context->flags2 & FLAG2_REGION_PAL) {
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5037 value |= 0x1;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5038 }
2358
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5039 return value;
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5040 }
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5041
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5042 uint16_t vdp_control_port_read(vdp_context * context)
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5043 {
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5044 uint16_t value = vdp_status(context);
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5045 context->flags &= ~(FLAG_DOT_OFLOW|FLAG_PENDING);
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5046 context->flags2 &= ~(FLAG2_SPRITE_COLLIDE|FLAG2_BYTE_PENDING);
459
c49ecf575784 Revert change to VBLANK flag timing based on new direct color DMA test
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
5047 //printf("status read at cycle %d returned %X\n", context->cycles, value);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5048 return value;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5049 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5050
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5051 uint16_t vdp_data_port_read(vdp_context * context, uint32_t *cpu_cycle, uint32_t cpu_divider)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5052 {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5053 if (context->flags & FLAG_PENDING) {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5054 context->flags &= ~FLAG_PENDING;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5055 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5056 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5057 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5058 }
138
aa3e1bb338c9 Fix VDP reads
Mike Pavone <pavone@retrodev.com>
parents: 137
diff changeset
5059 if (context->cd & 1) {
991
f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes
Michael Pavone <pavone@retrodev.com>
parents: 984
diff changeset
5060 warning("Read from VDP data port while writes are configured, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
1998
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5061 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5062 return context->prefetch;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5063 }
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5064 switch (context->cd)
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5065 {
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5066 case VRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5067 case VSRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5068 case CRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5069 case VRAM_READ8:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5070 break;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5071 default:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5072 warning("Read from VDP data port with invalid source, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5073 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5074 return context->prefetch;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5075 }
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5076 uint32_t starting_cycle = context->cycles;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5077 while (!(context->flags & FLAG_READ_FETCHED)) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5078 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5079 }
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5080 context->flags &= ~FLAG_READ_FETCHED;
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5081 //TODO: Make some logic analyzer captures to better characterize what's happening with read latency here
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5082 if (context->cycles != starting_cycle) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5083 uint32_t delta = context->cycles - *cpu_cycle;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5084 uint32_t cpu_delta = delta / cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5085 if (delta % cpu_divider) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5086 cpu_delta++;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5087 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5088 *cpu_cycle += cpu_delta * cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5089 if (*cpu_cycle - context->cycles < 2) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5090 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5091 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5092 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5093 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5094 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5095 context->read_latency = *cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5096 }
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5097 return context->prefetch;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5098 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5099
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
5100 uint8_t vdp_data_port_read_pbc(vdp_context * context)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
5101 {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5102 context->flags &= ~(FLAG_PENDING | FLAG_READ_FETCHED);
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5103 context->flags2 &= ~FLAG2_BYTE_PENDING;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5104
1152
ddbb61be6119 Fix to pass a couple more tests in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1151
diff changeset
5105 context->cd = VRAM_READ8;
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
5106 return context->prefetch;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
5107 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
5108
65
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
5109 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction)
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
5110 {
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
5111 context->cycles -= deduction;
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5112 if (context->pending_vint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5113 context->pending_vint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5114 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5115 context->pending_vint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5116 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5117 if (context->pending_hint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5118 context->pending_hint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5119 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5120 context->pending_hint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5121 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5122 if (context->fifo_read >= 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5123 int32_t idx = context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5124 do {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5125 if (context->fifo[idx].cycle >= deduction) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5126 context->fifo[idx].cycle -= deduction;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5127 } else {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5128 context->fifo[idx].cycle = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5129 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5130 idx = (idx+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5131 } while(idx != context->fifo_write);
65
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
5132 }
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5133 if (context->read_latency >= deduction) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5134 context->read_latency -= deduction;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5135 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5136 context->read_latency = 0;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5137 }
65
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
5138 }
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
5139
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
5140 static uint32_t vdp_cycles_hslot_wrap_h40(vdp_context * context)
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5141 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5142 if (context->hslot < 183) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5143 return MCLKS_LINE - context->hslot * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5144 } else if (context->hslot < HSYNC_END_H40) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5145 uint32_t before_hsync = context->hslot < HSYNC_SLOT_H40 ? (HSYNC_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40 : 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5146 uint32_t hsync = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5147 for (int i = context->hslot <= HSYNC_SLOT_H40 ? 0 : context->hslot - HSYNC_SLOT_H40; i < sizeof(h40_hsync_cycles)/sizeof(uint32_t); i++)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5148 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5149 hsync += h40_hsync_cycles[i];
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5150 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5151 uint32_t after_hsync = (256- HSYNC_END_H40) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5152 return before_hsync + hsync + after_hsync;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5153 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5154 return (256-context->hslot) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5155 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5156 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5157
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
5158 static uint32_t vdp_cycles_next_line(vdp_context * context)
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5159 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5160 if (context->regs[REG_MODE_4] & BIT_H40) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5161 //TODO: Handle "illegal" Mode 4/H40 combo
647
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents: 629
diff changeset
5162 if (context->hslot < LINE_CHANGE_H40) {
697
7f96bd1cb1be Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents: 680
diff changeset
5163 return (LINE_CHANGE_H40 - context->hslot) * MCLKS_SLOT_H40;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5164 } else {
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5165 return vdp_cycles_hslot_wrap_h40(context) + LINE_CHANGE_H40 * MCLKS_SLOT_H40;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5166 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5167 } else {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5168 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5169 if (context->hslot < LINE_CHANGE_H32) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5170 return (LINE_CHANGE_H32 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5171 } else if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5172 return MCLKS_LINE - (context->hslot - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5173 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5174 return (256-context->hslot + LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5175 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5176 } else {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5177 if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5178 return (148 - context->hslot + LINE_CHANGE_MODE4 - 233) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5179 } else if (context->hslot < LINE_CHANGE_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5180 return (LINE_CHANGE_MODE4 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5181 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5182 return MCLKS_LINE - (context->hslot - LINE_CHANGE_MODE4) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5183 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5184 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5185 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5186 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5187
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5188 static void get_jump_params(vdp_context *context, uint32_t *jump_start, uint32_t *jump_dst)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5189 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5190 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5191 if (context->flags2 & FLAG2_REGION_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5192 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5193 *jump_start = 0x10B;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5194 *jump_dst = 0x1D2;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5195 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5196 *jump_start = 0x103;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5197 *jump_dst = 0x1CA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5198 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5199 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5200 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5201 *jump_start = 0x100;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5202 *jump_dst = 0x1FA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5203 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5204 *jump_start = 0xEB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5205 *jump_dst = 0x1E5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5206 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5207 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5208 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5209 *jump_start = 0xDB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5210 *jump_dst = 0x1D5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5211 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5212 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5213
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
5214 static uint32_t vdp_cycles_to_line(vdp_context * context, uint32_t target)
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5215 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5216 uint32_t jump_start, jump_dst;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5217 get_jump_params(context, &jump_start, &jump_dst);
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5218 uint32_t lines;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5219 if (context->vcounter < target) {
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5220 if (target < jump_start || context->vcounter > jump_start) {
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5221 lines = target - context->vcounter;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5222 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5223 lines = jump_start - context->vcounter + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5224 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5225 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5226 if (context->vcounter < jump_start) {
718
eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents: 717
diff changeset
5227 lines = jump_start - context->vcounter + 512 - jump_dst;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5228 } else {
718
eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents: 717
diff changeset
5229 lines = 512 - context->vcounter;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5230 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5231 if (target < jump_start) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5232 lines += target;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5233 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5234 lines += jump_start + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5235 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5236 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5237 return MCLKS_LINE * (lines - 1) + vdp_cycles_next_line(context);
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5238 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5239
680
4996369f1463 Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents: 678
diff changeset
5240 uint32_t vdp_cycles_to_frame_end(vdp_context * context)
4996369f1463 Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents: 678
diff changeset
5241 {
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
5242 return context->cycles + vdp_cycles_to_line(context, context->inactive_start);
680
4996369f1463 Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents: 678
diff changeset
5243 }
4996369f1463 Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents: 678
diff changeset
5244
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5245 uint32_t vdp_next_hint(vdp_context * context)
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5246 {
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
5247 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) {
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5248 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5249 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5250 if (context->flags2 & FLAG2_HINT_PENDING) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5251 return context->pending_hint_start;
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5252 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5253 uint32_t hint_line;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5254 if (context->state != ACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5255 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5256 if (hint_line > context->inactive_start) {
724
2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents: 722
diff changeset
5257 return 0xFFFFFFFF;
2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents: 722
diff changeset
5258 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5259 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5260 hint_line = context->vcounter + context->hint_counter + 1;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5261 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5262 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5263 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5264 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5265 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5266 }
1366
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
5267 if (hint_line >= context->vcounter) {
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
5268 //Next interrupt is for a line in the next frame that
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
5269 //is higher than the line we're on now so just passing
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
5270 //that line number to vdp_cycles_to_line will yield the wrong
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
5271 //result
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5272 return context->cycles + vdp_cycles_to_line(context, 0) + hint_line * MCLKS_LINE;
1366
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
5273 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5274 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5275 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5276 uint32_t jump_start, jump_dst;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5277 get_jump_params(context, &jump_start, &jump_dst);
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5278 if (hint_line >= jump_start && context->vcounter < jump_dst) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5279 hint_line = (hint_line + jump_dst - jump_start) & 0x1FF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5280 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5281 if (hint_line < context->vcounter && hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5282 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5283 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5284 }
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5285 }
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5286 return context->cycles + vdp_cycles_to_line(context, hint_line);
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5287 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5288
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5289 static uint32_t vdp_next_vint_real(vdp_context * context)
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5290 {
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
5291 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) {
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5292 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5293 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5294 if (context->flags2 & FLAG2_VINT_PENDING) {
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5295 return context->pending_vint_start;
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5296 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5297
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5298
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5299 return vdp_next_vint_z80(context);
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5300 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5301
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5302 uint32_t vdp_next_vint(vdp_context *context)
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5303 {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5304 uint32_t ret = vdp_next_vint_real(context);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5305 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5306 static uint32_t last = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5307 if (last != ret) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5308 printf("vdp_next_vint is %d at frame %d, line %d, hslot %d\n", ret, context->frame, context->vcounter, context->hslot);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5309 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5310 last = ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5311 #endif
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5312 return ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5313 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5314
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
5315 uint32_t vdp_next_vint_z80(vdp_context * context)
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
5316 {
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5317 uint16_t vint_line = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->inactive_start : context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5318 if (context->vcounter == vint_line) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5319 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5320 if (context->regs[REG_MODE_4] & BIT_H40) {
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5321 if (context->hslot >= LINE_CHANGE_H40 || context->hslot <= VINT_SLOT_H40) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5322 uint32_t cycles = context->cycles;
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5323 if (context->hslot >= LINE_CHANGE_H40) {
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5324 if (context->hslot < 183) {
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5325 cycles += (183 - context->hslot) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5326 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5327
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5328 if (context->hslot < HSYNC_SLOT_H40) {
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5329 cycles += (HSYNC_SLOT_H40 - (context->hslot >= 229 ? context->hslot : 229)) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5330 }
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5331 for (int slot = context->hslot <= HSYNC_SLOT_H40 ? HSYNC_SLOT_H40 : context->hslot; slot < HSYNC_END_H40; slot++ )
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5332 {
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5333 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5334 }
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5335 cycles += (256 - (context->hslot > HSYNC_END_H40 ? context->hslot : HSYNC_END_H40)) * MCLKS_SLOT_H40;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5336 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5337
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5338 cycles += (VINT_SLOT_H40 - (context->hslot >= LINE_CHANGE_H40 ? 0 : context->hslot)) * MCLKS_SLOT_H40;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5339 return cycles;
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
5340 }
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5341 } else {
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
5342 if (context->hslot >= LINE_CHANGE_H32 || context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
5343 if (context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
5344 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32;
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
5345 } else if (context->hslot < 233) {
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
5346 return context->cycles + (VINT_SLOT_H32 + 256 - 233 + 148 - context->hslot) * MCLKS_SLOT_H32;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5347 } else {
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
5348 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5349 }
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
5350 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5351 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5352 } else {
1177
67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents: 1175
diff changeset
5353 if (context->hslot >= LINE_CHANGE_MODE4) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5354 return context->cycles + (VINT_SLOT_MODE4 + 256 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5355 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5356 if (context->hslot <= VINT_SLOT_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5357 return context->cycles + (VINT_SLOT_MODE4 - context->hslot) * MCLKS_SLOT_H32;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5358 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5359 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5360 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5361 int32_t cycles_to_vint = vdp_cycles_to_line(context, vint_line);
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5362 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5363 if (context->regs[REG_MODE_4] & BIT_H40) {
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
5364 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5365 } else {
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
5366 cycles_to_vint += (VINT_SLOT_H32 + 256 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5367 }
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
5368 } else {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5369 cycles_to_vint += (256 - LINE_CHANGE_MODE4 + VINT_SLOT_MODE4) * MCLKS_SLOT_H32;
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
5370 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
5371 return context->cycles + cycles_to_vint;
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
5372 }
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
5373
1377
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5374 uint32_t vdp_next_nmi(vdp_context *context)
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5375 {
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5376 if (!(context->flags2 & FLAG2_PAUSE)) {
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5377 return 0xFFFFFFFF;
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5378 }
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5379 return context->cycles + vdp_cycles_to_line(context, 0x1FF);
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5380 }
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5381
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5382 void vdp_pbc_pause(vdp_context *context)
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5383 {
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5384 context->flags2 |= FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5385 }
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
5386
953
08346262990b Remove the int number argument to vdp_int_ack since it is no longer used
Michael Pavone <pavone@retrodev.com>
parents: 952
diff changeset
5387 void vdp_int_ack(vdp_context * context)
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5388 {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5389 //CPU interrupt acknowledge is only used in Mode 5
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5390 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5391 //Apparently the VDP interrupt controller is not very smart
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5392 //Instead of paying attention to what interrupt is being acknowledged it just
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5393 //clears the pending flag for whatever interrupt it is currently asserted
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5394 //which may be different from the interrupt it was asserting when the 68k
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5395 //started the interrupt process. The window for this is narrow and depends
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5396 //on the latency between the int enable register write and the interrupt being
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5397 //asserted, but Fatal Rewind depends on this due to some buggy code
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5398 if ((context->flags2 & FLAG2_VINT_PENDING) && (context->regs[REG_MODE_2] & BIT_VINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5399 context->flags2 &= ~FLAG2_VINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5400 } else if((context->flags2 & FLAG2_HINT_PENDING) && (context->regs[REG_MODE_1] & BIT_HINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5401 context->flags2 &= ~FLAG2_HINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
5402 }
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5403 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5404 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5405
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
5406 #define VDP_STATE_VERSION 4
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5407 void vdp_serialize(vdp_context *context, serialize_buffer *buf)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5408 {
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5409 save_int8(buf, VDP_STATE_VERSION);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5410 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5411 save_buffer8(buf, context->vdpmem, VRAM_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5412 save_buffer16(buf, context->cram, CRAM_SIZE);
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
5413 save_buffer16(buf, context->vsram, MAX_VSRAM_SIZE);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5414 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5415 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5416 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5417 save_int8(buf, context->regs[i]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5418 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5419 save_int32(buf, context->address);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5420 save_int32(buf, context->serial_address);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5421 save_int8(buf, context->cd);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5422 uint8_t fifo_size;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5423 if (context->fifo_read < 0) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5424 fifo_size = 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5425 } else if (context->fifo_write > context->fifo_read) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5426 fifo_size = context->fifo_write - context->fifo_read;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5427 } else {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5428 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5429 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5430 save_int8(buf, fifo_size);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5431 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5432 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5433 fifo_entry *entry = context->fifo + cur;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5434 cur = (cur + 1) & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5435 save_int32(buf, entry->cycle);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5436 save_int32(buf, entry->address);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5437 save_int16(buf, entry->value);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5438 save_int8(buf, entry->cd);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5439 save_int8(buf, entry->partial);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5440 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5441 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5442 save_int16(buf, context->flags2 << 8 | context->flags);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5443 save_int32(buf, context->frame);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5444 save_int16(buf, context->vcounter);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5445 save_int8(buf, context->hslot);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5446 save_int16(buf, context->hv_latch);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5447 save_int8(buf, context->state);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5448 save_int16(buf, context->hscroll_a);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5449 save_int16(buf, context->hscroll_b);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5450 save_int16(buf, context->vscroll_latch[0]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5451 save_int16(buf, context->vscroll_latch[1]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5452 save_int16(buf, context->col_1);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5453 save_int16(buf, context->col_2);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5454 save_int16(buf, context->test_port);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5455 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5456 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5457 save_int8(buf, context->buf_a_off);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5458 save_int8(buf, context->buf_b_off);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5459 //FIXME: Sprite rendering state is currently a mess
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5460 save_int8(buf, context->sprite_index);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5461 save_int8(buf, context->sprite_draws);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5462 save_int8(buf, context->slot_counter);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5463 save_int8(buf, context->cur_slot);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5464 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5465 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5466 sprite_draw *draw = context->sprite_draw_list + i;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5467 save_int16(buf, draw->address);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5468 save_int16(buf, draw->x_pos);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5469 save_int8(buf, draw->pal_priority);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5470 save_int8(buf, draw->h_flip);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5471 save_int8(buf, draw->width);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5472 save_int8(buf, draw->height);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5473 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5474 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5475 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5476 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5477 save_int8(buf, info->size);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5478 save_int8(buf, info->index);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5479 save_int16(buf, info->y);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5480 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5481 save_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5482
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5483 save_int32(buf, context->cycles);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5484 save_int32(buf, context->pending_vint_start);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5485 save_int32(buf, context->pending_hint_start);
1925
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
5486 save_int32(buf, context->address_latch);
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5487 //was cd_latch, for compatibility with older builds that expect it
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5488 save_int8(buf, context->cd);
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
5489 save_int8(buf, context->window_h_latch);
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
5490 save_int8(buf, context->window_v_latch);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5491 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5492
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5493 void vdp_deserialize(deserialize_buffer *buf, void *vcontext)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5494 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5495 vdp_context *context = vcontext;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5496 uint8_t version = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5497 uint8_t vramk;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5498 if (version == 64) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5499 vramk = version;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5500 version = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5501 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5502 vramk = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5503 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5504 if (version > VDP_STATE_VERSION) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5505 warning("Save state has VDP version %d, but this build only understands versions %d and lower", version, VDP_STATE_VERSION);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5506 }
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5507 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5508 if ((vramk * 1024) > VRAM_SIZE) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5509 buf->cur_pos += (vramk * 1024) - VRAM_SIZE;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5510 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5511 load_buffer16(buf, context->cram, CRAM_SIZE);
1431
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
5512 for (int i = 0; i < CRAM_SIZE; i++)
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
5513 {
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
5514 update_color_map(context, i, context->cram[i]);
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
5515 }
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
5516 load_buffer16(buf, context->vsram, version > 1 ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5517 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5518 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5519 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5520 context->regs[i] = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5521 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5522 context->address = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5523 context->serial_address = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5524 context->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5525 uint8_t fifo_size = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5526 if (fifo_size > FIFO_SIZE) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5527 fatal_error("Invalid fifo size %d", fifo_size);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5528 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5529 if (fifo_size) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5530 context->fifo_read = 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5531 context->fifo_write = fifo_size & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5532 for (int i = 0; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5533 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5534 fifo_entry *entry = context->fifo + i;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5535 entry->cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5536 entry->address = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5537 entry->value = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5538 entry->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5539 entry->partial = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5540 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5541 } else {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5542 context->fifo_read = -1;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5543 context->fifo_write = 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5544 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5545 uint16_t flags = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5546 context->flags2 = flags >> 8;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5547 context->flags = flags;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5548 context->frame = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5549 context->vcounter = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5550 context->hslot = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5551 context->hv_latch = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5552 context->state = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5553 context->hscroll_a = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5554 context->hscroll_b = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5555 context->vscroll_latch[0] = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5556 context->vscroll_latch[1] = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5557 context->col_1 = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5558 context->col_2 = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5559 context->test_port = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5560 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5561 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5562 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5563 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5564 context->sprite_index = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5565 context->sprite_draws = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5566 context->slot_counter = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5567 context->cur_slot = load_int8(buf);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5568 if (version == 0) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5569 int cur_draw = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5570 for (int i = 0; i < MAX_SPRITES_LINE * 2; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5571 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5572 if (cur_draw < MAX_SPRITES_LINE) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5573 sprite_draw *last = cur_draw ? context->sprite_draw_list + cur_draw - 1 : NULL;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5574 sprite_draw *draw = context->sprite_draw_list + cur_draw++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5575 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5576 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5577 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5578 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5579 draw->width = 1;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5580 draw->height = 8;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5581
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5582 if (last && last->width < 4 && last->h_flip == draw->h_flip && last->pal_priority == draw->pal_priority) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5583 int adjust_x = draw->x_pos + draw->h_flip ? -8 : 8;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5584 int height = draw->address - last->address /4;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5585 if (last->x_pos == adjust_x && (
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5586 (last->width > 1 && height == last->height) ||
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5587 (last->width == 1 && (height == 8 || height == 16 || height == 24 || height == 32))
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5588 )) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5589 //current draw appears to be part of the same sprite as the last one, combine it
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5590 cur_draw--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5591 last->width++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5592 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5593 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5594 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5595 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5596 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5597 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5598 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5599 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5600 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5601 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5602 for (int i = 0; i < MAX_SPRITES_LINE; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5603 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5604 sprite_draw *draw = context->sprite_draw_list + i;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5605 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5606 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5607 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5608 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5609 draw->width = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5610 draw->height = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5611 }
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5612 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5613 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5614 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5615 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5616 info->size = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5617 info->index = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5618 info->y = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5619 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5620 load_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5621
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5622 context->cycles = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5623 context->pending_vint_start = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5624 context->pending_hint_start = load_int32(buf);
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
5625 context->window_h_latch = context->regs[REG_WINDOW_H];
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
5626 context->window_v_latch = context->regs[REG_WINDOW_V];
1925
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
5627 if (version > 2) {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
5628 context->address_latch = load_int32(buf);
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5629 //was cd_latch, no longer used
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5630 load_int8(buf);
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
5631 if (version > 3) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
5632 context->window_h_latch = load_int8(buf);
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
5633 context->window_v_latch = load_int8(buf);
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
5634 }
1925
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
5635 } else {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
5636 context->address_latch = context->address;
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
5637 }
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5638 update_video_params(context);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
5639 }
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5640
1649
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5641 static vdp_context *current_vdp;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5642 static void vdp_debug_window_close(uint8_t which)
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5643 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5644 //TODO: remove need for current_vdp global, and find the VDP via current_system instead
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5645 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
1649
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5646 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5647 if (current_vdp->enabled_debuggers & (1 << i) && which == current_vdp->debug_fb_indices[i]) {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5648 vdp_toggle_debug_view(current_vdp, i);
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5649 break;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5650 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5651 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5652 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5653
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5654 void vdp_toggle_debug_view(vdp_context *context, uint8_t debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5655 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5656 if (context->enabled_debuggers & 1 << debug_type) {
1642
c6b2c0f8cc61 Implemented support for toggling off a debug view
Michael Pavone <pavone@retrodev.com>
parents: 1641
diff changeset
5657 render_destroy_window(context->debug_fb_indices[debug_type]);
c6b2c0f8cc61 Implemented support for toggling off a debug view
Michael Pavone <pavone@retrodev.com>
parents: 1641
diff changeset
5658 context->enabled_debuggers &= ~(1 << debug_type);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5659 } else {
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
5660 uint32_t width,height;
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
5661 uint8_t fetch_immediately = 0;
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5662 char *caption;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5663 switch(debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5664 {
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5665 case DEBUG_PLANE:
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5666 caption = "BlastEm - VDP Plane Debugger";
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
5667 width = height = 1024;
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
5668 break;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5669 case DEBUG_VRAM:
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
5670 caption = "BlastEm - VDP VRAM Debugger";
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
5671 width = 1024;
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
5672 height = 512;
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5673 break;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5674 case DEBUG_CRAM:
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
5675 caption = "BlastEm - VDP CRAM Debugger";
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
5676 width = 512;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
5677 height = 512;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
5678 fetch_immediately = 1;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
5679 break;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5680 case DEBUG_COMPOSITE:
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
5681 caption = "BlastEm - VDP Plane Composition Debugger";
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
5682 width = LINEBUF_SIZE;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
5683 height = context->inactive_start + context->border_top + context->border_bot;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
5684 fetch_immediately = 1;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
5685 break;
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5686 default:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5687 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5688 }
1649
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5689 current_vdp = context;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
5690 context->debug_fb_indices[debug_type] = render_create_window(caption, width, height, vdp_debug_window_close);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5691 if (context->debug_fb_indices[debug_type]) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5692 context->enabled_debuggers |= 1 << debug_type;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5693 }
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
5694 if (fetch_immediately) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
5695 context->debug_fbs[debug_type] = render_get_framebuffer(context->debug_fb_indices[debug_type], &context->debug_fb_pitch[debug_type]);
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
5696 }
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5697 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5698 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5699
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5700 void vdp_inc_debug_mode(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5701 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5702 uint8_t active = render_get_active_framebuffer();
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5703 if (active < FRAMEBUFFER_USER_START) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5704 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5705 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5706 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5707 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5708 if (context->enabled_debuggers & (1 << i) && context->debug_fb_indices[i] == active) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5709 context->debug_modes[i]++;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5710 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5711 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5712 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
5713 }
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5714
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5715 void vdp_replay_event(vdp_context *context, uint8_t event, event_reader *reader)
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5716 {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5717 uint32_t address;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5718 deserialize_buffer *buffer = &reader->buffer;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5719 switch (event)
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5720 {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5721 case EVENT_VRAM_BYTE:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
5722 reader_ensure_data(reader, 3);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5723 address = load_int16(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5724 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5725 case EVENT_VRAM_BYTE_DELTA:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
5726 reader_ensure_data(reader, 2);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5727 address = reader->last_byte_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5728 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5729 case EVENT_VRAM_BYTE_ONE:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
5730 reader_ensure_data(reader, 1);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5731 address = reader->last_byte_address + 1;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5732 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5733 case EVENT_VRAM_BYTE_AUTO:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
5734 reader_ensure_data(reader, 1);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5735 address = reader->last_byte_address + context->regs[REG_AUTOINC];
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5736 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5737 case EVENT_VRAM_WORD:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
5738 reader_ensure_data(reader, 4);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5739 address = load_int8(buffer) << 16;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5740 address |= load_int16(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5741 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5742 case EVENT_VRAM_WORD_DELTA:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
5743 reader_ensure_data(reader, 3);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5744 address = reader->last_word_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5745 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5746 case EVENT_VDP_REG:
1956
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
5747 case EVENT_VDP_INTRAM:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
5748 reader_ensure_data(reader, event == EVENT_VDP_REG ? 2 : 3);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5749 address = load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5750 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5751 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5752
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5753 switch (event)
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5754 {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5755 case EVENT_VDP_REG: {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5756 uint8_t value = load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5757 context->regs[address] = value;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5758 if (address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5759 context->double_res = (value & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5760 if (!context->double_res) {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5761 context->flags2 &= ~FLAG2_EVEN_FIELD;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5762 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5763 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5764 if (address == REG_MODE_1 || address == REG_MODE_2 || address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5765 update_video_params(context);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5766 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5767 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5768 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5769 case EVENT_VRAM_BYTE:
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5770 case EVENT_VRAM_BYTE_DELTA:
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5771 case EVENT_VRAM_BYTE_ONE:
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5772 case EVENT_VRAM_BYTE_AUTO: {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5773 uint8_t byte = load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5774 reader->last_byte_address = address;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5775 vdp_check_update_sat_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5776 write_vram_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5777 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5778 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5779 case EVENT_VRAM_WORD:
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5780 case EVENT_VRAM_WORD_DELTA: {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5781 uint16_t value = load_int16(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5782 reader->last_word_address = address;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5783 vdp_check_update_sat(context, address, value);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5784 write_vram_word(context, address, value);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5785 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5786 }
1956
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
5787 case EVENT_VDP_INTRAM:
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
5788 if (address < 128) {
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
5789 write_cram(context, address, load_int16(buffer));
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
5790 } else {
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
5791 context->vsram[address&63] = load_int16(buffer);
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
5792 }
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5793 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5794 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
5795 }