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annotate vdp.c @ 2693:46dba737b931

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WIP Nuklear UI in VDP debug windows
author Michael Pavone <pavone@retrodev.com>
date Thu, 19 Jun 2025 19:59:05 -0700
parents 05915f01046d
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1 /*
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2 Copyright 2013 Michael Pavone
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3 This file is part of BlastEm.
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4 BlastEm is free software distributed under the terms of the GNU General Public License version 3 or greater. See COPYING for full license text.
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5 */
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6 #include "vdp.h"
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7 #include "blastem.h"
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8 #include <stdlib.h>
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9 #include <string.h>
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10 #include "render.h"
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11 #include "util.h"
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12 #include "event_log.h"
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13 #include "terminal.h"
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14 #ifndef DISABLE_NUKLEAR
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15 #include "nuklear_ui/debug_ui.h"
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16 #endif
20
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17
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18 #define NTSC_INACTIVE_START 224
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19 #define PAL_INACTIVE_START 240
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20 #define MODE4_INACTIVE_START 192
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21 #define BUF_BIT_PRIORITY 0x40
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22 #define MAP_BIT_PRIORITY 0x8000
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23 #define MAP_BIT_H_FLIP 0x800
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24 #define MAP_BIT_V_FLIP 0x1000
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25
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26 #define SCROLL_BUFFER_MASK (SCROLL_BUFFER_SIZE-1)
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27 #define SCROLL_BUFFER_DRAW (SCROLL_BUFFER_SIZE/2)
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28
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29 #define MCLKS_SLOT_H40 16
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30 #define MCLKS_SLOT_H32 20
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31 #define VINT_SLOT_H40 0 //21 slots before HSYNC, 16 during, 10 after
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32 #define VINT_SLOT_H32 0 //old value was 23, but recent tests suggest the actual value is close to the H40 one
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33 #define VINT_SLOT_MODE4 4
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34 #define HSYNC_SLOT_H40 230
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35 #define HSYNC_END_H40 (HSYNC_SLOT_H40+17)
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36 #define HBLANK_START_H40 178 //should be 179 according to Nemesis, but 178 seems to fit slightly better with my test ROM results
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37 #define HBLANK_END_H40 0 //should be 5.5 according to Nemesis, but 0 seems to fit better with my test ROM results
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38 #define HBLANK_START_H32 233 //should be 147 according to Nemesis which is very different from my test ROM result
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39 #define HBLANK_END_H32 0 //should be 5 according to Nemesis, but 0 seems to fit better with my test ROM results
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40 #define LINE_CHANGE_H40 165
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43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
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41 #define LINE_CHANGE_H32 133
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42 #define LINE_CHANGE_MODE4 248
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43 #define VBLANK_START_H40 (LINE_CHANGE_H40+2)
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44 #define VBLANK_START_H32 (LINE_CHANGE_H32+2)
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45 #define FIFO_LATENCY 3
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46 #define READ_LATENCY 3
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47
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48 #define BORDER_TOP_V24 27
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49 #define BORDER_TOP_V28 11
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50 #define BORDER_TOP_V24_PAL 54
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51 #define BORDER_TOP_V28_PAL 38
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52 #define BORDER_TOP_V30_PAL 30
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53
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54 #define BORDER_BOT_V24 24
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55 #define BORDER_BOT_V28 8
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56 #define BORDER_BOT_V24_PAL 48
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57 #define BORDER_BOT_V28_PAL 32
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58 #define BORDER_BOT_V30_PAL 24
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59
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60 enum {
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61 INACTIVE = 0,
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62 PREPARING, //used for line 0x1FF
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63 ACTIVE
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64 };
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65
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66 uint16_t mode4_address_map[0x4000];
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67 static uint32_t planar_to_chunky[256];
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68 static uint8_t levels[] = {0, 27, 49, 71, 87, 103, 119, 130, 146, 157, 174, 190, 206, 228, 255};
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69
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70 static uint8_t debug_base[][3] = {
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71 {127, 127, 127}, //BG
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72 {0, 0, 127}, //A
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73 {127, 0, 0}, //Window
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74 {0, 127, 0}, //B
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75 {127, 0, 127} //Sprites
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76 };
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77
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78 static uint32_t calc_crop(uint32_t crop, uint32_t border)
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79 {
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80 return crop >= border ? 0 : border - crop;
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81 }
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82
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83 static void update_video_params(vdp_context *context)
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84 {
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85 uint32_t top_crop = render_overscan_top();
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86 uint32_t bot_crop = render_overscan_bot();
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87 uint32_t border_top;
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88 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
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89 if (context->regs[REG_MODE_2] & BIT_PAL) {
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90 if (context->flags2 & FLAG2_REGION_PAL) {
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91 context->inactive_start = PAL_INACTIVE_START;
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92 border_top = BORDER_TOP_V30_PAL;
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93 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V30_PAL);
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94 } else {
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95 //the behavior here is rather weird and needs more investigation
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96 context->inactive_start = 0xF0;
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97 border_top = 1;
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98 context->border_bot = calc_crop(bot_crop, 3);
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99 }
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100 } else {
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101 context->inactive_start = NTSC_INACTIVE_START;
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102 if (context->flags2 & FLAG2_REGION_PAL) {
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103 border_top = BORDER_TOP_V28_PAL;
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104 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28_PAL);
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105 } else {
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106 border_top = BORDER_TOP_V28;
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107 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V28);
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108 }
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109 }
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110 if (context->regs[REG_MODE_4] & BIT_H40) {
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111 context->max_sprites_frame = MAX_SPRITES_FRAME;
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diff changeset
112 context->max_sprites_line = MAX_SPRITES_LINE;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
113 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
114 context->max_sprites_frame = MAX_SPRITES_FRAME_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
115 context->max_sprites_line = MAX_SPRITES_LINE_H32;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
116 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
117 if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
118 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
119 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
120 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
121 } else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
122 context->state = PREPARING;
2567
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
123 if (!context->done_composite) {
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
124 memset(context->compositebuf, 0, sizeof(context->compositebuf));
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
125 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
126 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
127 }
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
128 } else {
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
129 context->inactive_start = MODE4_INACTIVE_START;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
130 if (context->flags2 & FLAG2_REGION_PAL) {
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
131 border_top = BORDER_TOP_V24_PAL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
132 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24_PAL);
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
133 } else {
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
134 border_top = BORDER_TOP_V24;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
135 context->border_bot = calc_crop(bot_crop, BORDER_BOT_V24);
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
136 }
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
137 if (!(context->regs[REG_MODE_1] & BIT_MODE_4) && context->type == VDP_GENESIS){
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
138 context->state = INACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
139 } else if (context->state == INACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
140 //Undo forced INACTIVE state due to neither Mode 4 nor Mode 5 being active
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
141 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
142 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
143 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
144 else if (context->vcounter == 0x1FF) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
145 context->state = PREPARING;
2567
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
146 if (!context->done_composite) {
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
147 memset(context->compositebuf, 0, sizeof(context->compositebuf));
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
148 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
149 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
150 }
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
151 }
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
152 context->border_top = calc_crop(top_crop, border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
153 context->top_offset = border_top - context->border_top;
2385
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state
Michael Pavone <pavone@retrodev.com>
parents: 2381
diff changeset
154 context->double_res = (context->regs[REG_MODE_4] & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES);
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state
Michael Pavone <pavone@retrodev.com>
parents: 2381
diff changeset
155 if (!context->double_res) {
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state
Michael Pavone <pavone@retrodev.com>
parents: 2381
diff changeset
156 context->flags2 &= ~FLAG2_EVEN_FIELD;
ce9f5a42c481 Ensure VDP double_res flag is updated when loading a save state
Michael Pavone <pavone@retrodev.com>
parents: 2381
diff changeset
157 }
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
158 }
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
159
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
160 static uint8_t static_table_init_done;
426
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
161
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
162 vdp_context *init_vdp_context_int(uint8_t region_pal, uint8_t has_max_vsram, uint8_t type)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
163 {
1640
3602f3b20072 Small cleanup of vdp_context struct layout and removal of separately allocated buffers
Michael Pavone <pavone@retrodev.com>
parents: 1639
diff changeset
164 vdp_context *context = calloc(1, sizeof(vdp_context) + VRAM_SIZE);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
165 context->sprite_draws = MAX_SPRITES_LINE;
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
166 context->fifo_write = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
167 context->fifo_read = -1;
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
168 context->regs[REG_HINT] = context->hint_counter = 0xFF;
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
169 context->vsram_size = has_max_vsram ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE;
2194
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
170 context->type = type;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
171 uint8_t b,g,r,index;
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
172 for (uint16_t color = 0; color < (1 << 12); color++) {
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
173 if (type == VDP_GAMEGEAR) {
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
174 b = (color >> 8 & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
175 g = (color >> 4 & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
176 r = (color & 0xF) * 0x11;
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
177 } else {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
178 switch (color & FBUF_MASK)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
179 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
180 case FBUF_SHADOW:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
181 b = levels[(color >> 9) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
182 g = levels[(color >> 5) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
183 r = levels[(color >> 1) & 0x7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
184 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
185 case FBUF_HILIGHT:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
186 b = levels[((color >> 9) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
187 g = levels[((color >> 5) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
188 r = levels[((color >> 1) & 0x7) + 7];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
189 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
190 case FBUF_MODE4:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
191 //TODO: Mode 4 has a separate DAC tap so this isn't quite correct
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
192 //TODO: blue channel has one of its taps offest on SMS1 and MD
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
193 b = levels[(color >> 4 & 0xC) | (color >> 6 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
194 g = levels[(color >> 2 & 0x8) | (color >> 1 & 0x4) | (color >> 4 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
195 r = levels[(color << 1 & 0xC) | (color >> 1 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
196 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
197 case FBUF_TMS:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
198 index = color >> 1 & 0x7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
199 index |= color >> 2 & 0x8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
200 if (type == VDP_TMS9918A) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
201 switch (index)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
202 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
203 case 0:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
204 case 1:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
205 r = g = b = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
206 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
207 case 2:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
208 r = 0x21; g = 0xC8; b = 0x42;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
209 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
210 case 3:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
211 r = 0x5E; g = 0xDC; b = 0x78;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
212 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
213 case 4:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
214 r = 0x54; g = 0x55; b = 0xED;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
215 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
216 case 5:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
217 r = 0x7D; g = 0x76; b = 0xFC;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
218 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
219 case 6:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
220 r = 0xD4; g = 0x52; b = 0x4D;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
221 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
222 case 7:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
223 r = 0x42; g = 0xEB; b = 0xF5;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
224 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
225 case 8:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
226 r = 0xFC; g = 0x55; b = 0x54;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
227 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
228 case 9:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
229 r = 0xFF; g = 0x79; b = 0x78;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
230 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
231 case 10:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
232 r = 0xD4; g = 0xC1; b = 0x54;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
233 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
234 case 11:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
235 r = 0xE6; g = 0xCE; b = 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
236 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
237 case 12:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
238 r = 0x21; g = 0xB0; b = 0x3B;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
239 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
240 case 13:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
241 r = 0xC9; g = 0x5B; b = 0xBA;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
242 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
243 case 14:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
244 r = g = b = 0xCC;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
245 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
246 case 15:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
247 r = g = b = 0xFF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
248 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
249 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
250 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
251 static const uint8_t tms_to_sms[] = {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
252 0x00, 0x00, 0x08, 0x0C, 0x10, 0x30, 0x01, 0x3C, 0x02, 0x03, 0x05, 0x0F, 0x04, 0x33, 0x15, 0x3F
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
253 };
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
254 index = tms_to_sms[index] << 1;
2258
a28e1042f4de Fix a few of the most glaring TMS9918A issues
Michael Pavone <pavone@retrodev.com>
parents: 2257
diff changeset
255 index = (index & 0xE) | (index << 1 & 0xE0);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
256 //TODO: Mode 4 has a separate DAC tap so this isn't quite correct
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
257 //TODO: blue channel has one of its taps offest on SMS1 and MD
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
258 b = levels[(index >> 4 & 0xC) | (index >> 6 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
259 g = levels[(index >> 2 & 0x8) | (index >> 1 & 0x4) | (index >> 4 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
260 r = levels[(index << 1 & 0xC) | (index >> 1 & 0x2)];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
261 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
262 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
263 default:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
264 b = levels[(color >> 8) & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
265 g = levels[(color >> 4) & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
266 r = levels[color & 0xE];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
267 }
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
268 }
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
269 context->color_map[color] = render_map_color(r, g, b);
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
270 }
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 503
diff changeset
271
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
272 if (!static_table_init_done) {
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
273
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
274 for (uint16_t mode4_addr = 0; mode4_addr < 0x4000; mode4_addr++)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
275 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
276 uint16_t mode5_addr = mode4_addr & 0x3DFD;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
277 mode5_addr |= mode4_addr << 8 & 0x200;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
278 mode5_addr |= mode4_addr >> 8 & 2;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
279 mode4_address_map[mode4_addr] = mode5_addr;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
280 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
281 for (uint32_t planar = 0; planar < 256; planar++)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
282 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
283 uint32_t chunky = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
284 for (int bit = 7; bit >= 0; bit--)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
285 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
286 chunky = chunky << 4;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
287 chunky |= planar >> bit & 1;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
288 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
289 planar_to_chunky[planar] = chunky;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
290 }
2236
c149c929361c Fix color bug when switching between Game Gear and other Sega systems
Michael Pavone <pavone@retrodev.com>
parents: 2230
diff changeset
291 static_table_init_done = 1;
426
add9e2f5c0e3 Make VDP render in native pixel format of the renderer for a modest performance gain and to make it easier to use OpenGL for rendering
Mike Pavone <pavone@retrodev.com>
parents: 424
diff changeset
292 }
437
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
293 for (uint8_t color = 0; color < (1 << (3 + 1 + 1 + 1)); color++)
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
294 {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
295 uint8_t src = color & DBG_SRC_MASK;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
296 if (src > DBG_SRC_S) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
297 context->debugcolors[color] = 0;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
298 } else {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
299 uint8_t r,g,b;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
300 b = debug_base[src][0];
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
301 g = debug_base[src][1];
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
302 r = debug_base[src][2];
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
303 if (color & DBG_PRIORITY)
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
304 {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
305 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
306 b += 48;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
307 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
308 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
309 g += 48;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
310 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
311 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
312 r += 48;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
313 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
314 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
315 if (color & DBG_SHADOW) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
316 b /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
317 g /= 2;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
318 r /=2 ;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
319 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
320 if (color & DBG_HILIGHT) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
321 if (b) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
322 b += 72;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
323 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
324 if (g) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
325 g += 72;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
326 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
327 if (r) {
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
328 r += 72;
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
329 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
330 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
331 context->debugcolors[color] = render_map_color(r, g, b);
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
332 }
afbea09d7fb4 Restore one of the VDP debugging modes
Mike Pavone <pavone@retrodev.com>
parents: 436
diff changeset
333 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
334 if (region_pal) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
335 context->flags2 |= FLAG2_REGION_PAL;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
336 }
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
337 update_video_params(context);
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
338
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
339 return context;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
340 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
341
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
342 static uint32_t mode5_sat_address(vdp_context *context)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
343 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
344 uint32_t addr = context->regs[REG_SAT] << 9;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
345 if (!(context->regs[REG_MODE_2] & BIT_128K_VRAM)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
346 addr &= 0xFFFF;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
347 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
348 if (context->regs[REG_MODE_4] & BIT_H40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
349 addr &= 0x1FC00;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
350 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
351 return addr;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
352 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
353
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
354 static void vdp_check_update_sat(vdp_context *context, uint32_t address, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
355 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
356 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
357 if (!(address & 4)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
358 uint32_t sat_address = mode5_sat_address(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
359 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
360 uint16_t cache_address = address - sat_address;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
361 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
362 context->sat_cache[cache_address] = value >> 8;
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Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
363 context->sat_cache[cache_address^1] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
364 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
365 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
366 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
367 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
368
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
369 void vdp_check_update_sat_byte(vdp_context *context, uint32_t address, uint8_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
370 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
371 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
372 if (!(address & 4)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
373 uint32_t sat_address = mode5_sat_address(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
374 if(address >= sat_address && address < (sat_address + SAT_CACHE_SIZE*2)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
375 uint16_t cache_address = address - sat_address;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
376 cache_address = (cache_address & 3) | (cache_address >> 1 & 0x1FC);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
377 context->sat_cache[cache_address] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
378 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
379 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
380 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
381 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
382
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
383 static void write_vram_word(vdp_context *context, uint32_t address, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
384 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
385 address = (address & 0x3FC) | (address >> 1 & 0xFC01) | (address >> 9 & 0x2);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
386 address ^= 1;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
387 //TODO: Support an option to actually have 128KB of VRAM
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
388 context->vdpmem[address] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
389 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
390
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
391 static void write_vram_byte(vdp_context *context, uint32_t address, uint8_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
392 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
393 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
394 address &= 0xFFFF;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
395 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
396 address = mode4_address_map[address & 0x3FFF];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
397 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
398 context->vdpmem[address] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
399 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
400
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
401 #define VSRAM_DIRTY_BITS 0xF800
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
402
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
403 //rough estimate of slot number at which border display starts
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
404 #define BG_START_SLOT 6
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
405
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
406 static void update_color_map(vdp_context *context, uint16_t index, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
407 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
408 context->colors[index] = context->color_map[value & CRAM_BITS];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
409 context->colors[index + SHADOW_OFFSET] = context->color_map[(value & CRAM_BITS) | FBUF_SHADOW];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
410 context->colors[index + HIGHLIGHT_OFFSET] = context->color_map[(value & CRAM_BITS) | FBUF_HILIGHT];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
411 if (context->type == VDP_GAMEGEAR) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
412 context->colors[index + MODE4_OFFSET] = context->color_map[value & 0xFFF];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
413 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
414 context->colors[index + MODE4_OFFSET] = context->color_map[(value & CRAM_BITS) | FBUF_MODE4];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
415 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
416 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
417
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
418 void write_cram_internal(vdp_context * context, uint16_t addr, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
419 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
420 context->cram[addr] = value;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
421 update_color_map(context, addr, value);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
422 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
423
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
424 static void write_cram(vdp_context * context, uint16_t address, uint16_t value)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
425 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
426 uint16_t addr;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
427 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
428 addr = (address/2) & (CRAM_SIZE-1);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
429 } else if (context->type == VDP_GAMEGEAR) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
430 addr = (address/2) & 31;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
431 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
432 addr = address & 0x1F;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
433 value = (value << 1 & 0xE) | (value << 2 & 0xE0) | (value & 0xE00);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
434 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
435 write_cram_internal(context, addr, value);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
436
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
437 if (context->output && context->hslot >= BG_START_SLOT && (
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
438 context->vcounter < context->inactive_start + context->border_bot
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
439 || context->vcounter > 0x200 - context->border_top
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
440 )) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
441 uint8_t bg_end_slot = BG_START_SLOT + (context->regs[REG_MODE_4] & BIT_H40) ? LINEBUF_SIZE/2 : (256+HORIZ_BORDER)/2;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
442 if (context->hslot < bg_end_slot) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
443 pixel_t color = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->colors[addr] : context->colors[addr + MODE4_OFFSET];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
444 context->output[(context->hslot - BG_START_SLOT)*2 + 1] = color;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
445 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
446 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
447 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
448
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
449 #ifndef _WIN32
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
450 static int vdp_render_thread_main(void *vcontext)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
451 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
452 vdp_context *context = vcontext;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
453 event_out event;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
454 for (;;)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
455 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
456 event.autoinc = context->regs[REG_AUTOINC];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
457 uint8_t etype = mem_reader_next_event(&event);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
458 if (etype == EVENT_EOF) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
459 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
460 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
461 vdp_run_context(context, event.cycle);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
462 switch (etype)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
463 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
464 case EVENT_ADJUST:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
465 vdp_adjust_cycles(context, event.address);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
466 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
467 case EVENT_VDP_REG:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
468 context->regs[event.address] = event.value;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
469 if (event.address == REG_MODE_4) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
470 context->double_res = (event.value & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
471 if (!context->double_res) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
472 context->flags2 &= ~FLAG2_EVEN_FIELD;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
473 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
474 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
475 if (event.address == REG_MODE_1 || event.address == REG_MODE_2 || event.address == REG_MODE_4) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
476 update_video_params(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
477 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
478 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
479 case EVENT_VRAM_BYTE:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
480 case EVENT_VRAM_BYTE_DELTA:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
481 case EVENT_VRAM_BYTE_ONE:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
482 case EVENT_VRAM_BYTE_AUTO:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
483 vdp_check_update_sat_byte(context, event.address ^ 1, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
484 write_vram_byte(context, event.address ^ 1, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
485 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
486 case EVENT_VRAM_WORD:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
487 case EVENT_VRAM_WORD_DELTA:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
488 vdp_check_update_sat(context, event.address, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
489 write_vram_word(context, event.address, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
490 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
491 case EVENT_VDP_INTRAM:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
492 if (event.address < 128) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
493 write_cram(context, event.address, event.value);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
494 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
495 context->vsram[event.address&63] = event.value;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
496 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
497 break;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
498 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
499 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
500 return 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
501 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
502 #endif
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
503
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
504 static render_thread vdp_thread;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
505 vdp_context *init_vdp_context(uint8_t region_pal, uint8_t has_max_vsram, uint8_t type)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
506 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
507 vdp_context *ret = init_vdp_context_int(region_pal, has_max_vsram, type);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
508 vdp_context *context;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
509 #ifndef _WIN32
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
510 if (render_is_threaded_video()) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
511 context = ret->renderer = init_vdp_context_int(region_pal, has_max_vsram, type);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
512 } else
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
513 #endif
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
514 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
515 context = ret;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
516 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
517 if (headless) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
518 context->fb = malloc(512 * LINEBUF_SIZE * sizeof(pixel_t));
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
519 context->output_pitch = LINEBUF_SIZE * sizeof(pixel_t);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
520 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
521 context->cur_buffer = FRAMEBUFFER_ODD;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
522 context->fb = render_get_framebuffer(FRAMEBUFFER_ODD, &context->output_pitch);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
523 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
524 context->output = (pixel_t *)(((char *)context->fb) + context->output_pitch * context->border_top);
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
525 #ifndef _WIN32
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
526 if (ret->renderer) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
527 event_log_mem();
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
528 render_create_thread(&vdp_thread, "vdp_render", vdp_render_thread_main, ret->renderer);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
529 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
530 #endif
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
531 return ret;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
532 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
533
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
534 void vdp_free(vdp_context *context)
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
535 {
2030
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
536 if (headless) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
537 free(context->fb);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
538 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
539 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
2030
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
540 {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
541 if (context->enabled_debuggers & (1 << i)) {
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
542 vdp_toggle_debug_view(context, i);
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
543 }
bcc85f6b06c2 Close VDP debug windows when VDP is freed. Fixes Trac bug 39
Michael Pavone <pavone@retrodev.com>
parents: 2013
diff changeset
544 }
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
545 #ifndef _WIN32
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
546 if (context->renderer) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
547 event_log_mem_stop();
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
548 vdp_free(context->renderer);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
549 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
550 #endif
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
551 free(context);
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
552 }
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
553
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
554 static int is_refresh(vdp_context * context, uint32_t slot)
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
555 {
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
556 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
557 return slot == 250 || slot == 26 || slot == 59 || slot == 90 || slot == 122 || slot == 154;
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
558 } else {
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
559 //TODO: Figure out which slots are refresh when display is off in 32-cell mode
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
560 //These numbers are guesses based on H40 numbers
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
561 return slot == 243 || slot == 19 || slot == 51 || slot == 83 || slot == 115;
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
562 //The numbers below are the refresh slots during active display
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
563 //return (slot == 29 || slot == 61 || slot == 93 || slot == 125);
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
564 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
565 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
566
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
567 static void increment_address(vdp_context *context)
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
568 {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
569 context->address += context->regs[REG_AUTOINC];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
570 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
571 context->address++;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
572 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
573 }
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
574
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
575 static void render_sprite_cells(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
576 {
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
577 if (context->cur_slot < 0) {
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
578 //should this be 16 in H32?
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
579 context->cur_slot += 32;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
580 }
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
581 if (context->cur_slot >= MAX_SPRITES_LINE) {
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
582 context->cur_slot--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
583 return;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
584 }
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
585 sprite_draw * d = context->sprite_draw_list + context->cur_slot;
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
586 uint16_t address = d->address;
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
587 address += context->sprite_x_offset * d->height * 4;
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
588 context->serial_address = address;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
589 if (d->x_pos) {
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
590 uint16_t dir;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
591 int16_t x;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
592 if (d->h_flip) {
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
593 x = d->x_pos + 7 + 8 * (d->width - context->sprite_x_offset - 1);
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
594 dir = -1;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
595 } else {
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
596 x = d->x_pos + context->sprite_x_offset * 8;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
597 dir = 1;
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
598 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
599 context->flags |= FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
600 if (!(context->flags & FLAG_MASKED)) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
601 x -= 128;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
602 //printf("Draw Slot %d of %d, Rendering sprite cell from %X to x: %d\n", context->cur_slot, context->sprite_draws, d->address, x);
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
603 uint8_t collide = 0;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
604 if (x >= 8 && x < 312) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
605 //sprite is fully visible
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
606 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
607 uint8_t pixel = context->vdpmem[address] >> 4;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
608 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
609 context->linebuf[x] = pixel | d->pal_priority;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
610 } else {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
611 collide |= pixel;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
612 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
613 x += dir;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
614 pixel = context->vdpmem[address] & 0xF;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
615 if (!(context->linebuf[x] & 0xF)) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
616 context->linebuf[x] = pixel | d->pal_priority;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
617 } else {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
618 collide |= pixel;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
619 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
620 x += dir;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
621 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
622 } else if (x > -8 && x < 327) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
623 //sprite is partially visible
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
624 for (; address != ((context->serial_address+4) & 0xFFFF); address++) {
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
625 if (x >= 0 && x < 320) {
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
626 uint8_t pixel = context->vdpmem[address] >> 4;
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
627 if (!(context->linebuf[x] & 0xF)) {
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
628 context->linebuf[x] = pixel | d->pal_priority;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
629 } else {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
630 collide |= pixel;
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
631 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
632 }
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
633 x += dir;
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
634 if (x >= 0 && x < 320) {
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
635 uint8_t pixel = context->vdpmem[address] & 0xF;
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
636 if (!(context->linebuf[x] & 0xF)) {
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
637 context->linebuf[x] = pixel | d->pal_priority;
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
638 } else {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
639 collide |= pixel;
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
640 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
641 }
1884
b5549258b98b Slightly gross fix for edge case introduced in border cropping change
Michael Pavone <pavone@retrodev.com>
parents: 1881
diff changeset
642 x += dir;
1886
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
643 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
644 }
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
645 if (collide) {
183b86ba0212 Optimized sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1885
diff changeset
646 context->flags2 |= FLAG2_SPRITE_COLLIDE;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
647 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
648 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
649 } else if (context->flags & FLAG_CAN_MASK) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
650 context->flags |= FLAG_MASKED;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
651 context->flags &= ~FLAG_CAN_MASK;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
652 }
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
653
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
654 context->sprite_x_offset++;
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
655 if (context->sprite_x_offset == d->width) {
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
656 d->x_pos = 0;
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
657 context->sprite_x_offset = 0;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
658 context->cur_slot--;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
659 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
660 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
661
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
662 static void fetch_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
663 {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
664 if (context->sprite_index >= context->sprite_draws) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
665 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
666 uint32_t address = mode4_address_map[d->address & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
667 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
668 context->fetch_tmp[1] = context->vdpmem[address + 1];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
669 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
670 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
671
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
672 static void render_sprite_cells_mode4(vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
673 {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
674 if (context->sprite_index >= context->sprite_draws) {
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
675 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
676 if (context->type == VDP_SMS && context->sprite_index < 4) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
677 zoom = 0;
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
678 }
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
679 sprite_draw * d = context->sprite_draw_list + context->sprite_index;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
680 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
681 pixels |= planar_to_chunky[context->fetch_tmp[1]];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
682 uint32_t address = mode4_address_map[(d->address + 2) & 0x3FFF];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
683 pixels |= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
684 pixels |= planar_to_chunky[context->vdpmem[address + 1]] << 2;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
685 int x = d->x_pos & 0xFF;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
686 for (int i = 28; i >= 0; i -= 4, x++)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
687 {
2503
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
688 uint8_t pixel = pixels >> i & 0xF;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
689 if (pixel) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
690 if (!context->linebuf[x]) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
691 context->linebuf[x] = pixel;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
692 } else if(
1155
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
693 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
694 || ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
695 ) {
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
696 context->flags2 |= FLAG2_SPRITE_COLLIDE;
da6a1f156f24 Fix Mode 4 sprite collision flag
Michael Pavone <pavone@retrodev.com>
parents: 1154
diff changeset
697 }
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
698 }
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
699 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
700 x++;
2503
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
701 if (pixel) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
702 if (!context->linebuf[x]) {
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
703 context->linebuf[x] = pixel;
fa49e06d8c92 Fix silly bug in Mode 4 sprite rendering (Thanks Sik!)
Michael Pavone <pavone@retrodev.com>
parents: 2494
diff changeset
704 } else if(
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
705 ((context->regs[REG_MODE_1] & BIT_SPRITE_8PX) && x > 8)
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
706 || ((!(context->regs[REG_MODE_1] & BIT_SPRITE_8PX)) && x < 256)
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
707 ) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
708 context->flags2 |= FLAG2_SPRITE_COLLIDE;
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
709 }
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
710 }
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
711 }
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
712 }
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
713 context->sprite_index--;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
714 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
715 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
716
322
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 318
diff changeset
717 void vdp_print_sprite_table(vdp_context * context)
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 318
diff changeset
718 {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
719 if (context->type == VDP_GENESIS && context->regs[REG_MODE_2] & BIT_MODE_5) {
1320
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
720 uint16_t sat_address = mode5_sat_address(context);
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
721 uint16_t current_index = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
722 uint8_t count = 0;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
723 do {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
724 uint16_t address = current_index * 8 + sat_address;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
725 uint16_t cache_address = current_index * 4;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
726 uint8_t height = ((context->sat_cache[cache_address+2] & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
727 uint8_t width = (((context->sat_cache[cache_address+2] >> 2) & 0x3) + 1) * 8;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
728 int16_t y = ((context->sat_cache[cache_address] & 0x3) << 8 | context->sat_cache[cache_address+1]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
729 int16_t x = ((context->vdpmem[address+ 6] & 0x3) << 8 | context->vdpmem[address + 7]) & 0x1FF;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
730 uint16_t link = context->sat_cache[cache_address+3] & 0x7F;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
731 uint8_t pal = context->vdpmem[address + 4] >> 5 & 0x3;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
732 uint8_t pri = context->vdpmem[address + 4] >> 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
733 uint16_t pattern = ((context->vdpmem[address + 4] << 8 | context->vdpmem[address + 5]) & 0x7FF) << 5;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
734 printf("Sprite %d: X=%d(%d), Y=%d(%d), Width=%u, Height=%u, Link=%u, Pal=%u, Pri=%u, Pat=%X\n", current_index, x, x-128, y, y-128, width, height, link, pal, pri, pattern);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
735 current_index = link;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
736 count++;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
737 } while (current_index != 0 && count < 80);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
738 } else if (context->type != VDP_TMS9918A && context->regs[REG_MODE_1] & BIT_MODE_4) {
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
739 uint16_t sat_address = (context->regs[REG_SAT] & 0x7E) << 7;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
740 for (int i = 0; i < 64; i++)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
741 {
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
742 uint8_t y = context->vdpmem[mode4_address_map[sat_address + (i ^ 1)]];
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
743 if (y == 0xD0) {
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
744 break;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
745 }
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
746 uint8_t x = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2 + 1]];
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
747 uint16_t tile_address = context->vdpmem[mode4_address_map[sat_address + 0x80 + i*2]] * 32
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
748 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
749 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
750 tile_address &= ~32;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
751 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
752 printf("Sprite %d: X=%d, Y=%d, Pat=%X\n", i, x, y, tile_address);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
753 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
754 } else if (context->type != VDP_GENESIS) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
755 uint16_t sat_address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
756 for (int i = 0; i < 32; i++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
757 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
758 uint16_t address = i << 2 | sat_address;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
759 int16_t y = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
760 if (y == 208) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
761 break;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
762 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
763 if (y > 192) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
764 y -= 256;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
765 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
766 int16_t x = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
767 uint8_t name = context->vdpmem[mode4_address_map[address++] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
768 uint8_t tag = context->vdpmem[mode4_address_map[address] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
769 if (tag & 0x80) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
770 x -= 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
771 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
772 tag &= 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
773 printf("Sprite %d: X=%d, Y=%d, Pat=%X, Color=%X\n", i, x, y, name, tag);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
774 }
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
775 }
322
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 318
diff changeset
776 }
8e2fa485c0f2 Remove z80_ram reference in SDL renderer to get stateview compiling again. Print out the sprite list in stateview.
Mike Pavone <pavone@retrodev.com>
parents: 318
diff changeset
777
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
778 #define VRAM_READ 0 //0000
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
779 #define VRAM_WRITE 1 //0001
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
780 //2 would trigger register write 0010
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
781 #define CRAM_WRITE 3 //0011
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
782 #define VSRAM_READ 4 //0100
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
783 #define VSRAM_WRITE 5//0101
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
784 //6 would trigger regsiter write 0110
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
785 //7 is a mystery //0111
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
786 #define CRAM_READ 8 //1000
2334
57ebbc1ade30 Fix regression in mega-color image demos
Michael Pavone <pavone@retrodev.com>
parents: 2283
diff changeset
787 //writes go nowhere, acts 8-bit wide like VRAM //1001
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
788 //A would trigger register write 1010
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
789 //B is a mystery 1011
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
790 #define VRAM_READ8 0xC //1100
2334
57ebbc1ade30 Fix regression in mega-color image demos
Michael Pavone <pavone@retrodev.com>
parents: 2283
diff changeset
791 //writes go nowhere, acts 16-bit wide like VSRAM/CRAM 1101
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
792 //E would trigger register write 1110
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
793 //F is a mystery 1111
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
794
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
795 //Possible theory on how bits work
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
796 //CD0 = Read/Write flag
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
797 //CD2,(CD1|CD3) = RAM type
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
798 // 00 = VRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
799 // 01 = CRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
800 // 10 = VSRAM
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
801 // 11 = VRAM8
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
802 //Would result in
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
803 // 7 = VRAM8 write
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
804 // 9 = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
805 // B = CRAM write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
806 // D = VRAM8 write alias
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
807 // F = VRAM8 write alais
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
808
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
809 #define DMA_START 0x20
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
810
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
811 static const char * cd_name(uint8_t cd)
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
812 {
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
813 switch (cd & 0xF)
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
814 {
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
815 case VRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
816 return "VRAM read";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
817 case VRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
818 return "VRAM write";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
819 case CRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
820 return "CRAM write";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
821 case VSRAM_READ:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
822 return "VSRAM read";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
823 case VSRAM_WRITE:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
824 return "VSRAM write";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
825 case VRAM_READ8:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
826 return "VRAM read (undocumented 8-bit mode)";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
827 default:
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
828 return "invalid";
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
829 }
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
830 }
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
831
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
832 void vdp_print_reg_explain(vdp_context * context)
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
833 {
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
834 char * hscroll[] = {"full", "7-line", "cell", "line"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
835 printf("**Mode Group**\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
836 "00: %.2X | H-ints %s, Pal Select %d, HVC latch %s, Display gen %s\n"
1331
9bba5ff5beb8 Add 128K VRAM bit to VDP register print in debugger
Michael Pavone <pavone@retrodev.com>
parents: 1325
diff changeset
837 "01: %.2X | Display %s, V-ints %s, Height: %d, Mode %d, %dK VRAM\n"
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
838 "0B: %.2X | E-ints %s, V-Scroll: %s, H-Scroll: %s\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
839 "0C: %.2X | Width: %d, Shadow/Highlight: %s\n",
757
483f7e7926a6 More clang warning cleanup
Michael Pavone <pavone@retrodev.com>
parents: 748
diff changeset
840 context->regs[REG_MODE_1], context->regs[REG_MODE_1] & BIT_HINT_EN ? "enabled" : "disabled", (context->regs[REG_MODE_1] & BIT_PAL_SEL) != 0,
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
841 context->regs[REG_MODE_1] & BIT_HVC_LATCH ? "enabled" : "disabled", context->regs[REG_MODE_1] & BIT_DISP_DIS ? "disabled" : "enabled",
450
3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents: 438
diff changeset
842 context->regs[REG_MODE_2], context->regs[REG_MODE_2] & BIT_DISP_EN ? "enabled" : "disabled", context->regs[REG_MODE_2] & BIT_VINT_EN ? "enabled" : "disabled",
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
843 context->regs[REG_MODE_2] & BIT_PAL ? 30 : 28, context->regs[REG_MODE_2] & BIT_MODE_5 ? 5 : 4, context->regs[REG_MODE_1] & BIT_128K_VRAM ? 128 : 64,
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
844 context->regs[REG_MODE_3], context->regs[REG_MODE_3] & BIT_EINT_EN ? "enabled" : "disabled", context->regs[REG_MODE_3] & BIT_VSCROLL ? "2 cell" : "full",
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
845 hscroll[context->regs[REG_MODE_3] & 0x3],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
846 context->regs[REG_MODE_4], context->regs[REG_MODE_4] & BIT_H40 ? 40 : 32, context->regs[REG_MODE_4] & BIT_HILIGHT ? "enabled" : "disabled");
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
847 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
848 printf("\n**Table Group**\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
849 "02: %.2X | Scroll A Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
850 "03: %.2X | Window Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
851 "04: %.2X | Scroll B Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
852 "05: %.2X | Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
853 "0D: %.2X | HScroll Data Table: $%.4X\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
854 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0x38) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
855 context->regs[REG_WINDOW], (context->regs[REG_WINDOW] & (context->regs[REG_MODE_4] & BIT_H40 ? 0x3C : 0x3E)) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
856 context->regs[REG_SCROLL_B], (context->regs[REG_SCROLL_B] & 0x7) << 13,
1320
df3d690cb2c3 SAT table register bit 0 is not used in H40 mode. Fixes corrupt sprites in ship crash landing scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1319
diff changeset
857 context->regs[REG_SAT], mode5_sat_address(context),
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
858 context->regs[REG_HSCROLL], (context->regs[REG_HSCROLL] & 0x3F) << 10);
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
859 } else {
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
860 printf("\n**Table Group**\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
861 "02: %.2X | Background Name Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
862 "05: %.2X | Sprite Attribute Table: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
863 "06: %.2X | Sprite Tile Base: $%.4X\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
864 "08: %.2X | Background X Scroll: %d\n"
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
865 "09: %.2X | Background Y Scroll: %d\n",
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
866 context->regs[REG_SCROLL_A], (context->regs[REG_SCROLL_A] & 0xE) << 10,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
867 context->regs[REG_SAT], (context->regs[REG_SAT] & 0x7E) << 7,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
868 context->regs[REG_STILE_BASE], (context->regs[REG_STILE_BASE] & 2) << 11,
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
869 context->regs[REG_X_SCROLL], context->regs[REG_X_SCROLL],
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
870 context->regs[REG_Y_SCROLL], context->regs[REG_Y_SCROLL]);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
871
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
872 }
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
873 char * sizes[] = {"32", "64", "invalid", "128"};
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
874 printf("\n**Misc Group**\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
875 "07: %.2X | Backdrop Color: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
876 "0A: %.2X | H-Int Counter: %u\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
877 "0F: %.2X | Auto-increment: $%X\n"
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
878 "10: %.2X | Scroll A/B Size: %sx%s\n",
505
b7b7a1cab44a The local clone on my laptop got messed up and some changes had not been pushed. This commit represents the status of the working copy from that clone. It unfortunately contains some changes that I did not intend to commit yet, but this seems like the best option at the moment.
Michael Pavone <pavone@retrodev.com>
parents: 503
diff changeset
879 context->regs[REG_BG_COLOR], context->regs[REG_BG_COLOR],
450
3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents: 438
diff changeset
880 context->regs[REG_HINT], context->regs[REG_HINT],
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
881 context->regs[REG_AUTOINC], context->regs[REG_AUTOINC],
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
882 context->regs[REG_SCROLL], sizes[context->regs[REG_SCROLL] & 0x3], sizes[context->regs[REG_SCROLL] >> 4 & 0x3]);
621
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
883 char * src_types[] = {"68K", "68K", "Copy", "Fill"};
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
884 printf("\n**DMA Group**\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
885 "13: %.2X |\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
886 "14: %.2X | DMA Length: $%.4X words\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
887 "15: %.2X |\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
888 "16: %.2X |\n"
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
889 "17: %.2X | DMA Source Address: $%.6X, Type: %s\n",
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
890 context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
891 context->regs[REG_DMALEN_H], context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
892 context->regs[REG_DMASRC_L],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
893 context->regs[REG_DMASRC_M],
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
894 context->regs[REG_DMASRC_H],
629
9089951a1994 Small fix to display of DMA source address in vr debug command
Michael Pavone <pavone@retrodev.com>
parents: 624
diff changeset
895 context->regs[REG_DMASRC_H] << 17 | context->regs[REG_DMASRC_M] << 9 | context->regs[REG_DMASRC_L] << 1,
621
5196333b37a6 Fix a few values reported by the vr debugger command. Add DMA registers to vr debugger command. Fix horizontal interrupt bug. Slightly more accurate (but still broken) handling of switches between H32 and H40 modes.
Michael Pavone <pavone@retrodev.com>
parents: 515
diff changeset
896 src_types[context->regs[REG_DMASRC_H] >> 6 & 3]);
1628
3c1661305219 Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents: 1454
diff changeset
897 uint8_t old_flags = context->flags;
3c1661305219 Avoid changing VDP status flags when executing debugger commands
Michael Pavone <pavone@retrodev.com>
parents: 1454
diff changeset
898 uint8_t old_flags2 = context->flags2;
438
b3cee2fe690b Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
899 printf("\n**Internal Group**\n"
b3cee2fe690b Add address/cd registers to VDP debug message
Mike Pavone <pavone@retrodev.com>
parents: 437
diff changeset
900 "Address: %X\n"
705
ce4046476abc Add description of cd register value to vr debugger command
Michael Pavone <pavone@retrodev.com>
parents: 699
diff changeset
901 "CD: %X - %s\n"
647
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents: 629
diff changeset
902 "Pending: %s\n"
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents: 629
diff changeset
903 "VCounter: %d\n"
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
904 "HCounter: %d\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
905 "VINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
906 "HINT Pending: %s\n"
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
907 "Status: %X\n",
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
908 context->address, context->cd, cd_name(context->cd),
1150
322d28e6f13c Display both byte and word pending values to better reflect VDP pending state in PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1149
diff changeset
909 (context->flags & FLAG_PENDING) ? "word" : (context->flags2 & FLAG2_BYTE_PENDING) ? "byte" : "none",
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
910 context->vcounter, context->hslot*2, (context->flags2 & FLAG2_VINT_PENDING) ? "true" : "false",
2358
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
911 (context->flags2 & FLAG2_HINT_PENDING) ? "true" : "false", vdp_status(context));
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
912 printf("\nDebug Register: %X | Output disabled: %s, Force Layer: %d\n", context->test_regs[0],
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
913 (context->test_regs[0] & TEST_BIT_DISABLE) ? "true" : "false", context->test_regs[0] >> 7 & 3
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
914 );
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
915 }
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
916
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
917 static uint8_t is_active(vdp_context *context)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
918 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
919 return context->state != INACTIVE && (context->regs[REG_MODE_2] & BIT_DISP_EN) != 0;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
920 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
921
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
922 static void scan_sprite_table(uint32_t line, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
923 {
2575
dddd16a6c69b Fix "sticky" sprite overflow regression from previous sprite overflow flag fix
Michael Pavone <pavone@retrodev.com>
parents: 2574
diff changeset
924 if (context->sprite_index &&
dddd16a6c69b Fix "sticky" sprite overflow regression from previous sprite overflow flag fix
Michael Pavone <pavone@retrodev.com>
parents: 2574
diff changeset
925 (((uint8_t)context->slot_counter) < context->max_sprites_line || !(context->flags & FLAG_SPRITE_OFLOW))
dddd16a6c69b Fix "sticky" sprite overflow regression from previous sprite overflow flag fix
Michael Pavone <pavone@retrodev.com>
parents: 2574
diff changeset
926 ) {
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
927 line += 1;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
928 uint16_t ymask, ymin;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
929 uint8_t height_mult;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
930 if (context->double_res) {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
931 line *= 2;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
932 if (context->flags2 & FLAG2_EVEN_FIELD) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
933 line++;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
934 }
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
935 ymask = 0x3FF;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
936 ymin = 256;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
937 height_mult = 16;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
938 } else {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
939 ymask = 0x1FF;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
940 ymin = 128;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
941 height_mult = 8;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
942 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
943 context->sprite_index &= 0x7F;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
944 //TODO: Implement squirelly behavior documented by Kabuto
2230
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
945 if (context->sprite_index >= MAX_SPRITES_FRAME) {
38
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents: 37
diff changeset
946 context->sprite_index = 0;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents: 37
diff changeset
947 return;
898e3d035f42 Implement sprite index >= sprite limit triggers sprite limit behavior
Mike Pavone <pavone@retrodev.com>
parents: 37
diff changeset
948 }
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
949 uint16_t address = context->sprite_index * 4;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
950 line += ymin;
1346
f7ca42e020fd Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1344
diff changeset
951 line &= ymask;
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
952 uint16_t y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
953 uint8_t height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
21
72ce60cb1711 Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
954 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height);
72ce60cb1711 Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
955 if (y <= line && line < (y + height)) {
2574
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
956 if (((uint8_t)context->slot_counter) == context->max_sprites_line) {
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
957 context->flags |= FLAG_SPRITE_OFLOW;
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
958 return;
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
959 }
27
aa1c47fab3f1 Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents: 26
diff changeset
960 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
961 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358
3716b90d3470 Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1357
diff changeset
962 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
963 }
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
964 context->sprite_index = context->sat_cache[address+3] & 0x7F;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
965 if (context->sprite_index && ((uint8_t)context->slot_counter) < context->max_sprites_line)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
966 {
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
967 //TODO: Implement squirelly behavior documented by Kabuto
2230
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
968 if (context->sprite_index >= MAX_SPRITES_FRAME) {
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
969 context->sprite_index = 0;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
970 return;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
971 }
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
972 address = context->sprite_index * 4;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
973 y = ((context->sat_cache[address] & 0x3) << 8 | context->sat_cache[address+1]) & ymask;
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
974 height = ((context->sat_cache[address+2] & 0x3) + 1) * height_mult;
323
8c01b4154480 Properly mask sprite X and Y coordinates
Mike Pavone <pavone@retrodev.com>
parents: 322
diff changeset
975 //printf("Sprite %d | y: %d, height: %d\n", context->sprite_index, y, height);
21
72ce60cb1711 Sprites somewhat less broken
Mike Pavone <pavone@retrodev.com>
parents: 20
diff changeset
976 if (y <= line && line < (y + height)) {
2574
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
977 if (((uint8_t)context->slot_counter) == context->max_sprites_line) {
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
978 context->flags |= FLAG_SPRITE_OFLOW;
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
979 return;
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
980 }
27
aa1c47fab3f1 Fix sprite transparency for overlapping sprites
Mike Pavone <pavone@retrodev.com>
parents: 26
diff changeset
981 //printf("Sprite %d at y: %d with height %d is on line %d\n", context->sprite_index, y, height, line);
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
982 context->sprite_info_list[context->slot_counter].size = context->sat_cache[address+2];
1358
3716b90d3470 Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1357
diff changeset
983 context->sprite_info_list[context->slot_counter++].index = context->sprite_index;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
984 }
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
985 context->sprite_index = context->sat_cache[address+3] & 0x7F;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
986 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
987 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
988 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
989
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
990 static void scan_sprite_table_mode4(vdp_context * context)
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
991 {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
992 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
993 int16_t line = context->vcounter;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
994 line &= 0xFF;
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
995 if (line > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
996 line -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
997 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
998
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
999 uint32_t sat_address = mode4_address_map[(context->regs[REG_SAT] << 7 & 0x3F00) + context->sprite_index];
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1000 int16_t y = context->vdpmem[sat_address+1];
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1001 uint32_t size = (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) ? 16 : 8;
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1002 int16_t ysize = size;
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1003 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1004 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1005 ysize *= 2;
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1006 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1007
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
1008 if (y == 0xd0) {
1122
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1009 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1010 return;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1011 } else {
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1012 if (y > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1013 y -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1014 }
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1015 if (y <= line && line < (y + ysize)) {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1016 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1017 context->sprite_index = MAX_SPRITES_FRAME_H32;
2574
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
1018 context->flags |= FLAG_SPRITE_OFLOW;
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1019 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1020 }
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1021 context->sprite_info_list[--(context->slot_counter)].size = size;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1022 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358
3716b90d3470 Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1357
diff changeset
1023 context->sprite_info_list[context->slot_counter].y = y;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1024 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1025 context->sprite_index++;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1026 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1027
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1028 if (context->sprite_index < MAX_SPRITES_FRAME_H32) {
1138
25268334a24c Fix Mode 4 sprite table Y scan to account for VRAM byte swapping
Michael Pavone <pavone@retrodev.com>
parents: 1137
diff changeset
1029 y = context->vdpmem[sat_address];
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
1030 if (y == 0xd0) {
1122
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1031 context->sprite_index = MAX_SPRITES_FRAME_H32;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1032 return;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1033 } else {
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1034 if (y > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1035 y -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1036 }
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1037 if (y <= line && line < (y + ysize)) {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1038 if (!context->slot_counter) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1039 context->sprite_index = MAX_SPRITES_FRAME_H32;
2574
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
1040 context->flags |= FLAG_SPRITE_OFLOW;
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1041 return;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1042 }
1122
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1043 context->sprite_info_list[--(context->slot_counter)].size = size;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1044 context->sprite_info_list[context->slot_counter].index = context->sprite_index;
1358
3716b90d3470 Fix regression in Mode 4 sprite rendering
Michael Pavone <pavone@retrodev.com>
parents: 1357
diff changeset
1045 context->sprite_info_list[context->slot_counter].y = y;
1122
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1046 }
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1047 context->sprite_index++;
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1048 }
d4bef26d0977 Implemented Mode 4 sprite list termination
Michael Pavone <pavone@retrodev.com>
parents: 1121
diff changeset
1049 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1050
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1051 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1052 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1053
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1054 static void read_sprite_x(uint32_t line, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1055 {
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1056 if (context->cur_slot == context->max_sprites_line) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1057 context->cur_slot = 0;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1058 }
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1059 if (context->cur_slot < context->slot_counter) {
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1060 if (context->sprite_draws) {
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1061 line += 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1062 //in tiles
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1063 uint8_t width = ((context->sprite_info_list[context->cur_slot].size >> 2) & 0x3) + 1;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1064 //in pixels
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1065 uint8_t height = ((context->sprite_info_list[context->cur_slot].size & 0x3) + 1) * 8;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1066 if (context->double_res) {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1067 line *= 2;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
1068 if (context->flags2 & FLAG2_EVEN_FIELD) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1069 line++;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1070 }
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1071 height *= 2;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1072 }
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1073 uint16_t ymask, ymin;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1074 if (context->double_res) {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1075 ymask = 0x3FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1076 ymin = 256;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1077 } else {
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1078 ymask = 0x1FF;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1079 ymin = 128;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1080 }
2230
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
1081 uint8_t index = context->sprite_info_list[context->cur_slot].index;
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
1082 if (!(context->regs[REG_MODE_4] & BIT_H40)) {
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
1083 index &= MAX_SPRITES_FRAME_H32 - 1;
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
1084 }
3888c7ed4e36 Fix handling of sprite indices >= 64 in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 2227
diff changeset
1085 uint16_t att_addr = mode5_sat_address(context) + index * 8 + 4;
450
3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents: 438
diff changeset
1086 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1];
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1087 uint8_t pal_priority = (tileinfo >> 9) & 0x70;
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1088 uint8_t row;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1089 uint16_t cache_addr = context->sprite_info_list[context->cur_slot].index * 4;
1346
f7ca42e020fd Fix sprite rendering in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1344
diff changeset
1090 line = (line + ymin) & ymask;
1338
3706b683cd48 Fix sprite rendering for negative line. Fixes remaining visual glitch in the Titancade scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1337
diff changeset
1091 int16_t y = ((context->sat_cache[cache_addr] << 8 | context->sat_cache[cache_addr+1]) & ymask)/* - ymin*/;
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1092 if (tileinfo & MAP_BIT_V_FLIP) {
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1093 row = (y + height - 1) - line;
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1094 } else {
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1095 row = line-y;
34
0e7df84158b1 Improve sprite masking to almost completely pass Nemesis' sprite masking test
Mike Pavone <pavone@retrodev.com>
parents: 32
diff changeset
1096 }
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1097 row &= ymask >> 4;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1098 uint16_t address;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1099 if (context->double_res) {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1100 address = ((tileinfo & 0x3FF) << 6) + row * 4;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1101 } else {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1102 address = ((tileinfo & 0x7FF) << 5) + row * 4;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1103 }
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
1104 context->sprite_draws--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
1105 context->sprite_draw_list[context->sprite_draws].x_pos = ((context->vdpmem[att_addr+ 2] & 0x3) << 8 | context->vdpmem[att_addr + 3]) & 0x1FF;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
1106 context->sprite_draw_list[context->sprite_draws].address = address;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
1107 context->sprite_draw_list[context->sprite_draws].pal_priority = pal_priority;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
1108 context->sprite_draw_list[context->sprite_draws].h_flip = (tileinfo & MAP_BIT_H_FLIP) ? 1 : 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
1109 context->sprite_draw_list[context->sprite_draws].width = width;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
1110 context->sprite_draw_list[context->sprite_draws].height = height;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1111 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1112 }
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
1113 context->cur_slot++;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1114 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1115
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1116 static void read_sprite_x_mode4(vdp_context * context)
427
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
1117 {
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1118 if (context->cur_slot >= context->slot_counter) {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1119 uint32_t address = (context->regs[REG_SAT] << 7 & 0x3F00) + 0x80 + context->sprite_info_list[context->cur_slot].index * 2;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1120 address = mode4_address_map[address];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1121 --context->sprite_draws;
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1122 uint8_t zoom = context->type != VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_SPRITE_ZM);
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1123 uint32_t tile_address = context->vdpmem[address] * 32 + (context->regs[REG_STILE_BASE] << 11 & 0x2000);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1124 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1125 tile_address &= ~32;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1126 }
2511
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1127 int16_t line = context->vcounter & 0xFF;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1128 if (context->vcounter > context->inactive_start) {
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1129 line -= 0x100;
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1130 }
e51b1fc0e37f Fix rendering of sprites that are partially off the top of the screen in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2510
diff changeset
1131 uint16_t y_diff = line - context->sprite_info_list[context->cur_slot].y;
2204
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1132 if (zoom) {
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1133 y_diff >>= 1;
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1134 }
dc4268a778bc Implement Mode 4 sprite zooming
Michael Pavone <pavone@retrodev.com>
parents: 2201
diff changeset
1135 tile_address += y_diff * 4;
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1136 context->sprite_draw_list[context->sprite_draws].x_pos = context->vdpmem[address + 1];
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1137 context->sprite_draw_list[context->sprite_draws].address = tile_address;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
1138 context->cur_slot--;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1139 }
427
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
1140 }
2802318c14e1 Refactor duplicated CRAM writing code and fix a bug in the process
Mike Pavone <pavone@retrodev.com>
parents: 426
diff changeset
1141
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1142 static void vdp_advance_dma(vdp_context * context)
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1143 {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1144 context->regs[REG_DMASRC_L] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1145 if (!context->regs[REG_DMASRC_L]) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1146 context->regs[REG_DMASRC_M] += 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1147 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1148 context->address += context->regs[REG_AUTOINC];
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1149 uint16_t dma_len = ((context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L]) - 1;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1150 context->regs[REG_DMALEN_H] = dma_len >> 8;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1151 context->regs[REG_DMALEN_L] = dma_len;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1152 if (!dma_len) {
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1153 context->flags &= ~FLAG_DMA_RUN;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1154 context->cd &= 0xF;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1155 }
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1156 }
1019
e34334e6c682 Fix GST savestate loading to deal with SAT cache to fix sprite corruption on savestate load. Clear out Z80 native_pc so the Z80 state does not get hosed when loading a savestate while the emulator is already running
Michael Pavone <pavone@retrodev.com>
parents: 1001
diff changeset
1157
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1158 #define DMA_FILL 0x80
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1159 #define DMA_COPY 0xC0
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1160 #define DMA_TYPE_MASK 0xC0
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1161 static void external_slot(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1162 {
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1163 if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL && context->fifo_read < 0) {
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1164 context->fifo_read = (context->fifo_write-1) & (FIFO_SIZE-1);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1165 fifo_entry * cur = context->fifo + context->fifo_read;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1166 cur->cycle = context->cycles;
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1167 cur->address = context->address;
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1168 cur->partial = 1;
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1169 vdp_advance_dma(context);
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1170 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1171 fifo_entry * start = context->fifo + context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1172 if (context->fifo_read >= 0 && start->cycle <= context->cycles) {
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1173 switch (start->cd & 0xF)
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1174 {
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1175 case VRAM_WRITE:
1319
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1176 if ((context->regs[REG_MODE_2] & (BIT_128K_VRAM|BIT_MODE_5)) == (BIT_128K_VRAM|BIT_MODE_5)) {
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1177 event_vram_word(context->cycles, start->address, start->value);
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1178 vdp_check_update_sat(context, start->address, start->value);
1319
b6796d63977f Fix some edge cases with regards to 128KB VRAM mode and the SAT cache
Michael Pavone <pavone@retrodev.com>
parents: 1318
diff changeset
1179 write_vram_word(context, start->address, start->value);
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1180 } else {
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1181 uint8_t byte = start->partial == 1 ? start->value >> 8 : start->value;
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1182 uint32_t address = start->address ^ 1;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1183 event_vram_byte(context->cycles, start->address, byte, context->regs[REG_AUTOINC]);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1184 vdp_check_update_sat_byte(context, address, byte);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1185 write_vram_byte(context, address, byte);
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1186 if (!start->partial) {
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1187 start->address = address;
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1188 start->partial = 1;
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1189 //skip auto-increment and removal of entry from fifo
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1190 return;
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1191 }
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1192 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1193 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1194 case CRAM_WRITE: {
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1195 //printf("CRAM Write | %X to %X\n", start->value, (start->address/2) & (CRAM_SIZE-1));
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1196 uint16_t val;
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1197 if (start->partial == 3) {
2194
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1198 if (context->type == VDP_GAMEGEAR) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1199 if (start->address & 1) {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1200 val = start->value << 8 | context->cram_latch;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1201 } else {
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1202 context->cram_latch = start->value;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1203 break;
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1204 }
01ff005b08f6 Very rudimentary support for Game Gear VDP emulation
Michael Pavone <pavone@retrodev.com>
parents: 2118
diff changeset
1205 } else if ((start->address & 1) && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1206 val = (context->cram[start->address >> 1 & (CRAM_SIZE-1)] & 0xFF) | start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1207 } else {
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1208 uint16_t address = (context->regs[REG_MODE_2] & BIT_MODE_5) ? start->address >> 1 & (CRAM_SIZE-1) : start->address & 0x1F;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1209 val = (context->cram[address] & 0xFF00) | start->value;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1210 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1211 } else {
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1212 val = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1213 }
1956
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
1214 uint8_t buffer[3] = {start->address & 127, val >> 8, val};
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
1215 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
1216 write_cram(context, start->address, val);
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1217 break;
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1218 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1219 case VSRAM_WRITE:
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
1220 if (((start->address/2) & 63) < context->vsram_size) {
1432
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
1221 //printf("VSRAM Write: %X to %X @ frame: %d, vcounter: %d, hslot: %d, cycle: %d\n", start->value, start->address, context->frame, context->vcounter, context->hslot, context->cycles);
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
1222 if (start->partial == 3) {
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1223 if (start->address & 1) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1224 context->vsram[(start->address/2) & 63] &= 0xFF;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1225 context->vsram[(start->address/2) & 63] |= start->value << 8;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1226 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1227 context->vsram[(start->address/2) & 63] &= 0xFF00;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1228 context->vsram[(start->address/2) & 63] |= start->value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1229 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1230 } else {
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1231 context->vsram[(start->address/2) & 63] = start->partial ? context->fifo[context->fifo_write].value : start->value;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
1232 }
1956
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
1233 uint8_t buffer[3] = {((start->address/2) & 63) + 128, context->vsram[(start->address/2) & 63] >> 8, context->vsram[(start->address/2) & 63]};
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
1234 event_log(EVENT_VDP_INTRAM, context->cycles, sizeof(buffer), buffer);
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1235 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1236
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1237 break;
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1238 default:
2334
57ebbc1ade30 Fix regression in mega-color image demos
Michael Pavone <pavone@retrodev.com>
parents: 2283
diff changeset
1239 if (!(context->cd & 6) && !start->partial && (context->regs[REG_MODE_2] & (BIT_128K_VRAM|BIT_MODE_5)) != (BIT_128K_VRAM|BIT_MODE_5)) {
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1240 start->partial = 1;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1241 return;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1242 }
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1243 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1244 context->fifo_read = (context->fifo_read+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1245 if (context->fifo_read == context->fifo_write) {
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1246 if ((context->cd & 0x20) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
983
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
1247 context->flags |= FLAG_DMA_RUN;
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
1248 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
1249 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
1250 }
983
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
1251 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1252 context->fifo_read = -1;
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1253 }
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
1254 } else if ((context->flags & FLAG_DMA_RUN) && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY) {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1255 if (context->flags & FLAG_READ_FETCHED) {
998
bf63cbf1d7bb Implement SAT cache. Causes some graphical corruption in Overdrive due to an unrelated bug.
Michael Pavone <pavone@retrodev.com>
parents: 995
diff changeset
1256 write_vram_byte(context, context->address ^ 1, context->prefetch);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1257
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1258 //Update DMA state
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1259 vdp_advance_dma(context);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1260
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1261 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1262 } else {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1263 context->prefetch = context->vdpmem[(context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L] ^ 1];
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1264
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1265 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1266 }
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
1267 } else if (!(context->cd & 1) && !(context->flags & (FLAG_READ_FETCHED|FLAG_PENDING)) && context->read_latency <= context->cycles) {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1268 switch(context->cd & 0xF)
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1269 {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1270 case VRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1271 if (context->flags2 & FLAG2_READ_PENDING) {
2283
6f6f21d0c396 Fix missing address masks on some VRAM reads
Michael Pavone <pavone@retrodev.com>
parents: 2264
diff changeset
1272 //TODO: 128K VRAM support
6f6f21d0c396 Fix missing address masks on some VRAM reads
Michael Pavone <pavone@retrodev.com>
parents: 2264
diff changeset
1273 context->prefetch |= context->vdpmem[(context->address & 0xFFFE) | 1];
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1274 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1275 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1276 //Should this happen after the prefetch or after the read?
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
1277 increment_address(context);
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1278 } else {
2283
6f6f21d0c396 Fix missing address masks on some VRAM reads
Michael Pavone <pavone@retrodev.com>
parents: 2264
diff changeset
1279 //TODO: 128K VRAM support
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1280 context->prefetch = context->vdpmem[context->address & 0xFFFE] << 8;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1281 context->flags2 |= FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1282 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1283 break;
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1284 case VRAM_READ8: {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1285 uint32_t address = context->address ^ 1;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1286 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1287 address = mode4_address_map[address & 0x3FFF];
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1288 }
2283
6f6f21d0c396 Fix missing address masks on some VRAM reads
Michael Pavone <pavone@retrodev.com>
parents: 2264
diff changeset
1289 //TODO: 128K VRAM support
2338
bc17ece8dd00 Fix silly regression in SMS mode
Michael Pavone <pavone@retrodev.com>
parents: 2337
diff changeset
1290 context->prefetch = context->vdpmem[address & 0xFFFF];
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1291 context->prefetch |= context->fifo[context->fifo_write].value & 0xFF00;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1292 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1293 //Should this happen after the prefetch or after the read?
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
1294 increment_address(context);
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1295 break;
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
1296 }
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1297 case CRAM_READ:
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1298 context->prefetch = context->cram[(context->address/2) & (CRAM_SIZE-1)] & CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1299 context->prefetch |= context->fifo[context->fifo_write].value & ~CRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1300 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1301 //Should this happen after the prefetch or after the read?
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
1302 increment_address(context);
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1303 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1304 case VSRAM_READ: {
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1305 uint16_t address = (context->address /2) & 63;
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
1306 if (address >= context->vsram_size) {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1307 address = 0;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1308 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1309 context->prefetch = context->vsram[address] & VSRAM_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1310 context->prefetch |= context->fifo[context->fifo_write].value & VSRAM_DIRTY_BITS;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1311 context->flags |= FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1312 //Should this happen after the prefetch or after the read?
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
1313 increment_address(context);
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1314 break;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1315 }
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
1316 }
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1317 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1318 }
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1319
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1320 static void run_dma_src(vdp_context * context, int32_t slot)
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1321 {
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
1322 //TODO: Figure out what happens if CD bit 4 is not set in DMA copy mode
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
1323 //TODO: Figure out what happens when CD:0-3 is not set to a write mode in DMA operations
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
1324 if (context->fifo_write == context->fifo_read) {
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1325 return;
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1326 }
478
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1327 fifo_entry * cur = NULL;
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1328 if (!(context->regs[REG_DMASRC_H] & 0x80))
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
1329 {
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1330 //68K -> VDP
924
1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents: 923
diff changeset
1331 if (slot == -1 || !is_refresh(context, slot-1)) {
478
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1332 cur = context->fifo + context->fifo_write;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
1333 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
478
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1334 cur->address = context->address;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1335 cur->value = read_dma_value((context->regs[REG_DMASRC_H] << 16) | (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]);
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1336 cur->cd = context->cd;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1337 cur->partial = 0;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1338 if (context->fifo_read < 0) {
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1339 context->fifo_read = context->fifo_write;
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1340 }
2e4a4188cfb0 Fix DMA fill so that it does not cause observable changes to the FIFO. Get DMA copy mostly correct from an observable ffect perspective. DMA copy probably does not reflect internal implementation still given that evidence seems to suggest no FIFO usage at all.
Mike Pavone <pavone@retrodev.com>
parents: 477
diff changeset
1341 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
984
bd4d698d995b FIFO should show as empty during a DMA fill after the initial write is done. BlastEm now gets a perfect score in VDP FIFO Testing
Michael Pavone <pavone@retrodev.com>
parents: 983
diff changeset
1342 vdp_advance_dma(context);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
1343 }
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
1344 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1345 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1346
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1347 #define WINDOW_RIGHT 0x80
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1348 #define WINDOW_DOWN 0x80
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1349
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1350 static void read_map_scroll(uint16_t column, uint16_t vsram_off, uint32_t line, uint16_t address, uint16_t hscroll_val, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1351 {
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1352 uint16_t window_line_shift, v_offset_mask, vscroll_shift;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1353 if (context->double_res) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1354 line *= 2;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
1355 if (context->flags2 & FLAG2_EVEN_FIELD) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1356 line++;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1357 }
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1358 window_line_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1359 v_offset_mask = 0xF;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1360 vscroll_shift = 4;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1361 } else {
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1362 window_line_shift = 3;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1363 v_offset_mask = 0x7;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1364 vscroll_shift = 3;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1365 }
2337
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1366 //TODO: Further research on vscroll latch behavior
1422
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
1367 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
1368 if (!column) {
1344
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1369 if (context->regs[REG_MODE_4] & BIT_H40) {
2337
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1370 //Pre MD2VA4, behavior seems to vary from console to console
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1371 //On some consoles it's a stable AND, on some it's always zero and others it's an "unstable" AND
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1372 if (context->vsram_size == MIN_VSRAM_SIZE) {
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1373 // For now just implement the AND behavior
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1374 if (!vsram_off) {
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1375 context->vscroll_latch[0] &= context->vscroll_latch[1];
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1376 context->vscroll_latch[1] = context->vscroll_latch[0];
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1377 }
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1378 } else {
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1379 //MD2VA4 and later use the column 0 value
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1380 context->vscroll_latch[vsram_off] = context->vsram[vsram_off];
1344
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1381 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1382 } else {
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1383 //supposedly it's always forced to 0 in the H32 case
2337
0e3118325c1c Fix first column bug behavior
Michael Pavone <pavone@retrodev.com>
parents: 2336
diff changeset
1384 //TODO: repeat H40 tests in H32 mode to confirm
1344
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1385 context->vscroll_latch[0] = context->vscroll_latch[1] = 0;
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1386 }
1422
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
1387 } else if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
1388 context->vscroll_latch[vsram_off] = context->vsram[column - 2 + vsram_off];
1344
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1389 }
6372de4da179 Fix vscroll latching when full screen vscroll is used in combination with the window plane on the left side of the screen
Michael Pavone <pavone@retrodev.com>
parents: 1343
diff changeset
1390 }
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1391 if (!vsram_off) {
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1392 uint16_t left_col, right_col;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1393 if (context->window_h_latch & WINDOW_RIGHT) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1394 left_col = (context->window_h_latch & 0x1F) * 2 + 2;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1395 right_col = 42;
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1396 } else {
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1397 left_col = 0;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1398 right_col = (context->window_h_latch & 0x1F) * 2;
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1399 if (right_col) {
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1400 right_col += 2;
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1401 }
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1402 }
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1403 uint16_t top_line, bottom_line;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1404 if (context->window_v_latch & WINDOW_DOWN) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1405 top_line = (context->window_v_latch & 0x1F) << window_line_shift;
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1406 bottom_line = context->double_res ? 481 : 241;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1407 } else {
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1408 top_line = 0;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
1409 bottom_line = (context->window_v_latch & 0x1F) << window_line_shift;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1410 }
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1411 if ((column >= left_col && column < right_col) || (line >= top_line && line < bottom_line)) {
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1412 uint16_t address = context->regs[REG_WINDOW] << 10;
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1413 uint16_t line_offset, offset, mask;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
1414 if (context->regs[REG_MODE_4] & BIT_H40) {
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1415 address &= 0xF000;
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1416 line_offset = (((line) >> vscroll_shift) * 64 * 2) & 0xFFF;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1417 mask = 0x7F;
450
3758bcdae5de Fix bug that caused a DMA fill to start after another DMA operation completed if the FIFO is not empty
Mike Pavone <pavone@retrodev.com>
parents: 438
diff changeset
1418
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1419 } else {
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1420 address &= 0xF800;
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1421 line_offset = (((line) >> vscroll_shift) * 32 * 2) & 0xFFF;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1422 mask = 0x3F;
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1423 }
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1424 if (context->double_res) {
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1425 mask <<= 1;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1426 mask |= 1;
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1427 }
42
6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents: 41
diff changeset
1428 offset = address + line_offset + (((column - 2) * 2) & mask);
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1429 context->col_1 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1];
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
1430 //printf("Window | top: %d, bot: %d, left: %d, right: %d, base: %X, line: %X offset: %X, tile: %X, reg: %X\n", top_line, bottom_line, left_col, right_col, address, line_offset, offset, ((context->col_1 & 0x3FF) << 5), context->regs[REG_WINDOW]);
42
6653e67a6811 Fix bug in tile address masking. Remove some debug code from window plane.
Mike Pavone <pavone@retrodev.com>
parents: 41
diff changeset
1431 offset = address + line_offset + (((column - 1) * 2) & mask);
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1432 context->col_2 = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1];
417
acdd6c5240fe Fix window layer in double res interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 415
diff changeset
1433 context->v_offset = (line) & v_offset_mask;
41
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1434 context->flags |= FLAG_WINDOW;
e591004487bc More correct window support, maybe
Mike Pavone <pavone@retrodev.com>
parents: 40
diff changeset
1435 return;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1436 } else if (column == right_col) {
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1437 context->flags |= FLAG_WINDOW_EDGE;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1438 context->flags &= ~FLAG_WINDOW;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1439 } else {
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1440 context->flags &= ~(FLAG_WINDOW_EDGE|FLAG_WINDOW);
40
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1441 }
7368a7071908 Broken window support
Mike Pavone <pavone@retrodev.com>
parents: 39
diff changeset
1442 }
1290
aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents: 1289
diff changeset
1443 //TODO: Verify behavior for 0x20 case
aa1a8eb5bb2b Change handling of invalid scroll plane sizes. Fixes title and high score screens in The Incredible Hulk
Michael Pavone <pavone@retrodev.com>
parents: 1289
diff changeset
1444 uint16_t vscroll = 0xFF | (context->regs[REG_SCROLL] & 0x30) << 4;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1445 if (context->double_res) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1446 vscroll <<= 1;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1447 vscroll |= 1;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1448 }
710
4cd8823f79e3 First pass at emulating a vscroll latch. Titan's Overdrive demo seems to depend on the scroll value being latched early in the line before the HINT gets a chance to change it
Michael Pavone <pavone@retrodev.com>
parents: 708
diff changeset
1449 vscroll &= context->vscroll_latch[vsram_off] + line;
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1450 context->v_offset = vscroll & v_offset_mask;
26
a7c2b92d8056 Fix management of context->sprite_draws so the sprite layer only draws when it should
Mike Pavone <pavone@retrodev.com>
parents: 25
diff changeset
1451 //printf("%s | line %d, vsram: %d, vscroll: %d, v_offset: %d\n",(vsram_off ? "B" : "A"), line, context->vsram[context->regs[REG_MODE_3] & 0x4 ? column : 0], vscroll, context->v_offset);
414
51ee0f117365 Fix vscroll calculation in double resultion interlace mode
Mike Pavone <pavone@retrodev.com>
parents: 413
diff changeset
1452 vscroll >>= vscroll_shift;
1887
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1453 //TODO: Verify the behavior for a setting of 2
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1454 static const uint16_t hscroll_masks[] = {0x1F, 0x3F, 0x1F, 0x7F};
2013
dcdad92f84a4 Multiplying by zero and shifting by zero are very different. Fixes regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2010
diff changeset
1455 static const uint16_t v_shifts[] = {6, 7, 16, 8};
1887
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1456 uint16_t hscroll_mask = hscroll_masks[context->regs[REG_SCROLL] & 0x3];
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1457 uint16_t v_shift = v_shifts[context->regs[REG_SCROLL] & 0x3];
28
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1458 uint16_t hscroll, offset;
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1459 for (int i = 0; i < 2; i++) {
39
3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents: 38
diff changeset
1460 hscroll = (column - 2 + i - ((hscroll_val/8) & 0xFFFE)) & hscroll_mask;
1887
bb3edb4ec605 Small optimization to read_map_scroll
Michael Pavone <pavone@retrodev.com>
parents: 1886
diff changeset
1461 offset = address + (((vscroll << v_shift) + hscroll*2) & 0x1FFF);
39
3c69319269ef Horizontal scroll works correctly now. In particular, the SEGA logo in Vectorman has a nice smooth wave like it should
Mike Pavone <pavone@retrodev.com>
parents: 38
diff changeset
1462 //printf("%s | line: %d, col: %d, x: %d, hs_mask %X, scr reg: %X, tbl addr: %X\n", (vsram_off ? "B" : "A"), line, (column-2+i), hscroll, hscroll_mask, context->regs[REG_SCROLL], offset);
28
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1463 uint16_t col_val = (context->vdpmem[offset] << 8) | context->vdpmem[offset+1];
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1464 if (i) {
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1465 context->col_2 = col_val;
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1466 } else {
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1467 context->col_1 = col_val;
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1468 }
037963b4c92d Fix BG plane B render bug
Mike Pavone <pavone@retrodev.com>
parents: 27
diff changeset
1469 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1470 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1471
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1472 static void read_map_scroll_a(uint16_t column, uint32_t line, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1473 {
25
4d0c20ad815a Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents: 24
diff changeset
1474 read_map_scroll(column, 0, line, (context->regs[REG_SCROLL_A] & 0x38) << 10, context->hscroll_a, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1475 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1476
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1477 static void read_map_scroll_b(uint16_t column, uint32_t line, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1478 {
25
4d0c20ad815a Fix vertical scroll value for plane B
Mike Pavone <pavone@retrodev.com>
parents: 24
diff changeset
1479 read_map_scroll(column, 1, line, (context->regs[REG_SCROLL_B] & 0x7) << 13, context->hscroll_b, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1480 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1481
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1482 static void read_map_mode4(uint16_t column, uint32_t line, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1483 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1484 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1485 //add row
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1486 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1487 if (column < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1488 vscroll += context->regs[REG_Y_SCROLL];
2465
b0408f38f464 Add missing mask to vscroll calculation in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2414
diff changeset
1489 vscroll &= 511;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1490 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1491 if (vscroll > 223) {
2465
b0408f38f464 Add missing mask to vscroll calculation in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2414
diff changeset
1492 //TODO: support V28 and V30 for SMS2/GG VDPs
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1493 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1494 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1495 address += (vscroll >> 3) * 2 * 32;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1496 //add column
1136
52f25c41abdd Fix horizontal scrolling in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1135
diff changeset
1497 address += ((column - (context->hscroll_a >> 3)) & 31) * 2;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1498 //adjust for weird VRAM mapping in Mode 4
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1499 address = mode4_address_map[address];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1500 context->col_1 = (context->vdpmem[address] << 8) | context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1501 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1502
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1503 static void render_map(uint16_t col, uint8_t * tmp_buf, uint8_t offset, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1504 {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1505 uint16_t address;
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1506 uint16_t vflip_base;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1507 if (context->double_res) {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1508 address = ((col & 0x3FF) << 6);
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1509 vflip_base = 60;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1510 } else {
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1511 address = ((col & 0x7FF) << 5);
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1512 vflip_base = 28;
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
1513 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1514 if (col & MAP_BIT_V_FLIP) {
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1515 address += vflip_base - 4 * context->v_offset;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1516 } else {
1032
679137a0e78e Fix bug in vflip implementation when in double resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 1029
diff changeset
1517 address += 4 * context->v_offset;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1518 }
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1519 uint8_t pal_priority = (col >> 9) & 0x70;
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1520 uint32_t bits = *((uint32_t *)(&context->vdpmem[address]));
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1521 tmp_buf += offset;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1522 if (col & MAP_BIT_H_FLIP) {
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1523 uint32_t shift = 28;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1524 for (int i = 0; i < 4; i++)
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1525 {
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1526 uint8_t right = pal_priority | ((bits >> shift) & 0xF);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1527 shift -= 4;
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1528 *(tmp_buf++) = pal_priority | ((bits >> shift) & 0xF);
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1529 shift -= 4;
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1530 *(tmp_buf++) = right;
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1531 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1532 } else {
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1533 for (int i = 0; i < 4; i++)
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1534 {
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1535 uint8_t right = pal_priority | (bits & 0xF);
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1536 bits >>= 4;
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1537 *(tmp_buf++) = pal_priority | (bits & 0xF);
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1538 bits >>= 4;
1875
3457d338ae25 Small optimization to render_map in VDP code
Michael Pavone <pavone@retrodev.com>
parents: 1874
diff changeset
1539 *(tmp_buf++) = right;
1653
858d52140375 Small optimization to render_map
Michael Pavone <pavone@retrodev.com>
parents: 1652
diff changeset
1540 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1541 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1542 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1543
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1544 static void render_map_1(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1545 {
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1546 render_map(context->col_1, context->tmp_buf_a, context->buf_a_off, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1547 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1548
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1549 static void render_map_2(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1550 {
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1551 render_map(context->col_2, context->tmp_buf_a, context->buf_a_off+8, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1552 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1553
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1554 static void render_map_3(vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1555 {
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1556 render_map(context->col_1, context->tmp_buf_b, context->buf_b_off, context);
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1557 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1558
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1559 static void fetch_map_mode4(uint16_t col, uint32_t line, vdp_context *context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1560 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1561 //calculate pixel row to fetch
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1562 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1563 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1564 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1565 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1566 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1567 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1568 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1569 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1570 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1571 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1572 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1573
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1574 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1575 context->fetch_tmp[0] = context->vdpmem[address];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1576 context->fetch_tmp[1] = context->vdpmem[address+1];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1577 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
1578
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1579 static uint8_t composite_normal(vdp_context *context, uint8_t *debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1580 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1581 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1582 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1583 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1584 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1585 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1586 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1587 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1588 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1589 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1590 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1591 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1592 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1593 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1594 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1595 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1596 return pixel;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1597 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1598 typedef struct {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1599 uint8_t index, intensity;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1600 } sh_pixel;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1601
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1602 static sh_pixel composite_highlight(vdp_context *context, uint8_t *debug_dst, uint8_t sprite, uint8_t plane_a, uint8_t plane_b, uint8_t bg_index)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1603 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1604 uint8_t pixel = bg_index;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1605 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1606 uint8_t intensity = 0;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1607 if (plane_b & 0xF) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1608 pixel = plane_b;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1609 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1610 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1611 intensity = plane_b & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1612 if (plane_a & 0xF && (plane_a & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1613 pixel = plane_a;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1614 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1615 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1616 intensity |= plane_a & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1617 if (sprite & 0xF && (sprite & BUF_BIT_PRIORITY) >= (pixel & BUF_BIT_PRIORITY)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1618 if ((sprite & 0x3F) == 0x3E) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1619 intensity += BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1620 } else if ((sprite & 0x3F) == 0x3F) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1621 intensity = 0;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1622 } else {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1623 pixel = sprite;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1624 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1625 if ((pixel & 0xF) == 0xE) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1626 intensity = BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1627 } else {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1628 intensity |= pixel & BUF_BIT_PRIORITY;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1629 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1630 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1631 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1632 *debug_dst = src;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1633 return (sh_pixel){.index = pixel, .intensity = intensity};
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1634 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1635
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1636 static void render_normal(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, uint8_t *buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1637 {
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1638 uint8_t *sprite_buf = context->linebuf + col * 8;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1639 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1640 memset(dst, 0, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1641 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1642 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1643 debug_dst += 8;
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1644 sprite_buf += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1645 plane_a_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1646 plane_b_off += 8;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1647 for (int i = 0; i < 8; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1648 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1649 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1650 plane_a = buf_a[plane_a_off & plane_a_mask];
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1651 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1652 *(dst++) = composite_normal(context, debug_dst, *sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1653 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1654 }
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1655 } else {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1656 for (int i = 0; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1657 {
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1658 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1659 plane_a = buf_a[plane_a_off & plane_a_mask];
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1660 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1661 *(dst++) = composite_normal(context, debug_dst, *sprite_buf, plane_a, plane_b, context->regs[REG_BG_COLOR]) & 0x3F;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1662 debug_dst++;
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1663 }
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1664 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1665 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1666
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1667 static void render_highlight(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, uint8_t *buf_a, int plane_a_off, int plane_a_mask, int plane_b_off)
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1668 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1669 int start = 0;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1670 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1671 memset(dst, SHADOW_OFFSET + (context->regs[REG_BG_COLOR] & 0x3F), 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1672 memset(debug_dst, DBG_SRC_BG | DBG_SHADOW, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1673 dst += 8;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1674 debug_dst += 8;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1675 start = 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1676 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1677 uint8_t *sprite_buf = context->linebuf + col * 8 + start;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1678 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1679 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1680 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1681 plane_a = buf_a[plane_a_off & plane_a_mask];
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1682 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1683 sprite = *sprite_buf;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1684 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, context->regs[REG_BG_COLOR]);
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1685 uint8_t final_pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1686 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1687 final_pixel = (pixel.index & 0x3F) + HIGHLIGHT_OFFSET;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1688 } else if (pixel.intensity) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1689 final_pixel = pixel.index & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1690 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1691 final_pixel = (pixel.index & 0x3F) + SHADOW_OFFSET;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1692 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1693 debug_dst++;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1694 *(dst++) = final_pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1695 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1696 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1697
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1698 static void render_testreg(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, uint8_t *buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1699 {
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1700 uint8_t pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1701 if (output_disabled) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1702 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1703 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1704 case 0:
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1705 pixel = context->regs[REG_BG_COLOR] & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1706 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1707 {
2509
1102372feaee Remove old TODO
Michael Pavone <pavone@retrodev.com>
parents: 2508
diff changeset
1708 *(dst++) = pixel; //Behavior confirmed on hardware by vladikcomper
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1709 *(debug_dst++) = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1710 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1711 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1712 case 1: {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1713 uint8_t *sprite_buf = context->linebuf + col * 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1714 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1715 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1716 *(dst++) = *(sprite_buf++) & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1717 *(debug_dst++) = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1718 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1719 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1720 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1721 case 2:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1722 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1723 {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1724 *(dst++) = buf_a[(plane_a_off++) & plane_a_mask] & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1725 *(debug_dst++) = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1726 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1727 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1728 case 3:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1729 for (int i = 0; i < 16; i++)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1730 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1731 *(dst++) = context->tmp_buf_b[(plane_b_off++) & SCROLL_BUFFER_MASK] & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1732 *(debug_dst++) = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1733 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1734 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1735 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1736 } else {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1737 int start = 0;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1738 uint8_t *sprite_buf = context->linebuf + col * 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1739 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1740 //TODO: Confirm how test register interacts with column 0 blanking
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1741 pixel = 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1742 uint8_t src = DBG_SRC_BG;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1743 for (int i = 0; i < 8; ++i)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1744 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1745 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1746 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1747 case 1:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1748 pixel &= sprite_buf[i];
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1749 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1750 src = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1751 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1752 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1753 case 2:
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1754 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1755 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1756 src = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1757 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1758 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1759 case 3:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1760 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1761 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1762 src = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1763 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1764 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1765 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1766
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1767 *(dst++) = pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1768 *(debug_dst++) = src;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1769 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1770 plane_a_off += 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1771 plane_b_off += 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1772 sprite_buf += 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1773 start = 8;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1774 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1775 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1776 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1777 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1778 plane_a = buf_a[plane_a_off & plane_a_mask];
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1779 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1780 sprite = *sprite_buf;
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1781 pixel = composite_normal(context, debug_dst, sprite, plane_a, plane_b, 0x3F) & 0x3F;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1782 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1783 {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1784 case 1:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1785 pixel &= sprite;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1786 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1787 *debug_dst = DBG_SRC_S;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1788 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1789 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1790 case 2:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1791 pixel &= plane_a;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1792 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1793 *debug_dst = DBG_SRC_A;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1794 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1795 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1796 case 3:
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1797 pixel &= plane_b;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1798 if (pixel) {
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1799 *debug_dst = DBG_SRC_B;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1800 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1801 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1802 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1803 debug_dst++;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1804 *(dst++) = pixel;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1805 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1806 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1807 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1808
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1809 static void render_testreg_highlight(vdp_context *context, int32_t col, uint8_t *dst, uint8_t *debug_dst, uint8_t *buf_a, int plane_a_off, int plane_a_mask, int plane_b_off, uint8_t output_disabled, uint8_t test_layer)
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1810 {
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1811 int start = 0;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1812 uint8_t *sprite_buf = context->linebuf + col * 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1813 if (!col && (context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1814 //TODO: Confirm how test register interacts with column 0 blanking
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1815 uint8_t pixel = 0x3F;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1816 uint8_t src = DBG_SRC_BG | DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1817 for (int i = 0; i < 8; ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1818 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1819 switch (test_layer)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1820 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1821 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1822 pixel &= sprite_buf[i];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1823 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1824 src = DBG_SRC_S | DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1825 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1826 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1827 case 2:
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1828 pixel &= buf_a[(plane_a_off + i) & plane_a_mask];
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1829 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1830 src = DBG_SRC_A | DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1831 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1832 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1833 case 3:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1834 pixel &= context->tmp_buf_b[(plane_b_off + i) & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1835 if (pixel) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1836 src = DBG_SRC_B | DBG_SHADOW;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1837 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1838 break;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1839 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1840
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1841 *(dst++) = SHADOW_OFFSET + pixel;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1842 *(debug_dst++) = src;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1843 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1844 plane_a_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1845 plane_b_off += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1846 sprite_buf += 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1847 start = 8;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1848 }
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1849 for (int i = start; i < 16; ++plane_a_off, ++plane_b_off, ++sprite_buf, ++i)
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1850 {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1851 uint8_t sprite, plane_a, plane_b;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1852 plane_a = buf_a[plane_a_off & plane_a_mask];
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1853 plane_b = context->tmp_buf_b[plane_b_off & SCROLL_BUFFER_MASK];
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1854 sprite = *sprite_buf;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1855 sh_pixel pixel = composite_highlight(context, debug_dst, sprite, plane_a, plane_b, 0x3F);
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1856 if (output_disabled) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1857 pixel.index = 0x3F;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1858 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1859 pixel.index &= 0x3F;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1860 }
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1861 switch (test_layer)
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1862 {
2508
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1863 case 0:
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1864 if (output_disabled) {
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1865 pixel.index &= context->regs[REG_BG_COLOR];
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1866 *debug_dst = DBG_SRC_BG;
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1867 }
caf92f1b7b76 Fix behavior of rendering when all planes are disabled via VDP test register (Thanks vladikcomper!)
Michael Pavone <pavone@retrodev.com>
parents: 2504
diff changeset
1868 break;
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1869 case 1:
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1870 pixel.index &= sprite;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1871 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1872 *debug_dst = DBG_SRC_S;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1873 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1874 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1875 case 2:
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1876 pixel.index &= plane_a;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1877 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1878 *debug_dst = DBG_SRC_A;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1879 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1880 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1881 case 3:
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1882 pixel.index &= plane_b;
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1883 if (pixel.index) {
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1884 *debug_dst = DBG_SRC_B;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1885 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1886 break;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1887 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1888 if (pixel.intensity == BUF_BIT_PRIORITY << 1) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1889 pixel.index += HIGHLIGHT_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1890 } else if (!pixel.intensity) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1891 pixel.index += SHADOW_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1892 }
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1893 debug_dst++;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1894 *(dst++) = pixel.index;
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1895 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1896 }
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1897
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
1898 static void render_map_output(uint32_t line, int32_t col, vdp_context * context)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1899 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1900 uint8_t *dst;
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1901 uint8_t *debug_dst;
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
1902 uint8_t output_disabled = (context->test_regs[0] & TEST_BIT_DISABLE) != 0;
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
1903 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
1904 if (context->state == PREPARING && !test_layer) {
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
1905 if (col) {
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1906 col -= 2;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1907 dst = context->compositebuf + BORDER_LEFT + col * 8;
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
1908 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1909 dst = context->compositebuf;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
1910 pixel_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1911 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1912 context->done_composite = dst + BORDER_LEFT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1913 return;
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
1914 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1915 memset(dst, 0, 16);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1916 context->done_composite = dst + 16;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
1917 return;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
1918 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
1919 line &= 0xFF;
1180
e2b81a0f8fd8 Undo poorly thought out minor optimization that screwed up rendering
Michael Pavone <pavone@retrodev.com>
parents: 1179
diff changeset
1920 render_map(context->col_2, context->tmp_buf_b, context->buf_b_off+8, context);
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1921 uint8_t *sprite_buf;
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1922 uint8_t sprite, plane_a, plane_b;
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
1923 int plane_a_off, plane_b_off;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1924 if (col)
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1925 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1926 col-=2;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1927 dst = context->compositebuf + BORDER_LEFT + col * 8;
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1928 debug_dst = context->layer_debug_buf + BORDER_LEFT + col * 8;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1929
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1930
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1931 uint8_t a_src, src;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1932 uint8_t *buf_a;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1933 int plane_a_mask;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1934 if (context->flags & FLAG_WINDOW) {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1935 plane_a_off = context->buf_a_off;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1936 buf_a = context->tmp_buf_a;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1937 a_src = DBG_SRC_W;
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1938 plane_a_mask = SCROLL_BUFFER_MASK;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1939 } else {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1940 if (context->flags & FLAG_WINDOW_EDGE) {
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1941 buf_a = context->tmp_buf_a + context->buf_a_off;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1942 plane_a_mask = 15;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1943 plane_a_off = -context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1944 } else {
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1945 plane_a_off = context->buf_a_off - context->hscroll_a_fine;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1946 plane_a_mask = SCROLL_BUFFER_MASK;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1947 buf_a = context->tmp_buf_a;
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1948 }
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1949 a_src = DBG_SRC_A;
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1950 }
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1951 plane_a_off &= plane_a_mask;
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
1952 plane_b_off = context->buf_b_off - context->hscroll_b_fine;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1953 //printf("A | tmp_buf offset: %d\n", 8 - (context->hscroll_a & 0x7));
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1954
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1955 if (context->regs[REG_MODE_4] & BIT_HILIGHT) {
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1956 if (output_disabled || test_layer) {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1957 render_testreg_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1958 } else {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1959 render_highlight(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
722
8f5339961903 Restore the other 2 debug display modes
Michael Pavone <pavone@retrodev.com>
parents: 720
diff changeset
1960 }
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
1961 } else {
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1962 if (output_disabled || test_layer) {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1963 render_testreg(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off, output_disabled, test_layer);
1652
d0a69348add8 Optimized render_map_output a bit
Michael Pavone <pavone@retrodev.com>
parents: 1649
diff changeset
1964 } else {
2040
a61b47d5489e Fix window bug implementation
Michael Pavone <pavone@retrodev.com>
parents: 2032
diff changeset
1965 render_normal(context, col, dst, debug_dst, buf_a, plane_a_off, plane_a_mask, plane_b_off);
230
d3266cee02c9 Implemented shadow hilight mode.
Mike Pavone <pavone@retrodev.com>
parents: 191
diff changeset
1966 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
1967 }
1655
3128d4e0bc68 Fix some rendering bugs introduced in previous VDP optimizations
Michael Pavone <pavone@retrodev.com>
parents: 1653
diff changeset
1968 dst += 16;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1969 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1970 dst = context->compositebuf;
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1971 debug_dst = context->layer_debug_buf;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1972 uint8_t pixel = 0;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1973 if (output_disabled) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1974 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1975 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1976 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1977 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1978 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1979 case 1:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1980 memset(dst, 0, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1981 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
1982 dst += BORDER_LEFT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1983 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1984 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1985 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1986 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1987 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1988 i = 0;
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
1989 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine + (16 - BORDER_LEFT);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
1990 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1991 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1992 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
1993 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK];
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
1994 *debug_dst = DBG_SRC_A;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1995 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1996 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1997 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1998 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
1999 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2000 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2001 i = 0;
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
2002 uint8_t buf_off = context->buf_b_off - context->hscroll_b_fine + (16 - BORDER_LEFT);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2003 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2004 for (; i < BORDER_LEFT; buf_off++, i++, dst++, debug_dst++)
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2005 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2006 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK];
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2007 *debug_dst = DBG_SRC_B;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2008 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2009 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2010 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2011 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2012 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2013 memset(dst, pixel, BORDER_LEFT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2014 memset(debug_dst, DBG_SRC_BG, BORDER_LEFT);
1878
881083d76212 Small optimization to render_normal and a minor bugfix in left border debug register handling
Michael Pavone <pavone@retrodev.com>
parents: 1877
diff changeset
2015 dst += BORDER_LEFT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2016 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2017 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2018 context->done_composite = dst;
436
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
2019 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
e341fd5aa996 Implement the scroll ring buffer properly without memcpy
Mike Pavone <pavone@retrodev.com>
parents: 427
diff changeset
2020 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2021 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
2022
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2023 static void render_map_mode4(uint32_t line, int32_t col, vdp_context * context)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2024 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2025 uint32_t vscroll = line;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2026 if (col < 24 || !(context->regs[REG_MODE_1] & BIT_VSCRL_LOCK)) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2027 vscroll += context->regs[REG_Y_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2028 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2029 if (vscroll > 223) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2030 vscroll -= 224;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2031 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2032 vscroll &= 7;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2033 if (context->col_1 & 0x400) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2034 //vflip
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2035 vscroll = 7 - vscroll;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2036 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2037
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2038 uint32_t pixels = planar_to_chunky[context->fetch_tmp[0]] << 1;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2039 pixels |= planar_to_chunky[context->fetch_tmp[1]];
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2040
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2041 uint32_t address = mode4_address_map[((context->col_1 & 0x1FF) * 32) + vscroll * 4 + 2];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2042 pixels |= planar_to_chunky[context->vdpmem[address]] << 3;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2043 pixels |= planar_to_chunky[context->vdpmem[address+1]] << 2;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2044
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2045 int i, i_inc, i_limit;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2046 if (context->col_1 & 0x200) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2047 //hflip
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2048 i = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2049 i_inc = 4;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2050 i_limit = 32;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2051 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2052 i = 28;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2053 i_inc = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2054 i_limit = -4;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2055 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2056 uint8_t pal_priority = (context->col_1 >> 7 & 0x10) | (context->col_1 >> 6 & 0x40);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2057 for (uint8_t *dst = context->tmp_buf_a + context->buf_a_off; i != i_limit; i += i_inc, dst++)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2058 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2059 *dst = (pixels >> i & 0xF) | pal_priority;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2060 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2061 context->buf_a_off = (context->buf_a_off + 8) & 15;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2062
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2063 uint8_t *dst = context->compositebuf + col * 8 + BORDER_LEFT;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2064 uint8_t *debug_dst = context->layer_debug_buf + col * 8 + BORDER_LEFT;
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
2065 if (context->state == PREPARING) {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2066 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2067 memset(debug_dst, DBG_SRC_BG, 8);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2068 context->done_composite = dst + 8;
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
2069 return;
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
2070 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2071
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2072 if (col || !(context->regs[REG_MODE_1] & BIT_COL0_MASK)) {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2073 uint8_t *sprite_src = context->linebuf + col * 8;
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2074 if (context->regs[REG_MODE_1] & BIT_SPRITE_8PX) {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2075 sprite_src += 8;
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2076 }
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2077 for (int i = 0; i < 8; i++, sprite_src++)
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2078 {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2079 uint8_t *bg_src = context->tmp_buf_a + ((8 + i + col * 8 - (context->hscroll_a & 0x7)) & 15);
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2080 if ((*bg_src & 0x4F) > 0x40 || !*sprite_src) {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2081 //background plane has priority and is opaque or sprite layer is transparent
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2082 uint8_t pixel = *bg_src & 0x1F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2083 *(dst++) = pixel + MODE4_OFFSET;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2084 *(debug_dst++) = pixel ? DBG_SRC_A : DBG_SRC_BG;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2085 } else {
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2086 //sprite layer is opaque and not covered by high priority BG pixels
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2087 *(dst++) = (*sprite_src | 0x10) + MODE4_OFFSET;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2088 *(debug_dst++) = DBG_SRC_S;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2089 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2090 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2091 context->done_composite = dst;
1643
6909c5d0bbb5 Removed old VDP debug functionality
Michael Pavone <pavone@retrodev.com>
parents: 1642
diff changeset
2092 } else {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2093 memset(dst, 0x10 + (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET, 8);
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2094 memset(debug_dst, DBG_SRC_BG, 8);
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
2095 context->done_composite = dst + 8;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2096 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2097 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
2098
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
2099 static uint32_t const h40_hsync_cycles[] = {19, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 18, 20, 20, 20, 19};
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2100
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
2101 static void vdp_advance_line(vdp_context *context)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2102 {
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2103 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2104 static uint32_t last_line = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2105 if (last_line != 0xFFFFFFFF) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2106 uint32_t diff = context->cycles - last_line;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2107 if (diff != MCLKS_LINE) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2108 printf("Line %d took %d cycles\n", context->vcounter, diff);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2109 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2110 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2111 last_line = context->cycles;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
2112 #endif
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2113 uint16_t jump_start, jump_end;
1156
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1155
diff changeset
2114 uint8_t is_mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1155
diff changeset
2115 if (is_mode_5) {
b519965f6394 Clear sprite overflow flag when control port read. Fix vcounter progression in Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1155
diff changeset
2116 if (context->flags2 & FLAG2_REGION_PAL) {
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2117 if (context->regs[REG_MODE_2] & BIT_PAL) {
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2118 jump_start = 0x10B;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2119 jump_end = 0x1D2;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2120 } else {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2121 jump_start = 0x103;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2122 jump_end = 0x1CA;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2123 }
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2124 } else if (context->regs[REG_MODE_2] & BIT_PAL) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2125 jump_start = 0x100;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2126 jump_end = 0x1FA;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2127 } else {
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2128 jump_start = 0xEB;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2129 jump_end = 0x1E5;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2130 }
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2131 } else {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2132 jump_start = 0xDB;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2133 jump_end = 0x1D5;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2134 }
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2135
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2136 if (context->enabled_debuggers & (1 << DEBUG_CRAM | 1 << DEBUG_COMPOSITE)) {
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2137 uint32_t line = context->vcounter;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2138 if (line >= jump_end) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2139 line -= jump_end - jump_start;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2140 }
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2141 uint32_t total_lines = (context->flags2 & FLAG2_REGION_PAL) ? 313 : 262;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2142
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2143 if (total_lines - line <= context->border_top) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2144 line -= total_lines - context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2145 } else {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2146 line += context->border_top;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2147 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2148 if (context->enabled_debuggers & (1 << DEBUG_CRAM)) {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2149 pixel_t *fb = context->debug_fbs[DEBUG_CRAM] + context->debug_fb_pitch[DEBUG_CRAM] * line / sizeof(pixel_t);
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2150 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2151 for (int i = 0; i < 64; i++)
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2152 {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2153 for (int x = 0; x < 8; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2154 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2155 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2156 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2157 }
2411
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2158 } else if (context->type == VDP_GENESIS || (context->regs[REG_MODE_1] & BIT_MODE_4)) {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2159 for (int i = MODE4_OFFSET; i < MODE4_OFFSET+32; i++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2160 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2161 for (int x = 0; x < 16; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2162 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2163 *(fb++) = context->colors[i];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2164 }
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2165 }
2411
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2166 } else if (context->type != VDP_GENESIS) {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2167 uint16_t address = context->regs[REG_COLOR_TABLE] << 6;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2168 for (int i = 0; i < 32; i++, address++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2169 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2170 uint8_t entry = context->vdpmem[mode4_address_map[address] ^ 1];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2171 uint8_t fg = entry >> 4, bg = entry & 0xF;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2172 pixel_t fg_full, bg_full;
2411
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2173 if (context->type == VDP_GAMEGEAR) {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2174 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2175 fg_full = context->colors[fg + 16 + MODE4_OFFSET];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2176 bg_full = context->colors[bg + 16 + MODE4_OFFSET];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2177 } else {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2178 fg <<= 1;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2179 fg = (fg & 0xE) | (fg << 1 & 0x20);
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2180 fg_full = context->color_map[fg | FBUF_TMS];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2181 bg <<= 1;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2182 bg = (bg & 0xE) | (bg << 1 & 0x20);
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2183 bg_full = context->color_map[bg | FBUF_TMS];
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2184 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2185 for (int x = 0; x < 8; x++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2186 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2187 *(fb++) = fg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2188 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2189 for (int x = 0; x < 8; x++)
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2190 {
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2191 *(fb++) = bg_full;
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2192 }
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
2193 }
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2194 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2195 }
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2196 if (
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2197 context->enabled_debuggers & (1 << DEBUG_COMPOSITE)
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2198 && line < (context->inactive_start + context->border_bot + context->border_top)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2199 ) {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2200 pixel_t *fb = context->debug_fbs[DEBUG_COMPOSITE] + context->debug_fb_pitch[DEBUG_COMPOSITE] * line / sizeof(pixel_t);
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2201 if (is_mode_5) {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2202 uint32_t left, right;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2203 uint16_t top_line, bottom_line;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2204 if (context->window_v_latch & WINDOW_DOWN) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2205 top_line = ((context->window_v_latch & 0x1F) << 3) + context->border_top;
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2206 bottom_line = context->inactive_start + context->border_top;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2207 } else {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2208 top_line = context->border_top;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2209 bottom_line = ((context->window_v_latch & 0x1F) << 3) + context->border_top;
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2210 }
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2211 if (line >= top_line && line < bottom_line) {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2212 left = 0;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2213 right = 320 + BORDER_LEFT + BORDER_RIGHT;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2214 } else if (context->window_h_latch & WINDOW_RIGHT) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2215 left = (context->window_h_latch & 0x1F) * 16 + BORDER_LEFT;
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2216 right = 320 + BORDER_LEFT + BORDER_RIGHT;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2217 } else {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2218 left = 0;
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2219 right = (context->window_h_latch & 0x1F) * 16 + BORDER_LEFT;
2510
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2220 }
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2221 for (uint32_t i = left; i < right; i++)
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2222 {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2223 uint8_t src = context->layer_debug_buf[i] & DBG_SRC_MASK;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2224 if (src == DBG_SRC_A) {
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2225 context->layer_debug_buf[i] &= ~DBG_SRC_MASK;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2226 context->layer_debug_buf[i] |= DBG_SRC_W;
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2227 }
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2228 }
0a22c1901492 Fix display of window plane in VDP composition viewer
Michael Pavone <pavone@retrodev.com>
parents: 2509
diff changeset
2229 }
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2230 for (int i = 0; i < LINEBUF_SIZE; i++)
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2231 {
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
2232 *(fb++) = context->debugcolors[context->layer_debug_buf[i]];
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2233 }
1299
da1ffc4026c4 Fix latching of V32 mode bit
Michael Pavone <pavone@retrodev.com>
parents: 1290
diff changeset
2234 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2235 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2236
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2237 context->vcounter++;
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
2238 if (context->renderer && context->vcounter == context->inactive_start) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
2239 context->frame++;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
2240 }
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2241 if (is_mode_5) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2242 context->window_h_latch = context->regs[REG_WINDOW_H];
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2243 context->window_v_latch = context->regs[REG_WINDOW_V];
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
2244 }
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2245 if (context->vcounter == jump_start) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2246 context->vcounter = jump_end;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2247 } else {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2248 context->vcounter &= 0x1FF;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2249 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2250 if (context->state == PREPARING) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2251 context->state = ACTIVE;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2252 }
1377
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
2253 if (context->vcounter == 0x1FF) {
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
2254 context->flags2 &= ~FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
2255 }
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2256
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2257 if (context->state != ACTIVE) {
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2258 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2259 } else if (context->hint_counter) {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2260 context->hint_counter--;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2261 } else {
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2262 context->flags2 |= FLAG2_HINT_PENDING;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2263 context->pending_hint_start = context->cycles;
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2264 context->hint_counter = context->regs[REG_HINT];
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2265 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2266 }
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2267
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2268 static void vram_debug_mode5(pixel_t *fb, uint32_t pitch, vdp_context *context)
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2269 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2270 uint8_t pal = (context->debug_modes[DEBUG_VRAM] % 4) << 4;
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2271 int yshift, ymask, tilesize;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2272 if (context->double_res) {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2273 yshift = 5;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2274 ymask = 0xF;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2275 tilesize = 64;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2276 } else {
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2277 yshift = 4;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2278 ymask = 0x7;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2279 tilesize = 32;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2280 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2281 for (int y = 0; y < 512; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2282 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2283 pixel_t *line = fb + y * pitch / sizeof(pixel_t);
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2284 int row = y >> yshift;
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2285 int yoff = y >> 1 & ymask;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2286 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2287 {
2381
d3479965e631 Fix VRAM viewer and plane viewer in double-resolution interlace mode
Michael Pavone <pavone@retrodev.com>
parents: 2361
diff changeset
2288 uint16_t address = (row * 64 + col) * tilesize + yoff * 4;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2289 for (int x = 0; x < 4; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2290 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2291 uint8_t byte = context->vdpmem[address++];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2292 uint8_t left = byte >> 4 | pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2293 uint8_t right = byte & 0xF | pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2294 *(line++) = context->colors[left];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2295 *(line++) = context->colors[left];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2296 *(line++) = context->colors[right];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2297 *(line++) = context->colors[right];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2298 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2299 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2300 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2301 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2302
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2303 static void vram_debug_mode4(pixel_t *fb, uint32_t pitch, vdp_context *context)
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2304 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2305 for (int y = 0; y < 256; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2306 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2307 pixel_t *line = fb + y * pitch / sizeof(pixel_t);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2308 int row = y >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2309 int yoff = y >> 1 & 7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2310 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2311 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2312 uint8_t pal = (col >= 32) << 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2313 uint16_t address = (row * 32 + (col & 31)) * 32 + yoff * 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2314 uint32_t pixels = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2315 for (int x = 0; x < 4; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2316 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2317 uint8_t byte = context->vdpmem[mode4_address_map[address++]];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2318 pixels |= planar_to_chunky[byte] << (x ^ 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2319 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2320 for (int x = 0; x < 32; x+=4)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2321 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2322 uint8_t pixel = (pixels >> (28 - x) & 0xF) | pal;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2323 *(line++) = context->colors[pixel + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2324 *(line++) = context->colors[pixel + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2325 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2326 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2327 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2328 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2329
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2330 static void vram_debug_tms(pixel_t *fb, uint32_t pitch, vdp_context *context)
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2331 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2332 uint8_t pal = ((context->debug_modes[DEBUG_VRAM] % 14) + 2) << 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2333 pal = (pal & 0xE) | (pal << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2334 for (int y = 0; y < 512; y++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2335 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2336 pixel_t *line = fb + y * pitch / sizeof(pixel_t);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2337 int row = y >> 4;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2338 int yoff = y >> 1 & 7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2339 for (int col = 0; col < 64; col++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2340 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2341 uint16_t address = (row * 64 + col) * 8 + yoff;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2342 uint8_t byte = context->vdpmem[mode4_address_map[address^1]];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2343 for (int x = 0; x < 8; x++)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2344 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2345 uint16_t pixel = (byte & 0x80) ? pal : 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2346 byte <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2347 *(line++) = context->color_map[pixel | FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2348 *(line++) = context->color_map[pixel | FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2349 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2350 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2351 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2352 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2353
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2354 static void plane_debug_mode5(pixel_t *fb, uint32_t pitch, vdp_context *context)
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2355 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2356 uint16_t hscroll_mask;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2357 uint16_t v_mul;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2358 uint16_t vscroll_mask = 0x1F | (context->regs[REG_SCROLL] & 0x30) << 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2359 switch(context->regs[REG_SCROLL] & 0x3)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2360 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2361 case 0:
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2362 hscroll_mask = 0x1F;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2363 v_mul = 64;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2364 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2365 case 0x1:
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2366 hscroll_mask = 0x3F;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2367 v_mul = 128;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2368 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2369 case 0x2:
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2370 //TODO: Verify this behavior
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2371 hscroll_mask = 0x1F;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2372 v_mul = 0;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2373 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2374 case 0x3:
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2375 hscroll_mask = 0x7F;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2376 v_mul = 256;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2377 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2378 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2379 uint16_t table_address;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2380 switch(context->debug_modes[DEBUG_PLANE] & 3)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2381 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2382 case 0:
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2383 table_address = context->regs[REG_SCROLL_A] << 10 & 0xE000;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2384 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2385 case 1:
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2386 table_address = context->regs[REG_SCROLL_B] << 13 & 0xE000;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2387 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2388 case 2:
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2389 table_address = context->regs[REG_WINDOW] << 10;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2390 if (context->regs[REG_MODE_4] & BIT_H40) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2391 table_address &= 0xF000;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2392 v_mul = 128;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2393 hscroll_mask = 0x3F;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2394 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2395 table_address &= 0xF800;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2396 v_mul = 64;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2397 hscroll_mask = 0x1F;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2398 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2399 vscroll_mask = 0x1F;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2400 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2401 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2402 pixel_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2403 uint16_t num_rows;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2404 int num_lines;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2405 if (context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2406 num_rows = 64;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2407 num_lines = 16;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2408 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2409 num_rows = 128;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2410 num_lines = 8;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2411 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2412 for (uint16_t row = 0; row < num_rows; row++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2413 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2414 uint16_t row_address = table_address + (row & vscroll_mask) * v_mul;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2415 for (uint16_t col = 0; col < 128; col++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2416 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2417 uint16_t address = row_address + (col & hscroll_mask) * 2;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2418 //pccv hnnn nnnn nnnn
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2419 //
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2420 uint16_t entry = context->vdpmem[address] << 8 | context->vdpmem[address + 1];
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2421 uint8_t pal = entry >> 9 & 0x30;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2422
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2423 pixel_t *dst = fb + (row * pitch * num_lines / sizeof(pixel_t)) + col * 8;
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2424 if (context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2425 address = (entry & 0x3FF) * 64;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2426 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2427 address = (entry & 0x7FF) * 32;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2428 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2429 int y_diff = 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2430 if (entry & 0x1000) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2431 y_diff = -4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2432 address += (num_lines - 1) * 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2433 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2434 int x_diff = 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2435 if (entry & 0x800) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2436 x_diff = -1;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2437 address += 3;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2438 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2439 for (int y = 0; y < num_lines; y++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2440 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2441 uint16_t trow_address = address;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2442 pixel_t *row_dst = dst;
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2443 for (int x = 0; x < 4; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2444 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2445 uint8_t byte = context->vdpmem[trow_address];
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2446 trow_address += x_diff;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2447 uint8_t left, right;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2448 if (x_diff > 0) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2449 left = byte >> 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2450 right = byte & 0xF;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2451 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2452 left = byte & 0xF;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2453 right = byte >> 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2454 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2455 *(row_dst++) = left ? context->colors[left|pal] : bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2456 *(row_dst++) = right ? context->colors[right|pal] : bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2457 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2458 address += y_diff;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2459 dst += pitch / sizeof(pixel_t);
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2460 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2461 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2462 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2463 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2464
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2465 static void sprite_debug_mode5(pixel_t *fb, uint32_t pitch, vdp_context *context)
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2466 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2467 pixel_t bg_color = context->colors[context->regs[REG_BG_COLOR] & 0x3F];
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2468 //clear a single alpha channel bit so we can distinguish between actual bg color and sprite
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2469 //pixels that just happen to be the same color
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2470 bg_color &= 0xFEFFFFFF;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2471 pixel_t *line = fb;
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2472 pixel_t border_line = render_map_color(0, 0, 255);
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2473 pixel_t sprite_outline = render_map_color(255, 0, 255);
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2474 int right_border = 256 + ((context->h40_lines > context->output_lines / 2) ? 640 : 512);
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2475 for (int y = 0; y < 1024; y++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2476 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2477 pixel_t *cur = line;
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2478 if (y != 256 && y != 256+context->inactive_start*2) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2479 for (int x = 0; x < 255; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2480 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2481 *(cur++) = bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2482 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2483 *(cur++) = border_line;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2484 for (int x = 256; x < right_border; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2485 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2486 *(cur++) = bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2487 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2488 *(cur++) = border_line;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2489 for (int x = right_border + 1; x < 1024; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2490 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2491 *(cur++) = bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2492 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2493 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2494 for (int x = 0; x < 1024; x++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2495 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2496 *(cur++) = border_line;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2497 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2498 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2499 line += pitch / sizeof(pixel_t);
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2500 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2501 for (int i = 0, index = 0; i < context->max_sprites_frame; i++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2502 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2503 uint32_t y = (context->sat_cache[index] & 3) << 8 | context->sat_cache[index + 1];
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2504 if (!context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2505 y &= 0x1FF;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2506 y <<= 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2507 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2508 uint8_t tile_width = ((context->sat_cache[index+2] >> 2) & 0x3);
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2509 uint32_t pixel_width = (tile_width + 1) * 16;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2510 uint8_t height = ((context->sat_cache[index+2] & 3) + 1) * 16;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2511 uint16_t col_offset = height * (context->double_res ? 4 : 2);
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2512 uint16_t att_addr = mode5_sat_address(context) + index * 2 + 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2513 uint16_t tileinfo = (context->vdpmem[att_addr] << 8) | context->vdpmem[att_addr+1];
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2514 uint16_t tile_addr;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2515 if (context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2516 tile_addr = (tileinfo & 0x3FF) << 6;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2517 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2518 tile_addr = (tileinfo & 0x7FF) << 5;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2519 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2520 uint8_t pal = (tileinfo >> 9) & 0x30;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2521 uint16_t hflip = tileinfo & MAP_BIT_H_FLIP;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2522 uint16_t vflip = tileinfo & MAP_BIT_V_FLIP;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2523 uint32_t x = (((context->vdpmem[att_addr+ 2] & 0x3) << 8 | context->vdpmem[att_addr + 3]) & 0x1FF) * 2;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2524 pixel_t *line = fb + y * pitch / sizeof(pixel_t) + x;
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2525 pixel_t *cur = line;
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2526 for (uint32_t cx = x, x2 = x + pixel_width; cx < x2; cx++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2527 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2528 *(cur++) = sprite_outline;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2529 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2530 uint8_t advance_source = 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2531 uint32_t y2 = y + height - 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2532 if (y2 > 1024) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2533 y2 = 1024;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2534 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2535 uint16_t line_offset = 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2536 if (vflip) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2537 tile_addr += col_offset - 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2538 line_offset = -line_offset;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2539 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2540 if (hflip) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2541 tile_addr += col_offset * tile_width + 3;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2542 col_offset = -col_offset;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2543 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2544 for (; y < y2; y++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2545 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2546 line += pitch / sizeof(pixel_t);
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2547 cur = line;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2548 *(cur++) = sprite_outline;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2549 uint16_t line_addr = tile_addr;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2550 for (uint8_t tx = 0; tx <= tile_width; tx++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2551 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2552 uint16_t cur_addr = line_addr;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2553 for (uint8_t cx = 0; cx < 4; cx++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2554 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2555 uint8_t pair = context->vdpmem[cur_addr];
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2556 pixel_t left, right;
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2557 if (hflip) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2558 right = pair >> 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2559 left = pair & 0xF;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2560 cur_addr--;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2561 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2562 left = pair >> 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2563 right = pair & 0xF;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2564 cur_addr++;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2565 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2566 left = left ? context->colors[pal | left] : bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2567 right = right ? context->colors[pal | right] : bg_color;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2568 if (*cur == bg_color) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2569 *(cur) = left;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2570 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2571 cur++;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2572 if (cx | tx) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2573 if (*cur == bg_color) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2574 *(cur) = left;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2575 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2576 cur++;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2577 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2578 if (*cur == bg_color) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2579 *(cur) = right;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2580 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2581 cur++;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2582 if (cx != 3 || tx != tile_width) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2583 if (*cur == bg_color) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2584 *(cur) = right;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2585 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2586 cur++;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2587 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2588 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2589 line_addr += col_offset;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2590 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2591
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2592 *(cur++) = sprite_outline;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2593 if (advance_source || context->double_res) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2594 tile_addr += line_offset;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2595 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2596 advance_source = !advance_source;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2597 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2598 if (y2 != 1024) {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2599 line += pitch / sizeof(pixel_t);
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2600 cur = line;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2601 for (uint32_t cx = x, x2 = x + pixel_width; cx < x2; cx++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2602 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2603 *(cur++) = sprite_outline;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2604 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2605 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2606 index = context->sat_cache[index+3] * 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2607 if (!index) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2608 break;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2609 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2610 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2611 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2612
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2613 static void plane_debug_mode4(pixel_t *fb, uint32_t pitch, vdp_context *context)
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2614 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2615 pixel_t bg_color = context->colors[(context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET];
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2616 uint32_t address = (context->regs[REG_SCROLL_A] & 0xE) << 10;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2617 for (uint32_t row_address = address, end = address + 32*32*2; row_address < end; row_address += 2 * 32)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2618 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2619 pixel_t *col = fb;
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2620 for(uint32_t cur = row_address, row_end = row_address + 2 * 32; cur < row_end; cur += 2)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2621 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2622 uint32_t mapped = mode4_address_map[cur];
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2623 uint16_t entry = context->vdpmem[mapped] << 8 | context->vdpmem[mapped + 1];
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2624 uint32_t tile_address = (entry & 0x1FF) << 5;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2625 uint8_t pal = entry >> 7 & 0x10;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2626 uint32_t i_init, i_inc, i_limit, tile_inc;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2627 if (entry & 0x200) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2628 //hflip
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2629 i_init = 0;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2630 i_inc = 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2631 i_limit = 32;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2632 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2633 i_init = 28;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2634 i_inc = -4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2635 i_limit = -4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2636 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2637 if (entry & 0x400) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2638 //vflip
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2639 tile_address += 7*4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2640 tile_inc = -4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2641 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2642 tile_inc = 4;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2643 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2644 pixel_t *line = col;
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2645 for (int y = 0; y < 16; y++)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2646 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2647 uint32_t first = mode4_address_map[tile_address];
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2648 uint32_t last = mode4_address_map[tile_address + 2];
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2649 uint32_t pixels = planar_to_chunky[context->vdpmem[first]] << 1;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2650 pixels |= planar_to_chunky[context->vdpmem[first+1]];
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2651 pixels |= planar_to_chunky[context->vdpmem[last]] << 3;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2652 pixels |= planar_to_chunky[context->vdpmem[last+1]] << 2;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2653 pixel_t *out = line;
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2654 for (uint32_t i = i_init; i != i_limit; i += i_inc)
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2655 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2656 pixel_t pixel = context->colors[((pixels >> i & 0xF) | pal) + MODE4_OFFSET];
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2657 *(out++) = pixel;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2658 *(out++) = pixel;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2659 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2660
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2661
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2662 if (y & 1) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2663 tile_address += tile_inc;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2664 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2665 line += pitch / sizeof(pixel_t);
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2666 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2667
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2668
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2669
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2670 col += 16;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2671 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2672 fb += 16 * pitch / sizeof(pixel_t);
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2673 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2674 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2675
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2676 static void sprite_debug_mode4(pixel_t *fb, uint32_t pitch, vdp_context *context)
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2677 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2678 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2679
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2680 pixel_t tms_map_color(vdp_context *context, uint8_t color)
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2681 {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2682 if (context->type == VDP_GAMEGEAR) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2683 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2684 return context->colors[color + 16 + MODE4_OFFSET];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2685 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2686 color <<= 1;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2687 color = (color & 0xE) | (color << 1 & 0x20);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2688 return context->color_map[color | FBUF_TMS];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2689 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2690 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2691
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2692 static void plane_debug_tms(pixel_t *fb, uint32_t pitch, vdp_context *context)
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2693 {
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2694 uint16_t table_address = context->regs[REG_SCROLL_A] << 10 & 0x3C00;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2695 uint16_t color_address = context->regs[REG_COLOR_TABLE] << 6;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2696 uint16_t pattern_address = context->regs[REG_PATTERN_GEN] << 11 & 0x3800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2697 uint16_t upper_vcounter_mask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2698 uint16_t upper_vcounter_pmask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2699 uint16_t pattern_name_mask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2700 if (context->type > VDP_SMS2) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2701 //SMS1 and TMS9918A
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2702 upper_vcounter_mask = color_address & 0x1800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2703 upper_vcounter_pmask = pattern_address & 0x1800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2704 pattern_name_mask = (color_address & 0x07C0) | 0x0038;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2705 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2706 //SMS2 and Game Gear
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2707 upper_vcounter_mask = 0x1800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2708 upper_vcounter_pmask = 0x1800;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2709 pattern_name_mask = 0x07F8;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2710 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2711 uint32_t cols, pixels;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2712 if (context->regs[REG_MODE_2] & BIT_M1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2713 //Text mode
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2714 cols = 40;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2715 pixels = 12;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2716 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2717 //Graphics/Multicolor
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2718 cols = 32;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2719 pixels = 16;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2720 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2721 uint32_t fg, bg;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2722 if (context->regs[REG_MODE_2] & BIT_M1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2723 //Text mode uses TC and BD colors
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2724 fg = tms_map_color(context, context->regs[REG_BG_COLOR] >> 4);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2725 bg = tms_map_color(context, context->regs[REG_BG_COLOR] & 0xF);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2726 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2727 for (uint32_t row = 0; row < 24; row++)
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2728 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2729 pixel_t *colfb = fb;
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2730 for (uint32_t col = 0; col < cols; col++)
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2731 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2732 pixel_t *linefb = colfb;
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2733 uint8_t pattern = context->vdpmem[mode4_address_map[table_address] ^ 1];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2734 uint16_t caddress = color_address;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2735 uint16_t paddress = pattern_address;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2736 if (context->regs[REG_MODE_2] & BIT_M2) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2737 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2738 if (context->regs[REG_MODE_1] & BIT_M3) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2739 //Graphics II
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2740 caddress &= 0x2000;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2741 paddress &= 0x2000;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2742 caddress |= (row * 8) << 5 & upper_vcounter_mask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2743 caddress |= pattern << 3 & pattern_name_mask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2744 paddress |= (row * 8) << 5 & upper_vcounter_pmask;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2745 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2746 caddress |= pattern >> 3;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2747 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2748 paddress |= pattern << 3 & 0x7F8;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2749 for (uint32_t y = 0; y < 16; y++)
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2750 {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2751 uint8_t bits = context->vdpmem[mode4_address_map[paddress] ^ 1];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2752 if (!(context->regs[REG_MODE_2] & BIT_M1)) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2753 uint8_t colors = context->vdpmem[mode4_address_map[caddress] ^ 1];
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2754 fg = tms_map_color(context, colors >> 4);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2755 bg = tms_map_color(context, colors & 0xF);
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2756 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2757
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2758 pixel_t *curfb = linefb;
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2759 for (uint32_t x = 0; x < pixels; x++)
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2760 {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2761 *(curfb++) = (bits & 0x80) ? fg : bg;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2762 if (x & 1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2763 bits <<= 1;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2764 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2765 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2766 linefb += pitch / sizeof(pixel_t);
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2767 if (y & 1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2768 if (context->regs[REG_MODE_1] & BIT_M3) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2769 caddress++;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2770 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2771 paddress++;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2772 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2773 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2774 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2775 table_address++;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2776 colfb += pixels;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2777 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2778 fb += 16 * pitch / sizeof(pixel_t);
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
2779 }
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2780 }
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2781
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2782 static void sprite_debug_tms(pixel_t *fb, uint32_t pitch, vdp_context *context)
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2783 {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2784 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2785
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2786 static void vdp_update_per_frame_debug(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2787 {
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2788 if (context->enabled_debuggers & (1 << DEBUG_PLANE)) {
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2789
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2790 uint32_t pitch;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2791 pixel_t *fb = render_get_framebuffer(context->debug_fb_indices[DEBUG_PLANE], &pitch);
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2792 if (context->type == VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2793 if ((context->debug_modes[DEBUG_PLANE] & 3) == 3) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2794 sprite_debug_mode5(fb, pitch, context);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2795 } else {
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2796 plane_debug_mode5(fb, pitch, context);
2569
80606ebec74c Add sprite "plane" to VDP plane debugger
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
2797 }
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2798 } else if (context->type != VDP_TMS9918A && (context->regs[REG_MODE_1] & BIT_MODE_4)) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2799 if (context->debug_modes[DEBUG_PLANE] & 1) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2800 sprite_debug_mode4(fb, pitch, context);
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2801 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2802 plane_debug_mode4(fb, pitch, context);
2569
80606ebec74c Add sprite "plane" to VDP plane debugger
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
2803 }
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2804 } else if (context->type != VDP_GENESIS) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2805 if (context->debug_modes[DEBUG_PLANE] & 1) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2806 sprite_debug_tms(fb, pitch, context);
2569
80606ebec74c Add sprite "plane" to VDP plane debugger
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
2807 } else {
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
2808 plane_debug_tms(fb, pitch, context);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2809 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2810 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2811 render_framebuffer_updated(context->debug_fb_indices[DEBUG_PLANE], 1024);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2812 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2813
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2814 if (context->enabled_debuggers & (1 << DEBUG_VRAM)) {
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
2815 uint32_t pitch;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2816 pixel_t *fb = render_get_framebuffer(context->debug_fb_indices[DEBUG_VRAM], &pitch);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2817 if (context->type == VDP_GENESIS && (context->regs[REG_MODE_2] & BIT_MODE_5)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2818 vram_debug_mode5(fb, pitch, context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2819 } else if (context->type != VDP_TMS9918A && (context->regs[REG_MODE_1] & BIT_MODE_4)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2820 vram_debug_mode4(fb, pitch, context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2821 } else if (context->type != VDP_GENESIS) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
2822 vram_debug_tms(fb, pitch, context);
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
2823 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2824 render_framebuffer_updated(context->debug_fb_indices[DEBUG_VRAM], 1024);
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
2825 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2826
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2827 if (context->enabled_debuggers & (1 << DEBUG_CRAM)) {
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2828 uint32_t starting_line = 512 - 32*4;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2829 pixel_t *line = context->debug_fbs[DEBUG_CRAM]
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2830 + context->debug_fb_pitch[DEBUG_CRAM] * starting_line / sizeof(pixel_t);
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2831 pixel_t black = render_map_color(0, 0, 0);
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2832 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2833 for (int pal = 0; pal < 4; pal ++)
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2834 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2835 pixel_t *cur;
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2836 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2837 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2838 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2839 for (int offset = 0; offset < 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2840 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2841 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2842 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2843 *(cur++) = context->colors[pal * 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2844 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2845 *(cur++) = black;
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2846 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2847 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(pixel_t);
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2848 }
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2849 cur = line;
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2850 for (int x = 0; x < 512; x++)
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2851 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2852 *(cur++) = black;
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2853 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2854 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(pixel_t);
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2855 }
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2856 } else {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2857 for (int pal = 0; pal < 2; pal ++)
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2858 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2859 pixel_t *cur;
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2860 for (int y = 0; y < 31; y++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2861 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2862 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2863 for (int offset = MODE4_OFFSET; offset < MODE4_OFFSET + 16; offset++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2864 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2865 for (int x = 0; x < 31; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2866 {
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2867 *(cur++) = context->colors[pal * 16 + offset];
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2868 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2869 *(cur++) = black;
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2870 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2871 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(pixel_t);
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2872 }
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2873 cur = line;
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2874 for (int x = 0; x < 512; x++)
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2875 {
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2876 *(cur++) = black;
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
2877 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2878 line += context->debug_fb_pitch[DEBUG_CRAM] / sizeof(pixel_t);
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2879 }
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2880 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2881 render_framebuffer_updated(context->debug_fb_indices[DEBUG_CRAM], 512);
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2882 context->debug_fbs[DEBUG_CRAM] = render_get_framebuffer(context->debug_fb_indices[DEBUG_CRAM], &context->debug_fb_pitch[DEBUG_CRAM]);
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
2883 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2884 if (context->enabled_debuggers & (1 << DEBUG_COMPOSITE)) {
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2885 render_framebuffer_updated(context->debug_fb_indices[DEBUG_COMPOSITE], LINEBUF_SIZE);
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
2886 context->debug_fbs[DEBUG_COMPOSITE] = render_get_framebuffer(context->debug_fb_indices[DEBUG_COMPOSITE], &context->debug_fb_pitch[DEBUG_COMPOSITE]);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2887 }
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2888 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2889
1629
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2890 void vdp_force_update_framebuffer(vdp_context *context)
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2891 {
1897
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired
Michael Pavone <pavone@retrodev.com>
parents: 1894
diff changeset
2892 if (!context->fb) {
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired
Michael Pavone <pavone@retrodev.com>
parents: 1894
diff changeset
2893 return;
59a83c21d9d2 Fix crash in 68K debugger from forced VDP frame update when framebuffer is not acquired
Michael Pavone <pavone@retrodev.com>
parents: 1894
diff changeset
2894 }
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2895 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2896
1629
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2897 uint16_t to_fill = lines_max - context->output_lines;
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2898 memset(
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2899 ((char *)context->fb) + context->output_pitch * context->output_lines,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2900 0,
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2901 to_fill * context->output_pitch
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2902 );
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2903 render_framebuffer_updated(context->cur_buffer, context->h40_lines > context->output_lines / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2904 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
2905 vdp_update_per_frame_debug(context);
1629
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2906 }
079e5b9d59ce Forcefully update the display when entering the 68K debugger so you can see it update in realtime as you step through the code
Michael Pavone <pavone@retrodev.com>
parents: 1628
diff changeset
2907
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2908 static void advance_output_line(vdp_context *context)
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
2909 {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2910 //This function is kind of gross because of the need to deal with vertical border busting via mode changes
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2911 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2912 uint32_t output_line = context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2913 if (!(context->regs[REG_MODE_2] & BIT_MODE_5)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2914 //vcounter increment occurs much later in Mode 4
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2915 output_line++;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2916 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2917
1899
789746b1a1b3 Fix crash in OD2 Titancade scene when border is completely cropped by overscan settings
Mike Pavone <pavone@retrodev.com>
parents: 1897
diff changeset
2918 if (context->output_lines >= lines_max || (!context->pushed_frame && output_line == context->inactive_start + context->border_top)) {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2919 //we've either filled up a full frame or we're at the bottom of screen in the current defined mode + border crop
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2920 if (!headless) {
1436
40c3be9f1af7 Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents: 1432
diff changeset
2921 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2922 uint8_t is_even = context->flags2 & FLAG2_EVEN_FIELD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2923 if (context->vcounter <= context->inactive_start && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2924 is_even = !is_even;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2925 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2926 context->cur_buffer = is_even ? FRAMEBUFFER_EVEN : FRAMEBUFFER_ODD;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2927 context->pushed_frame = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2928 context->fb = NULL;
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2929 }
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2930 vdp_update_per_frame_debug(context);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2931 context->h40_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2932 context->frame++;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2933 context->output_lines = 0;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2934 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2935
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2936 if (output_line < context->inactive_start + context->border_bot) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2937 if (context->output_lines) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2938 output_line = context->output_lines++;//context->border_top + context->vcounter;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2939 } else if (!output_line && !context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2940 //top border is completely cropped so we won't hit the case below
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2941 output_line = 0;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2942 context->output_lines = 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2943 context->pushed_frame = 0;
2504
593a4f308335 Fix issue that was causing double frame output in Double Dragon 2
Michael Pavone <pavone@retrodev.com>
parents: 2503
diff changeset
2944 } else if (!context->pushed_frame) {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2945 context->output_lines = output_line + 1;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2946 }
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2947 } else if (output_line >= 0x200 - context->border_top) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2948 if (output_line == 0x200 - context->border_top) {
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2949 //We're at the top of the display, force context->output_lines to be zero to avoid
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2950 //potential screen rolling if the mode is changed at an inopportune time
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
2951 context->output_lines = 0;
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2952 context->pushed_frame = 0;
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
2953 }
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2954 output_line = context->output_lines++;//context->vcounter - (0x200 - context->border_top);
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2955 } else {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2956 context->output = NULL;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2957 return;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2958 }
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2959 if (!context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2960 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2961 }
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2962 output_line += context->top_offset;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2963 context->output = (pixel_t *)(((char *)context->fb) + context->output_pitch * output_line);
1271
c865ee5478bc Fix some of the framebuffer fill holes introduced by horizontal border changes
Michael Pavone <pavone@retrodev.com>
parents: 1270
diff changeset
2964 #ifdef DEBUG_FB_FILL
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2965 for (int i = 0; i < LINEBUF_SIZE; i++)
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2966 {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2967 context->output[i] = 0xFFFF00FF;
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2968 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
2969 #endif
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2970 if (context->output && (context->regs[REG_MODE_4] & BIT_H40)) {
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2971 context->h40_lines++;
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
2972 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2973 }
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
2974
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2975 void vdp_release_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2976 {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2977 if (context->fb) {
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2978 render_framebuffer_updated(context->cur_buffer, context->h40_lines > (context->inactive_start + context->border_top) / 2 ? LINEBUF_SIZE : (256+HORIZ_BORDER));
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2979 context->output = context->fb = NULL;
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2980 }
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2981 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2982
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2983 void vdp_reacquire_framebuffer(vdp_context *context)
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2984 {
1881
55198fc9cc1f Don't render lines that are cropped by overscan. Allows submitting frame earlier when bottom overscan is non-zero which can reduce latency in some cases
Mike Pavone <pavone@retrodev.com>
parents: 1878
diff changeset
2985 uint16_t lines_max = context->inactive_start + context->border_bot + context->border_top;
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2986 if (context->output_lines <= lines_max && context->output_lines > 0) {
1891
179a2ac29f27 Wait to reacquire framebuffer so that switching to UI does not require pushing a new frame if it happens in between bottom and top of display
Michael Pavone <pavone@retrodev.com>
parents: 1888
diff changeset
2987 context->fb = render_get_framebuffer(context->cur_buffer, &context->output_pitch);
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
2988 context->output = (pixel_t *)(((char *)context->fb) + context->output_pitch * (context->output_lines - 1 + context->top_offset));
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2989 } else {
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
2990 context->output = NULL;
1401
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2991 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2992 }
b56c8c51ca5d Properly release and reacquire framebuffer pointer when switching contexts. Hopefully fixes the LOCKRECT issue some people are seeing with the SDL 2 fallback renderer
Michael Pavone <pavone@retrodev.com>
parents: 1385
diff changeset
2993
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2994 static void render_border_garbage(vdp_context *context, uint32_t address, uint8_t *buf, uint8_t buf_off, uint16_t col)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2995 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2996 uint8_t base = col >> 9 & 0x30;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2997 for (int i = 0; i < 4; i++, address++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2998 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
2999 uint8_t byte = context->vdpmem[address & 0xFFFF];
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3000 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte >> 4;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3001 buf[(buf_off++) & SCROLL_BUFFER_MASK] = base | byte & 0xF;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3002 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3003 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3004
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3005 static void draw_right_border(vdp_context *context)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3006 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3007 uint8_t *dst = context->compositebuf + BORDER_LEFT + ((context->regs[REG_MODE_4] & BIT_H40) ? 320 : 256);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3008 uint8_t pixel = context->regs[REG_BG_COLOR] & 0x3F;
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
3009 if ((context->test_regs[0] & TEST_BIT_DISABLE) != 0) {
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3010 pixel = 0x3F;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3011 }
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
3012 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3013 if (test_layer) {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3014 switch(test_layer)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3015 {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3016 case 1:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3017 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3018 dst += BORDER_RIGHT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3019 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3020 case 2: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3021 //plane A
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3022 //TODO: Deal with Window layer
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3023 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3024 i = 0;
1888
bd60e74fd173 Fix regression in H32 from fine scroll optimization
Michael Pavone <pavone@retrodev.com>
parents: 1887
diff changeset
3025 uint8_t buf_off = context->buf_a_off - context->hscroll_a_fine;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3026 //uint8_t *src = context->tmp_buf_a + ((context->buf_a_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_a & 0xF))) & SCROLL_BUFFER_MASK);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3027 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3028 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3029 *dst = context->tmp_buf_a[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3030 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3031 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3032 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3033 case 3: {
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3034 //plane B
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3035 int i;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3036 i = 0;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3037 uint8_t buf_off = context->buf_b_off - (context->hscroll_b & 0xF);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3038 //uint8_t *src = context->tmp_buf_b + ((context->buf_b_off + (i ? 0 : (16 - BORDER_LEFT) - (context->hscroll_b & 0xF))) & SCROLL_BUFFER_MASK);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3039 for (; i < BORDER_RIGHT; buf_off++, i++, dst++)
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3040 {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3041 *dst = context->tmp_buf_b[buf_off & SCROLL_BUFFER_MASK] & 0x3F;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3042 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3043 break;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3044 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3045 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3046 } else {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3047 memset(dst, 0, BORDER_RIGHT);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3048 dst += BORDER_RIGHT;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3049 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3050 context->done_composite = dst;
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3051 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3052 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3053 }
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3054
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3055 #define CHECK_ONLY if (context->cycles >= target_cycles) { return; }
924
1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents: 923
diff changeset
3056 #define CHECK_LIMIT if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } context->hslot++; context->cycles += slot_cycles; CHECK_ONLY
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3057 #define OUTPUT_PIXEL(slot) if ((slot) >= BG_START_SLOT) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3058 uint8_t *src = context->compositebuf + ((slot) - BG_START_SLOT) *2;\
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
3059 pixel_t *dst = context->output + ((slot) - BG_START_SLOT) *2;\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3060 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3061 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3062 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3063 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3064 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3065 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3066 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3067 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3068 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3069 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3070 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3071
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3072 #define OUTPUT_PIXEL_H40(slot) if (slot <= (BG_START_SLOT + LINEBUF_SIZE/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3073 uint8_t *src = context->compositebuf + (slot - BG_START_SLOT) *2;\
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
3074 pixel_t *dst = context->output + (slot - BG_START_SLOT) *2;\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3075 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3076 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3077 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3078 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3079 }\
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
3080 if (slot == (BG_START_SLOT + LINEBUF_SIZE/2)) {\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
3081 context->done_composite = NULL;\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
3082 } else {\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3083 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3084 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3085 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3086 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3087 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3088 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3089 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3090
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3091 #define OUTPUT_PIXEL_H32(slot) if (slot <= (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3092 uint8_t *src = context->compositebuf + (slot - BG_START_SLOT) *2;\
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
3093 pixel_t *dst = context->output + (slot - BG_START_SLOT) *2;\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3094 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3095 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3096 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3097 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3098 }\
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
3099 if (slot == (BG_START_SLOT + (256+HORIZ_BORDER)/2)) {\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
3100 context->done_composite = NULL;\
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
3101 } else {\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3102 if ((*src & 0x3F) | test_layer) {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3103 *(dst++) = context->colors[*(src++)];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3104 } else {\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3105 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3106 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3107 }\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3108 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3109
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3110 //BG_START_SLOT => dst = 0, src = border
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3111 //BG_START_SLOT + 13/2=6, dst = 6, src = border + comp + 13
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3112 #define OUTPUT_PIXEL_MODE4(slot) if ((slot) >= BG_START_SLOT) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3113 uint8_t *src = context->compositebuf + ((slot) - BG_START_SLOT) *2;\
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
3114 pixel_t *dst = context->output + ((slot) - BG_START_SLOT) *2;\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3115 if ((slot) - BG_START_SLOT < BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3116 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3117 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3118 } else if ((slot) - BG_START_SLOT < (BORDER_LEFT+256)/2){\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3119 if ((slot) - BG_START_SLOT == BORDER_LEFT/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3120 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3121 src++;\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3122 } else {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3123 *(dst++) = context->colors[*(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3124 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3125 *(dst++) = context->colors[*(src++)];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3126 } else if ((slot) - BG_START_SLOT <= (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3127 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3128 if ((slot) - BG_START_SLOT < (HORIZ_BORDER+256)/2) {\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3129 *(dst++) = context->colors[bgindex];\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3130 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3131 }\
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3132 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3133
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3134 #define COLUMN_RENDER_BLOCK(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3135 case startcyc:\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3136 OUTPUT_PIXEL(startcyc)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3137 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3138 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3139 case ((startcyc+1)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3140 OUTPUT_PIXEL((startcyc+1)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3141 external_slot(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3142 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3143 case ((startcyc+2)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3144 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3145 render_map_1(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3146 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3147 case ((startcyc+3)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3148 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3149 render_map_2(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3150 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3151 case ((startcyc+4)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3152 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3153 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3154 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3155 case ((startcyc+5)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3156 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3157 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3158 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3159 case ((startcyc+6)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3160 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3161 render_map_3(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3162 CHECK_LIMIT\
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3163 case ((startcyc+7)&0xFF):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3164 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3165 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3166 CHECK_LIMIT
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3167
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3168 #define COLUMN_RENDER_BLOCK_REFRESH(column, startcyc) \
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3169 case startcyc:\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3170 OUTPUT_PIXEL(startcyc)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3171 read_map_scroll_a(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3172 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3173 case (startcyc+1):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3174 /* refresh, so don't run dma src */\
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3175 OUTPUT_PIXEL((startcyc+1)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3176 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3177 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3178 CHECK_ONLY\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3179 case (startcyc+2):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3180 OUTPUT_PIXEL((startcyc+2)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3181 render_map_1(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3182 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3183 case (startcyc+3):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3184 OUTPUT_PIXEL((startcyc+3)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3185 render_map_2(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3186 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3187 case (startcyc+4):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3188 OUTPUT_PIXEL((startcyc+4)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3189 read_map_scroll_b(column, context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3190 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3191 case (startcyc+5):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3192 OUTPUT_PIXEL((startcyc+5)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3193 read_sprite_x(context->vcounter, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3194 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3195 case (startcyc+6):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3196 OUTPUT_PIXEL((startcyc+6)&0xFF)\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3197 render_map_3(context);\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3198 CHECK_LIMIT\
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3199 case (startcyc+7):\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3200 OUTPUT_PIXEL((startcyc+7)&0xFF)\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3201 render_map_output(context->vcounter, column, context);\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3202 CHECK_LIMIT
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3203
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3204 #define COLUMN_RENDER_BLOCK_PHONY(column, startcyc) \
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3205 case startcyc:\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3206 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3207 case ((startcyc+1)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3208 external_slot(context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3209 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3210 case ((startcyc+2)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3211 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3212 case ((startcyc+3)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3213 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3214 case ((startcyc+4)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3215 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3216 case ((startcyc+5)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3217 read_sprite_x(context->vcounter, context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3218 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3219 case ((startcyc+6)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3220 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3221 case ((startcyc+7)&0xFF):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3222 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3223
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3224 #define COLUMN_RENDER_BLOCK_REFRESH_PHONY(column, startcyc) \
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3225 case startcyc:\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3226 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3227 case (startcyc+1):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3228 /* refresh, so don't run dma src */\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3229 context->hslot++;\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3230 context->cycles += slot_cycles;\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3231 CHECK_ONLY\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3232 case (startcyc+2):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3233 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3234 case (startcyc+3):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3235 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3236 case (startcyc+4):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3237 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3238 case (startcyc+5):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3239 read_sprite_x(context->vcounter, context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3240 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3241 case (startcyc+6):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3242 CHECK_LIMIT\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3243 case (startcyc+7):\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3244 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3245
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3246 #define COLUMN_RENDER_BLOCK_MODE4(column, startcyc) \
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3247 case startcyc:\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3248 OUTPUT_PIXEL_MODE4(startcyc)\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3249 read_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3250 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3251 case ((startcyc+1)&0xFF):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3252 OUTPUT_PIXEL_MODE4((startcyc+1)&0xFF)\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3253 if (column & 3) {\
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3254 scan_sprite_table_mode4(context);\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3255 } else {\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3256 external_slot(context);\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3257 }\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3258 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3259 case ((startcyc+2)&0xFF):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3260 OUTPUT_PIXEL_MODE4((startcyc+2)&0xFF)\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3261 fetch_map_mode4(column, context->vcounter, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3262 CHECK_LIMIT\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3263 case ((startcyc+3)&0xFF):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3264 OUTPUT_PIXEL_MODE4((startcyc+3)&0xFF)\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3265 render_map_mode4(context->vcounter, column, context);\
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3266 CHECK_LIMIT
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3267
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3268 #define CHECK_LIMIT_HSYNC(slot) \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3269 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3270 if (slot >= HSYNC_SLOT_H40 && slot < HSYNC_END_H40) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3271 context->cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3272 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3273 context->cycles += slot_cycles;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3274 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3275 if (slot == 182) {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3276 context->hslot = 229;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3277 } else {\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3278 context->hslot++;\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3279 }\
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3280 CHECK_ONLY
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
3281
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3282 #define SPRITE_RENDER_H40(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3283 case slot:\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3284 OUTPUT_PIXEL_H40(slot)\
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
3285 if ((slot) == BG_START_SLOT + LINEBUF_SIZE/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
3286 advance_output_line(context);\
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3287 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3288 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3289 }\
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
3290 }\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3291 render_sprite_cells( context);\
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3292 if (slot == 168 || slot == 247 || slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3293 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3294 context,\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3295 context->serial_address,\
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3296 context->tmp_buf_b,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3297 context->buf_b_off + (slot == 247 ? 0 : 8),\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3298 slot == 247 ? context->col_1 : context->col_2\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3299 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3300 if (slot == 248) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3301 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3302 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3303 }\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3304 } else if (slot == 243) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3305 render_border_garbage(\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3306 context,\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3307 context->serial_address,\
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3308 context->tmp_buf_a,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3309 context->buf_a_off,\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3310 context->col_1\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3311 );\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3312 } else if (slot == 169) {\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3313 draw_right_border(context);\
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3314 }\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3315 scan_sprite_table(context->vcounter, context);\
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3316 CHECK_LIMIT_HSYNC(slot)
884
252dfd29831d Selecting a second game from the menu now works
Michael Pavone <pavone@retrodev.com>
parents: 822
diff changeset
3317
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3318 #define SPRITE_RENDER_H40_PHONY(slot) \
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3319 case slot:\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3320 render_sprite_cells( context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3321 scan_sprite_table(context->vcounter, context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3322 CHECK_LIMIT_HSYNC(slot)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3323
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
3324 //Note that the line advancement check will fail if BG_START_SLOT is > 6
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
3325 //as we're bumping up against the hcounter jump
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3326 #define SPRITE_RENDER_H32(slot) \
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3327 case slot:\
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3328 OUTPUT_PIXEL_H32(slot)\
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
3329 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
3330 advance_output_line(context);\
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3331 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3332 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3333 }\
1272
be509813b2f2 Fill in the rest of the framebuffer holes created by horizontal border. Work remains for things to be seemless when display gets turned on and off mid frame
Michael Pavone <pavone@retrodev.com>
parents: 1271
diff changeset
3334 }\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3335 render_sprite_cells( context);\
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3336 if (slot == 136 || slot == 247 || slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3337 render_border_garbage(\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3338 context,\
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3339 context->serial_address,\
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3340 context->tmp_buf_b,\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3341 context->buf_b_off + (slot == 247 ? 0 : 8),\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3342 slot == 247 ? context->col_1 : context->col_2\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3343 );\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3344 if (slot == 248) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3345 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3346 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3347 }\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3348 } else if (slot == 137) {\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3349 draw_right_border(context);\
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
3350 }\
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3351 scan_sprite_table(context->vcounter, context);\
924
1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents: 923
diff changeset
3352 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3353 if (slot == 147) {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3354 context->hslot = 233;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3355 } else {\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3356 context->hslot++;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3357 }\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3358 context->cycles += slot_cycles;\
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3359 CHECK_ONLY
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3360
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3361 #define SPRITE_RENDER_H32_PHONY(slot) \
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3362 case slot:\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3363 render_sprite_cells( context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3364 scan_sprite_table(context->vcounter, context);\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3365 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3366 if (slot == 147) {\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3367 context->hslot = 233;\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3368 } else {\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3369 context->hslot++;\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3370 }\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3371 context->cycles += slot_cycles;\
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3372 CHECK_ONLY
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3373
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3374 #define MODE4_CHECK_SLOT_LINE(slot) \
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3375 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); } \
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
3376 if ((slot) == BG_START_SLOT + (256+HORIZ_BORDER)/2) {\
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
3377 advance_output_line(context);\
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3378 if (!context->output) {\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3379 context->output = dummy_buffer;\
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3380 }\
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
3381 }\
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3382 if ((slot) == 147) {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3383 context->hslot = 233;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3384 } else {\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3385 context->hslot++;\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3386 }\
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3387 context->cycles += slot_cycles;\
1163
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
3388 if ((slot+1) == LINE_CHANGE_MODE4) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
3389 vdp_advance_line(context);\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
3390 if (context->vcounter == 192) {\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
3391 return;\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
3392 }\
b251899f2b97 Fix disagreement on line change location between vdp_h32_mode4 and vdp_run_context that was causing the first line to be garbage in some cases
Michael Pavone <pavone@retrodev.com>
parents: 1161
diff changeset
3393 }\
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3394 CHECK_ONLY
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3395
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3396 #define CALC_SLOT(slot, increment) ((slot+increment) > 147 && (slot+increment) < 233 ? (slot+increment-148+233): (slot+increment))
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3397
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3398 #define SPRITE_RENDER_H32_MODE4(slot) \
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3399 case slot:\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3400 OUTPUT_PIXEL_MODE4(slot)\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3401 read_sprite_x_mode4(context);\
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
3402 MODE4_CHECK_SLOT_LINE(slot)\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3403 case CALC_SLOT(slot, 1):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3404 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 1))\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3405 read_sprite_x_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3406 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot,1))\
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3407 case CALC_SLOT(slot, 2):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3408 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 2))\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3409 fetch_sprite_cells_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3410 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 2))\
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3411 case CALC_SLOT(slot, 3):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3412 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 3))\
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
3413 render_sprite_cells_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3414 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 3))\
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3415 case CALC_SLOT(slot, 4):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3416 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 4))\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3417 fetch_sprite_cells_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3418 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 4))\
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3419 case CALC_SLOT(slot, 5):\
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
3420 OUTPUT_PIXEL_MODE4(CALC_SLOT(slot, 5))\
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
3421 render_sprite_cells_mode4(context);\
1161
c2210d586950 A bunch of Mode 4 fixes
Michael Pavone <pavone@retrodev.com>
parents: 1160
diff changeset
3422 MODE4_CHECK_SLOT_LINE(CALC_SLOT(slot, 5))
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3423
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
3424 static pixel_t dummy_buffer[LINEBUF_SIZE];
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3425 static void vdp_h40_line(vdp_context * context)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3426 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3427 uint16_t address;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3428 uint32_t mask;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3429 uint32_t const slot_cycles = MCLKS_SLOT_H40;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3430 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
3431 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3432
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3433 //165
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3434 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3435 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3436 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3437 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3438 //pretty consistently
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3439 context->vscroll_latch[0] = context->vsram[0];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3440 context->vscroll_latch[1] = context->vsram[1];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3441 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3442 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3443 //166
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3444 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3445 //167
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3446 context->sprite_index = 0x80;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3447 context->slot_counter = 0;
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3448 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3449 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3450 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3451 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3452 context->tmp_buf_b, context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3453 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3454 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3455 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3456 //168
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3457 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3458 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3459 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3460 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3461 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3462 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3463 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3464 );
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3465 scan_sprite_table(context->vcounter, context);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3466
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3467 //Do palette lookup for end of previous line
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3468 uint8_t *src = context->compositebuf + (LINE_CHANGE_H40 - BG_START_SLOT) *2;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
3469 pixel_t *dst = context->output + (LINE_CHANGE_H40 - BG_START_SLOT) *2;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3470 if (context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3471 if (test_layer) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3472 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3473 {
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3474 *(dst++) = context->colors[*(src++)];
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3475 }
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3476 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3477 for (int i = 0; i < LINEBUF_SIZE - (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3478 {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3479 if (*src & 0x3F) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3480 *(dst++) = context->colors[*(src++)];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3481 } else {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3482 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3483 }
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3484 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3485 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3486 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3487 advance_output_line(context);
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3488 //169-242 (inclusive)
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3489 for (int i = 0; i < 27; i++)
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3490 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3491 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3492 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3493 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3494 //243
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3495 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3496 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3497 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3498 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3499 context->tmp_buf_a,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3500 context->buf_a_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3501 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3502 );
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3503 scan_sprite_table(context->vcounter, context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3504 //244
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3505 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3506 mask = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3507 if (context->regs[REG_MODE_3] & 0x2) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3508 mask |= 0xF8;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3509 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3510 if (context->regs[REG_MODE_3] & 0x1) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3511 mask |= 0x7;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3512 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3513 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3514 address += (context->vcounter & mask) * 4;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3515 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
3516 context->hscroll_a_fine = context->hscroll_a & 0xF;
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3517 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
3518 context->hscroll_b_fine = context->hscroll_b & 0xF;
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3519 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3520 //243-246 inclusive
1877
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3521 for (int i = 0; i < 3; i++)
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3522 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3523 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3524 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3525 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3526 //247
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3527 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3528 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3529 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3530 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3531 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3532 context->buf_b_off,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3533 context->col_1
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3534 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3535 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3536 //248
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3537
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3538 render_sprite_cells(context);
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3539 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3540 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3541 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3542 context->tmp_buf_b,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3543 context->buf_b_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3544 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3545 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3546 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3547 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3548 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_MASK;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3549 //250
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3550 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3551 scan_sprite_table(context->vcounter, context);
1877
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3552 //251
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3553 scan_sprite_table(context->vcounter, context);//Just a guess
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3554 //252
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3555 scan_sprite_table(context->vcounter, context);//Just a guess
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3556 //254
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3557 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3558 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3559 //255
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3560 scan_sprite_table(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3561 //0
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3562 scan_sprite_table(context->vcounter, context);//Just a guess
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3563 //seems like the sprite table scan fills a shift register
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3564 //values are FIFO, but unused slots precede used slots
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3565 //so we set cur_slot to slot_counter and let it wrap around to
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3566 //the beginning of the list
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3567 context->cur_slot = context->slot_counter;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3568 context->sprite_x_offset = 0;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3569 context->sprite_draws = MAX_SPRITES_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3570 //background planes and layer compositing
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3571 for (int col = 0; col < 42; col+=2)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3572 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3573 read_map_scroll_a(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3574 render_map_1(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3575 render_map_2(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3576 read_map_scroll_b(col, context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3577 render_map_3(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3578 render_map_output(context->vcounter, col, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3579 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3580 //sprite rendering phase 2
1877
9486236f28ac Fix sprite rendering regression introduced by H40 line at a time optimization
Michael Pavone <pavone@retrodev.com>
parents: 1875
diff changeset
3581 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3582 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3583 read_sprite_x(context->vcounter, context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3584 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3585 //163
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3586 context->cur_slot = MAX_SPRITES_LINE-1;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3587 memset(context->linebuf, 0, LINEBUF_SIZE);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3588 context->flags &= ~FLAG_MASKED;
2564
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3589 while (context->sprite_draws) {
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3590 context->sprite_draws--;
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3591 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
2563
f51d750b4d06 Fix sprite overflow regression in Super Hang-On and other games
Michael Pavone <pavone@retrodev.com>
parents: 2559
diff changeset
3592 }
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3593 render_sprite_cells(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3594 render_border_garbage(
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3595 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3596 context->serial_address,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3597 context->tmp_buf_a, context->buf_a_off,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3598 context->col_1
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3599 );
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3600 //164
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3601 render_sprite_cells(context);
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3602 render_border_garbage(
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3603 context,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3604 context->serial_address,
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3605 context->tmp_buf_a, context->buf_a_off + 8,
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3606 context->col_2
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3607 );
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3608 context->cycles += MCLKS_LINE;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3609 vdp_advance_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3610 src = context->compositebuf;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3611 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3612 return;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3613 }
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3614 dst = context->output;
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3615 if (test_layer) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3616 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3617 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3618 *(dst++) = context->colors[*(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3619 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3620 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3621 for (int i = 0; i < (LINE_CHANGE_H40 - BG_START_SLOT) * 2; i++)
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3622 {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3623 if (*src & 0x3F) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3624 *(dst++) = context->colors[*(src++)];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3625 } else {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3626 *(dst++) = context->colors[(*(src++) & 0xC0) | bgindex];
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3627 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3628 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3629 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3630 }
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
3631 static void vdp_h40(vdp_context * context, uint32_t target_cycles)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3632 {
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3633 uint16_t address;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3634 uint32_t mask;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3635 uint32_t const slot_cycles = MCLKS_SLOT_H40;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3636 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
3637 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3638 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3639 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3640 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3641 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
3642 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3643 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3644 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3645 for (;;)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3646 {
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3647 case 165:
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3648 //only consider doing a line at a time if the FIFO is empty, there are no pending reads and there is no DMA running
1925
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
3649 if (context->fifo_read == -1 && !(context->flags & FLAG_DMA_RUN) && ((context->cd & 1) || (context->flags & FLAG_READ_FETCHED))) {
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3650 while (target_cycles - context->cycles >= MCLKS_LINE && context->state != PREPARING && context->vcounter != context->inactive_start) {
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3651 vdp_h40_line(context);
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3652 }
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3653 CHECK_ONLY
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3654 if (!context->output) {
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3655 //This shouldn't happen normally, but it can theoretically
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3656 //happen when doing border busting
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3657 context->output = dummy_buffer;
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
3658 }
1874
cae2b55d683f Draw entire lines in H40 mode when possible. Still seems to have an edge case or two, but mostly working well
Michael Pavone <pavone@retrodev.com>
parents: 1873
diff changeset
3659 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3660 OUTPUT_PIXEL(165)
1432
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3661 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3662 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3663 //See note in vdp_h32 for why this was originally moved out of read_map_scroll
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3664 //Skitchin' has a similar problem, but uses H40 mode. It seems to be able to hit the extern slot at 232
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3665 //pretty consistently
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3666 context->vscroll_latch[0] = context->vsram[0];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3667 context->vscroll_latch[1] = context->vsram[1];
5e7e6d9b79ff Move vscroll latch further forward in H40 mode. Fixes a minor graphical glitch in Skitchin. Needs a proper test ROM to verify exact latch position
Michael Pavone <pavone@retrodev.com>
parents: 1431
diff changeset
3668 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
3669 if (context->state == PREPARING) {
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3670 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3671 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3672 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3673 }
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3674 CHECK_LIMIT
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3675 case 166:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3676 OUTPUT_PIXEL(166)
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
3677 if (context->state == PREPARING) {
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3678 external_slot(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3679 } else {
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3680 render_sprite_cells(context);
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3681 }
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3682 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3683 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3684 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3685 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3686 }
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3687 CHECK_LIMIT
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3688 //sprite attribute table scan starts
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3689 case 167:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3690 OUTPUT_PIXEL(167)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3691 context->sprite_index = 0x80;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3692 context->slot_counter = 0;
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3693 render_sprite_cells(context);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3694 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3695 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3696 context->serial_address,
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3697 context->tmp_buf_b, context->buf_b_off,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3698 context->col_1
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3699 );
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3700 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3701 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3702 SPRITE_RENDER_H40(168)
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3703 SPRITE_RENDER_H40(169)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3704 SPRITE_RENDER_H40(170)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3705 SPRITE_RENDER_H40(171)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3706 SPRITE_RENDER_H40(172)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3707 SPRITE_RENDER_H40(173)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3708 SPRITE_RENDER_H40(174)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3709 SPRITE_RENDER_H40(175)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3710 SPRITE_RENDER_H40(176)
1365
6dd2c3edd0b5 Add a bit of a hack to HINT start cycle to give correct values in my test ROM and further improve prevelance of CRAM dot noise in Outrunners and OD2
Michael Pavone <pavone@retrodev.com>
parents: 1362
diff changeset
3711 SPRITE_RENDER_H40(177)//End of border?
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3712 SPRITE_RENDER_H40(178)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3713 SPRITE_RENDER_H40(179)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3714 SPRITE_RENDER_H40(180)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3715 SPRITE_RENDER_H40(181)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3716 SPRITE_RENDER_H40(182)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3717 SPRITE_RENDER_H40(229)
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3718 //!HSYNC asserted
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3719 SPRITE_RENDER_H40(230)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3720 SPRITE_RENDER_H40(231)
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3721 case 232:
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3722 external_slot(context);
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3723 CHECK_LIMIT_HSYNC(232)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3724 SPRITE_RENDER_H40(233)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3725 SPRITE_RENDER_H40(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3726 SPRITE_RENDER_H40(235)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3727 SPRITE_RENDER_H40(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3728 SPRITE_RENDER_H40(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3729 SPRITE_RENDER_H40(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3730 SPRITE_RENDER_H40(239)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3731 SPRITE_RENDER_H40(240)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3732 SPRITE_RENDER_H40(241)
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3733 SPRITE_RENDER_H40(242)
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3734 SPRITE_RENDER_H40(243) //provides "garbage" for border when plane A selected
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3735 case 244:
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3736 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3737 mask = 0;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3738 if (context->regs[REG_MODE_3] & 0x2) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3739 mask |= 0xF8;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3740 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3741 if (context->regs[REG_MODE_3] & 0x1) {
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3742 mask |= 0x7;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3743 }
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3744 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3745 address += (context->vcounter & mask) * 4;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3746 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
3747 context->hscroll_a_fine = context->hscroll_a & 0xF;
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3748 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
3749 context->hscroll_b_fine = context->hscroll_b & 0xF;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3750 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
924
1b86268a4cb3 Change the sentinel value for the hslot parameter of run_dma_src to something that is not a valid slot number and actually use it for calls during the active display period
Michael Pavone <pavone@retrodev.com>
parents: 923
diff changeset
3751 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3752 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3753 context->cycles += h40_hsync_cycles[14];
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3754 CHECK_ONLY //provides "garbage" for border when plane A selected
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3755 //!HSYNC high
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3756 SPRITE_RENDER_H40(245)
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3757 SPRITE_RENDER_H40(246)
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3758 SPRITE_RENDER_H40(247) //provides "garbage" for border when plane B selected
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3759 SPRITE_RENDER_H40(248) //provides "garbage" for border when plane B selected
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3760 case 249:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3761 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3762 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3763 SPRITE_RENDER_H40(250)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3764 case 251:
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3765 render_map_1(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3766 scan_sprite_table(context->vcounter, context);//Just a guess
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3767 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3768 case 252:
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3769 render_map_2(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3770 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3771 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3772 case 253:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3773 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3774 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3775 SPRITE_RENDER_H40(254)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3776 case 255:
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3777 render_map_3(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3778 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3779 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3780 case 0:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3781 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3782 scan_sprite_table(context->vcounter, context);//Just a guess
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3783 //seems like the sprite table scan fills a shift register
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3784 //values are FIFO, but unused slots precede used slots
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3785 //so we set cur_slot to slot_counter and let it wrap around to
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3786 //the beginning of the list
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
3787 context->cur_slot = context->slot_counter;
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
3788 context->sprite_x_offset = 0;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3789 context->sprite_draws = MAX_SPRITES_LINE;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3790 CHECK_LIMIT
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3791 COLUMN_RENDER_BLOCK(2, 1)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3792 COLUMN_RENDER_BLOCK(4, 9)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3793 COLUMN_RENDER_BLOCK(6, 17)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3794 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3795 COLUMN_RENDER_BLOCK(10, 33)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3796 COLUMN_RENDER_BLOCK(12, 41)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3797 COLUMN_RENDER_BLOCK(14, 49)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3798 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3799 COLUMN_RENDER_BLOCK(18, 65)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3800 COLUMN_RENDER_BLOCK(20, 73)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3801 COLUMN_RENDER_BLOCK(22, 81)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3802 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3803 COLUMN_RENDER_BLOCK(26, 97)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3804 COLUMN_RENDER_BLOCK(28, 105)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3805 COLUMN_RENDER_BLOCK(30, 113)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3806 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3807 COLUMN_RENDER_BLOCK(34, 129)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3808 COLUMN_RENDER_BLOCK(36, 137)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3809 COLUMN_RENDER_BLOCK(38, 145)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3810 COLUMN_RENDER_BLOCK_REFRESH(40, 153)
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3811 case 161:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3812 OUTPUT_PIXEL(161)
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3813 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3814 CHECK_LIMIT
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
3815 case 162:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3816 OUTPUT_PIXEL(162)
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3817 external_slot(context);
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3818 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3819 //sprite render to line buffer starts
1157
d5dda22ae6b4 Fix H40 slot mapping to better match old VRAM bus captures and adjust for recent VCounter measurements
Michael Pavone <pavone@retrodev.com>
parents: 1156
diff changeset
3820 case 163:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3821 OUTPUT_PIXEL(163)
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3822 context->cur_slot = MAX_SPRITES_LINE-1;
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3823 memset(context->linebuf, 0, LINEBUF_SIZE);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
3824 context->flags &= ~FLAG_MASKED;
2564
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3825 while (context->sprite_draws) {
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3826 context->sprite_draws--;
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
3827 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
2563
f51d750b4d06 Fix sprite overflow regression in Super Hang-On and other games
Michael Pavone <pavone@retrodev.com>
parents: 2559
diff changeset
3828 }
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3829 render_sprite_cells(context);
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3830 render_border_garbage(
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3831 context,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3832 context->serial_address,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3833 context->tmp_buf_a, context->buf_a_off,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3834 context->col_1
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3835 );
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3836 CHECK_LIMIT
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3837 case 164:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
3838 OUTPUT_PIXEL(164)
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3839 render_sprite_cells(context);
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3840 render_border_garbage(
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3841 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
3842 context->serial_address,
1337
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3843 context->tmp_buf_a, context->buf_a_off + 8,
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3844 context->col_2
d092c15246a3 Initial stab at horizontal border when VDP test register layer selection is in effect for H40. Extended horizontal borders in Titancade scene and ninja escape scene mostly correct now
Michael Pavone <pavone@retrodev.com>
parents: 1335
diff changeset
3845 );
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3846 if (context->flags & FLAG_DMA_RUN) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3847 run_dma_src(context, -1);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3848 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3849 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3850 context->cycles += slot_cycles;
922
913a6336ce20 Shift slot number to slot behavior mapping by six slots in H40 mode. This makes the line change slot align with the point at which the display turns on and off at the end of the active display area. Also fixed a regression in which an external slot got accidentally changed into a sprite draw slot
Michael Pavone <pavone@retrodev.com>
parents: 921
diff changeset
3851 vdp_advance_line(context);
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
3852 CHECK_ONLY
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3853 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3854 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3855 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3856 context->cycles += slot_cycles;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3857 return;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
3858 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3859 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
3860
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3861 static void vdp_h40_phony(vdp_context * context, uint32_t target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3862 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3863 uint32_t const slot_cycles = MCLKS_SLOT_H40;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3864 switch(context->hslot)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3865 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3866 for (;;)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3867 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3868 case 165:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3869 if (context->state == PREPARING) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3870 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3871 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3872 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3873 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3874 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3875 case 166:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3876 if (context->state == PREPARING) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3877 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3878 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3879 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3880 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3881 if (context->vcounter == context->inactive_start) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3882 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3883 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3884 return;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3885 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3886 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3887 //sprite attribute table scan starts
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3888 case 167:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3889 context->sprite_index = 0x80;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3890 context->slot_counter = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3891 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3892 scan_sprite_table(context->vcounter, context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3893 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3894 SPRITE_RENDER_H40_PHONY(168)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3895 SPRITE_RENDER_H40_PHONY(169)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3896 SPRITE_RENDER_H40_PHONY(170)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3897 SPRITE_RENDER_H40_PHONY(171)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3898 SPRITE_RENDER_H40_PHONY(172)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3899 SPRITE_RENDER_H40_PHONY(173)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3900 SPRITE_RENDER_H40_PHONY(174)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3901 SPRITE_RENDER_H40_PHONY(175)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3902 SPRITE_RENDER_H40_PHONY(176)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3903 SPRITE_RENDER_H40_PHONY(177)//End of border?
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3904 SPRITE_RENDER_H40_PHONY(178)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3905 SPRITE_RENDER_H40_PHONY(179)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3906 SPRITE_RENDER_H40_PHONY(180)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3907 SPRITE_RENDER_H40_PHONY(181)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3908 SPRITE_RENDER_H40_PHONY(182)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3909 SPRITE_RENDER_H40_PHONY(229)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3910 //!HSYNC asserted
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3911 SPRITE_RENDER_H40_PHONY(230)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3912 SPRITE_RENDER_H40_PHONY(231)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3913 case 232:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3914 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3915 CHECK_LIMIT_HSYNC(232)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3916 SPRITE_RENDER_H40_PHONY(233)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3917 SPRITE_RENDER_H40_PHONY(234)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3918 SPRITE_RENDER_H40_PHONY(235)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3919 SPRITE_RENDER_H40_PHONY(236)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3920 SPRITE_RENDER_H40_PHONY(237)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3921 SPRITE_RENDER_H40_PHONY(238)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3922 SPRITE_RENDER_H40_PHONY(239)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3923 SPRITE_RENDER_H40_PHONY(240)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3924 SPRITE_RENDER_H40_PHONY(241)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3925 SPRITE_RENDER_H40_PHONY(242)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3926 SPRITE_RENDER_H40_PHONY(243) //provides "garbage" for border when plane A selected
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3927 case 244:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3928 if (context->flags & FLAG_DMA_RUN) { run_dma_src(context, -1); }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3929 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3930 context->cycles += h40_hsync_cycles[14];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3931 CHECK_ONLY //provides "garbage" for border when plane A selected
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3932 //!HSYNC high
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3933 SPRITE_RENDER_H40_PHONY(245)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3934 SPRITE_RENDER_H40_PHONY(246)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3935 SPRITE_RENDER_H40_PHONY(247) //provides "garbage" for border when plane B selected
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3936 SPRITE_RENDER_H40_PHONY(248) //provides "garbage" for border when plane B selected
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3937 case 249:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3938 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3939 SPRITE_RENDER_H40_PHONY(250)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3940 case 251:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3941 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3942 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3943 case 252:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3944 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3945 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3946 case 253:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3947 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3948 SPRITE_RENDER_H40_PHONY(254)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3949 case 255:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3950 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3951 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3952 case 0:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3953 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3954 //seems like the sprite table scan fills a shift register
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3955 //values are FIFO, but unused slots precede used slots
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3956 //so we set cur_slot to slot_counter and let it wrap around to
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3957 //the beginning of the list
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3958 context->cur_slot = context->slot_counter;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3959 context->sprite_x_offset = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3960 context->sprite_draws = MAX_SPRITES_LINE;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3961 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3962 COLUMN_RENDER_BLOCK_PHONY(2, 1)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3963 COLUMN_RENDER_BLOCK_PHONY(4, 9)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3964 COLUMN_RENDER_BLOCK_PHONY(6, 17)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3965 COLUMN_RENDER_BLOCK_REFRESH_PHONY(8, 25)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3966 COLUMN_RENDER_BLOCK_PHONY(10, 33)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3967 COLUMN_RENDER_BLOCK_PHONY(12, 41)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3968 COLUMN_RENDER_BLOCK_PHONY(14, 49)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3969 COLUMN_RENDER_BLOCK_REFRESH_PHONY(16, 57)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3970 COLUMN_RENDER_BLOCK_PHONY(18, 65)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3971 COLUMN_RENDER_BLOCK_PHONY(20, 73)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3972 COLUMN_RENDER_BLOCK_PHONY(22, 81)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3973 COLUMN_RENDER_BLOCK_REFRESH_PHONY(24, 89)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3974 COLUMN_RENDER_BLOCK_PHONY(26, 97)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3975 COLUMN_RENDER_BLOCK_PHONY(28, 105)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3976 COLUMN_RENDER_BLOCK_PHONY(30, 113)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3977 COLUMN_RENDER_BLOCK_REFRESH_PHONY(32, 121)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3978 COLUMN_RENDER_BLOCK_PHONY(34, 129)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3979 COLUMN_RENDER_BLOCK_PHONY(36, 137)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3980 COLUMN_RENDER_BLOCK_PHONY(38, 145)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3981 COLUMN_RENDER_BLOCK_REFRESH_PHONY(40, 153)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3982 case 161:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3983 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3984 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3985 case 162:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3986 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3987 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3988 //sprite render to line buffer starts
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3989 case 163:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3990 context->cur_slot = MAX_SPRITES_LINE-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3991 memset(context->linebuf, 0, LINEBUF_SIZE);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3992 context->flags &= ~FLAG_MASKED;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3993 while (context->sprite_draws) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3994 context->sprite_draws--;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3995 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3996 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3997 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3998 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
3999 case 164:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4000 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4001 if (context->flags & FLAG_DMA_RUN) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4002 run_dma_src(context, -1);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4003 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4004 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4005 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4006 vdp_advance_line(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4007 CHECK_ONLY
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4008 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4009 default:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4010 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4011 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4012 return;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4013 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4014 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4015
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
4016 static void vdp_h32(vdp_context * context, uint32_t target_cycles)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4017 {
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4018 uint16_t address;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4019 uint32_t mask;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4020 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4021 uint8_t bgindex = context->regs[REG_BG_COLOR] & 0x3F;
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
4022 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4023 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4024 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4025 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4026 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4027 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4028 switch(context->hslot)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4029 {
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4030 for (;;)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4031 {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4032 case 133:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4033 OUTPUT_PIXEL(133)
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
4034 if (context->state == PREPARING) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4035 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4036 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4037 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4038 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4039 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4040 case 134:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4041 OUTPUT_PIXEL(134)
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
4042 if (context->state == PREPARING) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4043 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4044 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4045 render_sprite_cells(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4046 }
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4047 if (context->vcounter == context->inactive_start) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4048 context->hslot++;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4049 context->cycles += slot_cycles;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4050 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
4051 }
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4052 CHECK_LIMIT
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4053 //sprite attribute table scan starts
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4054 case 135:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4055 OUTPUT_PIXEL(135)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4056 context->sprite_index = 0x80;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
4057 context->slot_counter = 0;
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4058 render_sprite_cells(context);
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4059 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4060 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4061 context->serial_address,
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4062 context->tmp_buf_b, context->buf_b_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4063 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4064 );
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4065 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4066 CHECK_LIMIT
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4067 SPRITE_RENDER_H32(136)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4068 SPRITE_RENDER_H32(137)
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4069 SPRITE_RENDER_H32(138)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4070 SPRITE_RENDER_H32(139)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4071 SPRITE_RENDER_H32(140)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4072 SPRITE_RENDER_H32(141)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4073 SPRITE_RENDER_H32(142)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4074 SPRITE_RENDER_H32(143)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4075 SPRITE_RENDER_H32(144)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4076 case 145:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4077 OUTPUT_PIXEL(145)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4078 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4079 CHECK_LIMIT
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4080 SPRITE_RENDER_H32(146)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4081 SPRITE_RENDER_H32(147)
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4082 SPRITE_RENDER_H32(233)
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4083 SPRITE_RENDER_H32(234)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4084 SPRITE_RENDER_H32(235)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4085 //HSYNC start
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4086 SPRITE_RENDER_H32(236)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4087 SPRITE_RENDER_H32(237)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4088 SPRITE_RENDER_H32(238)
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4089 SPRITE_RENDER_H32(239)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4090 SPRITE_RENDER_H32(240)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4091 SPRITE_RENDER_H32(241)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4092 SPRITE_RENDER_H32(242)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4093 case 243:
1422
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
4094 if (!(context->regs[REG_MODE_3] & BIT_VSCROLL)) {
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
4095 //TODO: Develop some tests on hardware to see when vscroll latch actually happens for full plane mode
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
4096 //Top Gear 2 has a very efficient HINT routine that can occassionally hit this slot with a VSRAM write
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
4097 //Since CRAM-updatnig HINT routines seem to indicate that my HINT latency is perhaps slightly too high
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
4098 //the most reasonable explanation is that vscroll is latched before this slot, but tests are needed
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
4099 //to confirm that one way or another
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
4100 context->vscroll_latch[0] = context->vsram[0];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
4101 context->vscroll_latch[1] = context->vsram[1];
2b34469e3f81 Change where vscroll is latched in full plane mode. Fixes Top Gear 2
Michael Pavone <pavone@retrodev.com>
parents: 1401
diff changeset
4102 }
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4103 external_slot(context);
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4104 //provides "garbage" for border when plane A selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4105 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4106 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4107 context->serial_address,
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4108 context->tmp_buf_a,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4109 context->buf_a_off,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4110 context->col_1
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4111 );
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4112 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4113 case 244:
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4114 address = (context->regs[REG_HSCROLL] & 0x3F) << 10;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4115 mask = 0;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4116 if (context->regs[REG_MODE_3] & 0x2) {
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4117 mask |= 0xF8;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4118 }
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4119 if (context->regs[REG_MODE_3] & 0x1) {
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4120 mask |= 0x7;
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4121 }
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4122 render_border_garbage(context, address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4123 address += (context->vcounter & mask) * 4;
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4124 context->hscroll_a = context->vdpmem[address] << 8 | context->vdpmem[address+1];
1885
4178ce857e87 Calculate fine scroll once per line for a small speedup
Michael Pavone <pavone@retrodev.com>
parents: 1884
diff changeset
4125 context->hscroll_a_fine = context->hscroll_a & 0xF;
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4126 context->hscroll_b = context->vdpmem[address+2] << 8 | context->vdpmem[address+3];
1888
bd60e74fd173 Fix regression in H32 from fine scroll optimization
Michael Pavone <pavone@retrodev.com>
parents: 1887
diff changeset
4127 context->hscroll_b_fine = context->hscroll_b & 0xF;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4128 //printf("%d: HScroll A: %d, HScroll B: %d\n", context->vcounter, context->hscroll_a, context->hscroll_b);
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4129 CHECK_LIMIT //provides "garbage" for border when plane A selected
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4130 SPRITE_RENDER_H32(245)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4131 SPRITE_RENDER_H32(246)
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4132 SPRITE_RENDER_H32(247) //provides "garbage" for border when plane B selected
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4133 SPRITE_RENDER_H32(248) //provides "garbage" for border when plane B selected
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4134 //!HSYNC high
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4135 case 249:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4136 read_map_scroll_a(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4137 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4138 SPRITE_RENDER_H32(250)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4139 case 251:
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4140 render_map_1(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4141 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4142 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4143 case 252:
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4144 render_map_2(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4145 scan_sprite_table(context->vcounter, context);//Just a guess
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4146 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4147 case 253:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4148 read_map_scroll_b(0, context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4149 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4150 case 254:
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4151 render_sprite_cells(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4152 scan_sprite_table(context->vcounter, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4153 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4154 case 255:
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4155 render_map_3(context);
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4156 scan_sprite_table(context->vcounter, context);//Just a guess
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4157 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4158 case 0:
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4159 render_map_output(context->vcounter, 0, context);
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4160 scan_sprite_table(context->vcounter, context);//Just a guess
37
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4161 //reverse context slot counter so it counts the number of sprite slots
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4162 //filled rather than the number of available slots
cd59519b26d9 Initial H32 mode support
Mike Pavone <pavone@retrodev.com>
parents: 36
diff changeset
4163 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
4164 context->cur_slot = context->slot_counter;
1873
041a381b9f0d Fix regression in sprite rendering in H32 mode
Michael Pavone <pavone@retrodev.com>
parents: 1871
diff changeset
4165 context->sprite_x_offset = 0;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
4166 context->sprite_draws = MAX_SPRITES_LINE_H32;
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4167 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4168 COLUMN_RENDER_BLOCK(2, 1)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4169 COLUMN_RENDER_BLOCK(4, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4170 COLUMN_RENDER_BLOCK(6, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4171 COLUMN_RENDER_BLOCK_REFRESH(8, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4172 COLUMN_RENDER_BLOCK(10, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4173 COLUMN_RENDER_BLOCK(12, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4174 COLUMN_RENDER_BLOCK(14, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4175 COLUMN_RENDER_BLOCK_REFRESH(16, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4176 COLUMN_RENDER_BLOCK(18, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4177 COLUMN_RENDER_BLOCK(20, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4178 COLUMN_RENDER_BLOCK(22, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4179 COLUMN_RENDER_BLOCK_REFRESH(24, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4180 COLUMN_RENDER_BLOCK(26, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4181 COLUMN_RENDER_BLOCK(28, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4182 COLUMN_RENDER_BLOCK(30, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4183 COLUMN_RENDER_BLOCK_REFRESH(32, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4184 case 129:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4185 OUTPUT_PIXEL(129)
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4186 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4187 CHECK_LIMIT
1269
ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1267
diff changeset
4188 case 130: {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4189 OUTPUT_PIXEL(130)
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4190 external_slot(context);
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4191 CHECK_LIMIT
1269
ff8e29eeb1ec Render horizontal border in H32 mode as well. Both modes still need some minor work to deal with inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1267
diff changeset
4192 }
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4193 //sprite render to line buffer starts
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4194 case 131:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4195 OUTPUT_PIXEL(131)
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
4196 context->cur_slot = MAX_SPRITES_LINE_H32-1;
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4197 memset(context->linebuf, 0, LINEBUF_SIZE);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
4198 context->flags &= ~FLAG_MASKED;
2564
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
4199 while (context->sprite_draws) {
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
4200 context->sprite_draws--;
553a0b4888db More robust sprite overflow regression fix
Michael Pavone <pavone@retrodev.com>
parents: 2563
diff changeset
4201 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
2563
f51d750b4d06 Fix sprite overflow regression in Super Hang-On and other games
Michael Pavone <pavone@retrodev.com>
parents: 2559
diff changeset
4202 }
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4203 render_sprite_cells(context);
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4204 render_border_garbage(
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4205 context,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4206 context->serial_address,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4207 context->tmp_buf_a, context->buf_a_off,
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4208 context->col_1
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4209 );
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4210 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4211 case 132:
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4212 OUTPUT_PIXEL(132)
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4213 render_sprite_cells(context);
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4214 render_border_garbage(
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4215 context,
2566
e5de445e2cf0 Fix regression in right border of OD2 Titancade border dissolve
Michael Pavone <pavone@retrodev.com>
parents: 2564
diff changeset
4216 context->serial_address,
1378
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4217 context->tmp_buf_a, context->buf_a_off + 8,
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4218 context->col_2
71c8b97eb962 Get H32 in sync with H40 with regards to borders and test register support. Minor cleanup to H40 border rendering
Michael Pavone <pavone@retrodev.com>
parents: 1377
diff changeset
4219 );
1173
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
4220 if (context->flags & FLAG_DMA_RUN) {
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
4221 run_dma_src(context, -1);
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
4222 }
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
4223 context->hslot++;
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
4224 context->cycles += slot_cycles;
923
8e012ece95c1 Perform the same slot mapping shift for H32 mode as I did for H40
Michael Pavone <pavone@retrodev.com>
parents: 922
diff changeset
4225 vdp_advance_line(context);
1173
d0f67c59b756 Fix H32 inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1172
diff changeset
4226 CHECK_ONLY
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
4227 }
822
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4228 default:
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4229 context->hslot++;
ac65086c031e Pretty decent optimization of vdp_h40 and vdp_h32. Gets reasonably close to the speed of 0.2.0 in the worst case and is faster than 0.2.0 in others
Michael Pavone <pavone@retrodev.com>
parents: 771
diff changeset
4230 context->cycles += MCLKS_SLOT_H32;
503
eee6be465c47 Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 499
diff changeset
4231 }
eee6be465c47 Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 499
diff changeset
4232 }
eee6be465c47 Small optimization for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 499
diff changeset
4233
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4234 static void vdp_h32_phony(vdp_context * context, uint32_t target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4235 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4236 uint32_t const slot_cycles = MCLKS_SLOT_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4237 switch(context->hslot)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4238 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4239 for (;;)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4240 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4241 case 133:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4242 if (context->state == PREPARING) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4243 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4244 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4245 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4246 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4247 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4248 case 134:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4249 if (context->state == PREPARING) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4250 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4251 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4252 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4253 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4254 if (context->vcounter == context->inactive_start) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4255 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4256 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4257 return;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4258 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4259 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4260 //sprite attribute table scan starts
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4261 case 135:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4262 context->sprite_index = 0x80;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4263 context->slot_counter = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4264 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4265 scan_sprite_table(context->vcounter, context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4266 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4267 SPRITE_RENDER_H32_PHONY(136)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4268 SPRITE_RENDER_H32_PHONY(137)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4269 SPRITE_RENDER_H32_PHONY(138)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4270 SPRITE_RENDER_H32_PHONY(139)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4271 SPRITE_RENDER_H32_PHONY(140)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4272 SPRITE_RENDER_H32_PHONY(141)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4273 SPRITE_RENDER_H32_PHONY(142)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4274 SPRITE_RENDER_H32_PHONY(143)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4275 SPRITE_RENDER_H32_PHONY(144)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4276 case 145:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4277 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4278 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4279 SPRITE_RENDER_H32_PHONY(146)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4280 SPRITE_RENDER_H32_PHONY(147)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4281 SPRITE_RENDER_H32_PHONY(233)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4282 SPRITE_RENDER_H32_PHONY(234)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4283 SPRITE_RENDER_H32_PHONY(235)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4284 //HSYNC start
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4285 SPRITE_RENDER_H32_PHONY(236)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4286 SPRITE_RENDER_H32_PHONY(237)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4287 SPRITE_RENDER_H32_PHONY(238)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4288 SPRITE_RENDER_H32_PHONY(239)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4289 SPRITE_RENDER_H32_PHONY(240)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4290 SPRITE_RENDER_H32_PHONY(241)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4291 SPRITE_RENDER_H32_PHONY(242)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4292 case 243:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4293 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4294 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4295 case 244:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4296 CHECK_LIMIT //provides "garbage" for border when plane A selected
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4297 SPRITE_RENDER_H32_PHONY(245)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4298 SPRITE_RENDER_H32_PHONY(246)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4299 SPRITE_RENDER_H32_PHONY(247) //provides "garbage" for border when plane B selected
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4300 SPRITE_RENDER_H32_PHONY(248) //provides "garbage" for border when plane B selected
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4301 //!HSYNC high
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4302 case 249:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4303 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4304 SPRITE_RENDER_H32_PHONY(250)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4305 case 251:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4306 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4307 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4308 case 252:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4309 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4310 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4311 case 253:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4312 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4313 case 254:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4314 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4315 scan_sprite_table(context->vcounter, context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4316 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4317 case 255:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4318 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4319 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4320 case 0:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4321 scan_sprite_table(context->vcounter, context);//Just a guess
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4322 //reverse context slot counter so it counts the number of sprite slots
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4323 //filled rather than the number of available slots
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4324 //context->slot_counter = MAX_SPRITES_LINE - context->slot_counter;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4325 context->cur_slot = context->slot_counter;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4326 context->sprite_x_offset = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4327 context->sprite_draws = MAX_SPRITES_LINE_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4328 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4329 COLUMN_RENDER_BLOCK_PHONY(2, 1)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4330 COLUMN_RENDER_BLOCK_PHONY(4, 9)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4331 COLUMN_RENDER_BLOCK_PHONY(6, 17)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4332 COLUMN_RENDER_BLOCK_REFRESH_PHONY(8, 25)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4333 COLUMN_RENDER_BLOCK_PHONY(10, 33)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4334 COLUMN_RENDER_BLOCK_PHONY(12, 41)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4335 COLUMN_RENDER_BLOCK_PHONY(14, 49)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4336 COLUMN_RENDER_BLOCK_REFRESH_PHONY(16, 57)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4337 COLUMN_RENDER_BLOCK_PHONY(18, 65)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4338 COLUMN_RENDER_BLOCK_PHONY(20, 73)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4339 COLUMN_RENDER_BLOCK_PHONY(22, 81)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4340 COLUMN_RENDER_BLOCK_REFRESH_PHONY(24, 89)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4341 COLUMN_RENDER_BLOCK_PHONY(26, 97)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4342 COLUMN_RENDER_BLOCK_PHONY(28, 105)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4343 COLUMN_RENDER_BLOCK_PHONY(30, 113)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4344 COLUMN_RENDER_BLOCK_REFRESH_PHONY(32, 121)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4345 case 129:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4346 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4347 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4348 case 130: {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4349 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4350 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4351 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4352 //sprite render to line buffer starts
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4353 case 131:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4354 context->cur_slot = MAX_SPRITES_LINE_H32-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4355 context->flags &= ~FLAG_MASKED;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4356 while (context->sprite_draws) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4357 context->sprite_draws--;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4358 context->sprite_draw_list[context->sprite_draws].x_pos = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4359 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4360 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4361 CHECK_LIMIT
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4362 case 132:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4363 render_sprite_cells(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4364 if (context->flags & FLAG_DMA_RUN) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4365 run_dma_src(context, -1);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4366 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4367 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4368 context->cycles += slot_cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4369 vdp_advance_line(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4370 CHECK_ONLY
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4371 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4372 default:
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4373 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4374 context->cycles += MCLKS_SLOT_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4375 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4376 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
4377
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4378 static void vdp_h32_mode4(vdp_context * context, uint32_t target_cycles)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4379 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4380 uint16_t address;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4381 uint32_t mask;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4382 uint32_t const slot_cycles = MCLKS_SLOT_H32;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
4383 uint8_t bgindex = 0x10 | (context->regs[REG_BG_COLOR] & 0xF) + MODE4_OFFSET;
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
4384 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4385 if (!context->output) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4386 //This shouldn't happen normally, but it can theoretically
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4387 //happen when doing border busting
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4388 context->output = dummy_buffer;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
4389 }
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4390 switch(context->hslot)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4391 {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4392 for (;;)
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4393 {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4394 //sprite rendering starts
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4395 SPRITE_RENDER_H32_MODE4(137)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4396 SPRITE_RENDER_H32_MODE4(143)
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4397 case 234:
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4398 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4399 CHECK_LIMIT
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4400 case 235:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4401 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4402 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4403 //!HSYNC low
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4404 case 236:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4405 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4406 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4407 case 237:
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4408 external_slot(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4409 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4410 case 238:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4411 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4412 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4413 SPRITE_RENDER_H32_MODE4(239)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4414 SPRITE_RENDER_H32_MODE4(245)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4415 case 251:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4416 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4417 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4418 case 252:
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4419 external_slot(context);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4420 if (context->regs[REG_MODE_1] & BIT_HSCRL_LOCK && context->vcounter < 16) {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4421 context->hscroll_a = 0;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4422 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4423 context->hscroll_a = context->regs[REG_X_SCROLL];
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4424 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4425 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4426 case 253:
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4427 context->sprite_index = 0;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4428 context->slot_counter = MAX_DRAWS_H32_MODE4;
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4429 scan_sprite_table_mode4(context);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4430 CHECK_LIMIT
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4431 case 254:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4432 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4433 CHECK_LIMIT
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4434 case 255:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4435 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4436 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
4437 case 0: {
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4438 scan_sprite_table_mode4(context);
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4439 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
4440 }
1135
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4441 case 1:
8506b305e0e8 Update Mode 4 rendering to match logic analyzer captures
Michael Pavone <pavone@retrodev.com>
parents: 1134
diff changeset
4442 scan_sprite_table_mode4(context);
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4443 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4444 case 2:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4445 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4446 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4447 case 3:
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4448 scan_sprite_table_mode4(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4449 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
4450 case 4: {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4451 scan_sprite_table_mode4(context);
1121
1913f9c28003 Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents: 1120
diff changeset
4452 context->buf_a_off = 8;
1913f9c28003 Less broken Mode 4 implementation
Michael Pavone <pavone@retrodev.com>
parents: 1120
diff changeset
4453 memset(context->tmp_buf_a, 0, 8);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4454 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
4455 }
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4456 COLUMN_RENDER_BLOCK_MODE4(0, 5)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4457 COLUMN_RENDER_BLOCK_MODE4(1, 9)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4458 COLUMN_RENDER_BLOCK_MODE4(2, 13)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4459 COLUMN_RENDER_BLOCK_MODE4(3, 17)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4460 COLUMN_RENDER_BLOCK_MODE4(4, 21)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4461 COLUMN_RENDER_BLOCK_MODE4(5, 25)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4462 COLUMN_RENDER_BLOCK_MODE4(6, 29)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4463 COLUMN_RENDER_BLOCK_MODE4(7, 33)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4464 COLUMN_RENDER_BLOCK_MODE4(8, 37)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4465 COLUMN_RENDER_BLOCK_MODE4(9, 41)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4466 COLUMN_RENDER_BLOCK_MODE4(10, 45)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4467 COLUMN_RENDER_BLOCK_MODE4(11, 49)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4468 COLUMN_RENDER_BLOCK_MODE4(12, 53)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4469 COLUMN_RENDER_BLOCK_MODE4(13, 57)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4470 COLUMN_RENDER_BLOCK_MODE4(14, 61)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4471 COLUMN_RENDER_BLOCK_MODE4(15, 65)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4472 COLUMN_RENDER_BLOCK_MODE4(16, 69)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4473 COLUMN_RENDER_BLOCK_MODE4(17, 73)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4474 COLUMN_RENDER_BLOCK_MODE4(18, 77)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4475 COLUMN_RENDER_BLOCK_MODE4(19, 81)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4476 COLUMN_RENDER_BLOCK_MODE4(20, 85)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4477 COLUMN_RENDER_BLOCK_MODE4(21, 89)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4478 COLUMN_RENDER_BLOCK_MODE4(22, 93)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4479 COLUMN_RENDER_BLOCK_MODE4(23, 97)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4480 COLUMN_RENDER_BLOCK_MODE4(24, 101)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4481 COLUMN_RENDER_BLOCK_MODE4(25, 105)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4482 COLUMN_RENDER_BLOCK_MODE4(26, 109)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4483 COLUMN_RENDER_BLOCK_MODE4(27, 113)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4484 COLUMN_RENDER_BLOCK_MODE4(28, 117)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4485 COLUMN_RENDER_BLOCK_MODE4(29, 121)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4486 COLUMN_RENDER_BLOCK_MODE4(30, 125)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4487 COLUMN_RENDER_BLOCK_MODE4(31, 129)
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4488 case 133:
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
4489 OUTPUT_PIXEL_MODE4(133)
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4490 external_slot(context);
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4491 CHECK_LIMIT
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4492 case 134:
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
4493 OUTPUT_PIXEL_MODE4(134)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4494 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4495 CHECK_LIMIT
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4496 case 135:
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
4497 OUTPUT_PIXEL_MODE4(135)
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4498 external_slot(context);
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4499 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
4500 case 136: {
1894
55d034719345 Fix regression in handling of color index 0 in Mode 4. Support Mode 4 in CRAM viewer window
Michael Pavone <pavone@retrodev.com>
parents: 1891
diff changeset
4501 OUTPUT_PIXEL_MODE4(136)
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4502 external_slot(context);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4503 //set things up for sprite rendering in the next slot
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4504 memset(context->linebuf, 0, LINEBUF_SIZE);
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4505 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
4506 context->sprite_draws = MAX_DRAWS_H32_MODE4;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4507 CHECK_LIMIT
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
4508 }}
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4509 default:
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4510 context->hslot++;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4511 context->cycles += MCLKS_SLOT_H32;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4512 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4513 }
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
4514
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4515
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4516 static void tms_fetch_pattern_name(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4517 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4518 uint16_t address = context->regs[REG_SCROLL_A] << 10 & 0x3C00;
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4519 if (context->regs[REG_MODE_2] & BIT_M1) {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4520 //Text mode
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4521 address |= (context->vcounter >> 3) * 40;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4522 address += (context->hslot - 4) / 3;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4523 } else {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4524 //Graphics/Multicolor
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4525 address |= context->vcounter << 2 & 0x03E0;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4526 address |= context->hslot >> 2;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4527 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4528 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4529 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4530 context->col_1 = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4531 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4532
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4533 static void tms_fetch_color(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4534 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4535 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4536 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4537 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4538 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4539 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4540 uint16_t address = context->regs[REG_COLOR_TABLE] << 6;
2411
efd2242c2c23 Fix silly TMS9918A bug, make CRAM viewer sorta useful in TMS9918A modes, make mode4 address map externally viewable for debugger
Michael Pavone <pavone@retrodev.com>
parents: 2385
diff changeset
4541 if (context->regs[REG_MODE_1] & BIT_M3) {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4542 //Graphics II
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4543 uint16_t upper_vcounter_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4544 uint16_t pattern_name_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4545 if (context->type > VDP_SMS2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4546 //SMS1 and TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4547 upper_vcounter_mask = address & 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4548 pattern_name_mask = (address & 0x07C0) | 0x0038;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4549 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4550 //SMS2 and Game Gear
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4551 upper_vcounter_mask = 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4552 pattern_name_mask = 0x07F8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4553 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4554 address &= 0x2000;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4555 address |= context->vcounter << 5 & upper_vcounter_mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4556 address |= context->col_1 << 3 & pattern_name_mask;
2258
a28e1042f4de Fix a few of the most glaring TMS9918A issues
Michael Pavone <pavone@retrodev.com>
parents: 2257
diff changeset
4557 address |= context->vcounter & 7;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4558 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4559 address |= context->col_1 >> 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4560 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4561 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4562 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4563 context->col_2 = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4564 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4565
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4566 static void tms_fetch_pattern_value(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4567 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4568 uint16_t address = context->regs[REG_PATTERN_GEN] << 11 & 0x3800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4569 if (context->regs[REG_MODE_1] & BIT_M3) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4570 //Graphics II
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4571 uint16_t mask = context->type > VDP_SMS2 ? address & 0x1800 : 0x1800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4572 address &= 0x2000;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4573 address |= context->vcounter << 5 & mask;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4574 }
2414
dc05f1805921 Fix out of bound read from mode4_address_map in TMS modes
Michael Pavone <pavone@retrodev.com>
parents: 2411
diff changeset
4575 address |= context->col_1 << 3 & 0x7F8;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4576 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4577 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4578 address |= context->vcounter >> 2 & 0x3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4579 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4580 address |= context->vcounter & 0x7;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4581 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4582
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4583 //TODO: 4K/16K mode address remapping when emulating TMS9918A
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4584 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4585 uint8_t value = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4586 if (context->regs[REG_MODE_2] & BIT_M2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4587 //Multicolor
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4588 context->tmp_buf_a[0] = 0xF0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4589 context->tmp_buf_b[0] = value;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4590 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4591 context->tmp_buf_a[0] = value;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4592 context->tmp_buf_b[0] = context->col_2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4593 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4594 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4595
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4596 static void tms_sprite_scan(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4597 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4598 if (context->sprite_draws > 4 || context->sprite_index == 32) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4599 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4600 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4601 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4602 address |= context->sprite_index << 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4603 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4604 uint8_t y = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4605 if (y == 208) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4606 context->sprite_index = 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4607 context->sprite_info_list[4].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4608 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4609 uint8_t diff = context->vcounter + 1 - y;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4610 uint8_t size = 8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4611 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4612 size *= 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4613 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4614 if (context->regs[REG_MODE_2] & BIT_SPRITE_ZM) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4615 size *= 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4616 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4617 if (diff < size) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4618 context->sprite_info_list[context->sprite_draws++].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4619 if (context->sprite_draws == 5) {
2574
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
4620 context->flags |= FLAG_SPRITE_OFLOW;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4621 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4622 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4623 context->sprite_info_list[4].index = context->sprite_index;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4624 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4625 context->sprite_index++;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4626 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4627
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4628 static void tms_sprite_vert(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4629 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4630 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4631 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4632 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4633 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4634 address |= context->sprite_info_list[context->sprite_index].index << 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4635 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4636 context->sprite_info_list[context->sprite_index].y = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4637 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4638
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4639 static void tms_sprite_horiz(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4640 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4641 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4642 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4643 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4644 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4645 address |= context->sprite_info_list[context->sprite_index].index << 2 | 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4646 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4647 context->sprite_draw_list[context->sprite_index].x_pos = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4648 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4649
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4650 static void tms_sprite_name(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4651 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4652 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4653 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4654 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4655 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4656 address |= context->sprite_info_list[context->sprite_index].index << 2 | 2;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4657 address = context->vdpmem[mode4_address_map[address] ^ 1] << 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4658 address |= context->regs[REG_STILE_BASE] << 11 & 0x3800;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4659 uint8_t diff = context->vcounter + 1 - context->sprite_info_list[context->sprite_index].y;
2513
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4660 if (context->regs[REG_MODE_2] & BIT_SPRITE_ZM) {
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4661 diff >>= 1;
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4662 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4663 address += diff;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4664 context->sprite_draw_list[context->sprite_index].address = address;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4665 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4666
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4667 static void tms_sprite_tag(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4668 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4669 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4670 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4671 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4672 uint16_t address = context->regs[REG_SAT] << 7 & 0x3F80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4673 address |= context->sprite_info_list[context->sprite_index].index << 2 | 3;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4674 address = mode4_address_map[address] ^ 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4675 uint8_t tag = context->vdpmem[address];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4676 if (tag & 0x80) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4677 //early clock flag
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4678 context->sprite_draw_list[context->sprite_index].x_pos -= 32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4679 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4680 context->sprite_draw_list[context->sprite_index].pal_priority = tag & 0xF;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4681 context->col_1 = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4682 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4683
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4684 static void tms_sprite_pattern1(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4685 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4686 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4687 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4688 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4689 context->col_1 = context->vdpmem[mode4_address_map[context->sprite_draw_list[context->sprite_index].address] ^ 1] << 8;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4690 context->sprite_draw_list[context->sprite_index].address += 16;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4691 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4692
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4693 static void tms_sprite_pattern2(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4694 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4695 if (context->sprite_index >= 4 || context->sprite_index >= context->sprite_draws) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4696 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4697 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4698 uint16_t pixels = context->col_1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4699 if (context->regs[REG_MODE_2] & BIT_SPRITE_SZ) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4700 pixels |= context->vdpmem[mode4_address_map[context->sprite_draw_list[context->sprite_index].address] ^ 1];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4701 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4702 context->sprite_draw_list[context->sprite_index++].address = pixels;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4703 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4704
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4705 static uint8_t tms_sprite_clock(vdp_context *context, int16_t offset)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4706 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4707 int16_t x = context->hslot << 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4708 if (x > 294) {
2259
425b44fd7bf1 Fix TMS9918A sprite horizontal position
Michael Pavone <pavone@retrodev.com>
parents: 2258
diff changeset
4709 x -= 512 + 8;
425b44fd7bf1 Fix TMS9918A sprite horizontal position
Michael Pavone <pavone@retrodev.com>
parents: 2258
diff changeset
4710 } else {
425b44fd7bf1 Fix TMS9918A sprite horizontal position
Michael Pavone <pavone@retrodev.com>
parents: 2258
diff changeset
4711 x -= 8;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4712 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4713 x += offset;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4714 uint8_t output = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4715 for (int i = 0; i < 4; i++) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4716 if (x >= context->sprite_draw_list[i].x_pos) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4717 if (context->sprite_draw_list[i].address & 0x8000) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4718 if (output) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4719 context->flags2 |= FLAG2_SPRITE_COLLIDE;
2258
a28e1042f4de Fix a few of the most glaring TMS9918A issues
Michael Pavone <pavone@retrodev.com>
parents: 2257
diff changeset
4720 } else {
a28e1042f4de Fix a few of the most glaring TMS9918A issues
Michael Pavone <pavone@retrodev.com>
parents: 2257
diff changeset
4721 output = context->sprite_draw_list[i].pal_priority;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4722 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4723 }
2572
941bc319dcd8 Fix sprite zoom in TMS modes for real this time
Michael Pavone <pavone@retrodev.com>
parents: 2571
diff changeset
4724 if (!(context->regs[REG_MODE_2] & BIT_SPRITE_ZM) || ((x - context->sprite_draw_list[i].x_pos) & 1)) {
2513
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4725 context->sprite_draw_list[i].address <<= 1;
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4726 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4727 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4728 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4729 return output;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4730 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4731
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4732 static void tms_border(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4733 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4734 if (context->hslot < (256 + BORDER_LEFT - (BORDER_LEFT-8))/2 || context->hslot > 256-32) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4735 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4736 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4737 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4738 if (!context->output) {
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4739 if ((context->hslot * 2 - 6 + BORDER_LEFT) == (256 + BORDER_LEFT + BORDER_RIGHT)) {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4740 advance_output_line(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4741 }
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4742 if (!context->output) {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4743 return;
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4744 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4745 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
4746 pixel_t color;
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4747 if (context->type == VDP_GAMEGEAR) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4748 //Game Gear uses CRAM entries 16-31 for TMS9918A modes
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4749 color = context->colors[(context->regs[REG_BG_COLOR] & 0xF) + 16 + MODE4_OFFSET];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4750 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4751 color = context->regs[REG_BG_COLOR] << 1 & 0x1E;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4752 color = (color & 0xE) | (color << 1 & 0x20);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4753 color = context->color_map[color | FBUF_TMS];
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4754 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4755 if (context->hslot == (520 - BORDER_LEFT) / 2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4756 context->output[0] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4757 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4758 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4759 if (context->hslot < (256 + BORDER_LEFT + BORDER_RIGHT - (BORDER_LEFT - 8)) / 2) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4760 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4761 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4762 if ((context->hslot * 2 - 6 + BORDER_LEFT) == (256 + BORDER_LEFT + BORDER_RIGHT)) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4763 advance_output_line(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4764 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4765 } else {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4766 int slot = (context->hslot - (520 - BORDER_LEFT) / 2) * 2 - 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4767 context->output[slot] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4768 context->output[slot + 1] = color;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4769 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4770 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4771
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4772 static void tms_composite(vdp_context *context)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4773 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4774 if (context->state == PREPARING) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4775 tms_border(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4776 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4777 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4778 uint8_t color = tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4779 if (!context->output) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4780 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4781 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4782 }
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4783 uint8_t fg,bg;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4784 if (context->regs[REG_MODE_2] & BIT_M1) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4785 //Text mode uses TC and BD colors
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4786 fg = context->regs[REG_BG_COLOR] >> 4;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4787 bg = context->regs[REG_BG_COLOR] & 0xF;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4788 } else {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4789 fg = context->tmp_buf_b[0] >> 4;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4790 bg = context->tmp_buf_b[0] & 0xF;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4791 if (!bg) {
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4792 bg = context->regs[REG_BG_COLOR] & 0xF;
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4793 }
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4794 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4795 uint8_t pattern = context->tmp_buf_a[0] & 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4796 context->tmp_buf_a[0] <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4797 if (!color) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4798 color = pattern ? fg : bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4799 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4800 //TODO: composite debug output
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4801 context->output[context->hslot * 2 - 8 + BORDER_LEFT] = tms_map_color(context, color);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4802 color = tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4803 pattern = context->tmp_buf_a[0] & 0x80;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4804 context->tmp_buf_a[0] <<= 1;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4805 if (!color) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4806 color = pattern ? fg : bg;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4807 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4808 //TODO: composite debug output
2612
7e04620c9dc1 Get tilemap debug view working for TMS graphics and text modes. Multicolor still TBD
Michael Pavone <pavone@retrodev.com>
parents: 2579
diff changeset
4809 context->output[context->hslot * 2 - 7 + BORDER_LEFT] = tms_map_color(context, color);
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4810 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4811
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
4812 #define TMS_OUTPUT(slot) if ((slot) < 4 || (slot) > (256 + BORDER_LEFT - 8) / 2) { tms_border(context); } else { tms_composite(context); }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4813 #define TMS_OUTPUT_RIGHT(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4814 if ((slot) < (256 + BORDER_LEFT - (BORDER_LEFT - 8))/2) {\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4815 tms_composite(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4816 } else if ((slot < (256 + BORDER_LEFT + BORDER_RIGHT -(BORDER_LEFT - 8))/2)) {\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4817 tms_border(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4818 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4819 #define TMS_CHECK_LIMIT context->hslot++; context->cycles += MCLKS_SLOT_H32; if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4820 #define TMS_GRAPHICS_PATTERN_CPU_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4821 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4822 TMS_OUTPUT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4823 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4824 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4825 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4826 TMS_OUTPUT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4827 external_slot(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4828 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4829 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4830 TMS_OUTPUT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4831 tms_fetch_color(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4832 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4833 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4834 TMS_OUTPUT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4835 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4836 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4837
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4838 #define TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4839 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4840 TMS_OUTPUT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4841 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4842 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4843 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4844 TMS_OUTPUT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4845 tms_sprite_scan(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4846 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4847 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4848 TMS_OUTPUT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4849 tms_fetch_color(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4850 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4851 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4852 TMS_OUTPUT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4853 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4854 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4855
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4856 #define TMS_SPRITE_SCAN_SLOT(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4857 case slot:\
2513
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4858 if (context->hslot >= (520 - BORDER_LEFT) / 2) {\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4859 tms_border(context);\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4860 } else {\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4861 tms_sprite_clock(context, 0);\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4862 tms_sprite_clock(context, 1);\
61645edbe30f Fix TMS9918A sprite zooming and early clock flag
Michael Pavone <pavone@retrodev.com>
parents: 2511
diff changeset
4863 }\
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4864 tms_sprite_scan(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4865 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4866
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4867 #define TMS_SPRITE_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4868 case slot:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4869 TMS_OUTPUT_RIGHT(slot)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4870 tms_sprite_vert(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4871 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4872 case slot+1:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4873 TMS_OUTPUT_RIGHT(slot+1)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4874 tms_sprite_horiz(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4875 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4876 case slot+2:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4877 TMS_OUTPUT_RIGHT(slot+2)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4878 tms_sprite_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4879 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4880 case slot+3:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4881 TMS_OUTPUT_RIGHT(slot+3)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4882 tms_sprite_tag(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4883 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4884 case slot+4:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4885 TMS_OUTPUT_RIGHT(slot+4)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4886 tms_sprite_pattern1(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4887 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4888 case slot+5:\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4889 TMS_OUTPUT_RIGHT(slot+5)\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4890 tms_sprite_pattern2(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4891 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4892
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4893 static void vdp_tms_graphics(vdp_context * context, uint32_t target_cycles)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4894 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4895 switch (context->hslot)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4896 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4897 for (;;)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4898 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4899 TMS_GRAPHICS_PATTERN_CPU_BLOCK(0)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4900 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(4)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4901 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(8)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4902 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(12)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4903 TMS_GRAPHICS_PATTERN_CPU_BLOCK(16)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4904 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(20)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4905 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(24)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4906 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(28)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4907 TMS_GRAPHICS_PATTERN_CPU_BLOCK(32)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4908 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(36)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4909 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(40)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4910 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(44)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4911 TMS_GRAPHICS_PATTERN_CPU_BLOCK(48)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4912 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(52)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4913 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(56)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4914 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(60)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4915 TMS_GRAPHICS_PATTERN_CPU_BLOCK(64)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4916 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(68)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4917 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(72)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4918 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(76)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4919 TMS_GRAPHICS_PATTERN_CPU_BLOCK(80)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4920 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(84)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4921 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(88)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4922 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(92)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4923 TMS_GRAPHICS_PATTERN_CPU_BLOCK(96)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4924 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(100)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4925 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(104)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4926 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(108)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4927 TMS_GRAPHICS_PATTERN_CPU_BLOCK(112)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4928 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(116)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4929 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(120)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4930 TMS_GRAPHICS_PATTERN_SPRITE_BLOCK(124)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4931 case 128:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4932 tms_composite(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4933 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4934 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4935 case 129:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4936 tms_composite(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4937 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4938 context->sprite_index = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4939 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4940
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4941 TMS_SPRITE_BLOCK(130)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4942 TMS_SPRITE_BLOCK(136)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4943 case 142:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4944 tms_sprite_vert(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4945 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4946 case 143:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4947 tms_sprite_horiz(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4948 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4949 case 145:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4950 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4951 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4952 case 146:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4953 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4954 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4955 case 147:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4956 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4957 context->hslot = 233;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4958 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4959 if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4960 case 233:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4961 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4962 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4963 case 234:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4964 tms_sprite_name(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4965 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4966 case 235:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4967 tms_sprite_tag(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4968 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4969 case 236:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4970 tms_sprite_pattern1(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4971 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4972 case 237:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4973 tms_sprite_pattern2(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4974 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4975 TMS_SPRITE_BLOCK(238)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4976 case 244:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4977 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4978 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4979 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4980 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4981 case 245:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4982 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4983 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4984 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4985 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4986 case 246:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4987 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4988 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4989 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4990 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4991 case 247:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4992 tms_sprite_clock(context, 0);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4993 tms_sprite_clock(context, 1);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4994 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4995 vdp_advance_line(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4996 context->sprite_index = context->sprite_draws = 0;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4997 if (context->vcounter == 192) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4998 context->state = INACTIVE;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
4999 return;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5000 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5001 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5002 TMS_SPRITE_SCAN_SLOT(248)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5003 TMS_SPRITE_SCAN_SLOT(249)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5004 TMS_SPRITE_SCAN_SLOT(250)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5005 TMS_SPRITE_SCAN_SLOT(251)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5006 TMS_SPRITE_SCAN_SLOT(252)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5007 TMS_SPRITE_SCAN_SLOT(253)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5008 TMS_SPRITE_SCAN_SLOT(254)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5009 TMS_SPRITE_SCAN_SLOT(255)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5010 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5011 default:
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5012 context->hslot++;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5013 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5014 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5015 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5016
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5017 #define TMS_TEXT_OUTPUT(slot) if ((slot) < 8) { tms_border(context); } else { tms_composite(context); }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5018 #define TMS_TEXT_BLOCK(slot) \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5019 case slot:\
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5020 TMS_TEXT_OUTPUT(slot)\
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5021 tms_fetch_pattern_name(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5022 TMS_CHECK_LIMIT \
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5023 case slot+1:\
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5024 TMS_TEXT_OUTPUT(slot+1)\
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5025 external_slot(context);\
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5026 TMS_CHECK_LIMIT \
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5027 case slot+2:\
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5028 TMS_TEXT_OUTPUT(slot+2)\
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5029 tms_fetch_pattern_value(context);\
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5030 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5031
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5032 static void vdp_tms_text(vdp_context * context, uint32_t target_cycles)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5033 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5034 switch (context->hslot)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5035 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5036 for (;;)
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5037 {
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5038 case 0:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5039 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5040 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5041 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5042 case 1:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5043 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5044 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5045 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5046 case 2:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5047 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5048 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5049 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5050 case 3:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5051 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5052 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5053 TMS_CHECK_LIMIT
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5054 case 4:
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5055 tms_border(context);
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5056 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5057 TMS_CHECK_LIMIT
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5058 TMS_TEXT_BLOCK(5)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5059 TMS_TEXT_BLOCK(8)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5060 TMS_TEXT_BLOCK(11)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5061 TMS_TEXT_BLOCK(14)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5062 TMS_TEXT_BLOCK(17)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5063 TMS_TEXT_BLOCK(20)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5064 TMS_TEXT_BLOCK(23)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5065 TMS_TEXT_BLOCK(26)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5066 TMS_TEXT_BLOCK(29)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5067 TMS_TEXT_BLOCK(32)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5068 TMS_TEXT_BLOCK(35)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5069 TMS_TEXT_BLOCK(38)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5070 TMS_TEXT_BLOCK(41)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5071 TMS_TEXT_BLOCK(44)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5072 TMS_TEXT_BLOCK(47)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5073 TMS_TEXT_BLOCK(50)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5074 TMS_TEXT_BLOCK(53)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5075 TMS_TEXT_BLOCK(56)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5076 TMS_TEXT_BLOCK(59)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5077 TMS_TEXT_BLOCK(62)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5078 TMS_TEXT_BLOCK(65)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5079 TMS_TEXT_BLOCK(68)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5080 TMS_TEXT_BLOCK(71)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5081 TMS_TEXT_BLOCK(74)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5082 TMS_TEXT_BLOCK(77)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5083 TMS_TEXT_BLOCK(80)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5084 TMS_TEXT_BLOCK(83)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5085 TMS_TEXT_BLOCK(86)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5086 TMS_TEXT_BLOCK(89)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5087 TMS_TEXT_BLOCK(92)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5088 TMS_TEXT_BLOCK(95)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5089 TMS_TEXT_BLOCK(98)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5090 TMS_TEXT_BLOCK(101)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5091 TMS_TEXT_BLOCK(104)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5092 TMS_TEXT_BLOCK(107)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5093 TMS_TEXT_BLOCK(110)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5094 TMS_TEXT_BLOCK(113)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5095 TMS_TEXT_BLOCK(116)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5096 TMS_TEXT_BLOCK(119)
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5097 TMS_TEXT_BLOCK(122)
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5098 case 125:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5099 tms_composite(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5100 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5101 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5102 case 126:
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5103 tms_composite(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5104 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5105 TMS_CHECK_LIMIT
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5106 case 127:
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5107 tms_composite(context);
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5108 external_slot(context);
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5109 TMS_CHECK_LIMIT
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5110 default:
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5111 while (context->hslot < 139)
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5112 {
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5113 tms_border(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5114 external_slot(context);
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5115 TMS_CHECK_LIMIT
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5116 }
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5117 while (context->hslot < 147)
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5118 {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5119 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5120 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5121 }
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5122 if (context->hslot == 147) {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5123 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5124 context->hslot = 233;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5125 context->cycles += MCLKS_SLOT_H32;
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5126 if (context->cycles >= target_cycles) { return; }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5127 }
2260
3f155bc13183 Less broken TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2259
diff changeset
5128 while (context->hslot > 147) {
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5129 if (context->hslot >= 233) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5130 external_slot(context);
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5131 if (context->hslot + 1 == LINE_CHANGE_MODE4) {
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5132 vdp_advance_line(context);
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5133 if (context->vcounter == 192) {
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5134 context->state = INACTIVE;
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5135 return;
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5136 }
2257
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5137 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5138 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5139 TMS_CHECK_LIMIT
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5140 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5141 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5142 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5143 }
1e626d0ecf9c WIP SG-1000/TMS9918A mode support
Michael Pavone <pavone@retrodev.com>
parents: 2244
diff changeset
5144
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5145 static void inactive_test_output(vdp_context *context, uint8_t is_h40, uint8_t test_layer)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5146 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5147 uint8_t max_slot = is_h40 ? 169 : 136;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5148 if (context->hslot > max_slot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5149 return;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5150 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5151 uint8_t *dst = context->compositebuf + (context->hslot >> 3) * SCROLL_BUFFER_DRAW;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5152 int32_t len;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5153 uint32_t src_off;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5154 if (context->hslot) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5155 dst -= SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5156 src_off = 0;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5157 len = context->hslot == max_slot ? BORDER_RIGHT : SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5158 } else {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5159 src_off = SCROLL_BUFFER_DRAW - BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5160 len = BORDER_LEFT;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5161 }
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
5162 uint8_t *src = NULL;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5163 if (test_layer == 2) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5164 //plane A
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
5165 src_off += context->buf_a_off - (context->hscroll_a & 0xF);
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5166 src = context->tmp_buf_a;
1369
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents: 1368
diff changeset
5167 } else if (test_layer == 3){
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5168 //plane B
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
5169 src_off += context->buf_b_off - (context->hscroll_b & 0xF);
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5170 src = context->tmp_buf_b;
1369
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents: 1368
diff changeset
5171 } else {
3e7a921718de Fix handling of test register selected sprite layer in border area. Gets rid of the border garbage in the "disco floor/ceiling" scene of OD2
Michael Pavone <pavone@retrodev.com>
parents: 1368
diff changeset
5172 //sprite layer
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5173 memset(dst, 0, len);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5174 dst += len;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5175 len = 0;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5176 }
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
5177 if (src) {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
5178 for (; len >=0; len--, dst++, src_off++)
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
5179 {
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
5180 *dst = src[src_off & SCROLL_BUFFER_MASK] & 0x3F;
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
5181 }
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5182 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5183 context->done_composite = dst;
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5184 context->buf_a_off = (context->buf_a_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5185 context->buf_b_off = (context->buf_b_off + SCROLL_BUFFER_DRAW) & SCROLL_BUFFER_DRAW;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5186 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5187
1362
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
5188 static void check_switch_inactive(vdp_context *context, uint8_t is_h40)
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
5189 {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
5190 //technically the second hcounter check should be different for H40, but this is probably close enough for now
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
5191 if (context->state == ACTIVE && context->vcounter == context->inactive_start && (context->hslot >= (is_h40 ? 167 : 135) || context->hslot < 133)) {
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
5192 context->state = INACTIVE;
2010
19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line
Mike Pavone <pavone@retrodev.com>
parents: 2009
diff changeset
5193 context->cur_slot = MAX_SPRITES_LINE-1;
19957e7353a4 Fix a regression in sprite rendering that could cause garbage to be displayed on first line
Mike Pavone <pavone@retrodev.com>
parents: 2009
diff changeset
5194 context->sprite_x_offset = 0;
1362
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
5195 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
5196 }
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
5197
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5198 static void vdp_inactive(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5199 {
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5200 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5201 uint8_t index_reset_value, max_draws, max_sprites;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5202 uint16_t vint_line, active_line;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5203
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5204 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5205 if (is_h40) {
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5206 latch_slot = 165;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
5207 buf_clear_slot = 163;
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
5208 index_reset_slot = 167;
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
5209 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5210 max_draws = MAX_SPRITES_LINE-1;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5211 max_sprites = MAX_SPRITES_LINE;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5212 index_reset_value = 0x80;
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
5213 vint_slot = VINT_SLOT_H40;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5214 line_change = LINE_CHANGE_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5215 jump_start = 182;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5216 jump_dest = 229;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5217 } else {
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
5218 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
5219 max_draws = MAX_SPRITES_LINE_H32-1;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5220 max_sprites = MAX_SPRITES_LINE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5221 buf_clear_slot = 128;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5222 index_reset_slot = 132;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5223 index_reset_value = 0x80;
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
5224 vint_slot = VINT_SLOT_H32;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5225 line_change = LINE_CHANGE_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5226 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5227 jump_dest = 233;
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5228 latch_slot = 243;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5229 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5230 vint_line = context->inactive_start;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5231 active_line = 0x1FF;
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5232 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5233 latch_slot = 220;
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5234 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5235 } else {
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5236 latch_slot = 220;
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
5237 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5238 max_draws = MAX_DRAWS_H32_MODE4;
1278
34d3cb05014d Fix VDP buffer overrun that was causing sprite flickering in some games
Michael Pavone <pavone@retrodev.com>
parents: 1273
diff changeset
5239 max_sprites = 8;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5240 buf_clear_slot = 136;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5241 index_reset_slot = 253;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5242 index_reset_value = 0;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5243 vint_line = context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5244 vint_slot = VINT_SLOT_MODE4;
1177
67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents: 1175
diff changeset
5245 line_change = LINE_CHANGE_MODE4;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5246 jump_start = 147;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5247 jump_dest = 233;
2263
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
5248 if ((context->regs[REG_MODE_1] & BIT_MODE_4) || context->type != VDP_GENESIS) {
1380
9a5352a2f57a Implement horizontal border in Mode 4 and make a minor fix to advance_output_line to handle the later vcounter increment in that mode
Michael Pavone <pavone@retrodev.com>
parents: 1378
diff changeset
5249 active_line = 0x1FF;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5250 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5251 //never active unless either mode 4 or mode 5 is turned on
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5252 active_line = 0x200;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5253 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5254 }
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
5255 pixel_t *dst;
1644
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
5256 uint8_t *debug_dst;
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5257 if (context->output && context->hslot >= BG_START_SLOT && context->hslot <= bg_end_slot) {
1644
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
5258 dst = context->output + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
5259 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
5260 } else {
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
5261 dst = NULL;
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
5262 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5263
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
5264 uint8_t test_layer = context->test_regs[0] >> 7 & 3;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5265
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5266 while(context->cycles < target_cycles)
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5267 {
1362
83bdd358f3a7 Fix regression in games that disable the display early like F1 World Championship. Remove debug printf
Michael Pavone <pavone@retrodev.com>
parents: 1361
diff changeset
5268 check_switch_inactive(context, is_h40);
1834
304d47a5c67f Get rid of writes to INVALID_LINE in the framebuffer and fix a crash in OD2 from the recent accuracy work
Michael Pavone <pavone@retrodev.com>
parents: 1821
diff changeset
5269 if (context->hslot == BG_START_SLOT && context->output) {
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5270 dst = context->output + (context->hslot - BG_START_SLOT) * 2;
1644
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
5271 debug_dst = context->layer_debug_buf + 2 * (context->hslot - BG_START_SLOT);
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5272 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5273 //this will need some tweaking to properly interact with 128K mode,
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5274 //but this should be good enough for now
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5275 context->serial_address += 1024;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5276 if (test_layer) {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5277 switch (context->hslot & 7)
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5278 {
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5279 case 3:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5280 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5281 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5282 case 4:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5283 render_border_garbage(context, context->serial_address, context->tmp_buf_a, context->buf_a_off+8, context->col_2);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5284 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5285 case 7:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5286 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off, context->col_1);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5287 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5288 case 0:
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5289 render_border_garbage(context, context->serial_address, context->tmp_buf_b, context->buf_b_off+8, context->col_2);
1871
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
5290 break;
e75b788caedd Fix debug register output regression in border region
Michael Pavone <pavone@retrodev.com>
parents: 1869
diff changeset
5291 case 1:
1339
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5292 inactive_test_output(context, is_h40, test_layer);
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5293 break;
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5294 }
35e6a93b4586 Implement the effect of VDP test register usage on the top and bottom borders. Fixes the remaning issue with the border dissolve in the "Ninja Escape" scene of Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1338
diff changeset
5295 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5296
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5297 if (context->hslot == buf_clear_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5298 if (mode_5) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5299 context->cur_slot = max_draws;
2263
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
5300 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) || context->type == VDP_GENESIS) {
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5301 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5302 context->sprite_draws = MAX_DRAWS_H32_MODE4;
2263
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
5303 } else {
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
5304 context->sprite_draws = 0;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5305 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5306 memset(context->linebuf, 0, LINEBUF_SIZE);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5307 } else if (context->hslot == index_reset_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5308 context->sprite_index = index_reset_value;
1335
26e72126f9d1 Fixes to sprite phase 2 so that sprite X reads use the exact same slot as on hardware in the case that there are fewer than the max number of sprites on each line. Re-read sprite Y from SAT cache during phase 2 and properly mask the calculated row. Fixes remaining issues with spinning cube scene in Overdrive 2.
Michael Pavone <pavone@retrodev.com>
parents: 1334
diff changeset
5309 context->slot_counter = mode_5 ? 0 : max_sprites;
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5310 } else if (context->hslot == latch_slot) {
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5311 //it seems unlikely to me that vscroll actually gets latched when the display is off
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5312 //but it's the only straightforward way to reconcile what I'm seeing between Skitchin
1454
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5313 //(which seems to expect vscroll to be latched early) and the intro of Gunstar Heroes
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5314 //(which disables the display and ends up with garbage if vscroll is latched during that period)
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5315 //without it. Some more tests are definitely needed
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5316 context->vscroll_latch[0] = context->vsram[0];
a664bade4b29 Fix minor graphical regression in Gunstar Heroes
Michael Pavone <pavone@retrodev.com>
parents: 1437
diff changeset
5317 context->vscroll_latch[1] = context->vsram[1];
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5318 } else if (context->vcounter == vint_line && context->hslot == vint_slot) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5319 context->flags2 |= FLAG2_VINT_PENDING;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5320 context->pending_vint_start = context->cycles;
1436
40c3be9f1af7 Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents: 1432
diff changeset
5321 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
40c3be9f1af7 Fix timing of VDP ODD flag toggle
Michael Pavone <pavone@retrodev.com>
parents: 1432
diff changeset
5322 context->flags2 ^= FLAG2_EVEN_FIELD;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5323 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5324
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5325 if (dst) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5326 uint8_t bg_index;
2685
da2e06c42d16 Add a compile-time flag to use RGB565 instead of ABGR/ARGB
Michael Pavone <pavone@retrodev.com>
parents: 2675
diff changeset
5327 pixel_t bg_color;
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5328 if (mode_5) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5329 bg_index = context->regs[REG_BG_COLOR] & 0x3F;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5330 bg_color = context->colors[bg_index];
2263
a98b2d0de2f1 Fix TMS9918A first line sprite bug
Michael Pavone <pavone@retrodev.com>
parents: 2260
diff changeset
5331 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) || context->type != VDP_GENESIS) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5332 bg_index = 0x10 + (context->regs[REG_BG_COLOR] & 0xF);
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5333 bg_color = context->colors[MODE4_OFFSET + bg_index];
1913
2c742812bcbb Fix regression at the very start of The Revenge of Shinobi
Michael Pavone <pavone@retrodev.com>
parents: 1906
diff changeset
5334 } else {
2264
c7781cc950e9 Fix TMS9918A text mode
Michael Pavone <pavone@retrodev.com>
parents: 2263
diff changeset
5335 bg_color = context->color_map[0];
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5336 }
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5337 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5338 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5339 if (!(pixel & 0x3F | test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5340 pixel = pixel & 0xC0 | bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5341 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5342 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5343 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5344 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5345 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5346 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5347 } else {
1343
033dda2d4598 Fix transition from active to inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1342
diff changeset
5348 *(dst++) = bg_color;
1644
cf4e387a8db6 Populate layer debug buffer during inactive display
Michael Pavone <pavone@retrodev.com>
parents: 1643
diff changeset
5349 *(debug_dst++) = DBG_SRC_BG;
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5350 }
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5351 if (context->hslot != bg_end_slot) {
1821
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5352 if (context->done_composite) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5353 uint8_t pixel = context->compositebuf[dst-context->output];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5354 if (!(pixel & 0x3F | test_layer)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5355 pixel = pixel & 0xC0 | bg_index;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5356 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5357 *(dst++) = context->colors[pixel];
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5358 if ((dst - context->output) == (context->done_composite - context->compositebuf)) {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5359 context->done_composite = NULL;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5360 memset(context->compositebuf, 0, sizeof(context->compositebuf));
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5361 }
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5362 } else {
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5363 *(dst++) = bg_color;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5364 *(debug_dst++) = DBG_SRC_BG;
4f3443ecb6d6 Separate compositing from final output. Fixes some minor accuracy issues with regards to when background color reg/CRAM changes take effect. Fixes minor glitch in DF Retro Direct Color DMA demo at inactive/active transition
Michael Pavone <pavone@retrodev.com>
parents: 1785
diff changeset
5365 }
1267
3772bb926be5 Initial stab at horizontal border emulation. Only works for H40 and still has a few minor holes to fill
Michael Pavone <pavone@retrodev.com>
parents: 1191
diff changeset
5366 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5367 }
2241
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5368 if (context->hslot == bg_end_slot) {
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5369 advance_output_line(context);
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5370 dst = NULL;
48f718126099 Fix minor regression in Landstalker caused by changes to when CRAM lookup is done
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
5371 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5372
1183
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
5373 if (!is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
5374 external_slot(context);
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
5375 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) {
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
5376 run_dma_src(context, context->hslot);
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
5377 }
8d8c71ebbbce CRAM contention artifact emulation
Michael Pavone <pavone@retrodev.com>
parents: 1180
diff changeset
5378 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5379
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5380 if (is_h40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5381 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5382 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40];
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5383 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5384 context->cycles += MCLKS_SLOT_H40;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5385 }
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5386 } else {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5387 context->cycles += MCLKS_SLOT_H32;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5388 }
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5389 if (context->hslot == jump_start) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5390 context->hslot = jump_dest;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5391 } else {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5392 context->hslot++;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
5393 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5394 if (context->hslot == line_change) {
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5395 vdp_advance_line(context);
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5396 if (context->vcounter == active_line) {
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5397 context->state = PREPARING;
2567
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
5398 if (!context->done_composite) {
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
5399 memset(context->compositebuf, 0, sizeof(context->compositebuf));
8872c8e3e0fc Fix minor regression in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 2566
diff changeset
5400 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5401 return;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
5402 }
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5403 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5404 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5405 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5406
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5407 static void vdp_inactive_phony(vdp_context *context, uint32_t target_cycles, uint8_t is_h40, uint8_t mode_5)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5408 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5409 uint8_t buf_clear_slot, index_reset_slot, bg_end_slot, vint_slot, line_change, jump_start, jump_dest, latch_slot;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5410 uint8_t index_reset_value, max_draws, max_sprites;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5411 uint16_t vint_line, active_line;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5412
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5413 if (mode_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5414 if (is_h40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5415 latch_slot = 165;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5416 buf_clear_slot = 163;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5417 index_reset_slot = 167;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5418 bg_end_slot = BG_START_SLOT + LINEBUF_SIZE/2;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5419 max_draws = MAX_SPRITES_LINE-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5420 max_sprites = MAX_SPRITES_LINE;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5421 index_reset_value = 0x80;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5422 vint_slot = VINT_SLOT_H40;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5423 line_change = LINE_CHANGE_H40;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5424 jump_start = 182;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5425 jump_dest = 229;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5426 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5427 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5428 max_draws = MAX_SPRITES_LINE_H32-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5429 max_sprites = MAX_SPRITES_LINE_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5430 buf_clear_slot = 128;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5431 index_reset_slot = 132;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5432 index_reset_value = 0x80;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5433 vint_slot = VINT_SLOT_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5434 line_change = LINE_CHANGE_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5435 jump_start = 147;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5436 jump_dest = 233;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5437 latch_slot = 243;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5438 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5439 vint_line = context->inactive_start;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5440 active_line = 0x1FF;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5441 if (context->regs[REG_MODE_3] & BIT_VSCROLL) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5442 latch_slot = 220;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5443 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5444 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5445 latch_slot = 220;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5446 bg_end_slot = BG_START_SLOT + (256+HORIZ_BORDER)/2;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5447 max_draws = MAX_DRAWS_H32_MODE4;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5448 max_sprites = 8;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5449 buf_clear_slot = 136;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5450 index_reset_slot = 253;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5451 index_reset_value = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5452 vint_line = context->inactive_start + 1;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5453 vint_slot = VINT_SLOT_MODE4;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5454 line_change = LINE_CHANGE_MODE4;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5455 jump_start = 147;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5456 jump_dest = 233;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5457 if ((context->regs[REG_MODE_1] & BIT_MODE_4) || context->type != VDP_GENESIS) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5458 active_line = 0x1FF;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5459 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5460 //never active unless either mode 4 or mode 5 is turned on
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5461 active_line = 0x200;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5462 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5463 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5464
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5465 while(context->cycles < target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5466 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5467 check_switch_inactive(context, is_h40);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5468 //this will need some tweaking to properly interact with 128K mode,
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5469 //but this should be good enough for now
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5470 context->serial_address += 1024;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5471
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5472 if (context->hslot == buf_clear_slot) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5473 if (mode_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5474 context->cur_slot = max_draws;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5475 } else if ((context->regs[REG_MODE_1] & BIT_MODE_4) || context->type == VDP_GENESIS) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5476 context->cur_slot = context->sprite_index = MAX_DRAWS_H32_MODE4-1;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5477 context->sprite_draws = MAX_DRAWS_H32_MODE4;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5478 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5479 context->sprite_draws = 0;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5480 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5481 memset(context->linebuf, 0, LINEBUF_SIZE);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5482 } else if (context->hslot == index_reset_slot) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5483 context->sprite_index = index_reset_value;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5484 context->slot_counter = mode_5 ? 0 : max_sprites;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5485 } else if (context->vcounter == vint_line && context->hslot == vint_slot) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5486 context->flags2 |= FLAG2_VINT_PENDING;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5487 context->pending_vint_start = context->cycles;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5488 } else if (context->vcounter == context->inactive_start && context->hslot == 1 && (context->regs[REG_MODE_4] & BIT_INTERLACE)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5489 context->flags2 ^= FLAG2_EVEN_FIELD;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5490 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5491
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5492 if (!is_refresh(context, context->hslot)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5493 external_slot(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5494 if (context->flags & FLAG_DMA_RUN && !is_refresh(context, context->hslot)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5495 run_dma_src(context, context->hslot);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5496 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5497 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5498
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5499 if (is_h40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5500 if (context->hslot >= HSYNC_SLOT_H40 && context->hslot < HSYNC_END_H40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5501 context->cycles += h40_hsync_cycles[context->hslot - HSYNC_SLOT_H40];
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5502 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5503 context->cycles += MCLKS_SLOT_H40;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5504 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5505 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5506 context->cycles += MCLKS_SLOT_H32;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5507 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5508 if (context->hslot == jump_start) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5509 context->hslot = jump_dest;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5510 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5511 context->hslot++;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5512 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5513 if (context->hslot == line_change) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5514 vdp_advance_line(context);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5515 if (context->vcounter == active_line) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5516 context->state = PREPARING;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5517 return;
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5518 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5519 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5520 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5521 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5522
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5523 void vdp_run_context_full(vdp_context * context, uint32_t target_cycles)
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5524 {
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
5525 uint8_t is_h40 = context->regs[REG_MODE_4] & BIT_H40;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
5526 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5527 if (context->renderer) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5528 while(context->cycles < target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5529 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5530 check_switch_inactive(context, is_h40);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5531
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5532 if (is_active(context)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5533 if (mode_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5534 if (is_h40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5535 vdp_h40_phony(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5536 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5537 vdp_h32_phony(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5538 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5539 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5540 //TODO: phonyfy this
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5541 vdp_h32_mode4(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5542 } else if (context->regs[REG_MODE_2] & BIT_M1) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5543 vdp_tms_text(context, target_cycles);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
5544 } else {
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5545 vdp_tms_graphics(context, target_cycles);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
5546 }
330
57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 329
diff changeset
5547 } else {
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5548 vdp_inactive_phony(context, target_cycles, is_h40, mode_5);
330
57453d3d8be4 Initial stab at implementing funky clock adjustments during HSYNC for H40 mode
Mike Pavone <pavone@retrodev.com>
parents: 329
diff changeset
5549 }
2686
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5550 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5551 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5552 while(context->cycles < target_cycles)
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5553 {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5554 check_switch_inactive(context, is_h40);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5555
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5556 if (is_active(context)) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5557 if (mode_5) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5558 if (is_h40) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5559 vdp_h40(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5560 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5561 vdp_h32(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5562 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5563 } else if (context->regs[REG_MODE_1] & BIT_MODE_4) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5564 vdp_h32_mode4(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5565 } else if (context->regs[REG_MODE_2] & BIT_M1) {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5566 vdp_tms_text(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5567 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5568 vdp_tms_graphics(context, target_cycles);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5569 }
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5570 } else {
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5571 vdp_inactive(context, target_cycles, is_h40, mode_5);
05915f01046d WIP attempt to move VDP rendering to a separate thread
Michael Pavone <pavone@retrodev.com>
parents: 2685
diff changeset
5572 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5573 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5574 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5575 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5576
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5577 void vdp_run_context(vdp_context *context, uint32_t target_cycles)
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5578 {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5579 //TODO: Deal with H40 hsync shenanigans
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5580 uint32_t slot_cyc = context->regs[REG_MODE_4] & BIT_H40 ? 15 : 19;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5581 if (target_cycles < slot_cyc) {
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5582 //avoid overflow
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5583 return;
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5584 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5585 vdp_run_context_full(context, target_cycles - slot_cyc);
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5586 }
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5587
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5588 uint32_t vdp_run_to_vblank(vdp_context * context)
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5589 {
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
5590 uint32_t old_frame = context->frame;
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
5591 while (context->frame == old_frame) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5592 vdp_run_context_full(context, context->cycles + MCLKS_LINE);
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
5593 }
20
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5594 return context->cycles;
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5595 }
f664eeb55cb4 Mostly broken VDP core and savestate viewer
Mike Pavone <pavone@retrodev.com>
parents:
diff changeset
5596
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5597 void vdp_run_dma_done(vdp_context * context, uint32_t target_cycles)
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5598 {
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5599 for(;;) {
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5600 uint32_t dmalen = (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L];
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5601 if (!dmalen) {
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5602 dmalen = 0x10000;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5603 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5604 uint32_t min_dma_complete = dmalen * (context->regs[REG_MODE_4] & BIT_H40 ? 16 : 20);
1321
0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1320
diff changeset
5605 if (
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5606 (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_COPY
1321
0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1320
diff changeset
5607 || (((context->cd & 0xF) == VRAM_WRITE) && !(context->regs[REG_MODE_2] & BIT_128K_VRAM))) {
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5608 //DMA copies take twice as long to complete since they require a read and a write
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5609 //DMA Fills and transfers to VRAM also take twice as long as it requires 2 writes for a single word
1321
0849e9356bfe Fix time 68K is locked out of bus when doing a 128KB VRAM mode DMA transfer. Fixes a number of problems in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1320
diff changeset
5610 //unless 128KB mode is enabled
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5611 min_dma_complete *= 2;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5612 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5613 min_dma_complete += context->cycles;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5614 if (target_cycles < min_dma_complete) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5615 vdp_run_context_full(context, target_cycles);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5616 return;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5617 } else {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5618 vdp_run_context_full(context, min_dma_complete);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5619 if (!(context->flags & FLAG_DMA_RUN)) {
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5620 return;
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5621 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5622 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5623 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5624 }
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5625
1154
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5626 static uint16_t get_ext_vcounter(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5627 {
1437
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
5628 uint16_t line= context->vcounter;
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
5629 if (context->regs[REG_MODE_4] & BIT_INTERLACE) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
5630 if (context->double_res) {
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
5631 line <<= 1;
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
5632 } else {
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
5633 line &= 0x1FE;
da72344af3ff Fix external v counter when normal resolution interlace mode is active
Michael Pavone <pavone@retrodev.com>
parents: 1436
diff changeset
5634 }
1154
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5635 if (line & 0x100) {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5636 line |= 1;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5637 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5638 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5639 return line << 8;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5640 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5641
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5642 void vdp_latch_hv(vdp_context *context)
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5643 {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5644 context->hv_latch = context->hslot | get_ext_vcounter(context);
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5645 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5646
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5647 uint16_t vdp_hv_counter_read(vdp_context * context)
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5648 {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5649 if ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_1] & BIT_HVC_LATCH)) {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5650 return context->hv_latch;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5651 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5652 uint16_t hv;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5653 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5654 hv = context->hslot;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5655 } else {
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5656 hv = context->hv_latch & 0xFF;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5657 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5658 hv |= get_ext_vcounter(context);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
5659
1154
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5660 return hv;
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5661 }
c83ec07ddbac Implemented Mode 4 H conter latching
Michael Pavone <pavone@retrodev.com>
parents: 1153
diff changeset
5662
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5663 void vdp_reg_write(vdp_context *context, uint16_t reg, uint16_t value)
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5664 {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5665 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5666 if (reg < (mode_5 ? VDP_REGS : 0xB)) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5667 //printf("register %d set to %X\n", reg, value & 0xFF);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5668 if (reg == REG_MODE_1 && (value & BIT_HVC_LATCH) && !(context->regs[reg] & BIT_HVC_LATCH)) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5669 vdp_latch_hv(context);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5670 } else if (reg == REG_BG_COLOR) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5671 value &= 0x3F;
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5672 } else if (reg == REG_MODE_2 && context->type != VDP_GENESIS) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5673 // only the Genesis VDP does anything with this bit
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5674 // so just clear it to prevent Mode 5 selection if we're not emulating that chip
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5675 value &= ~BIT_MODE_5;
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5676 }
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5677 /*if (reg == REG_MODE_4 && ((value ^ context->regs[reg]) & BIT_H40)) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5678 printf("Mode changed from H%d to H%d @ %d, frame: %d\n", context->regs[reg] & BIT_H40 ? 40 : 32, value & BIT_H40 ? 40 : 32, context->cycles, context->frame);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5679 }*/
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5680 uint8_t buffer[2] = {reg, value};
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5681 event_log(EVENT_VDP_REG, context->cycles, sizeof(buffer), buffer);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5682 context->regs[reg] = value;
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5683 if (reg == REG_MODE_1 || reg == REG_MODE_2 || reg == REG_MODE_4) {
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5684 update_video_params(context);
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5685 }
2559
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5686 } else if (context->type == VDP_GENESIS) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5687 // Apparently Bart vs. the Space Mutants for SMS/GG writes to the timer KMOD timer register
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5688 // Probably need to add some sort of config toggle for KMOD registers generally, but this is a quick fix
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5689 if (reg == REG_KMOD_CTRL) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5690 if (!(value & 0xFF)) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5691 context->system->enter_debugger = 1;
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5692 }
2559
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5693 } else if (reg == REG_KMOD_MSG) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5694 char c = value;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5695 if (c) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5696 context->kmod_buffer_length++;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5697 if ((context->kmod_buffer_length + 1) > context->kmod_buffer_storage) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5698 context->kmod_buffer_storage = context->kmod_buffer_storage ? context->kmod_buffer_storage * 2 : 128;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5699 context->kmod_msg_buffer = realloc(context->kmod_msg_buffer, context->kmod_buffer_storage);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5700 }
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5701 context->kmod_msg_buffer[context->kmod_buffer_length - 1] = c;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5702 } else if (context->kmod_buffer_length) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5703 context->kmod_msg_buffer[context->kmod_buffer_length] = 0;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5704 if (is_stdout_enabled()) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5705 init_terminal();
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5706 printf("KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5707 } else {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5708 // GDB remote debugging is enabled, use stderr instead
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5709 fprintf(stderr, "KDEBUG MESSAGE: %s\n", context->kmod_msg_buffer);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5710 }
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5711 context->kmod_buffer_length = 0;
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5712 }
2559
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5713 } else if (reg == REG_KMOD_TIMER) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5714 if (!(value & 0x80)) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5715 if (is_stdout_enabled()) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5716 init_terminal();
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5717 printf("KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5718 } else {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5719 // GDB remote debugging is enabled, use stderr instead
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5720 fprintf(stderr, "KDEBUG TIMER: %d\n", (context->cycles - context->timer_start_cycle) / 7);
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5721 }
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5722 }
2559
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5723 if (value & 0xC0) {
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5724 context->timer_start_cycle = context->cycles;
e534423bd20d Disable KMOD debug registers when not emulating an MD VDP
Michael Pavone <pavone@retrodev.com>
parents: 2557
diff changeset
5725 }
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5726 }
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5727 }
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5728 }
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5729
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5730 int vdp_control_port_write(vdp_context * context, uint16_t value, uint32_t cpu_cycle)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5731 {
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5732 //printf("control port write: %X at %d\n", value, context->cycles);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5733 if (context->flags & FLAG_PENDING) {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5734 context->address_latch = value << 14 & 0x1C000;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5735 context->address = (context->address & 0x3FFF) | context->address_latch;
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5736 //It seems like the DMA enable bit doesn't so much enable DMA so much
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5737 //as it enables changing CD5 from control port writes
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5738 if (context->regs[REG_MODE_2] & BIT_DMA_ENABLE) {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5739 context->cd = (context->cd & 0x3) | ((value >> 2) & ~0x3 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5740 } else {
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5741 context->cd = (context->cd & 0x23) | ((value >> 2) & ~0x23 & 0xFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5742 }
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5743 context->flags &= ~FLAG_PENDING;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5744 //Should these be taken care of here or after the first write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5745 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5746 context->flags2 &= ~FLAG2_READ_PENDING;
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5747 if (!(context->cd & 1)) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5748 context->read_latency = cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5749 }
453
b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents: 452
diff changeset
5750 //printf("New Address: %X, New CD: %X\n", context->address, context->cd);
983
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
5751 if (context->cd & 0x20) {
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
5752 //
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
5753 if((context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) != DMA_FILL) {
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5754 //DMA copy or 68K -> VDP, transfer starts immediately
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
5755 //printf("DMA start (length: %X) at cycle %d, frame: %d, vcounter: %d, hslot: %d\n", (context->regs[REG_DMALEN_H] << 8) | context->regs[REG_DMALEN_L], context->cycles, context->frame, context->vcounter, context->hslot);
1191
8dc50e50ced6 Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents: 1189
diff changeset
5756 if (!(context->regs[REG_DMASRC_H] & 0x80)) {
8dc50e50ced6 Remove accidentally committed debug logging
Michael Pavone <pavone@retrodev.com>
parents: 1189
diff changeset
5757 //printf("DMA Address: %X, New CD: %X, Source: %X, Length: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_H] << 17) | (context->regs[REG_DMASRC_M] << 9) | (context->regs[REG_DMASRC_L] << 1), context->regs[REG_DMALEN_H] << 8 | context->regs[REG_DMALEN_L]);
1289
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents: 1285
diff changeset
5758 //68K -> VDP DMA takes a few slots to actually start reading even though it acquires the bus immediately
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents: 1285
diff changeset
5759 //logic analyzer captures made it seem like the proper value is 4 slots, but that seems to cause trouble with the Nemesis' FIFO Wait State test
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents: 1285
diff changeset
5760 //only captures are from a direct color DMA demo which will generally start DMA at a very specific point in display so other values are plausible
6ad59a62e656 Adjust DMA start delay to not break the FIFO Wait State test in the VDP FIFO Testing ROM
Michael Pavone <pavone@retrodev.com>
parents: 1285
diff changeset
5761 //sticking with 3 slots for now until I can do some more captures
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5762 vdp_run_context_full(context, context->cycles + 12 * ((context->regs[REG_MODE_2] & BIT_MODE_5) && (context->regs[REG_MODE_4] & BIT_H40) ? 4 : 5));
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5763 vdp_dma_started();
1285
76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents: 1278
diff changeset
5764 context->flags |= FLAG_DMA_RUN;
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5765 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5766 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5767 }
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5768 return 1;
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
5769 } else {
1285
76e47254596b Remove hacky post-DMA delay add proper pre-DMA delay based on logic analyzer capture. 512 color screen is a bit messed up but mostly works. Needs investigation
Michael Pavone <pavone@retrodev.com>
parents: 1278
diff changeset
5770 context->flags |= FLAG_DMA_RUN;
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5771 if (context->dma_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5772 context->dma_hook(context);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5773 }
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
5774 //printf("DMA Copy Address: %X, New CD: %X, Source: %X\n", context->address, context->cd, (context->regs[REG_DMASRC_M] << 8) | context->regs[REG_DMASRC_L]);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5775 }
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
5776 } else {
453
b491df8bdbc0 Adjust VBLANK flag and refresh timing to be in line with logic analyzer and visual observations of direct color DMA demos. Remove debug print statements.
Mike Pavone <pavone@retrodev.com>
parents: 452
diff changeset
5777 //printf("DMA Fill Address: %X, New CD: %X\n", context->address, context->cd);
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5778 }
63
a6dd5b7a971b Add FPS counter to console output
Mike Pavone <pavone@retrodev.com>
parents: 58
diff changeset
5779 }
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5780 } else {
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
5781 uint8_t mode_5 = context->regs[REG_MODE_2] & BIT_MODE_5;
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5782 context->address = context->address_latch | (value & 0x3FFF);
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5783 context->cd = (context->cd & 0x3C) | (value >> 14);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5784 if ((value & 0xC000) == 0x8000) {
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5785 //Register write
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5786 uint16_t reg = (value >> 8) & 0x1F;
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5787 if (context->reg_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5788 context->reg_hook(context, reg, value);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5789 }
2359
04d29635d238 Support for arrays in debugger language
Michael Pavone <pavone@retrodev.com>
parents: 2358
diff changeset
5790 vdp_reg_write(context, reg, value);
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
5791 } else if (mode_5) {
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5792 context->flags |= FLAG_PENDING;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5793 //Should these be taken care of here or after the second write?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5794 //context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5795 //context->flags2 &= ~FLAG2_READ_PENDING;
1120
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
5796 } else {
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
5797 context->flags &= ~FLAG_READ_FETCHED;
e9369d6f0101 Somewhat broken implementation of Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 1117
diff changeset
5798 context->flags2 &= ~FLAG2_READ_PENDING;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5799 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5800 }
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5801 return 0;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5802 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5803
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5804 void vdp_control_port_write_pbc(vdp_context *context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5805 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5806 if (context->flags2 & FLAG2_BYTE_PENDING) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5807 uint16_t full_val = value << 8 | context->pending_byte;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5808 context->flags2 &= ~FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5809 //TODO: Deal with fact that Vbus->VDP DMA doesn't do anything in PBC mode
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5810 vdp_control_port_write(context, full_val, context->cycles);
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
5811 if (context->cd == VRAM_READ) {
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
5812 context->cd = VRAM_READ8;
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
5813 }
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5814 } else {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5815 context->pending_byte = value;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5816 context->flags2 |= FLAG2_BYTE_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5817 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5818 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5819
2571
3d14db924e57 DMA fill and copy should not block VDP data or control port writes
Michael Pavone <pavone@retrodev.com>
parents: 2570
diff changeset
5820 void vdp_data_port_write(vdp_context * context, uint16_t value)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5821 {
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5822 //printf("data port write: %X at %d\n", value, context->cycles);
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5823 if (context->flags & FLAG_PENDING) {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5824 context->flags &= ~FLAG_PENDING;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5825 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5826 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5827 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5828 }
109
004dd46e0a97 COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents: 108
diff changeset
5829 /*if (context->fifo_cur == context->fifo_end) {
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5830 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
109
004dd46e0a97 COmment out fifo full debug printf
Mike Pavone <pavone@retrodev.com>
parents: 108
diff changeset
5831 }*/
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
5832 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
460
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
5833 context->flags &= ~FLAG_DMA_RUN;
788ba843a731 Implement FIFO latency and improve DMA accuracy
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
5834 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5835 while (context->fifo_write == context->fifo_read) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5836 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5837 }
2361
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5838 if (context->data_hook) {
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5839 context->data_hook(context, value);
3350b3c8faa8 Initial implementation of VDP register write breakpoints
Michael Pavone <pavone@retrodev.com>
parents: 2359
diff changeset
5840 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5841 fifo_entry * cur = context->fifo + context->fifo_write;
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5842 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5843 cur->address = context->address;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5844 cur->value = value;
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5845 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5846 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5847 } else {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5848 cur->cd = (context->cd & 2) | 1;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5849 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5850 cur->partial = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5851 if (context->fifo_read < 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5852 context->fifo_read = context->fifo_write;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5853 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5854 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
5855 increment_address(context);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5856 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5857
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5858 void vdp_data_port_write_pbc(vdp_context * context, uint8_t value)
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5859 {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5860 if (context->flags & FLAG_PENDING) {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5861 context->flags &= ~FLAG_PENDING;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5862 //Should these be cleared here?
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5863 context->flags &= ~FLAG_READ_FETCHED;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5864 context->flags2 &= ~FLAG2_READ_PENDING;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5865 }
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5866 context->flags2 &= ~FLAG2_BYTE_PENDING;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5867 /*if (context->fifo_cur == context->fifo_end) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5868 printf("FIFO full, waiting for space before next write at cycle %X\n", context->cycles);
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5869 }*/
1637
95880d947257 Fix for VRAM byte write order broke VDP FIFO testing ROM results. This change cleans up VRAM writes and fixes the regression while preserving the correct VRAM byte write order
Michael Pavone <pavone@retrodev.com>
parents: 1634
diff changeset
5870 if (context->cd & 0x20 && (context->regs[REG_DMASRC_H] & DMA_TYPE_MASK) == DMA_FILL) {
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5871 context->flags &= ~FLAG_DMA_RUN;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5872 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5873 while (context->fifo_write == context->fifo_read) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5874 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5875 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5876 fifo_entry * cur = context->fifo + context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5877 cur->cycle = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*FIFO_LATENCY;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5878 cur->address = context->address;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5879 cur->value = value;
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5880 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5881 cur->cd = context->cd;
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5882 } else {
2473
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
5883 if ((context->cd & 3) == CRAM_WRITE) {
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
5884 cur->cd = CRAM_WRITE;
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
5885 } else {
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
5886 cur->cd = VRAM_WRITE;
cf3e8a19aa25 Fix Ax Battler: A Legend of Golden Axe
Michael Pavone <pavone@retrodev.com>
parents: 2465
diff changeset
5887 }
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
5888 }
1333
69c25e1188e5 Small tweak to how SAT cache updates are done. Mostly fixes the rotating cube scene in Overdrive 2
Michael Pavone <pavone@retrodev.com>
parents: 1331
diff changeset
5889 cur->partial = 3;
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5890 if (context->fifo_read < 0) {
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5891 context->fifo_read = context->fifo_write;
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5892 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5893 context->fifo_write = (context->fifo_write + 1) & (FIFO_SIZE-1);
1151
681e8a13b261 Fix some issues with VDP interface in Mode 4/PBC mode
Michael Pavone <pavone@retrodev.com>
parents: 1150
diff changeset
5894 increment_address(context);
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5895 }
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5896
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
5897 void vdp_test_port_select(vdp_context * context, uint16_t value)
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
5898 {
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
5899 context->selected_test_reg = value >> 8 & 0xF;
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
5900 }
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
5901
470
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
5902 void vdp_test_port_write(vdp_context * context, uint16_t value)
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
5903 {
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
5904 if (context->selected_test_reg < 8) {
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
5905 context->test_regs[context->selected_test_reg] = value;
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
5906 }
470
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
5907 }
541c1ae8abf3 Properly delay 68K on VDP reads. Dummy VDP test port implementation. Initial stab at handling undefined bits of VSRAM and CRAM.
Mike Pavone <pavone@retrodev.com>
parents: 467
diff changeset
5908
2358
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5909 uint16_t vdp_status(vdp_context *context)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5910 {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5911 //Bits 15-10 are not fixed like Charles MacDonald's doc suggests, but instead open bus values that reflect 68K prefetch
1117
928a65750345 Initial support for Genesis/Megadrive PBC mode. VDP still needs Mode 4 to be useful.
Michael Pavone <pavone@retrodev.com>
parents: 1106
diff changeset
5912 uint16_t value = context->system->get_open_bus_value(context->system) & 0xFC00;
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5913 if (context->fifo_read < 0) {
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5914 value |= 0x200;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5915 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
5916 if (context->fifo_read == context->fifo_write) {
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5917 value |= 0x100;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5918 }
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5919 if (context->flags2 & FLAG2_VINT_PENDING) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
5920 value |= 0x80;
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
5921 }
2574
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
5922 if (context->flags & FLAG_SPRITE_OFLOW) {
494
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5923 value |= 0x40;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5924 }
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5925 if (context->flags2 & FLAG2_SPRITE_COLLIDE) {
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5926 value |= 0x20;
8ac0eb05642c Initial implementation of sprite overflow and sprite collision status register flags
Mike Pavone <pavone@retrodev.com>
parents: 481
diff changeset
5927 }
1077
1a66d5165ea7 Cleanup the separation of render backend and VDP code in preparation for having extra debug windows. Make determination of H40/H32 based on number of lines in each mode.
Michael Pavone <pavone@retrodev.com>
parents: 1076
diff changeset
5928 if ((context->regs[REG_MODE_4] & BIT_INTERLACE) && !(context->flags2 & FLAG2_EVEN_FIELD)) {
413
36fbbced25c2 Initial work on interlace
Mike Pavone <pavone@retrodev.com>
parents: 337
diff changeset
5929 value |= 0x10;
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5930 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5931 uint32_t slot = context->hslot;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
5932 if (!is_active(context)) {
318
789f2f5f2277 Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents: 317
diff changeset
5933 value |= 0x8;
789f2f5f2277 Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents: 317
diff changeset
5934 }
622
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5935 if (context->regs[REG_MODE_4] & BIT_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5936 if (slot < HBLANK_END_H40 || slot > HBLANK_START_H40) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5937 value |= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5938 }
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5939 } else {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5940 if (slot < HBLANK_END_H32 || slot > HBLANK_START_H32) {
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5941 value |= 0x4;
b76d2a628ab9 Partially working switch to having a vcounter and hslot counter in the context rather than trying to derive them from the cycle count. This should allow for more accurate handling of mid screen mode switches. Interrupt timing is broken currently though
Michael Pavone <pavone@retrodev.com>
parents: 621
diff changeset
5942 }
318
789f2f5f2277 Implement hblank flag in status register
Mike Pavone <pavone@retrodev.com>
parents: 317
diff changeset
5943 }
983
14d2f3b0e45d Fixes to the DMA busy flag and DMA fill. Now up to 120/122 on VDP FIFO Testing.
Michael Pavone <pavone@retrodev.com>
parents: 981
diff changeset
5944 if (context->cd & 0x20) {
141
576f55711d8d Fix DMA in progress flag in VDP status register
Mike Pavone <pavone@retrodev.com>
parents: 138
diff changeset
5945 value |= 0x2;
75
108e587165c0 Implement DMA (untested)
Mike Pavone <pavone@retrodev.com>
parents: 65
diff changeset
5946 }
714
e29bc2918f69 Fix VDP status register PAL bit based on observations of the Titan Overdrive demo
Michael Pavone <pavone@retrodev.com>
parents: 711
diff changeset
5947 if (context->flags2 & FLAG2_REGION_PAL) {
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5948 value |= 0x1;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
5949 }
2358
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5950 return value;
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5951 }
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5952
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5953 uint16_t vdp_control_port_read(vdp_context * context)
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5954 {
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5955 uint16_t value = vdp_status(context);
2574
0da40b1978fd Sprite overflow flag should only be set when there are too many sprites in a line and not when there are just too many sprite pixels. Fixes regression in Madou Monogatari I
Michael Pavone <pavone@retrodev.com>
parents: 2572
diff changeset
5956 context->flags &= ~(FLAG_SPRITE_OFLOW|FLAG_PENDING);
2358
4b2ac43c106e Give debugger expression engine access to VDP and Sub CPU values. Add basic variable support
Michael Pavone <pavone@retrodev.com>
parents: 2338
diff changeset
5957 context->flags2 &= ~(FLAG2_SPRITE_COLLIDE|FLAG2_BYTE_PENDING);
459
c49ecf575784 Revert change to VBLANK flag timing based on new direct color DMA test
Mike Pavone <pavone@retrodev.com>
parents: 454
diff changeset
5958 //printf("status read at cycle %d returned %X\n", context->cycles, value);
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5959 return value;
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5960 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5961
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5962 uint16_t vdp_data_port_read(vdp_context * context, uint32_t *cpu_cycle, uint32_t cpu_divider)
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5963 {
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5964 if (context->flags & FLAG_PENDING) {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
5965 context->flags &= ~FLAG_PENDING;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5966 //Should these be cleared here?
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5967 context->flags &= ~FLAG_READ_FETCHED;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5968 context->flags2 &= ~FLAG2_READ_PENDING;
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5969 }
138
aa3e1bb338c9 Fix VDP reads
Mike Pavone <pavone@retrodev.com>
parents: 137
diff changeset
5970 if (context->cd & 1) {
991
f9ee6f746cb4 Properly emulate machine freeze when reading from VDP while configured for writes
Michael Pavone <pavone@retrodev.com>
parents: 984
diff changeset
5971 warning("Read from VDP data port while writes are configured, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
1998
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5972 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5973 return context->prefetch;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5974 }
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5975 switch (context->cd)
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5976 {
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5977 case VRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5978 case VSRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5979 case CRAM_READ:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5980 case VRAM_READ8:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5981 break;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5982 default:
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5983 warning("Read from VDP data port with invalid source, CPU is now frozen. VDP Address: %X, CD: %X\n", context->address, context->cd);
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5984 context->system->enter_debugger = 1;
0740d90812ee Enter debugger when a VDP data port read would cause a CPU lockup
Mike Pavone <pavone@retrodev.com>
parents: 1997
diff changeset
5985 return context->prefetch;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5986 }
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5987 uint32_t starting_cycle = context->cycles;
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5988 while (!(context->flags & FLAG_READ_FETCHED)) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
5989 vdp_run_context_full(context, context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20));
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
5990 }
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
5991 context->flags &= ~FLAG_READ_FETCHED;
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5992 //TODO: Make some logic analyzer captures to better characterize what's happening with read latency here
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5993 if (context->cycles != starting_cycle) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5994 uint32_t delta = context->cycles - *cpu_cycle;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5995 uint32_t cpu_delta = delta / cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5996 if (delta % cpu_divider) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5997 cpu_delta++;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5998 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
5999 *cpu_cycle += cpu_delta * cpu_divider;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6000 if (*cpu_cycle - context->cycles < 2) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6001 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6002 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6003 context->read_latency = context->cycles + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*READ_LATENCY;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6004 }
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6005 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6006 context->read_latency = *cpu_cycle + ((context->regs[REG_MODE_4] & BIT_H40) ? 16 : 20)*(READ_LATENCY - 1);
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6007 }
980
928442068afe Implemented VDP read prefetch and made DMA copy not use the FIFO any more. Now up to 114 out of 122 passing on VDP FIFO Test ROM
Michael Pavone <pavone@retrodev.com>
parents: 953
diff changeset
6008 return context->prefetch;
54
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
6009 }
3b79cbcf6846 Get Flavio's color bar demo kind of sort of working
Mike Pavone <pavone@retrodev.com>
parents: 43
diff changeset
6010
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
6011 uint8_t vdp_data_port_read_pbc(vdp_context * context)
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
6012 {
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
6013 context->flags &= ~(FLAG_PENDING | FLAG_READ_FETCHED);
1153
2e3ad914bad3 BlastEm now passes all of the tests on the first page of "Megadrive VDP Test" in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1152
diff changeset
6014 context->flags2 &= ~FLAG2_BYTE_PENDING;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
6015
1152
ddbb61be6119 Fix to pass a couple more tests in VDPTEST.sms
Michael Pavone <pavone@retrodev.com>
parents: 1151
diff changeset
6016 context->cd = VRAM_READ8;
1149
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
6017 return context->prefetch;
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
6018 }
6b0da6021544 Don't lock up CPU if performing a read with writes configured when in PBC mode. Allow access to VDP debug commands from Z80 debugger in PBC mode. Handle Mode 4 in VDP debug print functions
Michael Pavone <pavone@retrodev.com>
parents: 1138
diff changeset
6019
65
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
6020 void vdp_adjust_cycles(vdp_context * context, uint32_t deduction)
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
6021 {
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
6022 context->cycles -= deduction;
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6023 if (context->pending_vint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6024 context->pending_vint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6025 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6026 context->pending_vint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6027 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6028 if (context->pending_hint_start >= deduction) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6029 context->pending_hint_start -= deduction;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6030 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6031 context->pending_hint_start = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6032 }
471
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6033 if (context->fifo_read >= 0) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6034 int32_t idx = context->fifo_read;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6035 do {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6036 if (context->fifo[idx].cycle >= deduction) {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6037 context->fifo[idx].cycle -= deduction;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6038 } else {
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6039 context->fifo[idx].cycle = 0;
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6040 }
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6041 idx = (idx+1) & (FIFO_SIZE-1);
f065769836e8 Implement FIFO as a ring buffer so the behavior of reads from invalid CRAM and VSRAM bits can be implemented properly
Mike Pavone <pavone@retrodev.com>
parents: 470
diff changeset
6042 } while(idx != context->fifo_write);
65
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
6043 }
2227
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6044 if (context->read_latency >= deduction) {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6045 context->read_latency -= deduction;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6046 } else {
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6047 context->read_latency = 0;
eaaf28af3c94 Implement VDP read latency and invalid write delays revealed by Ti_'s instruction timing ROM
Michael Pavone <pavone@retrodev.com>
parents: 2223
diff changeset
6048 }
65
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
6049 }
aef6302770c2 Fix issue in which VDP would have trouble emptying FIFO because the VDP cycle count got reset at end of frame.
Mike Pavone <pavone@retrodev.com>
parents: 63
diff changeset
6050
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
6051 static uint32_t vdp_cycles_hslot_wrap_h40(vdp_context * context)
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6052 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6053 if (context->hslot < 183) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6054 return MCLKS_LINE - context->hslot * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6055 } else if (context->hslot < HSYNC_END_H40) {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6056 uint32_t before_hsync = context->hslot < HSYNC_SLOT_H40 ? (HSYNC_SLOT_H40 - context->hslot) * MCLKS_SLOT_H40 : 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6057 uint32_t hsync = 0;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6058 for (int i = context->hslot <= HSYNC_SLOT_H40 ? 0 : context->hslot - HSYNC_SLOT_H40; i < sizeof(h40_hsync_cycles)/sizeof(uint32_t); i++)
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6059 {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6060 hsync += h40_hsync_cycles[i];
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6061 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6062 uint32_t after_hsync = (256- HSYNC_END_H40) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6063 return before_hsync + hsync + after_hsync;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6064 } else {
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6065 return (256-context->hslot) * MCLKS_SLOT_H40;
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6066 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6067 }
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6068
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
6069 static uint32_t vdp_cycles_next_line(vdp_context * context)
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6070 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6071 if (context->regs[REG_MODE_4] & BIT_H40) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6072 //TODO: Handle "illegal" Mode 4/H40 combo
647
5d58dcd94733 Fix the HV counter and adjust the slots of certain VDP events
Michael Pavone <pavone@retrodev.com>
parents: 629
diff changeset
6073 if (context->hslot < LINE_CHANGE_H40) {
697
7f96bd1cb1be Sync fixes and logging to fix more sync issues
Michael Pavone <pavone@retrodev.com>
parents: 680
diff changeset
6074 return (LINE_CHANGE_H40 - context->hslot) * MCLKS_SLOT_H40;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6075 } else {
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6076 return vdp_cycles_hslot_wrap_h40(context) + LINE_CHANGE_H40 * MCLKS_SLOT_H40;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6077 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6078 } else {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6079 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6080 if (context->hslot < LINE_CHANGE_H32) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6081 return (LINE_CHANGE_H32 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6082 } else if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6083 return MCLKS_LINE - (context->hslot - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6084 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6085 return (256-context->hslot + LINE_CHANGE_H32) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6086 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6087 } else {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6088 if (context->hslot < 148) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6089 return (148 - context->hslot + LINE_CHANGE_MODE4 - 233) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6090 } else if (context->hslot < LINE_CHANGE_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6091 return (LINE_CHANGE_MODE4 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6092 } else {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6093 return MCLKS_LINE - (context->hslot - LINE_CHANGE_MODE4) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6094 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6095 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6096 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6097 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6098
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6099 static void get_jump_params(vdp_context *context, uint32_t *jump_start, uint32_t *jump_dst)
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6100 {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6101 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6102 if (context->flags2 & FLAG2_REGION_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6103 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6104 *jump_start = 0x10B;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6105 *jump_dst = 0x1D2;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6106 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6107 *jump_start = 0x103;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6108 *jump_dst = 0x1CA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6109 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6110 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6111 if (context->regs[REG_MODE_2] & BIT_PAL) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6112 *jump_start = 0x100;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6113 *jump_dst = 0x1FA;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6114 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6115 *jump_start = 0xEB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6116 *jump_dst = 0x1E5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6117 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6118 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6119 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6120 *jump_start = 0xDB;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6121 *jump_dst = 0x1D5;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6122 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6123 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6124
1102
c15896605bf2 Clean up symbol visiblity and delete a ltitle bit of dead code
Michael Pavone <pavone@retrodev.com>
parents: 1077
diff changeset
6125 static uint32_t vdp_cycles_to_line(vdp_context * context, uint32_t target)
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6126 {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6127 uint32_t jump_start, jump_dst;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6128 get_jump_params(context, &jump_start, &jump_dst);
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6129 uint32_t lines;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6130 if (context->vcounter < target) {
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6131 if (target < jump_start || context->vcounter > jump_start) {
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6132 lines = target - context->vcounter;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6133 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6134 lines = jump_start - context->vcounter + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6135 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6136 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6137 if (context->vcounter < jump_start) {
718
eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents: 717
diff changeset
6138 lines = jump_start - context->vcounter + 512 - jump_dst;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6139 } else {
718
eaba6789f316 Update vscroll latch implementation to be more in line with what Eke-Eke has observed. Revert the change to vdp_cycles_to_line because it breaks hints on line 0. H-Int timing is still a little messed up, but the previous change made things worse.
Michael Pavone <pavone@retrodev.com>
parents: 717
diff changeset
6140 lines = 512 - context->vcounter;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6141 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6142 if (target < jump_start) {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6143 lines += target;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6144 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6145 lines += jump_start + target - jump_dst;
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6146 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6147 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6148 return MCLKS_LINE * (lines - 1) + vdp_cycles_next_line(context);
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6149 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6150
680
4996369f1463 Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents: 678
diff changeset
6151 uint32_t vdp_cycles_to_frame_end(vdp_context * context)
4996369f1463 Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents: 678
diff changeset
6152 {
1167
e758ddbf0624 Initial work on emulating top and bottom border area
Michael Pavone <pavone@retrodev.com>
parents: 1163
diff changeset
6153 return context->cycles + vdp_cycles_to_line(context, context->inactive_start);
680
4996369f1463 Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents: 678
diff changeset
6154 }
4996369f1463 Some small synchronization improvements that do not seem to fix anything
Michael Pavone <pavone@retrodev.com>
parents: 678
diff changeset
6155
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6156 uint32_t vdp_next_hint(vdp_context * context)
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6157 {
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
6158 if (!(context->regs[REG_MODE_1] & BIT_HINT_EN)) {
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6159 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6160 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6161 if (context->flags2 & FLAG2_HINT_PENDING) {
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
6162 return context->pending_hint_start;
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6163 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6164 uint32_t hint_line;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6165 if (context->state != ACTIVE) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6166 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6167 if (hint_line > context->inactive_start) {
724
2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents: 722
diff changeset
6168 return 0xFFFFFFFF;
2174f92c5f9b Fix bug in vdp_next_hint that was causing HINTs to fire repeatedly when they should not have fired at all based on an HINT interval that was larger than the number of active lines in the display
Michael Pavone <pavone@retrodev.com>
parents: 722
diff changeset
6169 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6170 } else {
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6171 hint_line = context->vcounter + context->hint_counter + 1;
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6172 if (context->vcounter < context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6173 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6174 hint_line = context->regs[REG_HINT];
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6175 if (hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6176 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6177 }
1366
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
6178 if (hint_line >= context->vcounter) {
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
6179 //Next interrupt is for a line in the next frame that
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
6180 //is higher than the line we're on now so just passing
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
6181 //that line number to vdp_cycles_to_line will yield the wrong
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
6182 //result
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
6183 return context->cycles + vdp_cycles_to_line(context, 0) + hint_line * MCLKS_LINE;
1366
c74a2f31ae5f Fix regression in horizontal interrupt timing that was breaking the "water" palette swap in the Sonic series and other games
Michael Pavone <pavone@retrodev.com>
parents: 1365
diff changeset
6184 }
1325
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6185 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6186 } else {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6187 uint32_t jump_start, jump_dst;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6188 get_jump_params(context, &jump_start, &jump_dst);
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6189 if (hint_line >= jump_start && context->vcounter < jump_dst) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6190 hint_line = (hint_line + jump_dst - jump_start) & 0x1FF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6191 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6192 if (hint_line < context->vcounter && hint_line > context->inactive_start) {
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6193 return 0xFFFFFFFF;
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6194 }
58bfbed6cdb5 Fairly major rework of how active/passive is handled along with how the V30 mode bit is handled. Allows the vertical border extension trick in Overdrive 2 to work right
Michael Pavone <pavone@retrodev.com>
parents: 1322
diff changeset
6195 }
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6196 }
1371
5b20840711c1 Remove HINT_FUDGE and make a small adjustment to how VDP syncs with rest of system instead. Worse results on CRAM dot issue, but much less of a hack
Michael Pavone <pavone@retrodev.com>
parents: 1369
diff changeset
6197 return context->cycles + vdp_cycles_to_line(context, hint_line);
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6198 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6199
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6200 static uint32_t vdp_next_vint_real(vdp_context * context)
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6201 {
327
1b00258b1f29 Added some basic VDP debugging features to debugger. Fixed DMA enable bug
Mike Pavone <pavone@retrodev.com>
parents: 323
diff changeset
6202 if (!(context->regs[REG_MODE_2] & BIT_VINT_EN)) {
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6203 return 0xFFFFFFFF;
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6204 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6205 if (context->flags2 & FLAG2_VINT_PENDING) {
717
22dbdf50d33c Small correction to VBLANK flag timing. Fixed some inconsistencies in interrupt timing calculation.
Michael Pavone <pavone@retrodev.com>
parents: 714
diff changeset
6206 return context->pending_vint_start;
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6207 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6208
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6209
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6210 return vdp_next_vint_z80(context);
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6211 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6212
1171
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6213 uint32_t vdp_next_vint(vdp_context *context)
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6214 {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6215 uint32_t ret = vdp_next_vint_real(context);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6216 #ifdef TIMING_DEBUG
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6217 static uint32_t last = 0xFFFFFFFF;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6218 if (last != ret) {
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6219 printf("vdp_next_vint is %d at frame %d, line %d, hslot %d\n", ret, context->frame, context->vcounter, context->hslot);
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6220 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6221 last = ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6222 #endif
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6223 return ret;
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6224 }
43fa92976ff2 Fix some timing inconsistencies in H40 mode. Added some ifdefed timing debug code.
Michael Pavone <pavone@retrodev.com>
parents: 1170
diff changeset
6225
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
6226 uint32_t vdp_next_vint_z80(vdp_context * context)
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
6227 {
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
6228 uint16_t vint_line = (context->regs[REG_MODE_2] & BIT_MODE_5) ? context->inactive_start : context->inactive_start + 1;
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
6229 if (context->vcounter == vint_line) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6230 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6231 if (context->regs[REG_MODE_4] & BIT_H40) {
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6232 if (context->hslot >= LINE_CHANGE_H40 || context->hslot <= VINT_SLOT_H40) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6233 uint32_t cycles = context->cycles;
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6234 if (context->hslot >= LINE_CHANGE_H40) {
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6235 if (context->hslot < 183) {
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6236 cycles += (183 - context->hslot) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6237 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
6238
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6239 if (context->hslot < HSYNC_SLOT_H40) {
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6240 cycles += (HSYNC_SLOT_H40 - (context->hslot >= 229 ? context->hslot : 229)) * MCLKS_SLOT_H40;
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6241 }
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6242 for (int slot = context->hslot <= HSYNC_SLOT_H40 ? HSYNC_SLOT_H40 : context->hslot; slot < HSYNC_END_H40; slot++ )
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6243 {
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6244 cycles += h40_hsync_cycles[slot - HSYNC_SLOT_H40];
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6245 }
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6246 cycles += (256 - (context->hslot > HSYNC_END_H40 ? context->hslot : HSYNC_END_H40)) * MCLKS_SLOT_H40;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6247 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
6248
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6249 cycles += (VINT_SLOT_H40 - (context->hslot >= LINE_CHANGE_H40 ? 0 : context->hslot)) * MCLKS_SLOT_H40;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6250 return cycles;
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
6251 }
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6252 } else {
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
6253 if (context->hslot >= LINE_CHANGE_H32 || context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
6254 if (context->hslot <= VINT_SLOT_H32) {
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
6255 return context->cycles + (VINT_SLOT_H32 - context->hslot) * MCLKS_SLOT_H32;
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
6256 } else if (context->hslot < 233) {
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
6257 return context->cycles + (VINT_SLOT_H32 + 256 - 233 + 148 - context->hslot) * MCLKS_SLOT_H32;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6258 } else {
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
6259 return context->cycles + (VINT_SLOT_H32 + 256 - context->hslot) * MCLKS_SLOT_H32;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6260 }
995
2bc27415565b Fix some stuff with interrupt timing. The change in adjust_int_cycle gets Overdrive working again (vint was not being preferred over hint in some cases). One of the changes seems to have broken Fatal Rewind again, but no other regressions that I can see.
Michael Pavone <pavone@retrodev.com>
parents: 991
diff changeset
6261 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6262 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6263 } else {
1177
67e0462c30ce Fix line advancement in Mode 4 during inactive display. Fix a Mode 4 VInt timing discrepency
Michael Pavone <pavone@retrodev.com>
parents: 1175
diff changeset
6264 if (context->hslot >= LINE_CHANGE_MODE4) {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6265 return context->cycles + (VINT_SLOT_MODE4 + 256 - context->hslot) * MCLKS_SLOT_H32;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6266 }
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6267 if (context->hslot <= VINT_SLOT_MODE4) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6268 return context->cycles + (VINT_SLOT_MODE4 - context->hslot) * MCLKS_SLOT_H32;
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6269 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6270 }
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6271 }
1169
82d8b9324b10 Rework how inactive lines are handled. Fix H40 cycle increment in slot 182
Michael Pavone <pavone@retrodev.com>
parents: 1168
diff changeset
6272 int32_t cycles_to_vint = vdp_cycles_to_line(context, vint_line);
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6273 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6274 if (context->regs[REG_MODE_4] & BIT_H40) {
1175
0e0386fa795c Fix H40 VInt inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1174
diff changeset
6275 cycles_to_vint += MCLKS_LINE - (LINE_CHANGE_H40 - VINT_SLOT_H40) * MCLKS_SLOT_H40;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6276 } else {
1174
500d8deea802 Fix H32 VInt timing inconsistency
Michael Pavone <pavone@retrodev.com>
parents: 1173
diff changeset
6277 cycles_to_vint += (VINT_SLOT_H32 + 256 - 233 + 148 - LINE_CHANGE_H32) * MCLKS_SLOT_H32;
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6278 }
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
6279 } else {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6280 cycles_to_vint += (256 - LINE_CHANGE_MODE4 + VINT_SLOT_MODE4) * MCLKS_SLOT_H32;
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
6281 }
623
66cc60215e5c Fix most of the breakage caused by the vcounter/hcounter changes
Michael Pavone <pavone@retrodev.com>
parents: 622
diff changeset
6282 return context->cycles + cycles_to_vint;
333
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
6283 }
f16136a3835d Update Z80 vint timing
Mike Pavone <pavone@retrodev.com>
parents: 332
diff changeset
6284
1377
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6285 uint32_t vdp_next_nmi(vdp_context *context)
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6286 {
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6287 if (!(context->flags2 & FLAG2_PAUSE)) {
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6288 return 0xFFFFFFFF;
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6289 }
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6290 return context->cycles + vdp_cycles_to_line(context, 0x1FF);
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6291 }
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6292
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6293 void vdp_pbc_pause(vdp_context *context)
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6294 {
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6295 context->flags2 |= FLAG2_PAUSE;
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6296 }
e587f16e7d3d Implemented SMS pause button
Michael Pavone <pavone@retrodev.com>
parents: 1371
diff changeset
6297
953
08346262990b Remove the int number argument to vdp_int_ack since it is no longer used
Michael Pavone <pavone@retrodev.com>
parents: 952
diff changeset
6298 void vdp_int_ack(vdp_context * context)
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6299 {
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6300 //CPU interrupt acknowledge is only used in Mode 5
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6301 if (context->regs[REG_MODE_2] & BIT_MODE_5) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6302 //Apparently the VDP interrupt controller is not very smart
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
6303 //Instead of paying attention to what interrupt is being acknowledged it just
1160
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6304 //clears the pending flag for whatever interrupt it is currently asserted
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6305 //which may be different from the interrupt it was asserting when the 68k
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6306 //started the interrupt process. The window for this is narrow and depends
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6307 //on the latency between the int enable register write and the interrupt being
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6308 //asserted, but Fatal Rewind depends on this due to some buggy code
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6309 if ((context->flags2 & FLAG2_VINT_PENDING) && (context->regs[REG_MODE_2] & BIT_VINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6310 context->flags2 &= ~FLAG2_VINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6311 } else if((context->flags2 & FLAG2_HINT_PENDING) && (context->regs[REG_MODE_1] & BIT_HINT_EN)) {
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6312 context->flags2 &= ~FLAG2_HINT_PENDING;
5f119fe935e7 Update H32 and Mode 4 mappings based on latest tests
Michael Pavone <pavone@retrodev.com>
parents: 1157
diff changeset
6313 }
317
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6314 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6315 }
e5e8b48ad157 Initial stab at horizontal interrupts and improving accuracy of vertical interrupts. Also added the VINT pending flag to status port.
Mike Pavone <pavone@retrodev.com>
parents: 291
diff changeset
6316
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6317 #define VDP_STATE_VERSION 5
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6318 void vdp_serialize(vdp_context *context, serialize_buffer *buf)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6319 {
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6320 save_int8(buf, VDP_STATE_VERSION);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6321 save_int8(buf, VRAM_SIZE / 1024);//VRAM size in KB, needed for future proofing
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6322 save_buffer8(buf, context->vdpmem, VRAM_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6323 save_buffer16(buf, context->cram, CRAM_SIZE);
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
6324 save_buffer16(buf, context->vsram, MAX_VSRAM_SIZE);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6325 save_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6326 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6327 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6328 save_int8(buf, context->regs[i]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6329 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6330 save_int32(buf, context->address);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6331 save_int32(buf, context->serial_address);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6332 save_int8(buf, context->cd);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6333 uint8_t fifo_size;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6334 if (context->fifo_read < 0) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6335 fifo_size = 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6336 } else if (context->fifo_write > context->fifo_read) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6337 fifo_size = context->fifo_write - context->fifo_read;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6338 } else {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6339 fifo_size = context->fifo_write + FIFO_SIZE - context->fifo_read;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6340 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6341 save_int8(buf, fifo_size);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6342 for (int i = 0, cur = context->fifo_read; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6343 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6344 fifo_entry *entry = context->fifo + cur;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6345 cur = (cur + 1) & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6346 save_int32(buf, entry->cycle);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6347 save_int32(buf, entry->address);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6348 save_int16(buf, entry->value);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6349 save_int8(buf, entry->cd);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6350 save_int8(buf, entry->partial);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6351 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6352 //FIXME: Flag bits should be rearranged for maximum correspondence to status reg
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6353 save_int16(buf, context->flags2 << 8 | context->flags);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6354 save_int32(buf, context->frame);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6355 save_int16(buf, context->vcounter);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6356 save_int8(buf, context->hslot);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6357 save_int16(buf, context->hv_latch);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6358 save_int8(buf, context->state);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6359 save_int16(buf, context->hscroll_a);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6360 save_int16(buf, context->hscroll_b);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6361 save_int16(buf, context->vscroll_latch[0]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6362 save_int16(buf, context->vscroll_latch[1]);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6363 save_int16(buf, context->col_1);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6364 save_int16(buf, context->col_2);
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6365 save_int16(buf, context->test_regs[0]);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6366 save_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6367 save_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6368 save_int8(buf, context->buf_a_off);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6369 save_int8(buf, context->buf_b_off);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6370 //FIXME: Sprite rendering state is currently a mess
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6371 save_int8(buf, context->sprite_index);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6372 save_int8(buf, context->sprite_draws);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6373 save_int8(buf, context->slot_counter);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6374 save_int8(buf, context->cur_slot);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6375 for (int i = 0; i < MAX_SPRITES_LINE; i++)
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6376 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6377 sprite_draw *draw = context->sprite_draw_list + i;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6378 save_int16(buf, draw->address);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6379 save_int16(buf, draw->x_pos);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6380 save_int8(buf, draw->pal_priority);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6381 save_int8(buf, draw->h_flip);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6382 save_int8(buf, draw->width);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6383 save_int8(buf, draw->height);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6384 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6385 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6386 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6387 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6388 save_int8(buf, info->size);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6389 save_int8(buf, info->index);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6390 save_int16(buf, info->y);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6391 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6392 save_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
6393
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6394 save_int32(buf, context->cycles);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6395 save_int32(buf, context->pending_vint_start);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6396 save_int32(buf, context->pending_hint_start);
1925
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
6397 save_int32(buf, context->address_latch);
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
6398 //was cd_latch, for compatibility with older builds that expect it
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
6399 save_int8(buf, context->cd);
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
6400 save_int8(buf, context->window_h_latch);
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
6401 save_int8(buf, context->window_v_latch);
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6402 save_buffer16(buf, context->test_regs + 1, 7);
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6403 save_int8(buf, context->selected_test_reg);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6404 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6405
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6406 void vdp_deserialize(deserialize_buffer *buf, void *vcontext)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6407 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6408 vdp_context *context = vcontext;
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6409 uint8_t version = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6410 uint8_t vramk;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6411 if (version == 64) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6412 vramk = version;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6413 version = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6414 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6415 vramk = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6416 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6417 if (version > VDP_STATE_VERSION) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6418 warning("Save state has VDP version %d, but this build only understands versions %d and lower", version, VDP_STATE_VERSION);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6419 }
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6420 load_buffer8(buf, context->vdpmem, (vramk * 1024) <= VRAM_SIZE ? vramk * 1024 : VRAM_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6421 if ((vramk * 1024) > VRAM_SIZE) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6422 buf->cur_pos += (vramk * 1024) - VRAM_SIZE;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6423 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6424 load_buffer16(buf, context->cram, CRAM_SIZE);
1431
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
6425 for (int i = 0; i < CRAM_SIZE; i++)
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
6426 {
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
6427 update_color_map(context, i, context->cram[i]);
030b40139de9 Update VDP color map when loading a native save state
Michael Pavone <pavone@retrodev.com>
parents: 1428
diff changeset
6428 }
1906
2d462aa78349 Make VDP VSRAM capacity respect model selection
Michael Pavone <pavone@retrodev.com>
parents: 1899
diff changeset
6429 load_buffer16(buf, context->vsram, version > 1 ? MAX_VSRAM_SIZE : MIN_VSRAM_SIZE);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6430 load_buffer8(buf, context->sat_cache, SAT_CACHE_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6431 for (int i = 0; i <= REG_DMASRC_H; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6432 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6433 context->regs[i] = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6434 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6435 context->address = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6436 context->serial_address = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6437 context->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6438 uint8_t fifo_size = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6439 if (fifo_size > FIFO_SIZE) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6440 fatal_error("Invalid fifo size %d", fifo_size);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6441 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6442 if (fifo_size) {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6443 context->fifo_read = 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6444 context->fifo_write = fifo_size & (FIFO_SIZE - 1);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6445 for (int i = 0; i < fifo_size; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6446 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6447 fifo_entry *entry = context->fifo + i;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6448 entry->cycle = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6449 entry->address = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6450 entry->value = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6451 entry->cd = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6452 entry->partial = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6453 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6454 } else {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6455 context->fifo_read = -1;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6456 context->fifo_write = 0;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6457 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6458 uint16_t flags = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6459 context->flags2 = flags >> 8;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6460 context->flags = flags;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6461 context->frame = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6462 context->vcounter = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6463 context->hslot = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6464 context->hv_latch = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6465 context->state = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6466 context->hscroll_a = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6467 context->hscroll_b = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6468 context->vscroll_latch[0] = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6469 context->vscroll_latch[1] = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6470 context->col_1 = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6471 context->col_2 = load_int16(buf);
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6472 context->test_regs[0] = load_int16(buf);
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6473 load_buffer8(buf, context->tmp_buf_a, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6474 load_buffer8(buf, context->tmp_buf_b, SCROLL_BUFFER_SIZE);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6475 context->buf_a_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6476 context->buf_b_off = load_int8(buf) & SCROLL_BUFFER_MASK;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6477 context->sprite_index = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6478 context->sprite_draws = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6479 context->slot_counter = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6480 context->cur_slot = load_int8(buf);
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6481 if (version == 0) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6482 int cur_draw = 0;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6483 for (int i = 0; i < MAX_SPRITES_LINE * 2; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6484 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6485 if (cur_draw < MAX_SPRITES_LINE) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6486 sprite_draw *last = cur_draw ? context->sprite_draw_list + cur_draw - 1 : NULL;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6487 sprite_draw *draw = context->sprite_draw_list + cur_draw++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6488 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6489 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6490 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6491 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6492 draw->width = 1;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6493 draw->height = 8;
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
6494
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6495 if (last && last->width < 4 && last->h_flip == draw->h_flip && last->pal_priority == draw->pal_priority) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6496 int adjust_x = draw->x_pos + draw->h_flip ? -8 : 8;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6497 int height = draw->address - last->address /4;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6498 if (last->x_pos == adjust_x && (
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
6499 (last->width > 1 && height == last->height) ||
1866
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6500 (last->width == 1 && (height == 8 || height == 16 || height == 24 || height == 32))
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6501 )) {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6502 //current draw appears to be part of the same sprite as the last one, combine it
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6503 cur_draw--;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6504 last->width++;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6505 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6506 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6507 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6508 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6509 load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6510 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6511 load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6512 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6513 }
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6514 } else {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6515 for (int i = 0; i < MAX_SPRITES_LINE; i++)
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6516 {
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6517 sprite_draw *draw = context->sprite_draw_list + i;
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6518 draw->address = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6519 draw->x_pos = load_int16(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6520 draw->pal_priority = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6521 draw->h_flip = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6522 draw->width = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6523 draw->height = load_int8(buf);
84f16a804ce5 Rework sprite rendering phase 3 to better match behavior documented by Kabuto/Titan and fix edge case in sprite overflow flag that was breaking the RPS minigame in Alex Kidd
Michael Pavone <pavone@retrodev.com>
parents: 1834
diff changeset
6524 }
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6525 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6526 for (int i = 0; i < MAX_SPRITES_LINE; i++)
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6527 {
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6528 sprite_info *info = context->sprite_info_list + i;
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6529 info->size = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6530 info->index = load_int8(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6531 info->y = load_int16(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6532 }
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6533 load_buffer8(buf, context->linebuf, LINEBUF_SIZE);
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
6534
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6535 context->cycles = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6536 context->pending_vint_start = load_int32(buf);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6537 context->pending_hint_start = load_int32(buf);
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
6538 context->window_h_latch = context->regs[REG_WINDOW_H];
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
6539 context->window_v_latch = context->regs[REG_WINDOW_V];
1925
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
6540 if (version > 2) {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
6541 context->address_latch = load_int32(buf);
2223
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
6542 //was cd_latch, no longer used
1cccc57c069a Admit defeat on VDP address latching theory and implement it the way GPGX does. Fixes regression in VDP FIFO Testing and SMS VDPTEST
Michael Pavone <pavone@retrodev.com>
parents: 2205
diff changeset
6543 load_int8(buf);
2557
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
6544 if (version > 3) {
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
6545 context->window_h_latch = load_int8(buf);
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
6546 context->window_v_latch = load_int8(buf);
75dd7536c467 Apparently window v/h size is latched once per line. Fixes glitch in Landstalker
Michael Pavone <pavone@retrodev.com>
parents: 2513
diff changeset
6547 }
1925
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
6548 } else {
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
6549 context->address_latch = context->address;
039553703c20 Don't apply address and cd register changes to the 'live' registers until pending flag is cleared, but do preserve the upper address bits in the latch. Fixes regression in Overdrive 2 while preserving fix to Mona in 344 bytes
Michael Pavone <pavone@retrodev.com>
parents: 1917
diff changeset
6550 }
2675
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6551 if (version > 4) {
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6552 load_buffer16(buf, context->test_regs + 1, 7);
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6553 context->selected_test_reg = load_int8(buf);
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6554 } else {
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6555 memset(context->test_regs + 1, 0, 7 * sizeof(uint16_t));
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6556 context->selected_test_reg = 0;
dbff641a33df Implement Z80/PSG clock speed test register bit
Michael Pavone <pavone@retrodev.com>
parents: 2612
diff changeset
6557 }
1427
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6558 update_video_params(context);
4e5797b3935a WIP - New savestate format
Michael Pavone <pavone@retrodev.com>
parents: 1422
diff changeset
6559 }
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6560
1649
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6561 static vdp_context *current_vdp;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6562 static void vdp_debug_window_close(uint8_t which)
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6563 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6564 //TODO: remove need for current_vdp global, and find the VDP via current_system instead
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
6565 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
1649
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6566 {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6567 if (current_vdp->enabled_debuggers & (1 << i) && which == current_vdp->debug_fb_indices[i]) {
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6568 vdp_toggle_debug_view(current_vdp, i);
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6569 break;
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6570 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6571 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6572 }
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6573
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6574 void vdp_toggle_debug_view(vdp_context *context, uint8_t debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6575 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6576 if (context->enabled_debuggers & 1 << debug_type) {
1642
c6b2c0f8cc61 Implemented support for toggling off a debug view
Michael Pavone <pavone@retrodev.com>
parents: 1641
diff changeset
6577 render_destroy_window(context->debug_fb_indices[debug_type]);
c6b2c0f8cc61 Implemented support for toggling off a debug view
Michael Pavone <pavone@retrodev.com>
parents: 1641
diff changeset
6578 context->enabled_debuggers &= ~(1 << debug_type);
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6579 } else {
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
6580 uint32_t width,height;
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
6581 uint8_t fetch_immediately = 0;
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6582 char *caption;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6583 switch(debug_type)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6584 {
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
6585 case DEBUG_PLANE:
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6586 caption = "BlastEm - VDP Plane Debugger";
2579
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
6587 if (context->type == VDP_GENESIS) {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
6588 width = height = 1024;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
6589 } else {
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
6590 width = height = 512;
bd8d1babbfb5 Implement background plane debug view for Mode 4
Michael Pavone <pavone@retrodev.com>
parents: 2575
diff changeset
6591 }
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
6592 break;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
6593 case DEBUG_VRAM:
1634
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
6594 caption = "BlastEm - VDP VRAM Debugger";
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
6595 width = 1024;
e397766c3028 Added VRAM debug window
Michael Pavone <pavone@retrodev.com>
parents: 1632
diff changeset
6596 height = 512;
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6597 break;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
6598 case DEBUG_CRAM:
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
6599 caption = "BlastEm - VDP CRAM Debugger";
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
6600 width = 512;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
6601 height = 512;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
6602 fetch_immediately = 1;
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
6603 break;
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
6604 case DEBUG_COMPOSITE:
1641
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
6605 caption = "BlastEm - VDP Plane Composition Debugger";
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
6606 width = LINEBUF_SIZE;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
6607 height = context->inactive_start + context->border_top + context->border_bot;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
6608 fetch_immediately = 1;
bc9bb4e5856f Basic version of layer compositing debug view in a separate window
Michael Pavone <pavone@retrodev.com>
parents: 1640
diff changeset
6609 break;
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6610 default:
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6611 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6612 }
1649
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6613 current_vdp = context;
2693
46dba737b931 WIP Nuklear UI in VDP debug windows
Michael Pavone <pavone@retrodev.com>
parents: 2686
diff changeset
6614 #ifdef DISABLE_NUKLEAR
1649
b500e971da75 Allow closing VDP debug windows with the close button in the window title bar
Michael Pavone <pavone@retrodev.com>
parents: 1644
diff changeset
6615 context->debug_fb_indices[debug_type] = render_create_window(caption, width, height, vdp_debug_window_close);
2693
46dba737b931 WIP Nuklear UI in VDP debug windows
Michael Pavone <pavone@retrodev.com>
parents: 2686
diff changeset
6616 #else
46dba737b931 WIP Nuklear UI in VDP debug windows
Michael Pavone <pavone@retrodev.com>
parents: 2686
diff changeset
6617 context->debug_fb_indices[debug_type] = debug_create_window(debug_type, caption, width, height, vdp_debug_window_close);
46dba737b931 WIP Nuklear UI in VDP debug windows
Michael Pavone <pavone@retrodev.com>
parents: 2686
diff changeset
6618 #endif
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6619 if (context->debug_fb_indices[debug_type]) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6620 context->enabled_debuggers |= 1 << debug_type;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6621 }
1638
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
6622 if (fetch_immediately) {
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
6623 context->debug_fbs[debug_type] = render_get_framebuffer(context->debug_fb_indices[debug_type], &context->debug_fb_pitch[debug_type]);
f27142c48567 Initial stab at CRAM debug in a detached window
Michael Pavone <pavone@retrodev.com>
parents: 1637
diff changeset
6624 }
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6625 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6626 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6627
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6628 void vdp_inc_debug_mode(vdp_context *context)
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6629 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6630 uint8_t active = render_get_active_framebuffer();
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6631 if (active < FRAMEBUFFER_USER_START) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6632 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6633 }
2243
0d1d5dccdd28 Initial implementation of oscilloscope debug view
Michael Pavone <pavone@retrodev.com>
parents: 2236
diff changeset
6634 for (int i = 0; i < NUM_DEBUG_TYPES; i++)
1631
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6635 {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6636 if (context->enabled_debuggers & (1 << i) && context->debug_fb_indices[i] == active) {
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6637 context->debug_modes[i]++;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6638 return;
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6639 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6640 }
c4ba3177b72d WIP new VDP plane debug view and support for detached VDP debug views generally
Michael Pavone <pavone@retrodev.com>
parents: 1629
diff changeset
6641 }
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6642
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6643 void vdp_replay_event(vdp_context *context, uint8_t event, event_reader *reader)
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6644 {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6645 uint32_t address;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6646 deserialize_buffer *buffer = &reader->buffer;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6647 switch (event)
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6648 {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6649 case EVENT_VRAM_BYTE:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
6650 reader_ensure_data(reader, 3);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6651 address = load_int16(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6652 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6653 case EVENT_VRAM_BYTE_DELTA:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
6654 reader_ensure_data(reader, 2);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6655 address = reader->last_byte_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6656 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6657 case EVENT_VRAM_BYTE_ONE:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
6658 reader_ensure_data(reader, 1);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6659 address = reader->last_byte_address + 1;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6660 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6661 case EVENT_VRAM_BYTE_AUTO:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
6662 reader_ensure_data(reader, 1);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6663 address = reader->last_byte_address + context->regs[REG_AUTOINC];
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6664 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6665 case EVENT_VRAM_WORD:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
6666 reader_ensure_data(reader, 4);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6667 address = load_int8(buffer) << 16;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6668 address |= load_int16(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6669 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6670 case EVENT_VRAM_WORD_DELTA:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
6671 reader_ensure_data(reader, 3);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6672 address = reader->last_word_address + load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6673 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6674 case EVENT_VDP_REG:
1956
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
6675 case EVENT_VDP_INTRAM:
1957
ba06346611a1 Fix some netplay issues
Mike Pavone <pavone@retrodev.com>
parents: 1956
diff changeset
6676 reader_ensure_data(reader, event == EVENT_VDP_REG ? 2 : 3);
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6677 address = load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6678 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6679 }
2118
c5d0edf1d7e7 Fix some null-pointer dereference crashes on a ROM that abuses V28/V30 mode switching
Michael Pavone <pavone@retrodev.com>
parents: 2040
diff changeset
6680
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6681 switch (event)
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6682 {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6683 case EVENT_VDP_REG: {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6684 uint8_t value = load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6685 context->regs[address] = value;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6686 if (address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6687 context->double_res = (value & (BIT_INTERLACE | BIT_DOUBLE_RES)) == (BIT_INTERLACE | BIT_DOUBLE_RES);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6688 if (!context->double_res) {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6689 context->flags2 &= ~FLAG2_EVEN_FIELD;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6690 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6691 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6692 if (address == REG_MODE_1 || address == REG_MODE_2 || address == REG_MODE_4) {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6693 update_video_params(context);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6694 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6695 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6696 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6697 case EVENT_VRAM_BYTE:
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6698 case EVENT_VRAM_BYTE_DELTA:
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6699 case EVENT_VRAM_BYTE_ONE:
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6700 case EVENT_VRAM_BYTE_AUTO: {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6701 uint8_t byte = load_int8(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6702 reader->last_byte_address = address;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6703 vdp_check_update_sat_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6704 write_vram_byte(context, address ^ 1, byte);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6705 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6706 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6707 case EVENT_VRAM_WORD:
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6708 case EVENT_VRAM_WORD_DELTA: {
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6709 uint16_t value = load_int16(buffer);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6710 reader->last_word_address = address;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6711 vdp_check_update_sat(context, address, value);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6712 write_vram_word(context, address, value);
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6713 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6714 }
1956
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
6715 case EVENT_VDP_INTRAM:
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
6716 if (address < 128) {
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
6717 write_cram(context, address, load_int16(buffer));
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
6718 } else {
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
6719 context->vsram[address&63] = load_int16(buffer);
275f1c4bdb25 Netplay protocol size optimization
Michael Pavone <pavone@retrodev.com>
parents: 1946
diff changeset
6720 }
1946
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6721 break;
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6722 }
c3c62dbf1ceb WIP netplay support
Michael Pavone <pavone@retrodev.com>
parents: 1929
diff changeset
6723 }